JP4651161B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to the general formula In _x Ga _y Al _z The present invention relates to a semiconductor device using a compound semiconductor represented by N (wherein x + y + z = 1, 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1), and a method for manufacturing the same, and particularly a light emitting diode, etc. The present invention relates to an integrated optical semiconductor device in which a plurality of light emitting devices are formed on a silicon substrate and a method for manufacturing the same.
[0002]
[Prior art]
Formula In _x Ga _y Al _z Nitride-based semiconductors represented by N (where x + y + z = 1, 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1) are used for light emitting elements and photodetectors ranging from ultraviolet to yellow regions. Used in optical devices. A flat panel display using a blue light emitting diode or a green light emitting diode made of this material is manufactured by arranging a plurality of individually manufactured elements on another appropriate structure. A light-emitting diode, a laser diode, or an ultraviolet detector is usually made of the above-described compound semiconductor formed on a sapphire substrate, and a plurality of thin films having different compositions (different values of x, y, and z) It has the laminated structure of. All the elements put to practical use so far are individual elements. Such an individual element can be obtained, for example, through a process of cutting a diode produced on a large sapphire substrate into a required size and providing an electrode. The reason why compound semiconductors having the above general formula have been formed on sapphire substrates is that no other suitable substrate has been found.
[0003]
It is a well-known fact that a semiconductor integrated circuit using silicon has a plurality of elements monolithically integrated and mounted on a single substrate to improve its characteristics. If a compound semiconductor can be grown on a silicon substrate to produce an optical device, it is expected to contribute to the advancement of optical technology such as optical communication. Attempts to establish such technology have been made for a long time, but no successful examples have been found. The main reason for this is that compound semiconductors and silicon, which are frequently used as optical semiconductors, differ greatly in lattice constants and physical properties, and no method has been found for obtaining high-quality compound semiconductor crystals that can withstand practical use on silicon substrates. is there. For example, GaAs grown on a silicon substrate cracks and is not suitable for device fabrication.
[0004]
Formula In _x Ga _y Al _z With respect to a nitride semiconductor represented by N (wherein x + y + z = 1, 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1), the main surface of the substrate is partially covered with an appropriate mask. A high-quality crystal that does not include a crack selectively in a minute region of a substrate that is not covered with a mask can be manufactured. When forming a nitride semiconductor layer with a thickness greater than the critical thickness (usually about 0.5 microns), cracks are less likely to occur if the size of the microregion is 100 microns to 200 microns or less. If it exceeds, cracks will occur. Further, in the crystal growth of the compound semiconductor represented by the above formula, if a buffer layer is used, constraints such as lattice constant matching with the substrate are greatly relaxed, and the quality of the obtained crystal is improved. For example, the lattice defect density is reduced by 1 to 2 orders of magnitude. If such fine diodes made of a nitride semiconductor with few lattice defects can be arranged on a single substrate, an integrated diode array can be realized. However, there is no example that realizes such a diode arrangement. No method has been found for producing a fine and high-quality single crystal array on a single substrate.
[0005]
[Problems to be solved by the invention]
One object of the present invention is to provide a semiconductor device made of a high-quality nitride crystal formed on a silicon substrate.
[0006]
Another object of the present invention is to provide a novel method capable of forming a good quality nitride semiconductor crystal on a silicon substrate.
[0007]
A further object of the present invention is to provide a method capable of selectively epitaxially growing a nitride semiconductor single crystal having a fixed crystal orientation and size on a silicon substrate.
[0008]
A further object of the present invention is to provide a diode array that can be used as an optical element, in which a plurality of nitride semiconductor elements are arranged on a silicon substrate.
[0009]
A further object of the present invention is to provide a method of manufacturing a device in which a plurality of nitride semiconductor elements are arranged on a silicon substrate in a predetermined pattern.
[0010]
[Means for Solving the Problems]
According to the present invention, a semiconductor element is provided, and the element includes a silicon single crystal in which a structure selected from the group consisting of a hole and a groove is formed, and a semiconductor layer formed in the structure. In this structure, the structure has a slope different from the main surface of the silicon single crystal, and a crystal face different from the crystal face appearing on the main surface appears on the slope, and the semiconductor layer is formed on the slope. Formed and the formula In _x Ga _y Al _z It consists of a nitride crystal represented by N (wherein x + y + z = 1, 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1).
[0011]
In the device according to the present invention, the hole or the groove may be formed by etching a silicon single crystal. Typically, an etched facet surface appears on the slope of the hole or groove.
[0012]
In a preferred embodiment of the present invention, the (001) plane appears on the main surface of the silicon single crystal, and the (111) plane of the silicon single crystal appears on the slope. The c-axis of the nitride crystal is preferably oriented substantially perpendicular to the slope.
[0013]
In the device according to the present invention, the holes formed in the silicon single crystal can be pyramidal. Preferably, a pyramidal hole having a square opening can be formed, and one side of the square is preferably substantially parallel to the <110> axis of the silicon single crystal.
[0014]
In the device according to the present invention, the groove formed in the silicon single crystal can be V-shaped. The width direction of the opening of the V-shaped groove (V groove) is preferably substantially parallel to the <110> axis of the silicon single crystal.
[0015]
In the device according to the present invention, the silicon single crystal may have a hole or groove having a flat bottom surface. A semiconductor layer can be provided on the slope of such a hole or groove.
[0016]
Typically, the semiconductor layer has a pn junction, and the semiconductor layer operates as a light emitting element or a light detecting element. In addition, the device according to the present invention can include a metal layer bonded to the semiconductor layer. Typically, the semiconductor layer bonded to the metal layer can operate as a light sensing element.
[0017]
In the device according to the present invention, the angle formed between the facet plane of the semiconductor layer and the main surface of the silicon single crystal can be 0 to 10 °. Such facet surfaces can be used as light windows.
[0018]
In the present invention, a plurality of holes or grooves can be formed in a silicon single crystal, and a semiconductor layer can be formed in each hole or groove.
[0019]
According to the present invention, there is provided a method for manufacturing a semiconductor element including a silicon single crystal and a nitride semiconductor formed thereon, and the manufacturing method is a silicon single crystal having a crystal plane appearing on a main surface of the silicon single crystal. Exposing different crystal planes, and on the exposed crystal plane, the formula In _x Ga _y Al _z A step of epitaxially growing a nitride semiconductor crystal represented by N (wherein x + y + z = 1, 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1).
[0020]
In the manufacturing method according to the present invention, the exposing step includes a step of partially covering the silicon single crystal with a mask material, and a step of etching a portion of the silicon single crystal not covered with the mask material. Typically, the exposed crystal face is a faceted face that has emerged by etching.
[0021]
In a preferred embodiment of the present invention, the (001) plane appears on the main surface of the silicon single crystal, and the exposed crystal plane is the (111) plane.
[0022]
The portion of the silicon single crystal not covered with the mask material can be a region having a square surface. One side of the square is preferably parallel to the <110> axis of the silicon single crystal. In this case, holes can be formed in the etching process.
[0023]
The portion of the silicon single crystal not covered with the mask material can be a region having a circular surface, and a hole can be formed in the etching process.
[0024]
The portion of the semiconductor silicon single crystal that is not covered with the mask material may be a region having a band-like surface. The width direction of the band-shaped surface is preferably parallel to the <110> axis of the silicon single crystal. In this case, the groove can be formed in the etching process.
[0025]
In the manufacturing method according to the present invention, a plurality of silicon single crystal portions not covered with a mask can be provided separated from each other. For example, the plurality of portions not covered with the mask are arranged in a matrix or stripe. Different semiconductor elements can be manufactured by etching a plurality of portions not covered by the mask and growing different nitride semiconductor crystals on the crystal planes exposed in the respective portions.
[0026]
In the manufacturing method according to the present invention, the mask material is preferably a material that can withstand etching and the growth temperature and growth atmosphere of the nitride semiconductor. Further, the mask material is preferably a material that inhibits the growth of the nitride semiconductor crystal thereon. For example, the mask material is selected from the group consisting of refractory metals containing tungsten, refractory metal compounds containing tungsten compounds, and inorganic insulating materials containing silicon nitride and silicon oxide.
[0027]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 shows an example of a semiconductor device according to the present invention. The semiconductor element 10 has a silicon single crystal substrate 11 and a nitride semiconductor layer 12 formed thereon. Typically, the semiconductor element 10 has a pair of electrodes 13a and 13b. The electrode 13 a is formed on the layer 12, and the electrode 13 b is formed on the back surface of the substrate 11. The semiconductor layer 12 is provided in a hole or groove structure 14 formed in the substrate 11. If the structure 14 is a hole, the hole may be pyramidal as shown in FIG. The hole 24 a shown in FIG. 2 has a square, preferably square opening 25. On the other hand, when the structure 14 is a groove, the groove can be a V-groove as shown in FIG. In any case, the structure 14 has a slope 11 b different from the main surface 11 a of the substrate 11. Typically, the semiconductor layer 12 is formed on a pair of slopes 11b. A crystal plane different from the crystal plane appearing on the main surface 11a of the substrate 11 appears on the inclined surface 11b. For example, when the crystal plane appearing on the main surface 11a is the (001) plane, the preferred crystal plane appearing on the slope 11b is the (111) plane.
[0028]
FIG. 4 shows another example of a semiconductor device according to the present invention. The semiconductor element 40 includes a silicon single crystal substrate 41 and a nitride semiconductor layer 42 formed thereon. An electrode 43 a is formed on the semiconductor layer 42, and an electrode 43 b is formed on the back surface of the substrate 41. The semiconductor layer 42 is provided in a hole or groove structure 44 formed in the substrate 41. The structure 44 has a flat portion (terrace portion) at the bottom. If the structure 44 is a hole, the hole may be, for example, a truncated pyramid as shown in FIG. The hole 54 shown in FIG. 5 has a square, preferably square, opening 55. On the other hand, if the structure 44 is a groove, the groove may have a flat surface at the bottom as shown in FIG. In any case, the structure 44 has a slope 41 b different from the main surface 41 a of the substrate 41. The semiconductor layer 42 is formed on the slope 41b. A crystal plane different from the crystal plane appearing on the main surface 41a of the substrate 41 appears on the inclined surface 41b. For example, when the crystal plane appearing on the main surface 41a is the (001) plane, the preferred crystal plane appearing on the slope 41b is the (111) plane.
[0029]
The device according to the present invention can be manufactured, for example, using a process as shown in FIG. A silicon single crystal substrate 71 is prepared (FIG. 7A), and its main surface 71a is covered with a mask material 72 (FIG. 7B). The mask material 72 can be formed by sputtering, CVD, or the like. Next, the mask material 72 is patterned using a lithography method to form an opening 73 (FIG. 7C). Next, holes or grooves 74 are formed in the substrate 71 by etching or the like (FIG. 7D). At this time, a crystal plane different from the crystal plane appearing on the main surface 71 a of the substrate 71 is exposed on the surface 75 constituting the hole or groove 74. For example, when the crystal plane appearing on the main surface 71a is the (001) plane, it is preferable to expose the (111) plane on the plane 75. Next, a crystal of a nitride semiconductor is epitaxially grown on the crystal plane exposed on the plane 75, thereby obtaining a semiconductor layer 76 (FIG. 7E).
[0030]
The electrode for the element can be formed as shown in FIG. 8, for example. The structure having the mask material 82 on the silicon single crystal substrate 81 as shown in FIG. 8A is etched to remove the mask material 82 (FIG. 8B). Next, an electrode 83 is formed on the nitride semiconductor layer 86 formed on the substrate 81 (FIG. 8C). Further, an electrode 84 is formed on the back surface of the substrate 81 (FIG. 8D).
[0031]
Moreover, you may form an electrode as shown in FIG. The electrode 93 is formed on the nitride semiconductor layer 96 formed on the substrate 91 while the silicon single crystal substrate 91 is covered with the mask material 92 (FIG. 9A) (FIG. 9B). . Next, the electrode 93 is covered with a mask material 97 different from the mask material 92 (FIG. 9C). For example, the mask material 92 can be an inorganic material such as silicon nitride or silicon oxide, and the mask material 97 can be an organic material such as a resist resin. Then, after selectively removing the mask material 92 first, the mask material 97 is removed using a reagent or treatment that does not damage the electrode, and the electrode 93 is exposed (FIG. 9D). Next, an electrode 94 is formed on the back surface of the substrate 91 (FIG. 9E).
[0032]
In the processes shown in FIGS. 8 and 9, the mask material is removed, but the mask material is partially left and used for other steps, for example, for forming a circuit near the insulating nitride semiconductor device for electrodes. May be.
[0033]
In the present invention, the nitride semiconductor layer is made of In. _x Ga _y Al _z It consists of a nitride crystal represented by N (wherein x + y + z = 1, 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1). The composition of the semiconductor layer can be appropriately changed according to the function of the element required. The nitride semiconductor layer can form various elements including light emitting elements such as light emitting diodes, double heterojunction lasers, particularly semiconductor lasers including quantum well lasers, and light detecting elements.
[0034]
According to the present invention, a device in which a nitride semiconductor layer is formed in one hole or groove may be provided, or a device in which a nitride semiconductor layer is formed in a plurality of holes or grooves separated from each other may be provided. Also good. For example, after forming a plurality of holes or grooves on a silicon single crystal, a nitride semiconductor layer may be formed in each hole or groove.
Figures 10 and 11 show such an example. In the apparatus 100 shown in FIG. 10, a plurality of holes 104 are arranged in a matrix in the silicon single crystal 101, and the nitride semiconductor layer 102 and the electrode 103 are arranged in each hole 104. In the device 110 shown in FIG. 11, a plurality of grooves 114 are arranged in a stripe shape in the silicon single crystal 111, and the nitride semiconductor layer 112 and the electrode 113 are arranged in each groove 114.
[0035]
As a method for producing an array of diodes on a semiconductor substrate, there has been a method in which a uniform compound semiconductor thin film is produced and the diodes are separated there by a method such as lithography. On the other hand, in the method according to the present invention, an array of diodes is produced on the substrate in a form separated from the beginning.
[0036]
As described above, in the present invention, first, a surface different from the main surface (substrate surface) is formed on a silicon substrate, and a compound semiconductor thin film and an element are formed on the surface by selective growth. In the step of forming different surfaces, for example, a silicon nitride film or a silicon oxide film is deposited as a mask material on a silicon substrate, and then a circular, rectangular, or strip-shaped opening is formed in the film by lithography. Then, through a process such as etching through the opening, for example, a hole having a circular opening having a diameter of 150 μm or less, a hole having a rectangular opening having a side of 150 μm or less, or a width of 150 μm or less in the silicon substrate. Open the groove. Next, a diode can be manufactured by epitaxially growing a nitride semiconductor selectively in the formed hole or groove. Moreover, when forming a hole or a groove | channel, the hole or groove | channel which can form a pyramid-shaped hole and a V-groove, and has a surface substantially parallel to a substrate surface in a bottom part can be formed. Typically, a diode is manufactured by epitaxially growing a nitride semiconductor on the slope of the formed hole or groove. The size and arrangement of the diodes can be determined by the size of the holes or grooves and the form of the arrangement. By selectively forming the nitride semiconductor crystal on the substrate, it is possible to prevent the quality of the obtained crystal from being lowered and to increase the internal quantum efficiency of the diode.
[0037]
In the present invention, a silicon substrate in which a crystal plane other than the (111) plane appears on the main surface can be used. In this case, the c-axis of the nitride semiconductor crystal formed in the hole or groove can be oriented in a direction different from the main surface of the silicon substrate. Thereby, facet planes (generally (1-101) plane) other than the c-plane of the crystal represented by the above formula appear on the main surface side of the silicon substrate. If an electrode is formed on the c-plane side, facet planes other than the c-plane can be used as light windows, and the external quantum efficiency can be increased in the optical element. On the other hand, when a silicon substrate in which the (111) plane appears on the main surface is used, the c-plane of the compound semiconductor represented by the above formula is oriented on the main surface side of the silicon substrate, and this plane can be used as a light window.
[0038]
In the present invention, a silicon substrate having a (001) plane oriented to the main surface can be preferably used. Other than that, a silicon substrate in which the (011) plane and the (n11) plane (where n is an integer other than 1) is oriented to the main surface can be preferably used. Furthermore, the main surface of the silicon substrate may have an off angle with respect to these crystal planes. Hereinafter, the present invention will be described in more detail with reference to an example in which a diode is prepared using a silicon substrate having a (001) plane oriented to the main surface.
[0039]
In manufacturing the diode, as shown in FIG. 12, a silicon nitride film or a silicon dioxide film 132 is deposited on the silicon substrate 131 whose (001) plane appears on the main surface 131a by sputtering or CVD. This film is used as a mask material in the selective growth of a nitride semiconductor. The mask material may be any other material as long as it can withstand the temperature (usually about 1000 ° C.) and atmosphere of the nitride semiconductor crystal growth. For example, a high melting point material such as tungsten and a compound thereof can be used. A film thickness of 1 μm or less is usually sufficient. Next, a hole or a groove having a size and a shape corresponding to a target diode is formed in the mask material using a lithography method such as photolithography or electron beam lithography. For example, a square hole having a side of 20 μm is formed. The direction of the square side is aligned with the <110> axis direction of the silicon substrate. This alignment is an important factor because it is closely related to the crystal orientation of the nitride single crystal to be obtained and the facet surface formed by etching. However, if the hole formed in the mask material is circular, there is no need to pay particular attention to such a direction.
[0040]
Next, the silicon is etched with chemicals. By this etching, the (111) plane of the silicon 131 is exposed as a facet. In order to obtain facets, wet etching is usually used. By this etching, pyramidal holes 144 defined by the four inclined surfaces 141 are formed as shown in FIG. The opening of the hole 144 is square. The (111) plane that is a facet appears on any inclined surface 141. Even when a circular hole is made in the mask material, a pyramidal hole having a square opening can be obtained in the same manner. The angle formed by the (001) plane and the (111) plane is 125.3 °. Therefore, the angle formed between the silicon main surface 131a and the inclined surface 141 is approximately 123.5 °.
[0041]
Next, selective epitaxial growth of a nitride semiconductor crystal is performed on the inclined surface 141 of the hole 144. For this purpose, first, the silicon substrate is cleaned to clean the surface. This process may be a conventional method used in silicon integrated circuit fabrication technology. Next, the substrate is introduced into a nitride semiconductor crystal growth furnace. For crystal growth, a metal organic vapor phase epitaxy method capable of selective growth is used. Trimethylgallium, trimethylindium, trimethylaluminum, ammonia and the like are used as raw materials, and the growth temperature is usually about 800 ° C. to 1200 ° C. Formula In _x Ga _y Al _z The composition of the compound semiconductor represented by N, that is, the values of x, y, and z are controlled by the supply ratio of the raw material. When a p-type or n-type semiconductor is used, separate raw materials are prepared for adding Mg or Si.
[0042]
The process of growing a nitride semiconductor crystal on a silicon substrate is a typical heteroepitaxial growth, and the control of the initial growth mode affects the result. That is, if ammonia supplied as a nitride semiconductor raw material reacts with silicon to form a silicon nitride film on the clean surface, a nitride semiconductor crystal cannot be obtained. It is necessary to time the nitride semiconductor crystal before the silicon nitride film is formed. Normally, when trimethylaluminum is supplied before supplying ammonia, the outermost surface of the silicon substrate is covered with aluminum due to the strong reactivity of aluminum, and the subsequent growth of the nitride semiconductor single crystal is performed smoothly. This technique is extremely important for the realization of the present invention.
[0043]
Since nitride semiconductor crystals are usually hexagonal, a hexagonal frustum-shaped single crystal can be grown on the (111) plane. The hexagonal frustum has six (1-101) facet surfaces of the nitride semiconductor as side surfaces and the (0001) surface, that is, c-plane as the top surface. The side face of the hexagonal frustum has an angle of 62 ° with the (111) plane of silicon due to the symmetry of the crystal, and thus has an angle of 7.3 ° with the (001) plane of silicon. The bottom of the groove or hole formed in the silicon substrate is filled with a nitride semiconductor, and no hexagonal pyramid shape appears on the bottom. This is because nitride semiconductor hexagonal frustums formed on two or four silicon (111) facet planes merge at the bottom.
[0044]
Finally, a diode 140 as shown in FIG. 13 is obtained, in which a semiconductor layer 143 made of a nitride single crystal is embedded in the groove or hole. The size of the single crystal composing the semiconductor layer 143 is determined by the size of the groove or hole produced first. On the inclined surface 141 where the (111) plane of the silicon single crystal substrate 131 appears, an initial deposition layer 152 containing aluminum, an n-type nitride semiconductor layer 153, an active layer 154, and a p-type nitride semiconductor layer 155 are formed. ing. An upper electrode 164 is formed on the p-type nitride semiconductor layer 155, and a lower electrode 165 is formed on the back surface of the substrate 131.
[0045]
FIG. 14 is an enlarged view showing a state in which a semiconductor layer 143 made of a single crystal nitride is selectively formed on a substrate 131 partially covered with a mask material 132. The (001) plane appears on the main surface 131a of the substrate 131, while the (111) plane appears on the inclined surface 141. The angle formed by the (001) plane and the (111) plane is 125.3 °, and therefore the angle formed by the main surface 131a and the inclined surface 141 is 125.3 °. The angle formed by the facet surface 160 and the inclined surface 141 of the semiconductor layer 143 is 62 °. Facet surface 160 is a (1-101) plane of nitride single crystal. The angle formed by facet surface 160 and main surface 131a is 7.3 °. Thus, facet surface 160 is nearly parallel to main surface 131a. Therefore, the light emission of the diode 140 can be efficiently observed through the facet surface 160. Another facet surface 161 of the nitride single crystal constituting the semiconductor layer 143 is a (0001) plane. Facet surface 161 is located at the top of the grown nitride single crystal. The c-axis of the hexagonal nitride single crystal is easily oriented perpendicular to the (111) plane of the silicon single crystal, and therefore the nitride single crystal is likely to grow on the (111) plane. As shown in FIG. 14, the c-axis of the nitride single crystal is oriented substantially perpendicular to the inclined surface 141.
[0046]
FIG. 15 shows another specific example using the silicon single crystal substrate 181 in which the (001) plane appears on the main surface. In this case, the substrate 181 is partially covered with a mask material 182, and a hole or groove 184 having a flat surface 181b at the bottom is formed by etching. The bottom surface 181b is substantially parallel to the main surface 181a of the substrate 181. The (001) plane of the silicon single crystal is exposed on the bottom surface 181b. The hole or groove 184 is defined by a bottom surface 181b followed by a side surface 191. Side surface 191 is an inclined surface that is not perpendicular to main surface 181a. The (111) plane appears on the side surface 191. The manufacturing process of this specific example will be described below.
[0047]
Referring to FIG. 16, first, a first silicon dioxide film 182 ′ is deposited on a silicon substrate 181 by sputtering or CVD (FIG. 16A). Next, a hole or groove 194 having a desired size and shape is formed in the film by a method such as photolithography or electron beam lithography (FIG. 16B). For example, a rectangular hole having sides of 100 μm and 500 μm is formed. The direction of the long side or short side (groove width) of the rectangle is aligned with the <110> axis of the silicon substrate. This alignment is an important factor because it is closely related to the crystal orientation or facet plane of the nitride single crystal to be obtained. Subsequently, a vertical groove 184 ′ having a depth of 20 μm is formed in the substrate 181 by using a dry etching method such as reactive ion etching (FIG. 16C). Next, the first silicon dioxide film 182 ′ is removed (FIG. 16D), and a second silicon dioxide film 182 is deposited on the silicon substrate 181 in which the groove 184 ′ is formed by sputtering or CVD (FIG. 16). 16 (e)). Subsequently, the silicon dioxide film 182 around the trench 184 ′ is similarly etched using a method such as photolithography or electron beam lithography (FIG. 16F). Next, wet etching of silicon with chemicals is performed to form a side surface 191 in which the (111) facet surface of silicon appears, and a groove 184 is obtained (FIG. 16G).
[0048]
The quality of the nitride single crystal depends on the initial growth process on the (111) facet surface obtained on the silicon substrate. As described above, it is necessary to supply trimethylaluminum at the initial stage of growth, cover the silicon surface with an aluminum compound, and then immediately supply trimethylgallium and ammonia to perform crystal growth of the nitrogen compound semiconductor. In particular, better results can be obtained by keeping the supply amount of trimethylaluminum relatively large at the initial stage of growth and not stopping the supply of trimethylaluminum to a thickness of about 50 nm. In nitride semiconductor crystal growth on sapphire, an AlN or GaN film formed at a low temperature (about 600 ° C.) works effectively as a buffer layer, but in crystal growth on silicon, an aluminum compound layer at a high temperature of 1000 ° C. or higher. It is effective to form
[0049]
The finally obtained semiconductor element is shown in FIG. In the semiconductor element 200, a semiconductor layer 193 made of nitride single crystal is formed on the inclined surface 191 of the groove or hole 184. The size of the single crystal constituting the semiconductor layer 193 is determined according to the size of the inclined surface 191 of the groove or hole 184. On the inclined surface 191 where the (111) plane appears, an initial deposition layer 202 containing aluminum, an n-type nitride semiconductor layer 203, an active layer 204, and a p-type nitride semiconductor layer 205 are sequentially deposited. An upper electrode 214 is formed on the p-type nitride semiconductor layer 205, and a lower electrode 215 is formed on the back surface of the substrate 181.
[0050]
When performing selective epitaxial growth, crystal growth of a nitride semiconductor usually does not occur on the mask material of a silicon oxide film or silicon nitride film, but if too much aluminum is supplied, polycrystalline precipitates are formed on the mask material. May happen. The conditions under which this occurs are determined by the growth conditions (growth time, temperature, atmospheric gas), but can be prevented by shortening the time for supplying aluminum. In the experiment, such precipitation was observed when the feed was supplied for more than 4 minutes.
[0051]
As described above, when a nitride semiconductor is epitaxially grown on silicon, the lattice constant difference between silicon and a nitrogen compound is large. The influence of this lattice constant mismatch is compensated by keeping the thickness of the nitride semiconductor deposited layer containing a large amount of aluminum formed at the initial stage of growth at a certain level or more. That is, a crystal containing a large amount of aluminum to be laminated first becomes a practical buffer layer. In many cases, at the initial stage of growth, small hexagonal pyramid crystals (with a size of several nanometers) formed on the (111) facet surface of silicon are formed as growth nuclei, and then they coalesce to obtain a large single crystal. It is done. After becoming a large single crystal, the lattice constant mismatch does not significantly affect the subsequent results.
[0052]
Crystal growth is usually performed at a high temperature in the range of 800 ° C to 1200 ° C. Since there is a difference between the thermal expansion coefficients of silicon and nitride semiconductor, stress is generated when the temperature of the sample is lowered to room temperature after crystal preparation. That is, since the thermal expansion coefficient of silicon is larger than that of the nitride semiconductor, tensile stress acts on the obtained nitride semiconductor single crystal. When growing at 1050 ° C., cracks were observed in the crystal when the size of the hole in the mask exceeded 150 μm. Therefore, in general, the size of the obtained diode can be as small as 150 μm or less.
[0053]
Points to note when forming a pn junction will be described. First, due to the lattice constant mismatch between silicon and nitride semiconductor, the portion of the nitride semiconductor close to the silicon substrate is generally n-type and has a low resistance. For this reason, it is often difficult to produce a p-type first as a conduction type. First, an n-type layer is formed, and a p-type layer is formed later. When a p-type nitride semiconductor is grown after forming an n-type nitride semiconductor layer, when the c-plane of the crystal appears, the growth rate in the c-axis direction is generally higher than the growth rate in the (1-101) facet plane direction. fast. Therefore, a wide (0001) facet plane, that is, a c-plane can be obtained by adjusting the conditions for selective growth. The area of the c-plane tends to increase when the growth temperature is high or the supply amount of a group III material such as trimethylgallium is small. Considering such conditions, after obtaining the c-plane of the required width, a good quality joint surface can be obtained by changing the conductivity type. During crystal growth of a p-type semiconductor, a p-type thin layer is also formed on the (1-101) facet plane, and a pn junction can be formed here, but on the (1-101) facet plane, the p-type layer is higher than on the c-plane. Is thin and does not significantly affect the results. When it is necessary to increase the thickness of the p-type layer, the growth region may be limited again by lithography and re-growth may be performed.
[0054]
Next, the electrode will be described. The pn junction surface of the diode according to the present invention is parallel to the c-plane of the nitride semiconductor crystal. That is, the current flowing through the diode is often perpendicular to the c-plane. The diode requires two electrodes. A metal as an electrode cannot be inserted between the nitride semiconductor formed on the silicon substrate and silicon due to the manufacturing principle, but if an n-type low-resistance material is used as the silicon substrate, the substrate itself is attached to the lower electrode. Available as For example, as described above, an electrode can be attached to the back surface of the silicon substrate. When many diodes are arranged on a silicon substrate, an electrode fabricated on the back surface of the substrate can be used as a common lower electrode. On the other hand, a low resistance silicon region may be formed in the substrate in advance using integrated circuit technology, and a nitride semiconductor crystal may be grown on the region. By this method, a lower electrode made of low-resistance silicon can be obtained for each diode having a size of 150 μm or less. The upper electrode can be formed by depositing metal on the (0001) plane of the obtained crystal using lithography. It is also possible to use a transparent electrode material such as ITO, which is frequently used for optical devices, for the electrode. In this case, the outermost surface layer of the nitride semiconductor needs to have a very high impurity concentration. The junction between the silicon substrate and the nitride semiconductor is a heterojunction, and an electrical barrier exists due to the difference in electron affinity. Although this detail is not understood, the influence of this barrier can be eliminated by making the nitride semiconductor n-type. In general, there are many lattice defects at the heterointerface of a nitride semiconductor, and in many cases it becomes n-type without performing n-type doping, and it is a structural advantage by making the lower electrode n-type. Things come out.
[0055]
Next, the external quantum efficiency of the device according to the present invention will be described. As shown in FIG. 14, the c-plane 161 of the nitride semiconductor is not parallel to the main surface 131a of the silicon substrate (the (001) plane appears in the above example), and is a predetermined angle (125.3 in the above example). °). A (1-101) plane 160 of a nitride semiconductor single crystal can be used as a crystal plane effective for light incidence and radiation, which does not have a large angle with respect to the main surface of the silicon substrate (see above). In the example, 7.3 °). Accordingly, when the upper electrode is formed on the c-plane 161, the single crystal (1-101) facet surface 160 that appears prominently on the front side can be effectively used as the light window. Thereby, the external quantum efficiency of the device can be increased, which is a great feature of the semiconductor device according to the present invention.
[0056]
When a diode is used as a light-emitting element, the diode operates in the visible light region from ultraviolet rays, so that spontaneous emission light emitted to the silicon substrate side is normally absorbed by the silicon substrate. However, by providing the active layer for light emission in the diode, the light emission direction can be enhanced in the (1-101) plane direction. For example, as a nitride semiconductor single crystal structure, a p-type layer is first grown, and then an active layer and an n-type layer are grown. In this case, as the composition of the active layer, the general formula In _x Ga _y Al _z If a compound semiconductor represented by N having a somewhat large y value is used, light is generated in this active layer because the refractive index of light in this layer is high, and the active layer serves as an optical waveguide. As a result, the light is guided in the direction of the (1-101) facet plane. By this method, the light extraction efficiency can be improved.
[0057]
Even when a diode is used as a light detector, a (1-101) facet surface 160 as shown in FIG. 14 acts as a light window, and the active layer has a role as a waveguide, thereby improving the collection efficiency. .
[0058]
In the case of an integrated diode array in which a plurality of diodes are arranged, a drive circuit or an electric circuit for signal processing needs to be separately manufactured. Such a driving circuit or an electric circuit can be formed on a silicon substrate together with a diode. In addition to the nitride semiconductor element, various structures can be formed on the silicon substrate as necessary. 18 and 19 show a structure in which electrode pads are formed on a substrate. The surface of the element 180 is covered with an insulating film 181. On the insulating film 181, an extraction electrode 182 and an electrode pad 183 connected to the extraction electrode 182 are disposed. The lead line 182 is connected to the upper electrode 164 formed on the semiconductor layer 143. Other structures are the same as those shown in FIG. The insulating film 181 may cover the entire element except for the electrode, or may be provided only in a portion where the extraction electrode 182 and the electrode pad 183 are disposed. By covering the element end face with the insulating film 181, an end face coating function can be provided, and the reliability of the element can be improved. The insulating film 181 that covers the entire surface of the element is preferably made of a light-transmitting material. Furthermore, it is preferable to improve the light extraction efficiency by making the electrode 164 and the extraction electrode 182 translucent. In order to make the electrode translucent, a thin metal layer can be formed, or a translucent conductive material such as ITO can be used.
[0059]
The characteristic wavelength of the diode (such as the wavelength of the light emitting diode) can be determined mainly by the composition of the active layer. Since the position of the obtained diode can be determined by the position of the hole or groove formed in the mask, the array of diodes having different characteristic wavelengths can be obtained by repeatedly performing crystal growth using a plurality of masks having different hole or groove positions. Can be produced. By this method, for example, a full color display or a color identification image sensor can be realized by alternately arranging three types of diodes having characteristic wavelengths of red, green, and blue.
[0060]
The size of the individual diodes is determined by the size (diameter or width) of the hole or groove drilled in the mask, but according to experiments, such a size can be freely in the range of 0.5 μm to 150 μm. You can choose. Moreover, the depth of a hole or a groove | channel can be 0.5 micrometer-50 micrometers. Therefore, a high-definition display that far exceeds the prior art can be realized as the display or image sensor. In general, the diameter or width of the hole or groove in the present invention is considerably larger than the depth, but in the drawings, the depth is exaggerated with respect to the diameter or width in order to facilitate understanding of the structure.
[0061]
Further, when a silicon substrate having a (111) surface is used, the (111) surface is exposed on the surface of the substrate without performing wet etching in the hole on the mask. In this case, a hole or a groove is formed, and the c-plane of the nitride semiconductor provided therein is parallel to the (111) plane of the silicon substrate. If a surface emitting laser having a c-plane as a light window is manufactured as a diode, an array of laser diodes can be obtained.
[0062]
【The invention's effect】
According to the present invention, a semiconductor element made of a high-quality nitride crystal can be formed on a silicon substrate. According to the present invention, a plurality of nitride semiconductor elements can be simultaneously fabricated on a silicon substrate, and an array of elements with uniform characteristics can be obtained. According to the present invention, a high-density array can be obtained for a diode having a relatively small size of 0.5 μm to 150 μm. Further, by performing selective epitaxial growth a plurality of times, optical elements having different characteristic wavelengths can be arranged. As a result, optoelectronic devices such as high-definition displays and image sensors can be produced, and the industrial value of the present invention is extremely high.
[Brief description of the drawings]
FIG. 1 is a schematic cross-sectional view showing an example of a semiconductor device according to the present invention.
2 is a perspective view showing holes formed in a silicon single crystal with respect to the semiconductor element shown in FIG. 1. FIG.
3 is a perspective view showing a groove formed in a silicon single crystal in the semiconductor element shown in FIG. 1. FIG.
FIG. 4 is a schematic sectional view showing another example of a semiconductor device according to the present invention.
5 is a perspective view showing holes formed in a silicon single crystal in the semiconductor element shown in FIG.
6 is a perspective view showing a groove formed in a silicon single crystal in the semiconductor element shown in FIG.
7A to 7E are schematic cross-sectional views showing an example of a method for manufacturing a semiconductor device according to the present invention.
8A to 8D are schematic cross-sectional views showing a process for forming an electrode of a semiconductor element.
FIGS. 9A to 9E are schematic cross-sectional views showing another process for forming an electrode of a semiconductor element. FIGS.
FIG. 10 is a plan view showing an apparatus in which semiconductor elements according to the present invention are arranged in a matrix.
FIG. 11 is a plan view showing an apparatus in which semiconductor elements according to the present invention are arranged in stripes.
FIG. 12 is a perspective view showing a structure in which a mask material is deposited on a silicon substrate, a hole is formed, and then a (111) facet surface is exposed on the silicon substrate surface by wet etching.
13 is a schematic cross-sectional view showing an element obtained by selectively epitaxially growing a nitride semiconductor single crystal on the structure shown in FIG.
FIG. 14 is a diagram showing a relationship between a (111) facet surface on a silicon substrate and a (0001) facet surface and a (1-101) facet surface of a nitride semiconductor single crystal.
FIG. 15 is a perspective view showing a structure in which a mask material is deposited on a silicon substrate, a hole is made, and then a (111) facet plane and a (001) plane terrace are exposed on the silicon substrate by etching.
16 (a) to 16 (g) are schematic cross-sectional views showing a process for obtaining the structure shown in FIG.
17 is a schematic cross-sectional view showing an element obtained by selectively epitaxially growing a nitride semiconductor single crystal on the structure shown in FIG.
FIG. 18 is a schematic sectional view showing another example of a semiconductor device according to the present invention.
19 is a perspective view of the element shown in FIG.
[Explanation of symbols]
11, 41, 131, 181 Silicon substrate, 11a, 41a, 131a, 181a Main surface of silicon substrate, 11b, 41b, 141, 191 Inclined surface, 12, 42, 143 Nitride semiconductor single crystal layer, 13a, 43a, 164 , 214 Upper electrode, 13b, 43b, 165, 215 Lower electrode, 72, 92, 132, 182 Mask material, 152 Initial deposition layer containing aluminum, 153 n-type nitride semiconductor layer, 154 active layer, 155 p-type nitride Semiconductor layer, 160 (1-101) facet surface of nitride semiconductor, 161 (0001) facet surface of nitride semiconductor.

Claims (15)

A silicon single crystal in which a structure selected from the group consisting of holes and grooves is formed;
A semiconductor layer formed in the structure,
The structure has a slope different from the main surface of the silicon single crystal,
The (111) plane of the silicon single crystal appears on the slope,
The semiconductor layer is formed on the slope, and the semiconductor layer has the formula In _x Ga _y Al _z N (where x + y + z = 1, 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ An optical semiconductor element comprising a nitride crystal represented by z ≦ 1). The optical semiconductor device according to claim 1, wherein the structure is formed by etching the silicon single crystal, and a facet surface by the etching appears on the slope.   The optical semiconductor element according to claim 1, wherein a (001) plane appears on a main surface of the silicon single crystal. The optical semiconductor element according to claim 1, wherein the semiconductor layer has a pn junction, and the semiconductor layer operates as a light emitting element or a light detection element. The angle between the facet surface of the semiconductor layer and the main surface of the silicon single crystal is 0 to 10 °, and the facet surface of the semiconductor layer is used as a light window. The optical semiconductor device according to Item.   The optical semiconductor element according to claim 1, wherein a plurality of the structures are formed in the silicon single crystal, and the semiconductor layer is formed in each structure. A method of manufacturing an optical semiconductor device comprising a silicon single crystal and a nitride semiconductor formed thereon,
In the silicon single crystal, a step of exposing a (111) plane of the silicon single crystal on a main surface of the silicon single crystal, and a formula In _x Ga _y Al _z N (wherein X + y + z = 1, 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1), and epitaxially grows a nitride semiconductor crystal represented by (001) on the main surface of the silicon single crystal. ) Plane and the exposed crystal plane is a (111) plane .   The optical semiconductor element according to claim 7, wherein the exposing step includes a step of partially covering the silicon single crystal with a mask material, and a step of etching a portion of the silicon single crystal not covered with the mask material. Manufacturing method.   The method of manufacturing an optical semiconductor device according to claim 8, wherein the exposed crystal face is a facet face that appears by the etching. The portion of the silicon single crystal that is not covered with the mask material is a region having a square surface;
The square side is parallel to the <110> axis of the silicon single crystal, and said in the etching process holes are formed, a manufacturing method of the optical semiconductor element according to claim 8 or 9. Wherein the portion of the silicon single crystal which is not covered with the mask material is a region having a circular surface and pores of pyramidal shape with the open square in the etching process is formed, in claim 8 or 9 The manufacturing method of the optical-semiconductor element of description. The portion of the semiconductor silicon single crystal that is not covered with the mask material is a region having a band-shaped surface;
Width direction of the strip-shaped surface is parallel to the <110> axis of the silicon single crystal, and the grooves are formed in the etching step, the manufacturing method of the optical semiconductor element according to claim 8 or 9. Said portion of the silicon single crystal which is not covered by the mask are provided a plurality separated from each other, the manufacturing method according to any one of claims 8-12. The method for manufacturing an optical semiconductor element according to claim 13 , wherein the plurality of portions not covered with the mask are arranged in a matrix or stripes. Wherein said plurality of portions not covered with the mask is etched, and respective portions in different nitride semiconductor on the crystal surface which is exposed crystal grown, to produce a different semiconductor device according to claim 13 or 14 The manufacturing method of the optical-semiconductor element of description.

Images