JP4650688B2 - Insulated gate transistor drive circuit device - Google Patents

Description

  The present invention relates to an insulated gate transistor drive circuit device, and more particularly to control of a gate discharge transistor that discharges a charge charged to a gate electrode when the insulated gate transistor is turned off.

  2. Description of the Related Art Insulated gate transistor drive circuit devices that intermittently drive a load current that supplies power to an electrical load by an insulated gate transistor such as an IGBT or a MOS transistor are widely used. In this type of insulated gate transistor, due to the electrical load of the insulated gate transistor and the inductance component of the line, the potential fluctuation of the main electrode of the insulated gate transistor is induced by electrostatic induction during the state transition of the insulated gate transistor. There is a problem that the gate electrode potential of the transistor is modulated, and the insulated gate transistor malfunctions or becomes unstable.

  In order to deal with this problem, as shown in FIG. 5, Patent Document 1 discloses an insulated gate transistor 1 that is an IGBT, a gate discharge transistor 2 that is a MOST that discharges the gate capacitance of the insulated gate transistor 1, and an insulated gate transistor 1. An insulated gate transistor drive circuit device having a NOT circuit (discharge transistor intermittent circuit) 4 for turning off the gate discharge transistor 2 when the gate transistor 1 is turned on is proposed. The NOT circuit 4 is a current driver (drive circuit) 10 that amplifies the control voltage Va output from the gate drive circuit (control circuit) 7 that drives the insulated gate transistor 1 and applies it to the gate electrode of the insulated gate transistor 1. Is inverted and applied to the gate electrode of the gate discharge transistor 2. In FIG. 5, the current driver 10 is composed of a complementary emitter follower circuit, but is not limited thereto. The waveform of each part of the circuit of FIG. 5 is shown in the timing chart shown in FIG.

In the circuit of Patent Document 1, the gate discharge transistor 2 connects (short-circuits) the gate potential of the insulated gate transistor 1 to the low potential source with a low impedance when the insulated gate transistor 1 is turned off. However, it is possible to prevent the problem that the gate electrode potential of the insulated gate transistor 1 is fluctuated through the capacitance between the main electrode and the gate electrode of the insulated gate transistor 1.
JP 2003-324966 A

  However, in the circuit device shown in FIG. 5, since the gate discharge transistor 2 is turned on at time t1 when the control voltage Va output from the gate drive circuit 7 to the current driver 10 changes from low level to high level, the current driver 10 Is output through the gate discharge transistor 2, and the gate voltage waveform of the insulated gate transistor 1 is dulled by that amount, as shown in FIG. Disturbed. As a result, the increase in the gate voltage is delayed, the turn-on of the insulated gate transistor 1 is delayed, the delay time becomes irregular, the power loss and heat generation increase, and the electric load on timing is also delayed. There was a problem. As shown in FIG. 6, this problem continues until the output voltage of the NOT circuit 4 is inverted.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide an insulated gate transistor drive circuit device capable of accelerating the turn-off of the gate discharge transistor with a simple circuit.

An insulated gate transistor drive circuit device of the present invention that solves the above problems includes an insulated gate transistor that intermittently drives an electrical load, a gate discharge transistor that connects a gate electrode of the insulated gate transistor and a lower power supply terminal, A control circuit that outputs a control voltage for driving and controlling the insulated gate transistor; a drive circuit that is driven by the control voltage output from the control circuit to drive the insulated gate transistor; and an output terminal of the control circuit And the insulated gate transistor based on the output voltage of a time delay circuit element that is disposed in the transmission path of the control voltage between the input terminal of the insulated gate transistor and the insulated gate transistor and has a function of time delaying the control voltage The gate discharge transistor is turned off when the transistor is turned on, and the insulated gate transistor is turned off. In the insulated gate transistor drive circuit device comprising a discharge transistor intermittent circuit for turning on the gate discharge transistor when OFF, the time delay circuit elements between the output end of at least the control circuit and the input terminal of the drive circuit The discharge transistor intermittent circuit substantially includes a logical sum signal of both the output voltage of the time delay circuit element and the control voltage between the control circuit and the resistance element. The gate discharge transistor is intermittently controlled based on a corresponding signal.

  Preferably, the discharge transistor intermittent circuit includes an OR circuit that outputs the logical sum signal and a NOT circuit that inverts the output of the OR circuit, and the logical sum operation and the negative operation are realized by other logic circuits. Of course it is possible to do.

  The time delay circuit element mentioned above is interposed between the output terminal of the control circuit and the gate electrode of the insulated gate transistor, and outputs a signal voltage delayed in time from the control voltage output by the control circuit. Consists of circuit elements. Preferably, the time delay circuit element is configured by a drive circuit which is an amplifier circuit that amplifies a control voltage output from the control circuit. In addition, the above-described time delay circuit element is configured by a resistor element that connects the input terminal of the drive circuit and the output terminal of the control circuit, or a resistor element that connects the output terminal of the drive circuit and the gate electrode of the insulated gate transistor. You may do it.

  That is, according to the present invention, since the gate electrode is connected to the lower power supply terminal to fix the potential when the insulated gate transistor is turned off, the line superposed noise voltage or the like is passed through the gate parasitic capacitance of the insulated gate transistor, etc. Even when applied to the gate electrode, it is possible to satisfactorily prevent the insulated gate transistor from malfunctioning or becoming unstable.

  Further, when the control voltage output from the control circuit to the drive circuit changes from the low level to the high level, the gate discharge transistor is turned off by the change in the control voltage. As a result, the gate discharge transistor is already turned off when the output state of the drive circuit (gate electrode potential of the insulated gate transistor) subsequently changes from low level to high level and the insulated gate transistor is turned on. The output current of the drive circuit for charging the insulated gate transistor is not bypass-discharged by the gate discharge transistor, and the insulated gate transistor can be charged rapidly. As a result, the turn-on transition time of the insulated gate transistor is shortened to reduce loss and heat generation, the turn-on timing of the insulated gate transistor can be stabilized, and power can be supplied quickly to the electric load.

  Furthermore, in the present invention, since the gate discharge transistor is intermittently controlled based on a signal substantially corresponding to the logical sum signal of both the output voltage and the control voltage of the time delay circuit element, the insulated gate transistor is turned off. As in the prior art, after the control voltage is sufficiently lowered, the insulated gate transistor can be turned off, and a stable operation at turn-off is possible.

  In a preferred aspect, the output voltage of the time delay circuit element is an output voltage of the drive circuit that also serves as the time delay circuit element. In this way, it is not necessary to additionally install a special circuit element as a time delay circuit element, so that the circuit configuration can be simplified.

  Preferred embodiments of the insulated gate transistor driving circuit device of the present invention will be described in detail with reference to the following examples. However, the present invention is not construed as being limited to the following embodiments, and it goes without saying that the technical idea of the present invention may be realized by combining other techniques.

(Circuit configuration)
First, the circuit configuration of the insulated gate transistor drive circuit device of this embodiment will be described with reference to the block diagram shown in FIG. The insulated gate transistor 1 may be an IGBT or a MOST.

  This insulated gate transistor drive circuit device includes an insulated gate transistor 1 that is an IGBT, a gate discharge transistor 2 that is a MOST that discharges the gate capacitance of the insulated gate transistor 1, and a gate drive that drives the insulated gate transistor 1. A circuit (control circuit) 7, a current driver (drive circuit) 10 that amplifies the control voltage Va output from the gate drive circuit (control circuit) 7 and applies the amplified voltage to the gate electrode of the insulated gate transistor 1, and an insulated gate type A discharge transistor intermittent circuit 11 for turning off the gate discharge transistor 2 when the transistor 1 is turned on is provided. 3 is a so-called gate resistance element that connects the output terminal of the current driver 10 and the gate electrode of the insulated gate transistor 1, and 6 is a so-called base resistance element that connects the output terminal of the gate drive circuit 7 and the input terminal of the current driver 10. It is. The insulated gate transistor 1 includes a junction diode connected in parallel with the IGBT.

  The gate drive circuit 7 is a monolithic IC controller, and outputs a control voltage Va forming a pulse signal voltage for intermittently connecting the insulated gate transistor 1 based on an external input signal.

  The current driver 10 includes a known complementary emitter follower circuit and two collector resistors 8 and 9 that individually connect the two collector electrodes to a high power source potential source and a low power source potential source.

  The discharge transistor intermittent circuit 11 includes an OR circuit 12 to which the control voltage Va output from the gate drive circuit 7 and the output voltage Ve from the current driver 10 are input, and a NOT signal that inverts the logical sum signal voltage output from the OR circuit 12. Circuit 4. Further, the resistance element 6 and the current driver 10 constitute a time delay circuit element referred to in the present invention.

  That is, the circuit of this embodiment shown in FIG. 1 is different from the conventional circuit shown in FIG. 5 in that an OR circuit 12 is added. The current driver 10 may be any circuit as long as it amplifies the control voltage Va output from the gate drive circuit 7 to a power level necessary for driving the insulated gate transistor 1, and is constituted by an amplifier circuit other than the complementary emitter follower circuit. be able to.

(Description of operation)
The operation of the circuit shown in FIG. 1 will be described with reference to the timing chart shown in FIG.

(ON operation of insulated gate transistor 1)
First, the on operation of the insulated gate transistor 1 will be described.

  The gate discharge transistor 2 is turned on immediately before the time t1 when the control voltage Va output from the gate drive circuit 7 to the current driver 10 changes from low level to high level, but when the control voltage Va becomes high level, the OR circuit Since the NOT circuit 4 is immediately turned off through 12, the current for charging the gate electrode of the insulated gate transistor 1 output from the current driver 10 is not discharged through the gate discharge transistor 2. Therefore, the gate voltage waveform of the insulated gate transistor 1 which is a conventional defect is not dull (see A in FIG. 6), and the current driver 10 charges the gate electrode of the insulated gate transistor 1 at high speed. The insulated gate transistor 1 can be quickly turned on. As a result, the insulated gate transistor 1 can be turned on at a relatively high speed as compared with the conventional circuits shown in FIGS. 5 and 6, so that power loss and heat generation during the turn-on transition can be reduced. That is, in this embodiment, the gate drive circuit 7 turns off the gate discharge transistor 2 through the NOT circuit 4 before the output voltage of the current driver 10 is inverted and the gate electrode of the insulated gate transistor 1 is charged. There is an effect.

  In addition, according to this embodiment, as in the conventional case, when the insulated gate transistor is turned off, the gate electrode is connected to the lower power supply terminal to fix the potential. Even when applied to the gate electrode through a capacitor (see FIG. 3) or the like, it is possible to satisfactorily prevent the insulated gate transistor from malfunctioning or becoming unstable.

(OFF operation of the insulated gate transistor 1)
Next, the off operation of the insulated gate transistor 1 will be described.

  At the time t2 when the control voltage Va output from the gate drive circuit 7 to the current driver 10 changes from the high level to the low level, the gate discharge transistor 2 is off, so that the gate electrode of the insulated gate transistor 1 is charged. The electric charge is discharged only through the current driver 10. However, even after the control voltage Va changes to the low level at the time t2, the gate electrode potential of the insulated gate transistor 1 changes the output voltage Ve of the current driver 10 to the low level, and the gate of the insulated gate transistor 1 changes. The state is high until the electric charge charged in the electrode is discharged. Therefore, the NOT circuit 4 outputs a low level until a time t3 when a predetermined time elapses from the time t2 and the charge charged in the gate electrode of the insulated gate transistor 1 is discharged through the current driver 10 to become a low potential, The gate discharge transistor 2 is kept off.

  That is, in this embodiment, the turn-on of the gate discharge transistor 2 can be delayed by a predetermined time ΔT = t3−t2 at the turn-off transition of the insulated gate transistor 1 as in the conventional case shown in FIGS. Therefore, it is possible to prevent the gate discharge transistor 2 from promoting the turn-off of the insulated gate transistor 1 by the turn-on delay of the gate discharge transistor 2.

  That is, when the insulated gate transistor 1 is turned off, the insulated gate transistor 1 can be turned off after the control voltage Va output from the gate drive circuit 7 which is a control circuit is sufficiently lowered, as in the prior art. Stable operation is possible.

(Modification)
A modification is shown in FIG. In this modification, the input terminal voltage Vb of the current driver 10 and the control voltage Va output from the gate drive circuit 7 are input to the OR circuit 12. If it does in this way, there can exist an effect similar to the above.

  In addition, the control voltage Va and the input voltage Vc of the insulated gate transistor 1 may be input to the OR circuit 12.

It is a circuit diagram showing a circuit of an embodiment. It is a timing chart which shows each part voltage waveform of the circuit of FIG. It is an equivalent circuit diagram which shows the parasitic capacitance of an insulated gate transistor. It is a circuit diagram which shows a deformation | transformation aspect. It is a circuit diagram which shows the conventional circuit. 6 is a timing chart showing voltage waveforms at various parts of the circuit of FIG. 5.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Insulated gate type transistor 2 Gate discharge transistor 4 NOT circuit 6 Resistive element 7 Gate drive circuit (control circuit)
8 Collector resistance 10 Current driver (drive circuit, time delay circuit element)
11 Discharge transistor interrupt circuit

Claims (2)

An insulated gate transistor for intermittently driving an electrical load;
A gate discharge transistor connecting the gate electrode of the insulated gate transistor and a lower power supply terminal;
A control circuit for outputting a control voltage for driving and controlling the insulated gate transistor;
A drive circuit driven by the control voltage output from the control circuit to drive the insulated gate transistor;
Based on the output voltage of a time delay circuit element disposed in the control voltage transmission path between the output terminal of the control circuit and the input terminal of the insulated gate transistor and having a function of time delaying the control voltage. A discharge transistor intermittent circuit that turns off the gate discharge transistor when the insulated gate transistor is turned on and turns on the gate discharge transistor when the insulated gate transistor is turned off;
In an insulated gate transistor drive circuit device comprising:
The time delay circuit element includes a resistance element disposed at least between an output end of the control circuit and an input end of the drive circuit,
The discharge transistor intermittent circuit is:
Intermittently controlling the gate discharge transistor based on a signal substantially corresponding to a logical sum signal of both the output voltage of the time delay circuit element and the control voltage between the control circuit and the resistance element. An insulated gate transistor drive circuit device characterized by the above. The insulated gate transistor drive circuit device according to claim 1,
An insulated gate transistor in which an output voltage of the time delay circuit element is an output voltage of the drive circuit that also serves as the time delay circuit element.

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