JP4645167B2 - Focus ring, plasma etching apparatus and plasma etching method. - Google Patents

Description

  The present invention relates to a focus ring, a plasma etching apparatus, and a plasma etching method used in a plasma etching apparatus that etches a substrate such as a semiconductor wafer with plasma and forms a trench on the surface of the substrate, for example.

  Logic device embedded DRAMs have become commercially important for digital home appliances such as digital TVs, DVD recorders, and digital still cameras, and are forming a major genre in the semiconductor industry. In the case of logic devices, devices with a scale of 10 million gates have been integrated into a single LSI using 0.18 μm technology. Various systems and other LSIs including a CPU are mounted on a single silicon chip. Chip (SOC) has appeared. The embedded technology necessary for realizing the SOC is that each LSI has its performance maximized and is realized with the minimum number of process steps.

  A DRAM memory cell is arranged at an intersection of a word line and a bit line (digit line) running in a grid pattern vertically and horizontally. This memory cell is composed of one selection transistor (NMOS transistor) and a capacitor (capacitance element) arranged in series therewith. In other words, a DRAM memory cell is composed of two elements: a capacitor for storing electric charge (data) and a single transistor that functions as a switch by controlling input / output of data. There are roughly two types of capacitive elements that are characteristic of such a DRAM cell structure. One is a stack capacity cell, and the storage capacity is arranged on the transistor to increase the electrode area. The other is a trench capacitor cell, in which a storage capacitor is formed inside the silicon substrate.

  The trench capacitance cell has good surface flatness, and high-temperature heat treatment such as oxidation for forming the capacitance film is performed before the transistor is formed, so that the compatibility with the logic device process is very good. In the case of a trench cell, the MOSFET formation process starts after the trench formation step is completed, and therefore the MOSFET formation process is less affected by the DRAM cell formation process. This is an advantage of the trench cell in the DRAM mixed technology. On the other hand, since a high dielectric constant film cannot be used as a capacitor insulating film, it is necessary to form a deeper trench in order to increase the storage capacitance value. Further, the connection between the source / drain of the cell transistor and the storage electrode becomes difficult when miniaturized, and the processing after the 0.18 μm generation becomes very difficult, so that it is required to deepen the trench. This is called DT (Deep Trench) technology.

  A conventional built-in power MOSFET formed on the surface of a silicon substrate uses only a very narrow area on the surface of the substrate, and there is a limit to reducing the electrode interval due to the necessity of controlling a high voltage, which hinders the reduction of the on-resistance. It was. In this DT technology, trenches (grooves) are formed in a silicon substrate, and MOSFETs are three-dimensionally formed, thereby providing an electrode interval necessary for high voltage control in the depth direction and a device pitch with an element breakdown voltage of several tens of volts. Can be reduced.

  Regarding the processing of DT (groove or hole), the aspect ratio (ratio of the length or width of the groove or hole) and the cross-sectional shape are particularly problematic. In this case, the aspect ratio is preferably 10 or more, and the cross-sectional shape is provided with a side wall portion formed of a smooth plane, the side wall portion has an inclination angle of approximately 0 degrees (vertical), and the bottom portion is recessed in a semicircular shape. Ideally, it has a shape (bottom round). Thus, in DT, more sophisticated and accurate anisotropic etching is required. Here, the reason why the bottom round is desired is that processing in a later step of embedding an insulating film becomes easy. Further, since the coverage of the deposited film may be deteriorated in the insulating film embedding process, the inclination angle of the side wall portion may be tapered in order to facilitate processing.

  One kind of trench processing technique for such a silicon wafer is a plasma etching method. In this process, anisotropic plasma etching is performed on a single crystal silicon layer using, for example, a silicon nitride film as a mask. In this case, an etching effect by Cl2 or HBr is obtained by adding a trace amount of oxygen (O2) gas to chlorine (Cl2) gas or hydrogen bromide (HBr) gas which is an etching gas containing halogen. The reaction products SiClx and SiBrx are oxidized by the supply of O2 to become SiO2, and this is deposited on the side wall of the etching site, thereby obtaining a protective action against etching.

  However, since the single crystal silicon layer does not have a base layer for etching stop, if the etching rate is different between the vicinity of the wafer center and the outer edge of the wafer, the uniformity of the trench depth in the wafer surface is deteriorated. In particular, reaction products are often deposited on the outer edge of the wafer, and it is inevitable that the etching rate in the depth direction decreases as the etching time elapses. This is because as the trench becomes deeper, the range of the incident angle of radicals reaching the bottom of the etched portion becomes narrower, and the radical density decreases.

  On the other hand, in order to perform plasma etching on a silicon wafer, actually, as shown in FIG. 6, a ring called a focus ring or the like is formed so as to surround the periphery of the silicon wafer 12 mounted on the mounting table 11. A member 13 is provided. The focus ring 13 is made of an insulating material such as quartz, for example, and has a role of adjusting the shape of the plasma near the periphery of the silicon wafer. The surface of the focus ring 13 is mirror-finished uniformly. This is because reaction products accumulate when the surface of the focus ring 13 is rough, and the deposits rise and adhere to the back and side surfaces of the wafer W. Here, the present inventor is related to the factor that the in-plane uniformity of the depth of the trench is poor because the reaction product is often deposited on the outer edge of the wafer, and that the focus ring is mirror-finished. I found out.

  Patent Document 1 is known as a technique for trench processing using plasma. In this Patent Document 1, HBr (hydrogen bromide) gas is used as a main component, and SF6 (sulfur hexafluoride) gas and SiF4 (silicon tetrafluoride) gas are added thereto, and further, He (helium) gas, O2 ( Although oxygen gas is added to form a mixed gas, this mixed gas is used as a processing gas, and trench processing is performed on silicon using a silicon oxide film as a mask. However, the above-described problem cannot be solved.

Japanese Patent Laid-Open No. 11-135589

  The present invention has been made based on such circumstances, and its purpose is to moderately adjust the degree of adhesion of reaction products when forming recesses, for example, trenches, by etching the substrate with plasma. Another object of the present invention is to provide a focus ring capable of performing good etching, a plasma etching apparatus and a plasma etching method using the focus ring.

  In the present invention, when trench processing is performed on the surface of a silicon wafer by plasma etching, there is a slight difference in in-plane uniformity of the etching rate depending on the length of use time after replacing the focus ring with a new one. This is based on the result of examining the surface of the focus ring at the beginning of use, focusing on the fact that the etching rate (etching rate) in the depth direction at the outer edge of the silicon wafer is significantly slower than that in the center. is there. In other words, the inner side of the surface of the focus ring is hardly consumed, whereas the outer side is more consumed than the inner side. The focus ring was thought to cause reaction products to adhere to the surface of the silicon wafer when the surface was rough as described above. It turned out that it was necessary to pay attention to each part. In other words, the degree of wear is greater near the outside of the focus ring, and the fact that in this state the difference in etching rate between the center and outer edge of the silicon wafer is smaller is the fact that particles adhere to the side and back surfaces of the silicon wafer. Is a deposit that adheres to the inner surface of the focus ring. On the outer surface of the focus ring, it is rather rough and the reaction product is trapped by the trap at the outer edge of the silicon wafer. This means that deposition of reaction products can be suppressed and a decrease in the etching rate of the outer edge portion can be suppressed. The present invention has been made based on these findings.

Specifically, the focus ring of the present invention is used in a plasma etching apparatus that performs etching with plasma on the surface of a substrate placed on a mounting table in an airtight processing container, and surrounds the periphery of the substrate. In the focus ring that is the ring member provided,
Near the inside of the surface, the region has a first region finished with a small average surface roughness Ra to such an extent that reaction products during the etching process are not trapped,
Wherein the outer side than the first region, have a second region average surface roughness Ra to the extent that the reaction products in the area is captured is significantly finishing first region, for example, mirror It is processed and has an extremely good flatness with an average surface roughness Ra of about 0.1 or less .

No matter how good the flatness is, complete flattening cannot be realized. Therefore, if microscopically, the particles of the reaction product adhere to the molecular level, for example, but if the flatness is good The degree of deposition is extremely small, and even if the deposit peels off and returns to and adheres to, for example, the back surface or the side surface of the substrate, no problem occurs as particles. The first region needs to be in such a state, and if the average surface roughness Ra of the first region is 0.1 or less, the inventor will use the first region and be consumed by plasma. However, it has been experimentally grasped that the reaction product during the etching process can be maintained for a sufficiently long time.

  The second region “finished with a large average surface roughness Ra to such an extent that the reaction product is captured” refers to the following state. If the entire outer region of the first region is made smoother than the first region, the reaction product is not trapped, so that the amount of reaction product deposited on the outer edge of the substrate is increased, and etching is not performed. As a result of excessive protection, the etching rate of the recess, for example, the trench is slowed, and the depth of the recess becomes uneven between the central portion of the substrate and the outer edge portion. However, when the second region is formed and the smoothness of the portion is deteriorated, the reaction product is trapped there, and as a result, the extent to which the etching rate of the concave portion is reduced is reduced, and the central portion and the outer edge portion of the substrate are reduced. The uniformity of the depth of the recess is improved. Accordingly, the surface is finished to such an extent that such an effect is obtained, and the average surface roughness Ra is processed to be 3.2 or less by, for example, sand-slip finishing. Furthermore, in other words, the inner side of the focus ring is polished, for example, to be mirror-finished so that the average surface roughness Ra is reduced, and the outer surface is finished to an average surface roughness Ra that is clearly larger than the average surface roughness Ra. This state can be said to correspond to the focus ring of the present invention.

  The focus ring is consumed when exposed to plasma when it is used, but the degree of wear on the surface is greater in the outer region than in the inner region. For this reason, it is desirable to set as a boundary between the first region and the second region a portion where the degree of wear changes when the focus ring is incorporated in the apparatus and exposed to plasma.

  Another aspect of the present invention is a plasma etching apparatus for etching a surface of a substrate mounted on a mounting table in an airtight processing container by plasma, and the focus ring of the present invention is provided so as to surround the periphery of the substrate. It is characterized by that. When the silicon layer is etched with a mixed gas of halogen-containing etching gas and oxygen gas, the silicon halide produced by the reaction reacts with oxygen to produce silicon dioxide, and the reaction product is formed in the recess. The present invention is suitable for such a process because it is deposited on the substrate and serves as an etching protective function.

  According to the present invention, instead of increasing the smoothness of the entire surface of the focus ring, a region having a small average surface roughness Ra is formed near the inside of the surface to suppress the deposition of reaction products, thereby While reducing the adhesion of particles to the back and side surfaces, the reaction product is captured and deposited by forming a region with a large average surface roughness Ra on the outer side, thereby suppressing the deposition of the reaction product on the outer edge of the substrate. Thus, a reduction in the etching rate at the outer edge is suppressed. Therefore, particle contamination to the substrate can be suppressed, and the uniformity of the etching rate between the central portion and the outer edge portion of the substrate is improved, for example, the processing with high in-plane uniformity for the depth of the recess formed by etching. It can be performed.

  Hereinafter, a magnetron type reactive ion etching apparatus will be described as an example of a plasma etching apparatus using a focus ring according to the present invention. In the figure, reference numeral 2 denotes an airtight processing container made of a conductive member such as aluminum, and the processing container 2 is grounded. In the processing container 2, an upper electrode 3 that also serves as a gas shower head, which is a gas supply unit for introducing a processing gas for performing etching, and a substrate, for example, a silicon wafer (hereinafter referred to as a wafer) W are mounted. The mounting table 4 also serving as the lower electrode is provided so as to face each other.

  An exhaust pipe 21 is connected to the bottom of the processing vessel 2, and a vacuum pump 22 such as a vacuum molecular pump or a dry pump is connected to the exhaust pipe 21. Further, an opening 23 a for loading or unloading the wafer W is provided on the side wall of the processing container 2, which includes a gate valve 23 that can be freely opened and closed.

  On the lower surface side of the upper electrode 3, a number of gas diffusion holes 32 communicating with a gas supply path 31, for example, a pipe and a buffer chamber 31 a are formed, and the wafer W placed on the mounting table 4 is formed. A predetermined processing gas can be injected toward the front. The gas supply path 31 is connected at its base end side to a gas supply system 33. The gas supply system 33 is a supply source of, for example, HBr gas, NF3 (nitrogen trifluoride) gas and oxygen gas which are processing gases. Supply control equipment such as valves and flow rate adjusters are provided. The upper electrode 3 is connected to a high frequency power supply unit 35 for supplying high frequency power via a matching unit 34. The upper electrode 3 is insulated from the side wall portion of the processing container 2 by an insulating member 36.

  The mounting table 4 includes a main body portion 40 made of a conductive member such as aluminum and an electrostatic chuck 41 provided on the main body portion. For example, a foil-like electrode 41a is provided inside the electrostatic chuck 41. A DC power supply 43 is connected to the electrode 41a via a switch 42, and a static voltage is applied by applying a DC voltage (chuck voltage). The wafer W is electrostatically attracted to the surface of the electrostatic chuck 41 by the electric power. Although not shown in the figure, temperature adjusting means for adjusting temperature is provided in the main body portion 40, and the wafer W is maintained at a preset temperature by the temperature adjusting action of the temperature adjusting means and heat from the plasma. Will be.

  Further, on the surface of the electrostatic chuck 41, a heat transfer gas such as helium gas (He) for increasing the heat transfer efficiency of a slight gap formed between the mounting table 4 and the wafer W is directed toward the back surface of the wafer W. A number of injection ports 44 are provided for injecting and spreading the heat transfer gas from the central portion. These injection ports 44 communicate with the heat transfer gas supply unit 46 via a heat transfer gas supply path 45 that passes through the mounting table 4. The mounting table 4 is connected to a high frequency power supply unit 48 for applying bias power via a matching unit 47. In addition, inside the mounting table 4, lifting pins (not shown) capable of delivering the wafer W to a transfer arm (not shown) are provided.

  Around the electrostatic chuck 41, a focus ring 5 made of an insulating material such as quartz and having a ring width L of about 64 mm is provided so as to surround the periphery of the wafer W attracted and held by the electrostatic chuck 41. . An insulating protective ring 49 for protecting screws of the assembly is provided on the upper portion of the main body portion 40 of the mounting table 4, and the focus ring 5 straddles the protective ring 49 and the main body portion 40. In addition to being provided on these, a stepped portion is formed on the inner edge, and it is configured to have a shape that digs into the lower side of the wafer peripheral portion protruding outward from the mounting table 4.

The focus ring 5 has a point P, for example, 32 mm away from the inner edge in the radial direction outside as a boundary, and an inner region and an outer region as a first region f1 and a second region f2, respectively. Is finished. The first region f1 is finished so that the average surface roughness Ra is so small that a reaction product, for example, a compound of silicon and oxygen, is not captured during the etching process, and the reaction product is captured in the second region f2. The average surface roughness Ra is finished to such a degree that These meanings have already been described in detail in the section “Means for Solving the Problems”. Specifically, the first region f1 has an average surface roughness Ra of, for example, 0.1 by polishing, for example. Further, the second region f2 is processed to have an average surface roughness Ra of 3.2 or less, for example, 1.6, for example, by sanding. As described above, if the average surface roughness Ra of the first region f1 is 0.1 or less, the reaction product during the etching process is not trapped even if it is used and consumed by plasma after that. It can be maintained for long enough. As for the second region f2, if the average surface roughness Ra is too large, considerably large particles also adhere, and there is too much deposit deposition (reaction product deposition), resulting in poor uniformity, so that it does not exceed 3.2. It is preferable.

  As described above, according to the present invention, when the surface is examined by performing plasma etching for a long time using the focus ring 5 having a mirror-finished entire surface, the average surface roughness Ra is rapidly increased from a part away from the inside by a certain distance. In this state, attention is focused on the fact that the degree of the etching rate drop at the outer edge of the wafer W is small. The point at which the average surface roughness Ra suddenly increases is the first region. It is preferable to create such a surface state from the beginning as a boundary between f1 and the second region f2.

  Returning to FIG. 1 and describing other parts, the inner wall of the processing vessel 2 is called a deposition shield or the like to prevent the reaction product from adhering to the inner wall surface, for example, quartz. A protective cylinder 61 is provided, and a cover body 62 for preventing the reaction product from adhering is also provided on the side surface of the mounting table 4. Reference numeral 63 denotes a baffle plate for uniformizing the vacuum exhaust. Further, on the outer peripheral side of the processing container 2, magnet portions 64 and 65 each including, for example, a large number of permanent magnets arranged in a ring shape are provided in order to form a predetermined magnetic field in the processing atmosphere.

  Next, a procedure for plasma processing a substrate, for example, the surface of the wafer W using the above-described plasma processing apparatus will be described below. First, the gate valve 23 is opened, the wafer W as a substrate is carried into the processing container 2 by a transfer arm (not shown), the wafer W is placed on the surface of the mounting table 4 by the action of lifting pins (not shown), and the gate valve 23. The etching gas such as HBr gas and NF3 gas and a small amount of O2 gas are supplied from the gas shower head as the upper electrode 3 into the processing vessel 2 while maintaining a predetermined pressure. At this time, the etching gas supplied into the processing container 2 flows radially outward along the surface of the wafer W and is exhausted from the periphery of the mounting table 4.

  Subsequently, after a chuck voltage is applied to the electrostatic chuck 41 to electrostatically attract the wafer W, He gas, which is a heat transfer gas, is supplied to the back side of the wafer W. After that, the high frequency power supply unit 35 is turned on to apply a high frequency voltage between the upper electrode 3 and the lower electrode 4 which is the mounting table to turn the etching gas into plasma, and the high frequency power supply unit 48 is turned on for biasing. By applying electric power to the wafer W, active species in the plasma collide with the wafer W with high perpendicularity. The spread of plasma is suppressed by the action of the focus ring 5 so that the concentration of active species at the outer edge of the wafer W is not reduced.

  FIG. 3A shows a surface portion of a wafer W, which is a substrate to be processed, on a single crystal silicon layer 71 and a stopper in a subsequent CMP (Chemical Mechanical Polishing) step. Therefore, a silicon nitride film (Si3N4 film) 72 and a BSG film (boron-doped amorphous silicon oxide film) 73 as a mask (hard mask) at the time of etching are laminated in this order. By exposing the surface portion to plasma, the silicon layer 71 is etched. The wafer W receives heat from the plasma, but the mounting table 4 is cooled by a cooling means (not shown) and is maintained at the set temperature by the balance. Etching of the silicon layer 71 is performed by cutting with HBr gas and NF3 gas, and the reaction products SiClx and SiBrx are oxidized by O2 to form oxides such as SiO2 in the recesses to be etched. As a result, the side wall surface is protected, and the etching proceeds in the depth direction while the lateral etching is suppressed. FIG. 3B shows a state in which the silicon layer 71 is etched and a trench 74 is formed. The trench 74 has a depth of, for example, 7.5 μm and an aspect ratio of 4.0.

  As an example of processing conditions, the pressure in the processing chamber 2 is 2.66 Pa (200 mTorr), the power of the high-frequency power supply unit 35 is 2100 W, the power of the high-frequency power supply unit 48 is 900 W, the temperature of the wafer W is 80 ° C., HBr The flow rates of gas, NF3 gas and O2 gas are set to 300/32/18 sccm.

  Here, the reaction product generated by the etching rises from the surface of the wafer W and flows to the outside. However, since the surface of the second region f2 of the focus ring 5 is rough, a part of the reaction product is captured in the region f2. And deposited. FIG. 4A shows an image of such a state, and the reaction product particles 100 are exaggerated. It is considered that a reaction product is flying around the outer edge of the wafer W and the surface of the focus ring 5, and a part of the reaction product is coming and going between them. For this reason, when the reaction product is captured by the focus ring 5, roughly speaking, the amount of reaction product adhering to the site to be etched at the outer edge of the wafer W is reduced accordingly.

  On the other hand, FIG. 4B shows the case where the entire surface of the focus ring 5 is formed as a mirror finish with high smoothness, and the reaction product flying on the surface rises without being trapped, and a part of it rises. Return to the outer edge of W and go back. At the outer edge portion of the wafer W, the amount of reaction products originally attached is large, and the etching protection action tends to be too strong. In this embodiment, the protection action is alleviated by the trapping action of the focus ring 5, and as a result As a result, the decrease in the etching rate is suppressed, the nonuniformity of the trench depth between the central portion and the outer edge portion of the wafer W is alleviated, and the in-plane uniformity can be improved. The inside of the processing container 2 is periodically cleaned, reaction products deposited on the focus ring 5 are removed, and generation of particles due to peeling of the deposits is prevented.

  Furthermore, the first region f1 from the inside of the focus ring 5 has high smoothness, so that the reaction product does not substantially adhere to it, so that the reaction product is deposited near the outer edge of the wafer W and returns to the wafer W. Phenomenon that adheres to the back and side surfaces and causes particle contamination can be suppressed.

  According to the embodiment described above, on the surface of the focus ring 5, the flatness of the first region f1 closer to the inner side is increased so that the reaction product does not accumulate, and the second region f2 outside the second region f2 Since the reaction products are trapped and deposited so as to be rough, as described above, the particle contamination of the wafer W is suppressed, and the decrease in the etch rate of the outer edge of the wafer W is suppressed, and the etching process has high in-plane uniformity. Can be obtained.

  The present invention is not limited to the process of forming a trench in a silicon layer as an object of etching, but can also be applied to the case where a recess for forming a wiring layer is formed in an insulating film. In this case, the deposition of the reaction product is reduced at the outer edge portion of the wafer W, so that an excessive protective action by the reaction product can be suppressed and deterioration of the etching shape can be suppressed. The material of the focus ring is not limited to an insulating material, and a conductor or semiconductor may be used to spread plasma. Furthermore, the etching gas is not limited to the above gas, and can be applied to etching in which a reaction product is generated even when oxygen gas is not added.

Next, examples performed to confirm the effects of the present invention will be described. With respect to the focus ring 5 described in the above embodiment, the entire surface is mirror-finished and the average surface roughness Ra is set to 0.05, and this is mounted on the plasma etching apparatus of FIG. About 1800 wafers W having the described surface portion are processed under the processing conditions of the above-described embodiment to form trenches, and when the total etching processing time is 30 hours, the focus ring 5 is removed and the surface is removed. Examined. as a result,
The area S0 from the inner edge of the focus ring 5 to the radially outer side 5 mm has an average surface roughness Ra of 0.8,
The area S1 from the area S0 of the focus ring 5 to the outside 32 mm has an average surface roughness Ra of 0.15,
The average surface roughness Ra of the region S2 from the region S1 of the focus ring 5 to the outer side of 60 mm was 0.36.

  FIGS. 5A to 5C show data obtained by measuring the surface heights of the regions S0, S1, and S2, respectively. Since the plasma density (active species density) is high in the vicinity of the inner edge of the focus ring 5, it is impossible to avoid violent wear. However, in the region S1 that is a little away from the inner edge, the average surface roughness Ra is very low, 0.15. I understand that it is not. The area S2 near the outside of the focus ring 5 is again heavily consumed. The reason why the outer region S2 is more consumed than the inner region S1 in this way is considered to be because there are many fresh active species because the plasma flow rate is high.

  On the other hand, when the etching state is inspected, the wafer W in the early stage has a lower etch rate of 39.5 nm / min than the center, but the wafer W after 30 hours has passed. The etch rate of the outer edge portion is smaller by 35.6 nm / min than the center portion, and the uniformity of the etch rate is improved. The average surface roughness Ra of the region S1 is 0.15, and this state is very smooth, and the reaction product cannot be trapped and deposited. However, the average surface roughness Ra of the region S2 near the outside is 0.1. In this state, the reaction product can be trapped and deposited.

  Therefore, it is understood that it is effective to form a region having a small average surface roughness Ra on the inner side and a region having a large average surface roughness Ra on the outer side on the surface of the focus ring 5. For example, if the average surface roughness Ra of the inner regions S0 and S1 is set to 0.1 or less, for example, when the focus ring 5 is manufactured, the reaction product is deposited and the wafer W is deposited even if the apparatus is used for 400 hours, for example. The state where the action of returning to the side is suppressed can be maintained. Further, if the average surface roughness Ra of the outer region S2 is processed to 0.36, for example, an action of accumulating and capturing reaction products from the beginning of use can be obtained, and as a result, processing with good in-plane uniformity is obtained. It can be performed.

It is a vertical side view which shows the plasma etching apparatus which concerns on embodiment of this invention. It is a vertical side view which shows the peripheral part and the focus ring of the mounting base of the said plasma etching apparatus. It is explanatory drawing which shows the board | substrate surface before being etched with the said plasma etching apparatus, and the board | substrate surface in which the trench was formed. It is explanatory drawing which shows the mode of the adhesion and detachment | desorption of the deposit in the focus ring of this invention, and the conventional focus ring as an image. It is explanatory drawing which shows the measurement result of the uneven | corrugated state of the surface of the focus ring concerning the Example performed in order to confirm the effect of this invention. It is a vertical side view which shows the mounting base and focus ring in the conventional plasma etching apparatus.

Explanation of symbols

W Wafer 2 Processing vessel 21 Exhaust pipe
23 Gate valve 3 Upper electrode 32 Gas injection hole
33 Gas supply system 35 High frequency power supply unit 4 Mounting table 40 Main body portion 41 Electrostatic chuck 46 Heat transfer gas supply source 48 High frequency power supply unit 5 Focus ring f1 First region f2 Second region

Claims (5)

In the focus ring, which is a ring member used to surround the periphery of the substrate, used in a plasma etching apparatus that performs etching with plasma on the surface of the substrate mounted on a mounting table in an airtight processing container,
Near the inside of the surface, the region has a first region finished with a small average surface roughness Ra to such an extent that reaction products during the etching process are not trapped,
Wherein the outer side than the first region, have a second region average surface roughness Ra to the extent that the reaction products in the area is captured is significantly finishing
The focus ring characterized in that the average surface roughness Ra of the first region is 0.1 or less . The boundary between the first region and the second region is a portion whose degree of wear changes when a focus ring is incorporated in a plasma etching apparatus and etching is performed on the substrate by plasma. The focus ring according to 1 . In a plasma etching apparatus that performs etching with plasma on the surface of a substrate mounted on a mounting table in an airtight processing container,
A plasma etching apparatus comprising the focus ring according to claim 1 or 2 so as to surround the periphery of the substrate. A plasma etching method, wherein the substrate is etched using the plasma etching apparatus according to claim 3 . 5. The plasma etching method according to claim 4, wherein the silicon layer is etched by a mixed gas of an etching gas containing halogen and an oxygen gas.

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