JP4640102B2 - Omni-directional camera - Google Patents

Description

  The present invention relates to an omnidirectional camera, and more particularly to an omnidirectional camera that images an omnidirectional image using a solid-state imaging device.

  Surveillance cameras and robot cameras should have as wide a shooting range as possible, but conventional cameras usually have a limited angle of view, and as a result, multiple cameras are used to monitor the range beyond the angle of view. The camera needed to be movable. On the other hand, there is an omnidirectional camera that captures 360-degree omnidirectional images with a single unit.

  FIG. 5 shows a configuration diagram of an example of a conventional omnidirectional camera. As shown in the figure, a conventional omnidirectional camera 200 includes a mirror 201 that reflects the surrounding 360 degrees, a condensing optical system 202 that collects light from the subject reflected by the mirror 201, and solid-state imaging. An element 203 and an image development unit 204 are roughly configured. Here, as the shape of the mirror 201, various methods such as a hyperboloid, a cone, and a combination of a plurality of curves have been proposed. The condensing optical system 202 reduces the subject optical image to the size of the imaging area of the solid-state imaging device 203 and forms an image.

  As the solid-state imaging device 203, a CCD (Charge Coupled Device) type imaging device (hereinafter simply referred to as a CCD) and a CMOS (Complementary Metal-Oxide Semiconductor) type imaging device (hereinafter referred to as a CMOS sensor) are known. However, a CMOS sensor can be driven at a lower voltage than a CCD, and a CMOS sensor is used because a high-definition image can be obtained by increasing the number of pixels.

  In an omnidirectional camera having such a structure, for example, light from an imaging target is first reflected by a mirror 201 and incident on a condensing optical system 202 as indicated by an optical path 205. The optical image is reduced to the size of the imaging region of the solid-state imaging device 203, and is imaged and photoelectrically converted. An imaging signal obtained by photoelectric conversion by the solid-state imaging device 203 is supplied to the image development unit 204. Here, the subject image reflected on the mirror 201 is distorted in accordance with the curved surface, but the image development means 204 performs a process of developing the input imaging signal with a development formula derived from the curved surface of the mirror 201, A panoramic video signal without distortion can be obtained.

  The solid-state image sensor 203 is a CMOS sensor, which is a conventionally known rolling shutter type CMOS sensor (see, for example, Patent Document 1). This rolling shutter type CMOS sensor will be described. FIG. 6 shows an equivalent circuit diagram of an example of the conventional CMOS sensor. In the CMOS sensor shown in the figure, for simplicity, the unit pixel 1 has a 2 × 2 pixel arrangement in which two horizontal pixels and two vertical pixels are arranged. The unit pixel 1 includes a photodiode (PD) 2 for photoelectrically converting a subject image, a signal charge amplification MOS field effect transistor (hereinafter referred to as MOSFET) 3, a charge transfer MOSFET 4, a reset MOSFET 5, and a selection. The power supply line 6 is connected to the drains of the MOSFETs 3 and 5, and the source of the amplification MOSFET 3 is connected to the drain of the selection MOSFET 7.

  The gate electrode of the amplification MOSFET 3 is in a floating diffusion (FD), and the charge of the photodiode 2 is transferred to the gate electrode (FD) of the amplification MOSFET 3 through the drain-source of the charge transfer MOSFET 4. The potential of the gate electrode (FD) of the amplification MOSFET 3 is reset by the reset MOSFET 5.

  When the selection MOSFET 7 is turned on, the source of the amplification MOSFET 3 is conducted to the pixel output line 8 through the drain and source of the selection MOSFET 7. The pixel output line 8 is connected to the drain of the constant current supply MOSFET 9. The constant current supply MOSFET 9 acts as a load of the source follower circuit of the amplification MOSFET 3. The constant current supply MOSFET 9 is controlled by the gate potential of the gate potential supply line 13.

  The reset control line 10, the charge transfer control line 11, and the pixel selection control line 12 are connected to the gate electrodes of the reset MOSFET 5, the charge transfer MOSFET 4, and the selection MOSFET 7, respectively. It is supplied from the pulse supply terminals 15, 14, and 16 through the drains and sources of the MOSFETs 19, 20, and 21, respectively.

  The vertical shift register 17 is a circuit for selecting a 2 × 2 pixel row for row sequential scanning, and the vertical shift register output lines 18-1 and 18-2 are connected to the gate electrodes of the MOSFETs 19, 20, and 21 in each row. It is connected and determines which row of pixels is controlled by the pulse supplied to the terminals of the pulse supply terminals 15, 14, 16.

  The read block 22 is connected to a capacitor 23 for holding a reset signal output, a capacitor 24 for holding an optical signal output, switching MOSFETs 25 and 26 for selecting which one to hold, and horizontal output lines 27 and 28. Switch MOSFETs 29 and 30. The switching MOSFETs 25 and 26 are switching-controlled by pulses supplied from the terminals 37 and 38 to the gate electrodes.

  The horizontal shift register 34 is a horizontal shift register output line 35-connected to the gates of the MOSFETs 29 and 30 for switching which column of the 2 × 2 pixels is to be output to the horizontal output lines 27 and 28. 1 and the output potential to 35-2. In addition, a potential for resetting the horizontal output lines 27 and 28 is supplied from the terminal 33, and the reset timing is performed by switching the switching MOSFETs 31 and 32 with a pulse supplied from the terminal 36. The horizontal output lines 27 and 28 are connected to the input terminal of the differential amplifier 39. The differential amplifier 39 takes the difference between the reset signal output and the optical signal output, and outputs the difference signal from the amplifier output terminal 40 to the outside of the sensor.

  Next, the operation of the conventional CMOS sensor shown in FIG. 6 will be described with reference to the timing chart of FIG. Note that all the MOSFETs in FIG. 6 are N-type. Therefore, the MOSFETs are turned on when the gate potential is high (High) and turned off when the gate level is Low.

  First, as shown in FIG. 7D, the potential of the vertical shift register output line 18-1 becomes High at time t1, thereby selecting the pixel 1 in the first row. Subsequently, as shown in FIG. 7C, the input pulse of the pulse supply terminal 16 becomes High at time t2, thereby turning on the selection MOSFET 7 of the pixel 1 in the first row, so that the first row. The source of the amplification MOSFET 3 of the pixel 1 is connected to the constant current supply MOSFET 9 through the drain / source of the selection MOSFET 7 and the pixel output line 8 to form a source follower circuit.

  In this state, first, a high-level pulse is supplied to the pulse supply terminal 15 as shown in FIG. 7B, and the gate electrode of the amplification MOSFET 3 passes through the drain and source of the reset MOSFET 5 of the pixel 1 in the first row. (FD) is reset. Thereafter, at time t3, the input pulse of the pulse supply terminal 37 becomes High as shown in FIG. 7 (I), the switching MOSFET 25 is turned on, and the capacitor 23 outputs from the source follower circuit of the pixel 1 in the first row. The reset signal output is held.

  Next, when a high pulse is applied to the pulse supply terminal 14 at time t4 as shown in FIG. 7A, the charge transfer MOSFET 4 in the pixel 1 in the first row is turned on, and the pixel 1 in the first row. The charge accumulated in the photodiode 2 is transferred to the gate electrode (FD) of the amplification MOSFET 3 through the drain / source of the charge transfer MOSFET 4. At time t5, when a high pulse is applied to the pulse supply terminal 38 as shown in FIG. 7J, the optical signal output output from the source follower circuit of the pixel 1 in the first row is held in the capacitor 24. Is done. Subsequently, as shown in FIG. 7C, the input pulse at the pulse supply terminal 16 becomes Low at time t6, so that the selection MOSFET 7 in the pixel 1 in the first row is turned off, and the pixel in the first row. The output from 1 disappears.

  During this time, the input signal of the terminal 36 is High as shown in FIG. 7H, and the horizontal output lines 27 and 28 are in a reset state. However, when the input signal at the terminal 36 becomes Low as shown in FIG. 7 (H) at the time t6 and the High pulse shown in FIG. 7 (F) is applied to the horizontal shift register output line 35-1 in this state. Since the switching MOSFETs 29 and 30 in the first column are turned on, the signals of the capacitors 23 and 24 in the first column are output to the horizontal output lines 27 and 28 through the switching MOSFETs 29 and 30 in the first column, respectively. And supplied to the differential amplifier 39. The differential amplifier 39 calculates the difference between each signal of the capacitors 23 and 24 in the first column, that is, the reset signal output and the optical signal output, and removes the optical signal from which the noise caused by the threshold variation of the amplification MOSFET 3 is removed. Output from the output terminal 40.

  Next, when a high pulse is applied to the terminal 36 at time t7 shown in FIG. 7 (H), the horizontal output lines 27 and 28 are reset again, and then to the horizontal shift register output line 35-2 in FIG. 7 (G). As shown, the high pulse is applied at time t8, and the switching MOSFETs 29 and 30 in the second column are turned on, so that the signals of the capacitors 23 and 24 in the second column are switched to the switching MOSFETs 29 and 30 in the second column. Are output to the horizontal output lines 27 and 28, supplied to the differential amplifier 39, and the second column signal is output from the differential amplifier 39 to the output terminal 40 in the same manner as the first column.

  Thereafter, at time t9 shown in FIG. 7D, the potential of the vertical shift register output line 18-1 becomes Low, and the processing of the first row is completed. Next, at time t10, as shown in FIG. 7E, the potential of the vertical shift register output line 18-2 becomes High, the same processing as in the first row is performed, and reading of all pixels is completed.

  Therefore, in the case of this CMOS sensor, the timing of photoelectric conversion by the photodiodes 2 in the first and second rows is different. Such an imaging method is called a rolling shutter or a focal plane.

JP 2003-17677 A

  However, in the above conventional omnidirectional camera, a rolling shutter type CMOS sensor is used as the solid-state imaging device 203. However, in the rolling shutter type CMOS sensor, the timing accumulated in the photodiode 2 is different for each pixel row. When attempting to image a moving subject, there is a problem that the captured subject image is deformed.

  This will be described with reference to FIGS. FIG. 8 is a schematic diagram showing a state of imaging, and shows a state in which an image of the mirror 201 is reflected on a solid-state imaging device (rolling shutter type CMOS sensor) 203. In the imaging range 210 of the solid-state imaging device (rolling shutter type CMOS sensor) 203, a mirror 201 and an image reflected on the mirror 201 are represented by 211. When this image 211 is read out, it is read out in a permutation manner in the scanning direction indicated by the arrow 213 for each straight line 214.

  Now, when the image signal read in this way is expanded by the image expansion means 204 of FIG. 5, for example, the portions corresponding to the left and right ends are set as the cut surface 212 of FIG. When 211 is panoramicly developed, the result is as shown in FIG. As shown in FIG. 9, the cut surface 212 is the left and right ends of the panoramic image. A line 214 that is a straight line on the solid-state imaging device (rolling shutter type CMOS sensor) 203 becomes a complex curve after panoramic development, as shown in FIG.

  In the solid-state imaging device (rolling shutter type CMOS sensor) 203, the moving subject image is deformed because the timing accumulated in the photodiode 2 is different for each line 214, but the subject image is deformed depending on the location. There is a problem that the image development means 204 in FIG. 5 cannot easily perform correction processing.

  In order to solve this, a mechanical shutter is provided in front of the imaging region of the solid-state imaging device (rolling shutter type CMOS sensor) 203, and exposure is performed for one frame period of all lines corresponding to the open period. A method of separating the exposure process and the signal readout process by sequentially reading out each line one by one in the closed period is effective, but there is a problem that the mechanism becomes complicated.

  The present invention has been made in view of the above points, and by using a global shutter type CMOS sensor as a solid-state imaging device, it is possible to obtain a clear omnidirectional panoramic image without distortion even for a moving subject. An object is to provide an omnidirectional camera.

In order to achieve the above-described object, the present invention provides an omnidirectional camera that performs omnidirectional imaging using a solid-state imaging device, a reflecting means that reflects light from an omnidirectional subject, and a plurality of optical images of the subject. after storing pixel charges in the photodiode start the timing of termination of exposure is obtained by exposure to photoelectric conversion so that all the pixels simultaneously in all the pixels, the image pickup charges accumulated during the period of exposure from each pixel A global shutter type CMOS sensor as a solid-state image sensor that sequentially outputs as a signal and a light source that focuses light from the subject reflected by the reflecting means and forms an optical image of the subject on the global shutter type CMOS sensor. And an image expansion means for expanding the image pickup signal output from the global shutter type CMOS sensor into a panoramic image, and the global shutter type C OS sensor,
A first conductivity type well formed on a semiconductor substrate; and a second conductivity type buried portion formed in a second region different from a predetermined first region in the well and connected to the well, and optical Photodiode that photoelectrically converts an image to accumulate electric charge, ring-shaped gate electrode formed on the first region via a gate oxide film, and a region in the well corresponding to the central opening of the ring-shaped gate electrode A first source portion of the first conductivity type formed in the well and embedded in the well so as not to reach the outer periphery of the ring-shaped gate electrode around the first source portion and so as not to contact the gate oxide film. A second conductive type source vicinity region portion that is formed and connected to the first source portion and stores charges transferred from the photodiode, and a third source region in the well different from the first region, and the first source portion and Near source A ring-shaped gate transistor having a first drain portion of the first conductivity type formed spaced apart in the region and outputting the charge accumulated in the region near the source as an imaging signal; and on the first region , Having a transfer gate electrode formed so as to cover a part of the ring-shaped gate electrode, the buried portion as the second source portion, the source vicinity region portion as the second drain portion, and the charge accumulated in the photodiode A transfer gate transistor that transfers all pixels to the ring gate transistor at the same time, and for each pixel ,
A well is continuously present immediately below the gate oxide film from the transfer gate electrode to the ring-shaped gate electrode, and the transfer gate electrode, the ring-shaped gate electrode, The charge transfer barrier is generated or disappeared in the surface layer of the well between the global shutter type CMOS sensor, and the charge accumulation in the photodiode continues during the imaging signal output period until the next charge transfer is started. The image pickup signal is continuously output for each frame .

In order to achieve the above object, the present invention further includes a ring-shaped gate potential control circuit unit that controls the potential of the ring-shaped gate electrode, and a transfer gate potential control circuit unit that controls the potential of the transfer gate electrode. It is characterized by having.

  According to the present invention, since the global shutter type CMOS area sensor is used, the captured image does not generate image distortion different from the image of the subject. Even in such a case, the image after the panoramic development is not complicatedly deformed depending on the place, and as a result, a clear panoramic image having a sufficiently corrected distortion as compared with the prior art can be obtained. Further, since the mechanical shutter is unnecessary, the configuration is not complicated.

  Next, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows a configuration diagram of an embodiment of an omnidirectional camera according to the present invention. In the figure, an omnidirectional camera 100 includes a mirror 101 that displays a state of 360 degrees around, and a condensing optical system that collects light from a subject that is incident on the mirror 101 through the optical path 105 and reflected by the mirror 101. 102, a global shutter type CMOS sensor 103 as a solid-state image sensor, and an image development means 104. Compared with the conventional omnidirectional camera 200, the omnidirectional camera 100 of the present embodiment is characterized in that a global shutter type CMOS sensor 103 is used as a solid-state imaging device.

  Other than the global shutter type CMOS sensor 103, the mirror 101 and the condensing optical system 102 are the same as the conventional mirror 201 and the condensing optical system 202, and the shape of the mirror 101 is a hyperboloid, a conical shape, a plurality of shapes. There are various types such as a combination of curves, and the condensing optical system 102 reduces the subject optical image to the size of the imaging region of the global shutter type CMOS sensor 103 and forms an image. In addition, the image development unit 104 has the same configuration as that of the conventional image development unit 204, and performs a development process on the imaging signal from the global shutter type CMOS sensor 103 by a development formula derived from the curved surface of the mirror 101. A panoramic image without distortion is obtained from the image distorted according to the curved surface of the mirror 101.

Next, the global shutter type CMOS sensor 103 will be described in detail. FIG. 2 shows a configuration diagram of an embodiment of a global shutter type CMOS sensor. FIG. 2A is a plan view, and FIG. 2B is a longitudinal sectional view taken along line XX ′ in FIG. Indicates. As shown in FIGS. 2A and 2B, the global shutter type CMOS sensor which is the solid-state imaging device 111 of the present embodiment grows a p ⁻ type epitaxial layer 42 on a p ⁺ type substrate 41, and There is an n-well 43 on the surface of the epitaxial layer 42. On the n-well 43, a gate electrode 45 having a ring shape as a first gate electrode is formed with a gate oxide film 44 interposed therebetween.

An n ⁺ -type source region 46 is formed on the surface of the n-well 43 corresponding to the center portion of the ring-shaped gate electrode 45, a source vicinity p-type region 47 is formed adjacent to the source region 46, and An n ⁺ -type drain region 48 is formed at a position spaced outside the source region 46 and the source vicinity p-type region 47. In addition, there is a buried p ⁻ type region 49 in the n well 43 below the drain region 48. The buried p ⁻ type region 49 and the n-well 43 constitute the buried photodiode 50 shown in FIG.

  Between the embedded photodiode 50 and the ring-shaped gate electrode 45, there is a transfer gate electrode 51 which is a second gate electrode. The drain region 48, the ring-shaped gate electrode 45, the source region 46, and the transfer gate electrode 51 include a drain electrode wiring 52, a ring-shaped gate electrode wiring 53, a source electrode wiring (output line) 54, and a transfer gate electrode, which are metal wirings, respectively. A wiring 55 is connected. Further, as shown in FIG. 2B, a light shielding film 56 is formed above each of the above components, and an opening 57 is formed at a position corresponding to the embedded photodiode 50 in the light shielding film 56. Has been. The light shielding film 56 is formed of a metal or an organic film. The light reaches the embedded photodiode 50 through the opening 57 and is photoelectrically converted.

  Next, the pixel structure of the CMOS sensor and the structure of the entire image sensor will be described with reference to FIG. In the figure, first, pixels are arranged in a pixel spread area 61 in m rows and n columns. In FIG. 3, one pixel 62 of s rows and t columns among these m rows and n columns pixels is represented by an equivalent circuit. The pixel 62 includes a ring-shaped gate MOSFET 63, a photodiode 64, and a transfer gate MOSFET 65. The drain of the ring-shaped gate MOSFET 63 is the n-side terminal of the photodiode 64 and the drain electrode wiring 66 (corresponding to 52 in FIG. 2). , The source of the transfer gate MOSFET 65 is connected to the p-side terminal of the photodiode 64, and the drain is connected to the back gate of the ring-shaped gate MOSFET 63.

In FIG. 2B, the ring-shaped gate MOSFET 63 has a p-type region 47 near the source directly below the ring-shaped gate electrode 45 as a gate region, and an n ⁺ -type source region 46 and an n ⁺ -type drain region 48. An n-channel MOSFET. In FIG. 2B, the transfer gate MOSFET 65 has an n well 43 just below the transfer gate electrode 51 as a gate region, a p ⁻ type region 49 embedded with a photodiode 50 as a source region, and a p-type region 47 near the source. A p-channel MOSFET serving as a drain.

  In FIG. 3, in order to read a signal for one frame from each pixel of m rows and n columns, there is a circuit 67 for generating a frame start signal for giving a signal to start reading. The frame start signal may be given from outside the image sensor. This frame start signal is supplied to the vertical shift register 68. The vertical shift register 68 outputs a signal indicating which row of pixels is read out from each pixel of m rows and n columns.

  The pixels in each row are connected to a control circuit that controls the potentials of the ring-shaped gate electrode, transfer gate electrode, and drain electrode, and these control circuits are supplied with the output signal of the vertical register 68. For example, the ring-shaped gate electrode of each pixel in the s-th row is connected to the ring-shaped gate potential control circuit 70 via the ring-shaped gate electrode wiring 69 (corresponding to 53 in FIG. 2), and the transfer gate electrode of each pixel is Are connected to the transfer gate potential control circuit 72 via the transfer gate electrode wiring 71 (corresponding to 55 in FIG. 2), and the drain electrode of each pixel is drained via the drain electrode wiring 66 (corresponding to 52 in FIG. 2). It is connected to the potential control circuit 73. Each control circuit 70, 72, 73 is supplied with an output signal from the vertical shift register 68.

  Since the ring-shaped gate electrode is controlled for each row, wiring is performed in the horizontal direction. However, since the transfer gate electrode is controlled simultaneously for all pixels, the wiring direction is not limited and the vertical direction may be used. Here, it is expressed as wiring in the horizontal direction. The drain potential control circuit 73 controls all the pixels at the same time, but may be controlled for each row. Therefore, the drain potential control circuit 73 is represented by being connected to both the frame start signal and the vertical register 68.

  The source electrode of the ring-shaped gate MOSFET 63 of the pixel 62 is branched into two via a source electrode wiring 74 (corresponding to 54 in FIG. 2), one of which is supplied to a source potential control circuit 75 that controls the source electrode potential via a switch SW1. The other is connected to the signal readout circuit 76 via the switch SW2. When reading the signal, the switch SW1 is turned off and the switch SW2 is turned on. When the source potential is controlled, the switch SW1 is turned on and the switch SW2 is turned off. Since the signal is output in the vertical direction, the wiring direction of the source electrode is set to be vertical.

  The signal readout circuit 76 is configured as follows. The output of the pixel 62 is performed from the source of the ring-shaped gate MOSFET 63, and a load, for example, a current source 77 is connected to the output line 74. Therefore, it is a source follower circuit. One end of each of the capacitor C1 and the capacitor C2 is connected to the current source 77 via the switch sc1 and the switch sc2. One end of each of the capacitors C1 and C2 whose other ends are grounded is connected to the inverting input terminal and the non-inverting input terminal of the differential amplifier 78, and the potential difference between the capacitors C1 and C2 is output from the differential amplifier 78. It is like that.

  Such a signal readout circuit 76 is called a CDS circuit (correlated double sampling circuit), and various circuits other than the method described here have been proposed, and the circuit is not limited to this circuit. The signal output from the signal readout circuit 76 is output via the output switch swt. The output switches swt in the same column are subjected to switching control by a signal output from the horizontal shift register 79.

Next, a method for driving the CMOS sensor shown in FIG. 3 will be described with reference to the timing chart of FIG. First, in the period shown in FIG. 4A, light is incident on the embedded photodiode (50 in FIG. 2A, 64 in FIG. 3, etc.), and an electron / hole pair is generated due to the photoelectric conversion effect. Holes accumulate in the buried p ^- type region 49 of the diode. At this time, the potential of the transfer gate electrode 51 is the same as the drain potential Vdd, and the transfer gate MOSFET 65 is off. These accumulations are performed at the same time as the previous frame read operation is being performed.

  In the subsequent period shown in FIG. 4 (2), when the reading of the previous frame is completed, a new frame start signal is transmitted as shown in FIG. First, all the pixels are performed simultaneously from the photodiode (50 in FIG. 2A, 64 in FIG. 3) to the p-type region (47 in FIG. 2) near the source of the ring-shaped gate electrode (45 in FIG. 2). It is to transfer the hole. Therefore, as shown in FIG. 4B, the transfer gate control signal output from the transfer gate potential control circuit 72 falls from Vdd to Low2, the potential of the transfer gate electrode (41 in FIG. 2) becomes Low2, and the transfer gate MOSFET 65 Turns on.

  At this time, the potential of the ring-shaped gate electrode wiring 69 controlled by the ring-shaped gate potential control circuit 70 changes from Low to Low1 as shown in FIG. 4C, but Low2 is larger than Low1. Low1 may be the same as Low. Most simply, Low1 = Low = 0 (V) is set.

  On the other hand, the source potential of all the pixels including the source potential supplied from the source potential control circuit 75 to the source of the ring-shaped gate MOSFET 63 from the source electrode wiring 74 through the switch SW1 is as shown in FIG. The potential is set to S1. S1> Low1, which keeps the ring-shaped gate MOSFET 63 off and prevents current from flowing. As a result, charges (holes) accumulated in the photodiodes of all the pixels are transferred all at once under the ring-shaped gate electrodes of the corresponding pixels.

  In the region below the ring-shaped gate electrode 45 shown in FIG. 2 (B), the p-type region 47 near the source has the lowest potential, so the holes accumulated in the photodiode reach the p-type region 47 near the source. Accumulated in. As a result of the accumulation of holes, the potential of the p-type region 47 near the source rises.

Subsequently, in the period shown in FIG. 4C, the transfer gate electrode becomes Vdd again and the transfer gate MOSFET 65 is turned off as shown in FIG. As a result, in the photodiode (50 in FIG. 2A, 64 in FIG. 3, etc.), electron-hole pairs are generated again due to the photoelectric conversion effect, and holes start to accumulate in the buried p ⁻ -type region 49 of the photodiode. This accumulation operation is continued until the next charge transfer.

  On the other hand, since the read operation is performed in units of rows, the potential of the ring-shaped gate electrode is low as shown in FIG. 4C in the period (3) in which the first to (s−1) th rows are read. In this state, a standby state is entered with holes accumulated in the p-type region 47 near the source. The source potential can take various values depending on the value of the signal from the pixel while the signal is read from another row. The ring-shaped gate electrode potential can take various values for each row, but is set to Low in the s-th row, and the ring-shaped gate MOSFET 63 is in an off state.

  In the subsequent period shown in FIGS. 4 (4) to (6), pixel signal readout is performed. This signal readout operation will be described representatively for the pixel 62 in the s-th row and the t-th column. First, in the state where holes are accumulated in the p-type region 47 near the source, the vertical shift register 68 shown in FIG. In the period (4) in which the output signal is at a low level as shown in FIG. 5H, the ring-shaped gate electrode 45 is controlled by the control signal output from the ring-shaped gate potential control circuit 70 to the ring-shaped gate electrode wiring 69. Is raised from Low to Vg1, as shown in FIG.

Here, the potential Vg1 is between the potentials Low, Low1, and Vdd described above.
Low ≦ Low1 ≦ Vg1 ≦ Vdd (where Low <Vdd)
Is an electric potential that holds the inequality. In the period (4), the switch SW1 is turned off as shown in FIG. 4I, the switch SW2 is turned on as shown in FIG. 4J, and the switch sc1 is turned on as shown in FIG. The switch sc2 is turned off as shown in FIG.

  As a result, the source follower circuit connected to the source of the ring-shaped gate MOSFET 63 works, and the source potential of the ring-shaped gate MOSFET 63 is S2 (= Vg1-Vth1) in the period (4) as shown in FIG. Become. Here, Vth1 is a threshold voltage of the ring-shaped gate MOSFET 63 in a state in which there is a hole in the back gate (p-type region 47 near the source). The source potential S2 is stored in the capacitor C1 through the switch sc1 that is turned on.

  In the subsequent period shown in FIG. 4 (5), the potential of the ring-shaped gate electrode 45 is set as shown in FIG. 4 (K) by the control signal output from the ring-shaped gate potential control circuit 70 to the ring-shaped gate electrode wiring 69. At the same time as raising to High1, the switch SW1 is turned on and the switch SW2 is turned off as shown in FIGS. 1I and 1J, and the source potential output from the source potential control circuit 75 is shown in FIG. Raise to Highs as shown. Here, High1 and Highs> Low1.

  The values of the potentials High1 and Highs may be the same or different, but High1 and Highs ≦ Vdd are desirable for simplicity of design. In a simple setting, High1 = Highs = Vdd. Further, it is desirable to set the potential so that the ring-shaped gate MOSFET 63 is turned on and no current flows. As a result, the potential of the p-type region 47 near the source rises, and holes are discharged to the epitaxial layer 42 beyond the barrier of the n-well 43 (reset).

  In the subsequent period shown in FIG. 4 (6), the same signal readout state as in the period (4) is set again. However, unlike the period (4), as shown in FIGS. 4M and 4N, the switch sc1 is turned off and the switch sc2 is turned on. The ring-shaped gate electrode is set to Vg1 which is the same as that in the period (4) as shown in FIG. However, in this period (6), holes are discharged to the substrate in the immediately preceding period (5), and no holes are present in the p-type region 47 near the source. Therefore, the source potential of the ring-shaped gate MOSFET 63 is as shown in FIG. L), the period (6) is S0 (= Vg1-Vth0). Here, Vth0 is the threshold voltage of the ring-shaped gate MOSFET 63 in a state where there is no hole in the back gate (p-type region 47 near the source).

  The source potential S0 is stored in the capacitor C2 through the switch sc2 that is turned on. The differential amplifier 78 outputs the potential difference between the capacitors C1 and C2. That is, the differential amplifier 78 outputs (Vth0−Vth1). This output value (Vth0-Vth1) is a change in threshold value due to hole charge. Thereafter, among the pulses shown in FIG. 4F output from the horizontal shift register 79, the output switch swt in FIG. 3 is turned on based on the output pulse in the t-th column shown in FIG. During the ON period, as schematically shown by hatching in FIG. 4 (P), the threshold value change due to the Hall charge from the differential amplifier 78 is output to the outside of the sensor as the output signal Vout of the pixel 62.

  Subsequently, in the period indicated by (7) in FIG. 4, the potential of the ring-shaped gate electrode 45 is set to low again as shown in FIG. It waits until the signal processing of the next row is completed (until the readout of the pixels of the s + 1 row to the nth row is completed). During these readout periods, the photodiode 64 is accumulating holes due to the photoelectric conversion effect. Thereafter, the process returns to the period (1) and repeats from the hole transfer. As a result, the output signal shown in FIG. 4G is read from each pixel. When signals are read from all pixels, the next frame is started again.

  2A and 2B, the ring-shaped gate MOSFET 63 having the ring-shaped gate electrode 45 is an amplifying MOSFET, and as shown in FIG. It is a kind of CMOS sensor in the sense that it has an amplifying MOSFET. In this CMOS sensor, the charge (hole) accumulated in the photodiode is transferred to the p-type region 47 in the vicinity of the source under the ring-shaped gate electrode of the corresponding pixel at the same time. Is realized.

  Note that the potential supply of the source electrode wiring 74 at the time of resetting in the period (5) of FIG. That is, in the period (5), both the switches SW1 and SW2 are turned off, and the source electrode wiring 74 is floated. Here, when the potential of the ring-shaped gate electrode wiring 69 is High1, the ring-shaped gate MOSFET 63 is turned on, current is supplied from the drain to the source electrode, and the source electrode potential rises. As a result, the potential of the p-type region 47 in the vicinity of the source is raised, and holes are discharged to the p-type epitaxial layer 42 beyond the barrier of the n-well 43 (reset). The source electrode potential when the holes are completely discharged becomes High1-Vth0. This method can reduce the number of transistors that supply Highs in the source potential control circuit 75, and as a result, the chip area can be reduced.

  Note that the circuit configuration of the pixel 62 in FIG. 3 is simplified. Strictly speaking, the circuit of the pixel 62 is provided with a switch linked to each potential of the ring-shaped gate electrode wiring 69 and the transfer gate electrode wiring 71 between the source of the transfer gate MOSFET 65 and the back gate of the ring-shaped gate MOSFET 63. It is a configuration. This switch is turned on when there is a relationship of Low1 ≦ Low2 between the potential Low1 of the ring-shaped gate electrode wiring 69 and the potential Low2 of the transfer gate electrode wiring 71, and when there is a relationship of Low1> Low2. Turns off.

  By providing this switch, the substrate potential under the ring-shaped gate electrode 45 (potential Low1) is higher than the substrate potential under the transfer gate electrode 61 (potential Low2), and the ring-shaped gate electrode 45 (potential). The phenomenon that the substrate potential under Low 1) functions as a barrier and the holes cannot reach the p-type region 47 near the source can be expressed in a circuit form. However, at the time of transfer, the above condition of Low1 ≦ Low2 is always satisfied by the potential control circuits 70, 72, etc., and therefore this switch is omitted in FIG.

  As described above, in the global shutter type CMOS sensor 103 used in the present embodiment, as described with reference to FIGS. 2 to 4, the exposure is performed in the same one frame period without shifting the timing for each line. After the exposure for the period, the charges of all the pixels are transferred all at once to the readout circuit at the timing of the charge transfer period by the transfer gate (transfer gate MOSFET 65, etc. in FIG. 3) in the global shutter CMOS sensor 103. Thereafter, signals from each pixel are sequentially read out by the readout circuit within the readout period. Thus, even when a moving subject is imaged, the captured image does not generate image distortion different from the image of the subject.

  For this reason, the image expanding means 104 of the present embodiment shown in FIG. 1 panoramicly develops the video signal output from the global shutter type CMOS sensor 103, and the panoramic expanded image as shown in FIG. 9 is obtained. When obtained, even if the subject image is moving, the panorama image will not be complicatedly deformed depending on the location, and as a result, an omnidirectional panoramic image with sufficiently corrected distortion compared to the conventional image Can be obtained. Further, since a mechanical shutter is not necessary, the configuration is complicated and an increase in power consumption can be avoided.

It is a block diagram of one embodiment of an omnidirectional camera of the present invention. FIG. 2 is a plan view of an element structure for one pixel of the global shutter CMOS sensor in FIG. 1 and a cross-sectional view taken along line X-X ′. It is the figure which showed the whole structure of the global shutter type | mold CMOS sensor used by this invention with the electrical equivalent circuit. 3 is a timing chart for explaining the operation of the CMOS sensor of FIG. 2. It is a block diagram of an example of the conventional omnidirectional camera. It is a circuit diagram of an example of the rolling shutter type CMOS sensor used with the conventional omnidirectional camera. 7 is a timing chart for explaining the operation of FIG. 6. It is a figure which shows an example of the image | video currently reflected on the image pick-up element of an omnidirectional camera. It is a figure which shows an example of the panoramic image after carrying out panorama expansion | deployment of the image | video of FIG.

Explanation of symbols

43 n well 45 ring-shaped gate electrode 46 n ⁺ type source region 47 near source p type region 48 n ⁺ type drain region 49 buried p ⁻ type region 50, 64 photodiode 51 transfer gate electrode 52, 66 drain electrode wiring 53, 69 Ring-shaped gate electrode wiring 54, 74 Source electrode wiring (output line)
55, 71 Transfer gate electrode wiring 61 Pixel covering area 62 Pixel 63 Ring-shaped gate MOSFET
65 Transfer gate MOSFET
DESCRIPTION OF SYMBOLS 100 Omnidirectional camera 101 Mirror 102 Condensing optical system 103 Global shutter type CMOS sensor 104 Image expansion means 105 Optical path

Claims (2)

In an omnidirectional camera that performs omnidirectional imaging using a solid-state image sensor,
Reflecting means for reflecting light from an omnidirectional subject;
After storing a charge start timing of the end of the exposure of an optical image of an object into a plurality of photodiodes of all pixels obtained by photoelectric conversion by exposure so that all the pixels simultaneously to all pixels, the period of the exposure A global shutter type CMOS sensor as the solid-state imaging device, which sequentially outputs the charge accumulated in each pixel as the imaging signal;
A condensing optical system for condensing light from the subject reflected by the reflecting means and forming an optical image of the subject on the global shutter CMOS sensor;
Image expansion means for expanding the imaging signal output from the global shutter type CMOS sensor into a panoramic image;
With
The global shutter CMOS sensor is
A first conductivity type well formed on a semiconductor substrate; and a second conductivity type buried portion formed in a second region different from a predetermined first region in the well and connected to the well. A photodiode that photoelectrically converts the optical image and accumulates charges;
A ring-shaped gate electrode formed on the first region via a gate oxide film, and a first conductivity type first formed in a region in the well corresponding to a central opening of the ring-shaped gate electrode The first source is formed so as to be embedded in the well so as not to reach the outer periphery of the ring-shaped gate electrode and around the first source part and so as not to contact the gate oxide film. And a source vicinity region portion of a second conductivity type that stores the charge transferred from the photodiode connected to the portion, and a third region different from the first region in the well, and the first source portion and the A ring-shaped gate transistor having a first conductivity type first drain portion formed apart from the source vicinity region portion and outputting the charge accumulated in the source vicinity region portion as the imaging signal;
There is a transfer gate electrode formed on the first region so as to cover a part of the ring-shaped gate electrode, the buried portion is a second source portion, and the source vicinity region portion is a second drain portion. A transfer gate transistor that transfers the charges accumulated in the photodiode to the ring gate transistor all at once, and
For each pixel ,
The well is continuously present immediately below the gate oxide film from the transfer gate electrode to the ring-shaped gate electrode, and the transfer gate according to each potential of the transfer gate electrode and the ring-shaped gate electrode A charge transfer barrier occurs or disappears in the surface layer of the well between the electrode and the ring-shaped gate electrode, and the global shutter type CMOS sensor starts to accumulate charges in the photodiode and starts the next charge transfer. The omnidirectional camera is characterized by continuously performing the imaging signal output period until the imaging signal is output, and continuously outputting the imaging signal for each frame . A ring-shaped gate potential control circuit for controlling the potential of the ring-shaped gate electrode;
A transfer gate potential control circuit unit for controlling the potential of the transfer gate electrode;
The omnidirectional camera according to claim 1, further comprising:

Images