JP4638806B2 - 位相同期ループ回路、オフセットpll送信機、通信用高周波集積回路及び無線通信システム - Google Patents
位相同期ループ回路、オフセットpll送信機、通信用高周波集積回路及び無線通信システム Download PDFInfo
- Publication number
- JP4638806B2 JP4638806B2 JP2005326340A JP2005326340A JP4638806B2 JP 4638806 B2 JP4638806 B2 JP 4638806B2 JP 2005326340 A JP2005326340 A JP 2005326340A JP 2005326340 A JP2005326340 A JP 2005326340A JP 4638806 B2 JP4638806 B2 JP 4638806B2
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- JP
- Japan
- Prior art keywords
- circuit
- frequency
- output
- signal
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
- H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
- H03L7/0895—Details of the current generators
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03C—MODULATION
- H03C3/00—Angle modulation
- H03C3/02—Details
- H03C3/09—Modifications of modulator for regulating the mean frequency
- H03C3/0908—Modifications of modulator for regulating the mean frequency using a phase locked loop
- H03C3/0916—Modifications of modulator for regulating the mean frequency using a phase locked loop with frequency divider or counter in the loop
- H03C3/0933—Modifications of modulator for regulating the mean frequency using a phase locked loop with frequency divider or counter in the loop using fractional frequency division in the feedback loop of the phase locked loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03C—MODULATION
- H03C3/00—Angle modulation
- H03C3/02—Details
- H03C3/09—Modifications of modulator for regulating the mean frequency
- H03C3/0908—Modifications of modulator for regulating the mean frequency using a phase locked loop
- H03C3/0966—Modifications of modulator for regulating the mean frequency using a phase locked loop modulating the reference clock
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03C—MODULATION
- H03C3/00—Angle modulation
- H03C3/02—Details
- H03C3/09—Modifications of modulator for regulating the mean frequency
- H03C3/0908—Modifications of modulator for regulating the mean frequency using a phase locked loop
- H03C3/0983—Modifications of modulator for regulating the mean frequency using a phase locked loop containing in the loop a mixer other than for phase detection
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03C—MODULATION
- H03C3/00—Angle modulation
- H03C3/02—Details
- H03C3/09—Modifications of modulator for regulating the mean frequency
- H03C3/0908—Modifications of modulator for regulating the mean frequency using a phase locked loop
- H03C3/0991—Modifications of modulator for regulating the mean frequency using a phase locked loop including calibration means or calibration methods
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
- H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
- H03L7/0895—Details of the current generators
- H03L7/0898—Details of the current generators the source or sink current values being variable
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
- H03L7/107—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
- H03L7/1072—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth by changing characteristics of the charge pump, e.g. changing the gain
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
- H03L7/185—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using a mixer in the loop
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Transmitters (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005326340A JP4638806B2 (ja) | 2005-03-29 | 2005-11-10 | 位相同期ループ回路、オフセットpll送信機、通信用高周波集積回路及び無線通信システム |
| US11/341,615 US7352250B2 (en) | 2005-03-29 | 2006-01-30 | Phase locked loop circuits, offset PLL transmitters, radio frequency integrated circuits and mobile phone systems |
| US11/865,729 US7683723B2 (en) | 2005-03-29 | 2007-10-02 | Phase locked loop circuits, offset PLL transmitters, radio frequency integrated circuits and mobile phone systems |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005094161 | 2005-03-29 | ||
| JP2005326340A JP4638806B2 (ja) | 2005-03-29 | 2005-11-10 | 位相同期ループ回路、オフセットpll送信機、通信用高周波集積回路及び無線通信システム |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2006311489A JP2006311489A (ja) | 2006-11-09 |
| JP2006311489A5 JP2006311489A5 (enExample) | 2009-03-05 |
| JP4638806B2 true JP4638806B2 (ja) | 2011-02-23 |
Family
ID=37069658
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2005326340A Expired - Fee Related JP4638806B2 (ja) | 2005-03-29 | 2005-11-10 | 位相同期ループ回路、オフセットpll送信機、通信用高周波集積回路及び無線通信システム |
Country Status (2)
| Country | Link |
|---|---|
| US (2) | US7352250B2 (enExample) |
| JP (1) | JP4638806B2 (enExample) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4431015B2 (ja) * | 2004-09-09 | 2010-03-10 | 株式会社ルネサステクノロジ | 位相同期ループ回路 |
| US7574185B2 (en) * | 2004-12-17 | 2009-08-11 | Verigy (Singapore) Pte. Ltd. | Method and apparatus for generating a phase-locked output signal |
| JP4638806B2 (ja) * | 2005-03-29 | 2011-02-23 | ルネサスエレクトロニクス株式会社 | 位相同期ループ回路、オフセットpll送信機、通信用高周波集積回路及び無線通信システム |
| US8049540B2 (en) | 2008-09-19 | 2011-11-01 | Analog Devices, Inc. | Calibration system and method for phase-locked loops |
| US20100093279A1 (en) * | 2008-10-14 | 2010-04-15 | Qualcomm Incorporated | Electronic devices for communication utilizing energy detection and/or frequency synthesis |
| US8081936B2 (en) | 2009-01-22 | 2011-12-20 | Mediatek Inc. | Method for tuning a digital compensation filter within a transmitter, and associated digital compensation filter and associated calibration circuit |
| JP5290098B2 (ja) | 2009-09-10 | 2013-09-18 | ルネサスエレクトロニクス株式会社 | 送信機およびそれに使用可能な半導体集積回路 |
| WO2011071545A2 (en) * | 2009-12-11 | 2011-06-16 | Ess Technology, Inc. | Multi-phase integrators in control systems |
| US8330509B2 (en) * | 2010-04-12 | 2012-12-11 | Intel Mobile Communications GmbH | Suppression of low-frequency noise from phase detector in phase control loop |
| WO2012106464A1 (en) * | 2011-02-04 | 2012-08-09 | Marvell World Trade Ltd. | REFERENCE CLOCK COMPENSATION FOR FRACTIONAL-N PHASE LOCK LOOPS (PLLs) |
| EP2584749B1 (en) * | 2011-10-19 | 2014-09-10 | Karlsruher Institut Für Technologie (KIT) | Radio communication system, home gateway, bidirectional communication system, and method for stabilising a sideband signal |
| US10205457B1 (en) * | 2018-06-01 | 2019-02-12 | Yekutiel Josefsberg | RADAR target detection system for autonomous vehicles with ultra lowphase noise frequency synthesizer |
| WO2021079563A1 (ja) * | 2019-10-23 | 2021-04-29 | 国立大学法人東京大学 | フラクショナル位相同期回路および位相同期回路装置 |
| US12021542B2 (en) * | 2022-03-03 | 2024-06-25 | Texas Instruments Incorporated | Device, system, and method for intra-package electromagnetic interference suppression |
| CN116582139B (zh) * | 2023-04-27 | 2025-11-25 | 普源精电科技股份有限公司 | 信号源及信号源的射频信号输出控制方法 |
| CN118118014B (zh) * | 2024-04-28 | 2025-01-24 | 成都电科星拓科技有限公司 | 包含温度传感器的cdr电路 |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4153884A (en) * | 1975-12-16 | 1979-05-08 | Sanyo Electric Co., Ltd. | Frequency synthesizer for transmitter/receiver using a phase locked loop |
| US6100767A (en) * | 1997-09-29 | 2000-08-08 | Sanyo Electric Co., Ltd. | Phase-locked loop with improved trade-off between lock-up time and power dissipation |
| US7035607B2 (en) * | 1998-05-29 | 2006-04-25 | Silicon Laboratories Inc. | Systems and methods for providing an adjustable reference signal to RF circuitry |
| US6049255A (en) * | 1998-06-05 | 2000-04-11 | Telefonaktiebolaget Lm Ericsson | Tuning the bandwidth of a phase-locked loop |
| JP2000013220A (ja) * | 1998-06-22 | 2000-01-14 | Oki Electric Ind Co Ltd | 位相同期回路 |
| JP2002042429A (ja) * | 2000-07-27 | 2002-02-08 | Matsushita Electric Ind Co Ltd | ディスク再生装置のクロック抽出装置 |
| JP2002157841A (ja) * | 2000-11-16 | 2002-05-31 | Matsushita Electric Ind Co Ltd | ディスク再生装置のクロック抽出装置 |
| US6621354B1 (en) * | 2001-07-16 | 2003-09-16 | Analog Devices, Inc. | Feedback methods and systems for rapid switching of oscillator frequencies |
| GB0126632D0 (en) * | 2001-11-06 | 2002-01-02 | Hitachi Ltd | A communication semiconductor integrated circuit device and a wireless communication system |
| GB0220616D0 (en) * | 2002-09-05 | 2002-10-16 | Koninkl Philips Electronics Nv | Improvements relating to phase-lock loops |
| US7095287B2 (en) * | 2004-12-28 | 2006-08-22 | Silicon Laboratories Inc. | Method and apparatus to achieve a process, temperature and divider modulus independent PLL loop bandwidth and damping factor using open-loop calibration techniques |
| JP4638806B2 (ja) * | 2005-03-29 | 2011-02-23 | ルネサスエレクトロニクス株式会社 | 位相同期ループ回路、オフセットpll送信機、通信用高周波集積回路及び無線通信システム |
| US7482881B2 (en) * | 2005-10-31 | 2009-01-27 | Broadcom Corporation | Phase locked loop including a frequency change module |
-
2005
- 2005-11-10 JP JP2005326340A patent/JP4638806B2/ja not_active Expired - Fee Related
-
2006
- 2006-01-30 US US11/341,615 patent/US7352250B2/en not_active Expired - Fee Related
-
2007
- 2007-10-02 US US11/865,729 patent/US7683723B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| JP2006311489A (ja) | 2006-11-09 |
| US7683723B2 (en) | 2010-03-23 |
| US20060220750A1 (en) | 2006-10-05 |
| US20080030281A1 (en) | 2008-02-07 |
| US7352250B2 (en) | 2008-04-01 |
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