JP4625623B2 - Optical disk playback device - Google Patents

Description

  The present invention relates to an apparatus for reproducing a signal from an optical disk, and more particularly to an apparatus capable of reproducing a signal at high speed even with an optical disk having scratches, black dots, fingerprints, and the like attached thereto.

  In a conventional optical disk reproducing apparatus, a reproduction signal (RF signal) of information recorded on an optical disk is binarized at an automatically adjusted slice level, and the binarized signal is passed to the next digital processing circuit. For example, a binarization method has been proposed in which “1” is determined when the value of the RF signal is larger than the signal slice level and “0” is determined when the value is smaller (see Patent Document 1).

  On the other hand, a partial response maximum likelihood (PRML) signal method that combines a Viterbi decoder, which is one of the partial response method and the maximum likelihood decoding method (sampled into a multi-bit digital signal), is proposed. Has been. This PRML signal system realizes a playback system that does not require high frequency components by intentionally adding waveform interference as the recording density in the linear recording direction increases, and by probability calculation considering waveform interference, This is a method for improving the quality of reproduced data (see Patent Document 2).

  FIG. 3 shows an optical disc format based on the DVD-RAM standard. As shown here, the DVD-RAM disc is composed of a header section for storing address information and an information recording section (data section) for storing user data. In the header portion, address information is stored in ID1 to ID4, and ID1, 2 and ID3, 4 are shifted from the data track by ½ track each on the inner or outer periphery side. The data part is composed of a groove track and a land track, and both are provided alternately (see Non-Patent Document 1).

JP 2002-251740 (3rd, 4th page, Fig. 1)

JP 2003-36612 A (Page 3) 120mm DVD Rewritable Disk (DVD-RAM) Standard ECMA-272 2nd Edition June 1999 (p.27)

  First, normal data reproduction will be described. A method of reproducing address information stored in the header portion and user data recorded in the data portion in the DVD-RAM will be described with reference to FIG.

  FIG. 2A shows an ID gate, where a high section indicates a header section period and a low section indicates a data section period.

  FIG. 2B shows a read gate (RDGATE), which is a control signal for matching the center level of the RF signal to the reference potential, and switches the synchronization signal in the PLL circuit that generates the reproduction clock (RCLK). Control signal. Specifically, when RDGATE is High, the recovered clock is synchronized with the binary signal of the RF signal, and when RDGATE is Low, the recovered clock is synchronized with the wobble clock (Wobble CK). The wobble clock is generated by the Wobble PLL unit by reproducing the wobble (see FIG. 3) recorded in advance on the disc.

  When RDGATE is High, the cut-off frequency of the high-pass filter (HPF) is lowered to eliminate low-frequency DC fluctuations and to prevent false lock of the PLL unit that generates the reproduction signal. Here, the cut-off frequency is set to about 1 kHz so that sufficient reproduction data information can be obtained even after HPF. As a result, even if a pseudo lock occurs, if there is an HPF, there is an effect that the pseudo lock does not continue even if it is locked to a wrong frequency. The pseudo lock means that the clock generated by the PLL locks to an incorrect frequency when the frequency of the clock component included in the reproduction signal and the frequency of the clock generated by the PLL are greatly different. On the other hand, when RDGATE is low, the operation is performed so that the cutoff frequency of HPF is high.

  In the DVD-RAM standard, the reflectivity of the header portion is set to be higher than the reflectivity of the data portion in order to facilitate synchronization and to easily obtain a tracking error signal. For this reason, as shown in FIG. 2C, there is a difference in DC level between the RF reproduction signal of a part of the header part and the data part. In FIG. 2C, the amplitude of the RF signal is shown.

  In order to recognize the address data included in the header portion, it is necessary to binarize the reproduction signal at a predetermined slice level after adjusting to the same DC level as the data portion. In order to reduce the fluctuation of the DC level, it is necessary to pass through a high-pass filter having a high cutoff frequency in the header portion.

  FIG. 2D shows a reproduction signal after HPF. The shaded portion indicates a binary value of 1 or 0. Since HPF has a differential characteristic, it changes greatly at the rising edge of the RF signal. However, since the HPF has a high cutoff frequency, it can be quickly settled, and the DC level of the header and data parts can be adjusted.

  Since a large DC fluctuation due to HPF always occurs between the header part and the data part, the recovered clock is configured to be synchronized with Wobble when RDGATE is Low. Since ID1, ID2 and ID3, ID4 are addresses written in different positions (see FIG. 3), they are also synchronized by Wobble.

  Next, the reason why the data cannot be reproduced when there is a defect such as a scratch at the top of the data (VFO) will be described with reference to FIGS. FIG. 2 (e) shows an RF signal when there is a minute flaw at the position where RDGATE switches from Low to High. The RF signal fluctuates greatly to the lower reflectivity due to scratches.

  FIG. 2 (f) shows a reproduction signal after passing (e) through the HPF. When the HPF time constant is small, the signal changes rapidly at the position of the flaw, and then the HPF time constant switches to a large value, so the playback signal does not return immediately to the specified DC level. It becomes difficult to binarize depending on the level.

  That is, in the feedback processing for changing the slice level after detection of a flaw as shown in Patent Document 1, if there is a flaw or the like at the HPF switching position, the DC level of the reproduction signal is detected even if the flaw detection unit detects the flaw. It is difficult to make the slice level follow the fluctuations in the address, and there is a problem that the address and data cannot be binarized appropriately.

  FIGS. 2G and 2H are actual waveforms of the RF signal (inverted) when there is a flaw and the reproduction signal after HPF. A scratch at a position where the time constant of the HPF is changed from small to large is characterized by the fact that when the time constant is small, the DC constant fluctuates and then the time constant becomes large and the DC gradually decreases before settling. Become.

  Feedback control is a control that returns the detected system output to the input side and causes a control action in accordance with the deviation from the target value. The characteristic that the response is not good is a small amount caused by scratches in the playback signal. It becomes a big problem when there is a defect. For this reason, feedforward control is preferred in which the control operation is performed in response to fluctuations or disturbances in the target value without waiting for detection of the control result.

  That is, in the binarization method disclosed in Patent Document 1, when reproducing an information recording medium having a greatly improved recording density, interference between codes occurs due to the frequency characteristics of the recording / reproducing system, and the error rate deteriorates. Since the slice level is generated by the feedback circuit, there is a problem that it is difficult to cope with high-speed processing.

  As described above, in the configuration of the optical disc apparatus of Patent Document 1, when dirt such as scratches, black dots, fingerprints, etc. are attached to the optical disc, the slice level fluctuates greatly, and it takes time to converge. There is a problem that the amount of error occurrence increases.

  The present invention provides an optical disc apparatus capable of fast reproduction of a reproduction signal and normal reproduction even when an information recording medium has a defect such as dirt or scratches when the reproduction speed is increased.

  An object of the present invention is to provide an optical disc apparatus for recording / reproducing information on / from an optical disc having a header area in which address information is recorded and a data area in which user information can be recorded. First defect detection means for detecting a defect, analog-to-digital conversion means for sampling the reproduction signal based on a reproduction clock to obtain a sample reproduction signal, and second defect detection for detecting a defect in the sample reproduction signal Means, processing method selection means for selecting a defect processing method from information on the defect type and defect position determined by the first or second defect detection means, and an offset for correcting the offset of the sampling reproduction signal Correction means, and the offset correction means integrates the sampled reproduction signal and subtracts the integration value from the sampled reproduction signal. Has a function of correcting an offset, and a function of varying the integration rate, by, by selection of the processing method selecting means, it is improved by the optical disc device for varying the integration speed of the offset correction means.

  By implementing the present invention, even when an RF playback signal is obtained from an optical disc having a scratch, it is possible to quickly return from the abnormal playback state due to the scratch to the normal playback state.

  The present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of an optical disk apparatus according to the present invention. Here, 1 is an optical disc such as a DVD-RAM in which prepit portions and data portions are alternately arranged, 2 is a spindle motor, 3 is an optical head (PU), 4 is an I / V converter, 5 is a Wobble processing portion, 6 is an RF data processing unit, 7 is a first flaw detection unit, 8 is a flaw processing method selection unit, 9 is a control unit, 10 is a host, 11 is a PLL unit, 12 is a demodulated signal processing unit, and 110 is an A / D A converter, 111 is a VCO, 112 is a D / A converter, 113 is a phase comparator, 114 is an offset correction unit, 1140 is an integral speed adjustment unit, and 116 is a second flaw detection unit.

  The optical disk 1 is held and rotated by a spindle motor 2, and the optical head 3 forms a semiconductor laser that emits laser light for recording or reproducing information, and light from the semiconductor laser is formed as a light spot on the disk surface. And an optical detector for performing light spot control such as information reproduction and autofocus and track tracking using reflected light from the optical disk 1, and recording information on the optical disk 1, Information on the optical disc 1 is reproduced. The optical disk apparatus is connected to a host computer (hereinafter referred to as “host 10”) such as a personal computer or a workstation, and receives instructions and information data from the host 10 through a control unit 9 including a microcomputer or the like. Perform recording, playback, and seek operations.

  Next, the operation of the reproduction process will be described. The host 10 issues a reproduction start instruction to the control unit 9 and receives a signal from the optical head 3, and the I / V converter 4 converts the current / voltage converted reproduction signal into a wobble processing unit 5 and an RF data processing unit. 6 is output.

  The wobble signal processing unit 5 extracts a wobble signal corresponding to a wobbling recording guide groove wobble (refer to FIG. 3) that periodically meanders the disk, and outputs a wobble clock as a binary signal synchronized with this signal. .

  The RF data processing unit 6 includes an auto gain control 61 (AGC), a high pass filter 62 (HPF), an equalizer 63 (EQ), and the like. The AGC 61 controls the gain so that the amplitude of the signal from the I / V converter 4 becomes constant. The HPF 62 is provided to eliminate low-frequency DC fluctuations included in the reproduction signal. In the case of DVD-RAM, since the header address is reproduced, it is necessary to reduce the DC fluctuation of the header portion, and a cutoff frequency (Fc) adjustment unit 620 that switches the HPF cutoff frequency high is provided. .

  The EQ circuit corrects attenuation of high frequency components due to optical characteristics. In the PRML system, the degree of influence on a plurality of bits is set to a value determined by the PR class, and the degree of interference between bits is controlled. For example, when PR (1, 2, 2, 1) is used, the EQ characteristic is corrected so as to be close to the frequency characteristic of PR (1, 2, 2, 1). In the case of 8-16 modulated DVD data using PR (1, 2, 2, 1), the output sampled by the A / D converter described later is 0, 1, 3, 5, 6 Only the value is a possible value. Details will be described later.

  From the signal processed by the RF data processing unit, the first scratch detection unit 7 determines whether or not there is a scratch on the disk. For example, scratch detection as shown in FIG. 5 is performed. The first flaw detection unit 7 determines that there is a flaw when the amplitude of the reproduction signal is smaller than a certain level. If there is a flaw, the position of the flaw and the type of flaw are discriminated. A scratch on the disc is judged to be a scratch if the amplitude level is below a certain threshold because light is not reflected only at the scratched portion.

  In flaw position detection, it is determined whether the flaw is in the header portion or the data portion. Further, it is determined whether or not there is a flaw near the switching (header / data switching unit) of the HPF used in the RF signal processing unit 6. When a scratch on the reproduction signal is found, the AGC 61 circuit of the RF data processing unit 6 performs processing such as holding, and outputs a signal that matches the standard input range of the next stage A / D converter.

  The flaw processing method selection unit 8 selects a flaw processing method according to the position and type of the flaw detected by the first flaw detection unit and the result of the second flaw detection unit described later.

  The PLL circuit 11 generates a read clock (RCLK) for reproducing address data and user data from the RF signal that has passed through the RF data processing unit 6 and the flaw detection unit 7.

  The reproduction signal is sampled into a multi-bit digital signal by the A / D converter 110 in the PLL and reproduced by the demodulated signal processing unit 12. The demodulated signal processing unit 12 is reproduced by a PRML signal method that combines a Viterbi decoder that is one of a partial response method and a maximum likelihood decoding method (maximum live-cliff).

  In the PRML signal system, since the sampled multi-bit digital signal value is meaningful in Viterbi decoding, it is important that the phase of the recovered clock is synchronized with the phase of the clock component of the recovered signal. In addition, it is necessary to output the reproduction clock stably without the PLL circuit 11 being unlocked due to disturbances such as scratches and noise.

  The PLL circuit 11 that generates the reproduction clock is a digital PLL. A signal matching the input range of the A / D converter is input to the A / D converter 110 from the RF data processing unit 6 via the first flaw detection unit 7.

  The input waveform of the A / D converter will be described below. Fig. 4 (a) shows the standard output amplitude waveform of the A / D converter when a 4T signal is input when 8-bit input is used. The standard input to the A / D converter is shown in FIG. Further, FIG. 4 (c) shows the response waveform of PR (1, 2, 2, 1).

Here, the 4T signal refers to a signal in which a bit string written on the disk repeats 0000111100001111. In the 8-16 modulation method adopted in the DVD standard, the minimum value of 0 between 1 and 1 is limited to 2 (RLL (2, 7)). When this signal is passed through PR (1, 2, 2, 1), the portion 1111 is output in the order of 1221 as shown below. That is,
01221
001221
0001221
00001221 sum,
013556510... Thus, only the five values 0, 1, 3, 5, 6 are possible values. It is necessary to input such an equivalent signal to the Viterbi complex in the demodulated signal processing unit 12. The equivalence may be performed by the EQ 63 of the RF data processing unit 6 or may be performed in the demodulated signal processing unit 12.

  The center input DC value of the A / D converter is Vdc, and the input range is from Vmin (minimum DC value) to Vmax (maximum DC value). The difference between Vmin and Vmax is Vin. The standard input to A / D is (Vin / 2). FIG. 4A shows the numerical values of the A / D converter output corresponding to Vdc, Vmin, and Vmax in FIG.

  FIG. 6A shows the RF signal, RDGATE, and A / D input signal. This is the signal when the disc is not damaged. FIG. 6B shows an RF signal, a flaw detection signal by the first flaw detector, and an A / D input signal when the disc has a flaw. By outputting the A / D standard input amplitude at 1/2 of the A / D input range in the RF data processing unit 6, if an extremely small period outside the range continues, it is determined as a scratch. be able to. Moreover, it is also possible to determine a scratch when only a certain period (+) or (−) period continues.

  When the disc is scratched like the RF signal and A / D input signal in FIG. 6B, the reflectivity becomes extremely low, so that the DC of the RF signal rises sharply. When the amplitude of the RF signal in FIG. 6B is smaller than a certain value, the first flaw detector detects the flaw.

  On the other hand, even if the signal is not judged to be a flaw by the first flaw detection unit 7, the second flaw detection unit 116 judges that the flaw is not greater than a certain amplitude value for a certain period of time, and the PLL 11 is unlocked. Do not. In the first flaw detection unit, the flaw determination is performed only by the amplitude, but in the second flaw detection unit, the DC level of the A / D converter output is also important. It is determined whether or not the standard amplitude is input at the center of zero. In the PLL 11, the phase comparator detects the phase error using values before and after the zero cross point. The demodulated signal processing unit 12 (Viterbi decoding circuit or the like) at the subsequent stage performs a predetermined calculation with five values sampled by the A / D converter in the case of DVD. The second flaw detection unit prevents these circuits from being hindered by flaws.

  When the disc has a flaw as in the first flaw detection signal in FIG. 6B, a signal such as chattering is often output before the flaw detection. In such a case, when viewed from the PLL 11, it may be ignored by passing a loop filter. Since the second flaw detection unit 116 does not continue with a certain amplitude value or less for a certain period, it is not determined as a flaw. Similarly to chattering, when the fingerprint is on the disc, if the amplitude variation of the RF signal continues, it is not determined as a scratch.

  In FIG. 6 (b), the first flaw detection unit makes a judgment based only on the signal amplitude, but the part that gradually changes before the flaw is also an abnormal signal for the PLL 11 and the demodulated signal processing unit 12. Therefore, it is judged as a scratch.

  As shown in FIG. 6C, the A / D input is greatly shaken for a certain time after the wound. It can be seen that the A / D input signal is greatly swelled compared to the normal standard input even when the first scratch detection unit determines that no scratch has been detected. In the figure, a large offset occurs during the 150us period after the wound, and then a normal waveform is obtained. Therefore, the second flaw detector performs the following process.

  First, when there is a signal for a certain period only on the (+) side or the (−) side, the second flaw detector determines that it is a flaw (step 1). Alternatively, if there is a gradually large or small inclination, it is determined as a scratch.

  Next, when there are signals on both sides of (+) and (−), the coefficient is varied so that the integral speed adjustment unit 1140 in the offset correction unit 114 follows quickly (step 2).

  Thereby, the fluctuation | variation by the damage | wound of a time constant switching part is settled quickly, and data can be reproduced | regenerated normally.

  If a long scratch that cannot be removed by the loop filter continues for a certain period of time, the second scratch detection unit 116 determines that the scratch is a scratch. Therefore, the outputs of the phase comparator 113 and the offset correction unit 114 are held or fixed to zero. This is to prevent the PLL from being unlocked.

  Normally, when a long scratch for a certain period is detected by the first detection unit, the RF data processing unit 6 holds or prevents the A / D input from causing such a large amplitude fluctuation. Processing such as clamping. However, since the RF signal processing unit has a lot of feedback processing, it may not immediately follow even if there is a scratch. Therefore, when a flaw is detected by the second detector, a process such as holding or outputting a fixed value is performed to react quickly to the flaw and reduce the influence on the next-stage circuit.

  FIG. 7 shows a scratch determination method. In FIG. 7A, if the amplitude becomes smaller than the input range 1 / n of the A / D converter and the period of the small amplitude continues for a certain time, it is determined as a scratch. If the A / D conversion standard input continues for a certain period of time (+) or (-), or if it has a certain slope for a certain period of time (+) or (-), it is judged as a scratch.

  In FIG. 7B, if the input range of 1 / n or less (P sample average) of the A / D converter becomes small and the period of the small amplitude continues for a certain time, it is determined as a scratch. It corresponds to noise, chattering, fingerprints, etc.

  As shown in FIG. 8, if there is a flaw near the switching time of RDGATE in the header part, it is determined that the flaw is present even in a short period. If the data part and the address part of the header part are flawed, the flaw judgment period can be set until a period in which the PLL is not synchronized.

  Next, the offset correction unit will be described. The signal input to the A / D converter is offset corrected so that the DSV (Digital Sum Value) becomes zero by the offset correction unit. DVD-RAM data is 8-16 modulated, and when data with 3 or 14 consecutive 0s or 1s restricted is reproduced on an ideal device, the DC average value of the playback signal is constant. It is always constant within the range. Such a signal is called a DC-free signal. More specifically, DC free means that the DSV becomes 0 when the values are larger (+) and smaller (−) than the center value of the reproduction signal and are added for a certain period.

  FIG. 9A shows an example of the offset correction unit 114. It is composed of a simple IIR (Infinit Impulse Response) filter. The output signal is delayed by one clock by a delay circuit (flip-flop) and processed by adding to the input signal. When the offset is not present in the input signal, DSV is 0, so the output of the IIR filter is 0. If the input code continues to be +, the output increases with time. If the input code continues to be-, the output decreases with time. The speed of integration can be varied by the input coefficient.

  FIG. 9B shows an example of the offset correction unit 114. In FIG. 9B, a limiter is added after the A / D output in FIG. 9A. Since numerical values with large fluctuations such as maximum and minimum amplitudes may give an error to the offset correction output, it is better to use (b) except for offset correction after a flaw.

  The integrated signal that is the output of the IIR filter is subtracted from the output of the D / A converter, and is output to the demodulated signal processing unit 12 and the phase comparator 11 in the next stage.

Rough offset correction can be realized with this circuit, but for fine offset, correction is required by separately detecting signals around the zero cross point of the phase comparator. (Not shown)
From the offset-corrected signal, the phase error before and after the zero cross point is extracted by the phase comparator 115, the noise is removed by the loop filter 113, the VCO 111 is oscillated via the D / A converter 112, and the A / D A sampling clock for the converter and a data recovery clock are generated.

  Next, the operation when there is a minute flaw in the portion where the time constant changes from small time constant to large time constant in FIG. 8 will be described. 8A is an IDGATE, FIG. 8B is an RDGATE, FIG. 8C is a signal of a time constant switching portion representing before and after the time constant changes from small to large, FIG. 8D is a DEFECT indicating a flaw, e) is RDGATE after detection of flaws, (f) is an RF signal when there is a flaw in the time constant switching portion, and (g) is a reproduction signal after HPF, which is an A / D input signal.

  If there is a minute flaw in the time constant switching unit, there is a problem that the DC is greatly fluctuated due to the flaw and then the time constant becomes large and the DC does not settle easily. In order to solve this, switching of the RDGATE is prohibited (while the time constant is kept small) during a period in which the time constant switching unit of the address part is flawed, and the time constant is increased after the flaw is eliminated. After the flaw, since DC fluctuations remain higher than normal, the integration speed of the integrator speed adjustment unit 1140 of the offset correction unit 114 is switched so as to be faster than normal, and the follow-up of the DC offset correction is made faster. Thereby, the fluctuation | variation by the damage | wound of a time constant switching part is settled quickly, and data can be reproduced | regenerated normally. When the signal HDCH (hedder Data change) indicating that the time constant in FIG. 8C is before and after switching is high (d) When DEFECT falls from high to low, the HPF cutoff frequency is controlled. The RDGATE low period (period with a small time constant), which is the signal to be extended, is extended to the period when DEGECT falls to low. Instead of the RDGATE signal (b), the time constant of the HPF is controlled by a signal (RDGATE1) as shown in (e) RDGATE after the flaw detection.

  RDGATE1 can be created more easily than HDCH and DEFECT. It can be expressed by the following description.

RDGATE1 = ~ ((~ RDGATE) & (HDCH) & (DEFECT)))
| Indicates or, ~ indicates not, and & indicates and.

  The dotted line (g) is a diagram when the processing of the present invention is not performed, and DC greatly fluctuates. When the processing of the present invention is performed, the settling is fast as shown by the solid line in (g). This is because, while the HPF time constant is small, the process of switching the HPF time constant is performed after the DC fluctuation due to scratches is settled.

  Even if the DC fluctuation due to the flaw is settled, the DC offset remains to some extent. Therefore, after the flaw is no longer detected by the second flaw detection unit, the speed of the integrator of the integrator speed adjustment unit 1140 of the offset correction unit 114 for a certain period of time. To be faster than usual. Thereby, the fluctuation | variation by the damage | wound of a time constant switching part is settled quickly, and data can be reproduced | regenerated normally.

  The above offset correction processing can be used not only for DVD-RAM discs with pre-recorded addresses, but also for DVD-ROM, DVD-R / RW, DVD + R / RW and BD (Blu-ray) discs. It is.

FIG. 10 shows a sequence of scratch processing when scratches are present on the disk. After starting reproduction (10A), the first flaw detector detects a flaw in the RF signal (10B). The first flaw detection unit determines that a flaw is present when the amplitude is equal to or smaller than a certain value, and holds the flaw detection period AGC circuit (10
C). This is to reduce the influence of scratches. If no flaw is detected, the AGC circuit operates and outputs a predetermined amplitude value. If there is no damage, the signal amplitude is output in accordance with the standard input of the next stage A / D converter. Even if no scratch is detected by the first scratch detector, the signal digitized by the A / D circuit is checked by the second defect detector as to whether there is a scratch (10F).
When a scratch is detected by the first scratch detection unit, the position of the scratch is detected (10D). If the scratch location is other than the address in the header portion, no particular scratch processing is performed. This is because the PLL recovered clock is synchronized with the wobble and does not affect the operation of the PLL circuit. This is also because there is no address data to be reproduced.

  The case where a part of address information ID1-4 of a header part has a damage | wound is demonstrated. IDs 1 to 4 are pre-recorded addresses, and are synchronized with the wobble. Therefore, the PLL lock is not easily released from the beginning. For this reason, considering only the PLL characteristics, the determination criterion for the second flaw detection (10F) can be set to a value having a margin more than the flaw detection determination criterion in the data portion. You may set to the value which considered the reproduction | regeneration processing capability etc. of the demodulation signal processing part 12 of the next stage.

  If the scratch location is the header (address) / data switching section, keep the HPF time constant small so that the scratch can be settled quickly. During the scratch period, the output of the offset correction unit and the phase comparator is held or fixed to zero. After the flaw, for a certain period, the coefficient of the integrator of the offset correction unit is switched to a value such that the integration speed is increased and the sampling reproduction signal is not offset earlier.

  If the location of the flaw is the data portion, the second flaw detection portion determines whether the sampled reproduction signal is flawed (10F). This is because it takes time for the feedback processing, so that the PLL is not unlocked due to scratches and noises that are missed by the first scratch detection unit.

  In the second flaw detection unit, processing for the PLL circuit is changed depending on the type of flaw (10H). When the scratch period is short, such as a fingerprint, and the scratch is periodically detected, the PLL is not easily unlocked and a reproduction signal can be easily obtained. Therefore, the reproduction process is performed without performing a process corresponding to the scratch.

If the scratch period of black dots or the like is long, it is determined as a scratch, and the outputs of the offset correction unit and the phase comparator are held or fixed to zero. After the flaw, for a certain period, the coefficient of the integrator of the offset correction unit is switched to a value such that the integration speed is increased and the sampling reproduction signal is not offset earlier. (10I)
In the above embodiment, the DVD-RAM disk has been described as an example. However, the scope of application of the present invention is not limited to the DVD-RAM device, and the same control is performed in a recording / reproducing apparatus other than the DVD-RAM disk. The method can be adopted.

The figure which shows the Example of the optical disk apparatus of this invention. The timing diagram in the conventional optical disk apparatus. The format figure of the optical disk of this invention. The figure which shows the A / D converter input / output in the optical disk device of this invention. The timing diagram in the optical disk device of the present invention. The figure which shows RF signal in the conventional optical disk apparatus, RDGATE, the flaw detection signal by a 1st flaw detector, and A / D input. The figure which shows the flaw detection method in the optical disk apparatus of this invention. 4 is a timing chart showing a flaw detection method in the optical disc apparatus of the present invention. FIG. 3 is an offset correction circuit diagram in the optical disc apparatus of the present invention. 5 is a flowchart of scratch detection processing in the optical disc apparatus of the present invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Optical disk, 2 ... Spindle motor, 3 ... Optical head, 4 ... I / V converter, 5 ... Wobble processing part, 6 ... RF data processing part, 61 ... AGC, 62 ... HPF, 63 ... EQ, 620 ... Fc (Cutoff frequency) adjustment unit, 7 ... first flaw detection unit, 8 ... flaw processing method selection unit, 9 ... control unit, 10 ... host computer, 11 ... PLL unit, 12 ... demodulated signal processing unit, 110 ... A , D ... A / D converter, 111 ... D / A converter, 113 ... phase comparator, 114 ... offset correction unit, 1140 ... integrator speed adjustment unit, 116 ... second flaw detection unit.

Claims (4)

An optical disc apparatus for recording / reproducing information on / from an optical disc provided with a header area in which address information is recorded and a data area in which user information can be recorded,
First defect detection means for detecting as a defect that the amplitude of a reproduction signal reproduced from the optical disc is lower than a certain value;
An analog-to-digital conversion means provided in a phase-synchronized feedback circuit for obtaining the sampled reproduction signal by sampling the reproduction signal based on the reproduction clock;
Second defect detection means for detecting a defect based on the amplitude of the sampling reproduction signal;
Offset correction means for correcting an offset of the sampling reproduction signal;
Phase comparison means provided in the phase-synchronized feedback circuit for outputting a signal indicating a phase error based on the sampled reproduction signal;
It has
The offset correction means includes
A function of integrating the sampled reproduction signal;
A function of correcting an offset by subtracting an integral value from the sampling reproduction signal;
A function of varying the integration speed,
While the first defect detection means detects a defect, the gain of the reproduction signal is held, and after the second defect detection means no longer detects a defect, the offset correction means performs the integration speed. Increase
When a defect is detected by the second defect detection means, the offset correction means fixes the offset to hold or 0,
The second defect detection unit and the offset correction unit are disposed between the analog-digital conversion unit and the phase comparison unit, and the phase comparison unit has an offset corrected by the offset correction unit. An optical disc apparatus to which a sampling reproduction signal is inputted . In claim 1,
An optical disc apparatus comprising processing method selection means for selecting a defect processing method from information on a defect type and a defect position determined by the first or second defect detection means.   In claim 2,
  The optical disc apparatus includes an HPF for filtering high frequency components of the reproduction signal,
  Processing means for changing the cutoff frequency of the HPF before and after the address of the header region,
  The first defect detection means detects a defect based on the reproduction signal filtered by the HPF,
  An optical disc apparatus, wherein a time for varying the cut-off frequency of the HPF is controlled according to the results of the first defect detection means and the processing method selection means.   In claim 1,
  The offset correction means has a limiter for limiting the amplitude of the sampling reproduction signal,
  For a certain period after detecting the scratch, the offset is corrected at high speed without using the limiter,
In other cases, the optical disk apparatus is characterized in that offset correction is performed to reduce errors using the limiter.

Images