JP4615182B2 - Manufacturing method of semiconductor wafer - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor wafer, and more particularly to a method for manufacturing a semiconductor wafer in which warpage of the semiconductor wafer is suppressed.
[0002]
[Prior art]
An example of a conventional silicon wafer manufacturing method will be described with reference to FIGS.
As shown in the flow sheet of FIG. 4, in the slicing step (S401), the silicon wafer is sliced from the silicon single crystal ingot pulled up by the CZ method. In the next chamfering step (S402), the outer peripheral portion of the wafer is chamfered into a predetermined shape. In the subsequent lapping step (S403), the front and back surfaces of the silicon wafer are lapped by a pair of upper and lower wrap surface plates to increase the wafer parallelism. In the next etching step (S404), the lapped wafer is immersed in a predetermined etching solution to remove distortion during lapping. Thereafter, the wafer surface is finish-polished (S405) and used for final finish cleaning (S406).
[0003]
[Problems to be solved by the invention]
By the way, an electrostatic chuck plate is employed for holding the silicon wafer W in the plasma etching step in the device process. In this electrostatic chuck plate, a refrigerant flow path is formed inside in order to reduce heat generation of the silicon wafer W due to plasma etching and suppress thermal damage of the wafer. At the time of plasma etching, helium gas is allowed to flow through the coolant channel, and the silicon wafer W is cooled via the electrostatic chuck plate.
However, in the processing of the coolant channel, it is difficult to form the coolant channel up to the vicinity of the outer peripheral edge of the electrostatic chuck plate.
Further, the electrostatic chuck plate has a smaller diameter than the silicon wafer W. Therefore, unless the outer peripheral portion of the silicon wafer W is brought into close contact with the outer peripheral portion of the electrostatic chuck plate as much as possible, the temperature rise during the etching of the outer peripheral portion of the wafer cannot be sufficiently suppressed. That is, this problem is greatly related to the warpage of the silicon wafer, particularly the warpage of the outer peripheral portion of the wafer protruding from the electrostatic chuck plate.
[0004]
Therefore, as a result of earnest research, the inventor measured the overall warpage of the sliced wafer with a non-contact type wafer shape measuring device, and then, based on this measurement result, the surface judged as the convex side was measured as the device forming surface. As a result, it has been found that the warpage of the semiconductor wafer, particularly the warpage of the outer peripheral portion thereof, can be suppressed as compared to the case where the surface determined to be the concave side is the device formation surface. It was. In the case of a wafer having warpage, normally, as shown in FIG. 5, the warpage amount d2 of the concave surface is smaller than the warpage amount d1 of the convex surface of the sliced wafer, and the warpage amount d2 by the weight of the wafer. This is a phenomenon that makes use of the phenomenon that becomes smaller. As a result, at the time of plasma etching, the outer peripheral portion of the wafer can be in close contact with the electrostatic chuck plate, and thermal damage to the outer peripheral portion of the wafer can be reduced.
[0005]
OBJECT OF THE INVENTION
Accordingly, an object of the present invention is to provide a method for manufacturing a semiconductor wafer that can reduce the warpage of the outer peripheral portion of the wafer and can also increase the flatness of the outer peripheral portion of the wafer.
Another object of the present invention is to provide a semiconductor wafer manufacturing method capable of reducing thermal damage on the outer peripheral portion of the wafer during plasma etching.
[0006]
[Means for Solving the Problems]
The invention according to claim 1 is a step of measuring the entire warp of the sliced semiconductor wafer by a non-contact type wafer shape measuring device, and the surface of the semiconductor wafer determined to be a convex side based on the measurement result and a step of flattening a semiconductor wafer as the device forming surface, the step of flattening the semiconductor wafer includes the steps of wrapping across the semiconductor wafers between a pair of upper and lower lapping plate, after this lap, A step of immersing and etching the semiconductor wafer in an etching solution, and a step of polishing the semiconductor wafer after the etching, and in this lapping step, the surface determined as the convex side of the semiconductor wafer is In this etching process, a plurality of semiconductor wafers are directed to the same direction with the surface determined to be convex. Move the etching solution in the state, in this polishing process, a manufacturing method of a semiconductor wafer to be polished is the surface determining the convex side of the semiconductor wafer, the polishing process, a pair of upper and lower polishing a plurality of semiconductor wafers It includes a step of polishing both surfaces of the surface plate sandwiched between the surface plates. In this double-sided simultaneous polishing step, a method for manufacturing a semiconductor wafer in which the surface determined as the convex side of the semiconductor wafer is polished toward the upper polishing surface plate. is there.
For example, a silicon wafer or a gallium arsenide wafer is used as the semiconductor wafer.
As the non-contact type wafer shape measuring instrument, for example, a flatness measuring device using capacitance is adopted. When a semiconductor wafer is held on the measurement stage, for example, a jig is brought into contact with and held on a part of the semiconductor wafer.
In addition, for example, a laser reflection type shape measuring instrument is employed for evaluating the warpage of the outer peripheral portion of the wafer.
[0007]
Further, the step of flattening the semiconductor wafer includes a step of lapping the semiconductor wafer between a pair of upper and lower lap surface plates, and in this lapping step, the surface determined as the convex side of the semiconductor wafer is It is also possible to wrap toward the lap surface plate on the side.
[0008]
Further, the step of flattening the semiconductor wafer includes a step of etching by immersing the semiconductor wafer in an etching solution, and in this etching step, a plurality of semiconductor wafers are oriented in the same direction with their convex side determined as the convex side. It is also possible to move it in an etching solution in a wet state.
When a plurality of semiconductor wafers are accommodated in the etching solution and rotated around the central axis, the convex side surfaces are aligned in one direction, for example. The etching solution uses a mixed acid, alkali or the like.
[0010]
The step of flattening the semiconductor wafer includes a step of polishing the semiconductor wafer. In this polishing step, the surface determined to be the convex side of the semiconductor wafer is polished.
For example, a semiconductor wafer is mounted on a polishing head of a polishing apparatus, and polishing is performed by pressing the wafer surface against a polishing cloth stretched on a polishing surface plate while supplying an abrasive (slurry) containing free abrasive grains on the polishing cloth. . The polishing apparatus may be a single wafer type or a batch type for simultaneously polishing a plurality of wafers.
[0011]
The step of flattening a semiconductor wafer includes a step of sandwiching a plurality of semiconductor wafers between a pair of upper and lower polishing surface plates and simultaneously polishing both surfaces thereof. In this double-sided simultaneous polishing step, it is determined as the convex side of the semiconductor wafer. It is conceivable that the polished surface is polished toward the upper polishing platen.
In a general double-side polishing apparatus, a semiconductor wafer is polished by arranging a device forming surface upward. Therefore, polishing is performed with the convex surface facing upward. The slurry is supplied from above.
[0012]
[Action]
According to the present invention, the entire warpage of the sliced wafer is measured by the non-contact type wafer shape measuring instrument, and the surface determined as the convex side based on the measurement result is set as the device forming surface of the semiconductor wafer. Then, a predetermined flat process is performed on the device forming surface, and for example, it is finished to a mirror surface.
Thereby, the curvature of the wafer outer peripheral part at the time of wafer processing is suppressed. As a result, the warpage of the outer peripheral portion of the manufactured semiconductor wafer can be reduced as compared with, for example, the case where the concave surface of the sliced wafer is the device formation surface. In addition, the flatness of the outer peripheral portion of the wafer can be increased.
[0013]
In plasma etching the device formation surface (convex surface), the semiconductor wafer is attracted to a small-diameter electrostatic chuck plate. At that time, since the amount of warpage of the back surface of the wafer outer peripheral portion is small, the wafer outer peripheral portion is likely to be in close contact with the outer peripheral portion of the electrostatic chuck plate. Thereby, the cooling means provided in the electrostatic chuck plate can be used to suppress the temperature rise at the outer periphery of the wafer due to the heat generated during the plasma etching. As a result, it is possible to reduce thermal damage on the outer periphery of the wafer.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
A method for manufacturing a semiconductor wafer according to an embodiment of the present invention will be described below.
FIG. 1 is a flow sheet showing a method for manufacturing a semiconductor wafer according to one embodiment of the present invention. FIG. 2 is an enlarged view of a main part of a non-contact type wafer shape measuring instrument used in the method for manufacturing a semiconductor wafer according to one embodiment of the present invention. FIG. 3A is an enlarged cross-sectional view of a main part showing a state in which a semiconductor wafer is held on an electrostatic chuck plate of a plasma etching apparatus with a concave surface as a device formation surface. FIG. 3B is an enlarged cross-sectional view of the main part showing a state in which the semiconductor wafer is held on the electrostatic chuck plate of the plasma etching apparatus with the convex surface as the device formation surface.
[0015]
As shown in FIG. 1, in this embodiment, the surface of the surface is mirror-finished through the steps of slicing, warping measurement, chamfering, lapping, etching, polishing, wafer warpage evaluation, and cleaning. A wafer W is produced.
Hereinafter, each process will be described in detail.
The silicon ingot pulled up by the CZ method is sliced into 8-inch wafers having a thickness of around 860 μm in the slicing step (S101).
[0016]
The obtained sliced wafer is measured for the entire warpage of the wafer in the subsequent warpage measurement step (S102). Here, a capacitance-type non-contact type wafer shape measuring instrument 20 as shown in FIG. 2 is employed.
In the measurement of the wafer warp by the wafer shape measuring instrument 20, first, the sliced wafer W is disposed between a pair of the electrostatic capacitance sensors 21 and 21 which are arranged to face each other, and thereafter, these electrostatic capacitance sensors. 21 and 21 are scanned along the wafer surface in the same direction and at the same speed. During this scanning, the distance from each of the capacitance sensors 21 and 21 to the front surface or back surface of the wafer is measured, and the entire warpage of the sliced wafer W is obtained based on the measurement result. Simultaneously with the measurement, the thickness of the wafer is also measured. Based on this warpage data, the convex surface of the sliced wafer W is determined. Hereinafter, this convex surface is used as a wafer surface (device forming surface), and various wafer processing is performed.
[0017]
The sliced wafer W after the warpage measurement is chamfered by a chamfering grindstone in the next chamfering step (S103). As the chamfering grindstone, a # 600 metal bond cylindrical grindstone is adopted. Accordingly, the silicon wafer W is processed into a predetermined rounded shape such as a MOS type on the outer periphery.
Next, a lapping process (S104) is performed. Here, the silicon wafer W is disposed between lap surface plates parallel to each other, and a lap liquid which is a mixture of alumina abrasive grains, a dispersant and water is poured into the silicon wafer W. Then, the front and back sides of the wafer are mechanically wrapped by rotating and sliding under pressure. The amount of wrapping is about 40 to 100 μm including the front and back surfaces of the wafer.
Next, the wrapped wafer W is etched (S105). For example, when using an acid, the silicon wafer W is immersed for a predetermined time in a mixed acid solution (normal temperature to 50 ° C.) in which hydrofluoric acid and nitric acid are mixed. After this etching, the outer peripheral portion of the silicon wafer W may be subjected to PCR processing. In this processing, a known PCR processing apparatus is used. For example, a device that rotates a cylindrical urethane buff with a motor.
[0018]
Next, single-side polishing or double-side polishing is performed (S106).
Specifically, in the case of single-side polishing, the surface of the silicon wafer is polished using a polishing apparatus that has a polishing head and a lower surface plate that are arranged to face each other and a polishing cloth is spread only on the upper surface of the lower surface plate. . That is, a wafer surface is fixed by a suede type polishing cloth in which urethane resin is foamed on a base cloth for finishing while supplying a slurry containing loose abrasive grains while fixing a silicon wafer with the surface facing downward on a carrier plate. Mirror polished. The polishing amount is about 2 to 30 μm.
Subsequently, the amount of warpage of the wafer outer periphery is measured (S107). Here, a laser reflection type shape measuring device is used. That is, the measurement is performed by irradiating the outer peripheral portion of the silicon wafer W with laser light from both the front and back sides and receiving the reflected light.
Next, the silicon wafer is finished and cleaned (S108). This cleaning is RCA cleaning based on two types of cleaning liquids, SC-1 and SC-2.
[0019]
As described above, since the silicon wafer W is flattened using the convex surface as the wafer surface (device forming surface) based on the warpage data of the sliced wafer W measured in advance, the warpage of the outer peripheral portion of the wafer during wafer processing can be suppressed. As a result, for example, the amount of warpage of the back surface of the outer peripheral portion of the manufactured silicon wafer W can be reduced as compared with the case where the concave surface of the sliced wafer W is used as the device formation surface. In addition, the flatness of the outer peripheral portion of the wafer can be increased.
As a result, as shown in FIG. 3, during the plasma etching of the device process, when the concave surface is adsorbed (FIG. 3B) rather than when the convex surface of the wafer is adsorbed (FIG. 3A) However, it is difficult for the gap a to appear between the back surface of the outer periphery of the wafer and the outer peripheral edge of the electrostatic chuck plate 11. As a result, the adhesion of the outer peripheral portion of the wafer to the electrostatic chuck plate 11 is enhanced, and the temperature of the outer peripheral portion of the wafer during plasma etching is reduced by the cooling action of the helium gas flowing through the refrigerant flow path 11a provided in the electrostatic chuck plate 11. The rise is suppressed well. As a result, it is possible to reduce thermal damage on the outer periphery of the wafer during plasma etching.
[0020]
Here, the convex surface of the sliced wafer having warpage is used as the device formation surface, and the silicon wafer obtained by the manufacturing method of one embodiment is warped on the back surface of the wafer outer peripheral portion and the wafer outer peripheral portion. We report the result of measuring the flatness.
For measuring the amount of warpage, “wafer com” manufactured by Doi Precision Wrap Co., Ltd. was used. The flatness is measured by “ADE Ultra Gauge 9700E +” manufactured by Japan ADE.
As a result of the measurement, when the surface determined to be concave at the time of warpage measurement is used as the device formation surface, the warpage amount of the back surface of the outer periphery of the wafer after finish polishing is 1.1 μm, and the flatness is 0.20 μm by SBIR. It was. On the other hand, when the surface determined as the convex side at the time of measuring the warpage according to the present invention is used as the device formation surface, the warpage amount of the back surface of the wafer outer peripheral portion is 0.4 μm, and the flatness is 0. A good result of 19 μm was obtained.
[0021]
【The invention's effect】
According to the present invention, the entire warpage of the sliced wafer is measured by the non-contact type wafer shape measuring device, and based on the measurement result, the surface determined as the convex side is flattened as the device forming surface. As a result, the amount of warpage of the back surface of the wafer outer periphery during processing can be reduced, and the flatness of the wafer outer periphery can be increased.
When plasma-etching the device forming surface, the semiconductor wafer is attracted to a small-diameter electrostatic chuck plate. At that time, since the amount of warpage of the back surface of the wafer outer peripheral portion is small, the wafer outer peripheral portion is likely to be in close contact with the outer peripheral portion of the electrostatic chuck plate. Thereby, the cooling means provided in the electrostatic chuck plate can be used to suppress the temperature rise at the outer peripheral portion of the wafer due to the heat generated during plasma etching. As a result, it is possible to reduce thermal damage on the outer periphery of the wafer.
[Brief description of the drawings]
FIG. 1 is a flow sheet showing a semiconductor wafer manufacturing method according to an embodiment of the present invention.
FIG. 2 is an enlarged view of a main part of a non-contact type wafer shape measuring instrument used in a method for manufacturing a semiconductor wafer according to an embodiment of the present invention.
FIG. 3A is an enlarged cross-sectional view of a main part showing a state in which a semiconductor wafer is held on an electrostatic chuck plate of a plasma etching apparatus with a concave surface as a device formation surface.
(B) is a principal part expanded sectional view which shows the state which hold | maintained the semiconductor wafer to the electrostatic chuck | zipper board of a plasma etching apparatus by making a convex surface into a device formation surface.
FIG. 4 is a flow sheet showing a method of manufacturing a semiconductor wafer according to conventional means.
FIG. 5 is an enlarged cross-sectional view of an outer peripheral portion of a warped semiconductor wafer.
[Explanation of symbols]
20 Wafer shape measuring instrument,
W Silicon wafer (semiconductor wafer).

Claims (1)

Measuring the entire warpage of the sliced semiconductor wafer with a non-contact type wafer shape measuring instrument;
Based on the measurement results, the semiconductor wafer surface determined as the convex side is a device forming surface, and the semiconductor wafer is flattened .
The step of flattening the semiconductor wafer includes a step of wrapping the semiconductor wafer between a pair of upper and lower lap surface plates, a step of immersing and etching the semiconductor wafer in an etching solution after the lap, Polishing the semiconductor wafer after etching, and
In this lapping step, the surface determined as the convex side of the semiconductor wafer is lapped toward the lower lapping platen,
In this etching process, a plurality of semiconductor wafers are moved in the etching solution with their surfaces determined to be convex sides in the same direction,
In this polishing step, a method for manufacturing a semiconductor wafer for polishing a surface determined as the convex side of the semiconductor wafer ,
The polishing step includes a step of sandwiching a plurality of semiconductor wafers between a pair of upper and lower polishing surface plates and simultaneously polishing both surfaces thereof. In this double-sided simultaneous polishing step, the surface determined as the convex side of the semiconductor wafer is the upper side. A method of manufacturing a semiconductor wafer that is polished toward a polishing surface plate .

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