JP4613689B2 - Display device with built-in optical sensor - Google Patents

Display device with built-in optical sensor Download PDF

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JP4613689B2
JP4613689B2 JP2005147972A JP2005147972A JP4613689B2 JP 4613689 B2 JP4613689 B2 JP 4613689B2 JP 2005147972 A JP2005147972 A JP 2005147972A JP 2005147972 A JP2005147972 A JP 2005147972A JP 4613689 B2 JP4613689 B2 JP 4613689B2
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display device
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photosensitive element
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JP2006323260A (en
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雄一 升谷
直紀 中川
真嗣 川渕
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Mitsubishi Electric Corp
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Description

本発明は、光源からの光入力に応答する感光素子、および感光素子とトランジスタなどから構成される感光回路を備えた光センサ(光検知型デジタイザ)に関するもので、特に光センサ内蔵の表示装置に関するものである。   The present invention relates to a photosensitive element that responds to light input from a light source, and a photosensor (photodetection type digitizer) that includes a photosensitive circuit composed of a photosensitive element and a transistor, and more particularly to a display device incorporating a photosensor. Is.

従来の光検知型デジタイザ内蔵の液晶表示装置においては、デジタイザ機能に関わる行走査線に接続されたセンサの電位を薄膜トランジスタのゲート電位として与え、光照射量により変化するセンサの電位により薄膜トランジスタのON、OFF状態を制御して、信号をデジタイザ機能に関わる列走査線より検出していた(例えば、特許文献1参照)。   In the conventional liquid crystal display device with a built-in light detection type digitizer, the potential of the sensor connected to the row scanning line related to the digitizer function is given as the gate potential of the thin film transistor. The OFF state is controlled, and the signal is detected from the column scanning line related to the digitizer function (see, for example, Patent Document 1).

特開2001−75732号公報(第7頁、第12図)JP 2001-75732 A (page 7, FIG. 12)

上記文献に開示された従来の光検知型デジタイザ内蔵の液晶表示装置においては、デジタイザ機能を動作させるために、デジタイザ機能に関わる行走査線に薄膜トランジスタを駆動するパルス波形からなる走査信号を順次入力する必要があり、表示機能に関わるゲート配線と合わせて2系統の走査信号を必要とした。この場合、走査信号用ドライバー回路も2系統必要になり、コスト増加を起こす問題点があった。   In the conventional liquid crystal display device with a built-in light detection type digitizer disclosed in the above-mentioned document, in order to operate the digitizer function, scanning signals composed of pulse waveforms for driving thin film transistors are sequentially input to the row scanning lines related to the digitizer function. Two scanning signals are required together with the gate wiring related to the display function. In this case, two scanning signal driver circuits are required, which increases the cost.

本発明は上記問題点を解決することを目的としており、光センサ機能に関わる行走査線に走査信号を順次入力する必要がない光センサ内蔵表示装置を得るものであり、低コスト化を可能とするものである。   An object of the present invention is to solve the above-described problems, and to obtain a display device with a built-in photosensor that does not need to sequentially input scanning signals to row scanning lines related to the photosensor function, and can reduce the cost. To do.

本発明は、光センサ機能に関わる感光回路の第1トランジスタである薄膜トランジスタと信号検出配線との間に、第2トランジスタである感光回路走査用薄膜トランジスタを直列に接続し、感光回路走査用薄膜トランジスタのゲート電極を表示機能に関わる表示回路のゲート配線に接続したものである。   In the present invention, a photosensitive circuit scanning thin film transistor, which is a second transistor, is connected in series between a thin film transistor, which is a first transistor of a photosensitive circuit related to an optical sensor function, and a signal detection wiring. The electrode is connected to the gate wiring of the display circuit related to the display function.

本発明は、表示回路のゲート配線用の走査信号に連動して、感光回路の信号検出が可能になり、光センサ機能に関わる行走査線に表示回路とは別の走査信号を順次入力する必要がなくなる。   The present invention makes it possible to detect the signal of the photosensitive circuit in conjunction with the scanning signal for the gate wiring of the display circuit, and to sequentially input a scanning signal different from the display circuit to the row scanning line related to the optical sensor function. Disappears.

実施の形態1.
図1は本発明の実施の形態1を示す光センサ内蔵液晶表示装置における1画素Cijの回路構成図を示したものである。画素は表示機能に関わる表示回路と、光センサ機能に関わる感光回路から構成される。
Embodiment 1 FIG.
FIG. 1 is a circuit configuration diagram of one pixel Cij in the optical sensor built-in liquid crystal display device according to the first embodiment of the present invention. The pixel includes a display circuit related to a display function and a photosensitive circuit related to an optical sensor function.

表示回路は、通常の液晶表示装置と同じであり、ゲート配線Qiと、これに交差する映像信号配線Pjと、画素電極のスイッチ動作に用いる表示回路用薄膜トランジスタTDijと、画素電極と対向電極との間の液晶容量Clcと、電荷を保持する補助容量Csを形成する共通配線Ziなどからなる。   The display circuit is the same as a normal liquid crystal display device, and includes a gate wiring Qi, a video signal wiring Pj intersecting with the gate wiring Qi, a display circuit thin film transistor TDij used for the switching operation of the pixel electrode, and a pixel electrode and a counter electrode. And a common wiring Zi that forms an auxiliary capacitance Cs for holding charges.

感光回路は、感光回路の信号を表示エリアの外に引き出すための信号検出配線Xjと、第1電位供給配線Yiと、第2電位供給配線を兼用する共通配線Ziと、感光素子Sijと、基準抵抗Rijと、第1トランジスタである薄膜トランジスタTijと、これに直列に接続された第2トランジスタである感光回路走査用薄膜トランジスタT2ijなどからなる。感光回路走査用薄膜トランジスタT2ijのゲート電極は表示回路のゲート配線Qiに接続している。これにより、液晶表示回路の走査信号に連動して、感光回路の信号検出が可能になり、第1電位供給配線Yiに表示回路とは別の走査信号を印加する必要がなくなる。   The photosensitive circuit includes a signal detection wiring Xj for extracting a signal of the photosensitive circuit outside the display area, a first potential supply wiring Yi, a common wiring Zi that also serves as a second potential supply wiring, a photosensitive element Sij, a reference element A resistor Rij, a thin film transistor Tij as a first transistor, and a photosensitive circuit scanning thin film transistor T2ij as a second transistor connected in series to the resistor Rij. The gate electrode of the photosensitive circuit scanning thin film transistor T2ij is connected to the gate wiring Qi of the display circuit. Accordingly, the signal detection of the photosensitive circuit can be performed in conjunction with the scanning signal of the liquid crystal display circuit, and it is not necessary to apply a scanning signal different from the display circuit to the first potential supply wiring Yi.

次に動作原理について詳述する。感光素子Sijと基準抵抗Rijは直列に接続され、第1電位供給配線Yiと第2電位供給配線を兼用する共通配線Ziとの間を接続する。第1電位供給配線Yiの電位をVy、共通配線Ziの電位をVz、感光素子の抵抗値をRsij、基準抵抗の抵抗をRrijとすると、位置Aにおける感光素子Sijと基準抵抗Rijにて分割される感光素子Sijの電位Vsijは以下の式(1)にて示される。   Next, the operation principle will be described in detail. The photosensitive element Sij and the reference resistor Rij are connected in series, and connect between the first potential supply wiring Yi and the common wiring Zi that also serves as the second potential supply wiring. When the potential of the first potential supply wiring Yi is Vy, the potential of the common wiring Zi is Vz, the resistance value of the photosensitive element is Rsij, and the resistance of the reference resistance is Rrij, the photosensitive element Sij and the reference resistance Rij at position A are divided. The potential Vsij of the photosensitive element Sij is expressed by the following formula (1).

Vsij=Vz+(Vy−Vz)・Rrij/(Rsij+Rrij) (1)   Vsij = Vz + (Vy−Vz) · Rrij / (Rsij + Rrij) (1)

この電位Vsijを感光回路の薄膜トランジスタTijのゲート電位として供給する。電位Vsijは、感光素子Sijに光照射されている場合と光照射されていない場合の抵抗値Rsijの差に応じて変化するため、感光素子Sijへの光照射量の差により感光回路の薄膜トランジスタTijのソース・ドレイン間に流れる電流が変化する。   This potential Vsij is supplied as the gate potential of the thin film transistor Tij of the photosensitive circuit. Since the potential Vsij changes according to the difference between the resistance value Rsij when the photosensitive element Sij is irradiated with light and when it is not irradiated with light, the thin film transistor Tij of the photosensitive circuit depends on the difference in the amount of light irradiated to the photosensitive element Sij. The current that flows between the source and drain changes.

ここで、アモルファスシリコン(a−Si)薄膜トランジスタを用いたアクティブマトリックス型液晶表示装置の場合、感光素子Sijと基準抵抗Rijはa−Siフォトダイオードとすると良い。図2はa−Siフォトダイオードの回路構成図を示したものである。図2に示すように、a−Siフォトダイオードは表示回路の表示回路用薄膜トランジスタTDijと同じ製造工程で形成され、a−Si薄膜トランジスタのゲート電極とソース電極(またはドレイン電極)を電気的に接続しただけの構成である。液晶表示装置の製造工程に新たな工程を追加せずに感光回路を組み込むことが可能になる。   Here, in the case of an active matrix liquid crystal display device using an amorphous silicon (a-Si) thin film transistor, the photosensitive element Sij and the reference resistor Rij are preferably a-Si photodiodes. FIG. 2 shows a circuit configuration diagram of the a-Si photodiode. As shown in FIG. 2, the a-Si photodiode is formed in the same manufacturing process as the display circuit thin film transistor TDij of the display circuit, and the gate electrode and the source electrode (or drain electrode) of the a-Si thin film transistor are electrically connected. It is only a configuration. It is possible to incorporate a photosensitive circuit without adding a new process to the manufacturing process of the liquid crystal display device.

また、感光素子Sijと基準抵抗Rijは、それぞれを構成する薄膜トランジスタのチャネル領域を構成するa−Siを遮光するか、遮光しないかにより作り分けることが出来る。感光素子Sijは光検出を行うために光照射されるように遮光せず、基準抵抗Rijは光照射されないように遮光する。   In addition, the photosensitive element Sij and the reference resistor Rij can be made separately depending on whether or not the a-Si constituting the channel region of the thin film transistor constituting each is shielded. The photosensitive element Sij is not shielded so as to be irradiated with light for light detection, and the reference resistor Rij is shielded so as not to be irradiated with light.

遮光方法としては、基準抵抗Rijの上の対向基板(図示せず)にブラックマトリックスを形成し、感光素子Sijのチャネル領域を構成するa−Si上の対向基板にはブラックマトリックスを形成しない構成とする。   As a light shielding method, a black matrix is formed on a counter substrate (not shown) on the reference resistor Rij, and a black matrix is not formed on the counter substrate on a-Si constituting the channel region of the photosensitive element Sij. To do.

または、対向基板上のブラックマトリックスの代わりに、表示回路と感光回路を形成するアレイ基板上で、配線材料などの金属膜により基準抵抗Rijのチャネル領域を遮光する構成でもよい。   Alternatively, the channel region of the reference resistor Rij may be shielded from light by a metal film such as a wiring material on the array substrate on which the display circuit and the photosensitive circuit are formed instead of the black matrix on the counter substrate.

図3は感光素子Sijとなるa−Siフォトダイオードの電圧−電流特性図を示したものである。電圧−電流特性は非線形であり、電圧が大きいほど電流値は大きくなる。また、光照射・非照射で電流値は大きく異なり、光照射しない場合、電流は殆ど流れない。   FIG. 3 is a voltage-current characteristic diagram of an a-Si photodiode serving as the photosensitive element Sij. The voltage-current characteristic is non-linear, and the current value increases as the voltage increases. In addition, the current value varies greatly between light irradiation and non-irradiation, and almost no current flows when light is not irradiated.

図4は図3をa−Siフォトダイオードの電圧−抵抗特性図に直したものである。a−Siフォトダイオードは電圧が大きいほど抵抗値が高くなる。また、光照射で抵抗値は著しく低くなる。   FIG. 4 is a modification of FIG. 3 to a voltage-resistance characteristic diagram of an a-Si photodiode. The resistance value of the a-Si photodiode increases as the voltage increases. Further, the resistance value is remarkably lowered by light irradiation.

基準抵抗Rijの抵抗値Rrijと、感光素子Sijの抵抗値Rsijは、a−Siフォトダイオードを構成するa−Si薄膜トランジスタのW/L(Wはチャネル幅、Lはチャネル長)に反比例する。   The resistance value Rrij of the reference resistor Rij and the resistance value Rsij of the photosensitive element Sij are inversely proportional to W / L (W is the channel width and L is the channel length) of the a-Si thin film transistor that constitutes the a-Si photodiode.

本発明の実施の形態1においては、基準抵抗Rijを構成する薄膜トランジスタのW/Lを、感光素子SijのW/Lよりも大きく設定することにより、光照射しない場合の基準抵抗Rijの抵抗値Rrijを、感光素子Sijの抵抗値Rsijよりも小さくなるように構成する。   In Embodiment 1 of the present invention, the resistance value Rrij of the reference resistor Rij when no light is irradiated is set by setting the W / L of the thin film transistor constituting the reference resistor Rij to be larger than the W / L of the photosensitive element Sij. Is configured to be smaller than the resistance value Rsij of the photosensitive element Sij.

基準抵抗Rijと感光素子Sijには、式(1)に基づいて電圧が分配されるので、基準抵抗Rijに加わる電圧は、感光素子Sijに加わる電圧よりも小さくなる。さらに、図4より、a−Siフォトダイオードの抵抗は一定ではなく、電圧が小さいほど抵抗は小さくなる。したがって、本発明の実施の形態1においては、光照射しない場合、基準抵抗Rijの抵抗値Rrijは、感光素子Sijの抵抗値Rsijに対してW/Lの比以上に相対的に小さくなる。   Since the voltage is distributed to the reference resistor Rij and the photosensitive element Sij based on the equation (1), the voltage applied to the reference resistor Rij is smaller than the voltage applied to the photosensitive element Sij. Furthermore, from FIG. 4, the resistance of the a-Si photodiode is not constant, and the resistance decreases as the voltage decreases. Therefore, in the first embodiment of the present invention, when no light is irradiated, the resistance value Rrij of the reference resistor Rij is relatively smaller than the W / L ratio with respect to the resistance value Rsij of the photosensitive element Sij.

図5は本発明の実施の形態1を示す感光素子Sijの光照射量と電位特性図を示したものである。a−Siフォトダイオードからなる感光素子Sijの電位Vsijは、光照射量によって第2電位供給配線である共通配線Ziの電位Vzから、第1電位供給配線Yiの電位Vyに急激に変化する。   FIG. 5 shows a light irradiation amount and potential characteristic diagram of the photosensitive element Sij showing the first embodiment of the present invention. The potential Vsij of the photosensitive element Sij formed of an a-Si photodiode is rapidly changed from the potential Vz of the common wiring Zi, which is the second potential supply wiring, to the potential Vy of the first potential supply wiring Yi depending on the amount of light irradiation.

この理由は、感光素子Sijに光照射しない場合、結果的にRsij>>Rrijとなるので、式(1)よりVsij≒Vzとなる。感光回路の薄膜トランジスタTijのゲート電位は、ほぼ基準抵抗Rij側の共通配線Ziの電位Vzとなる。   The reason for this is that if the photosensitive element Sij is not irradiated with light, the result is Rsij >> Rrij, so Vsij≈Vz from equation (1). The gate potential of the thin film transistor Tij in the photosensitive circuit is substantially equal to the potential Vz of the common wiring Zi on the reference resistor Rij side.

逆に、感光素子Sijに光照射した場合、感光素子Sijの抵抗値Rsijは、図4に示すように著しく減少するので、基準抵抗Rijの抵抗値Rrijよりも小さくなり、Rsij<<Rrijとなるので、式(1)よりVsij≒Vyとなる。感光回路の薄膜トランジスタTijのゲート電位は、ほぼ感光素子Sij側の第1電位供給配線Yiの電位Vyとなる。   On the other hand, when the photosensitive element Sij is irradiated with light, the resistance value Rsij of the photosensitive element Sij is significantly reduced as shown in FIG. 4, and thus becomes smaller than the resistance value Rrij of the reference resistance Rij, and Rsij << Rrij. Therefore, Vsij≈Vy from Expression (1). The gate potential of the thin film transistor Tij in the photosensitive circuit is substantially equal to the potential Vy of the first potential supply wiring Yi on the photosensitive element Sij side.

以上の動作原理によって、感光素子Sijへの光照射量で、感光回路の薄膜トランジスタTijのゲート電位を、第2電位供給配線である共通配線Ziの電位Vzから第1電位供給配線Yiの電位Vy間で変化させることができる。   Based on the above operation principle, the gate potential of the thin film transistor Tij of the photosensitive circuit is changed between the potential Vz of the common wiring Zi as the second potential supply wiring and the potential Vy of the first potential supply wiring Yi by the light irradiation amount to the photosensitive element Sij. Can be changed.

ここで、感光素子Sijと基準抵抗Rijの寸法は、例えば、基準抵抗Rijを構成する薄膜トランジスタのチャネル幅Wを25μm、チャネル長Lを4μm、感光回路Sijを構成する薄膜トランジスタのチャネル幅Wを10μm、チャネル長Lを4μmに設定した。このように、感光素子Sijと基準抵抗のW/Lの比は2倍以上、望ましくは本例のように2.5倍以上とするとよい。   Here, the dimensions of the photosensitive element Sij and the reference resistor Rij are, for example, the channel width W of the thin film transistor that constitutes the reference resistor Rij is 25 μm, the channel length L is 4 μm, and the channel width W of the thin film transistor that constitutes the photosensitive circuit Sij is 10 μm. The channel length L was set to 4 μm. As described above, the ratio of W / L between the photosensitive element Sij and the reference resistance is preferably 2 times or more, and preferably 2.5 times or more as in this example.

次に、表示回路のゲート配線Qi、映像信号配線Pj、共通配線Ziには一般の液晶表示装置と同様の信号あるいは電位を供給すればよい。本発明の実施の形態1では、例えば、ゲート配線QiにはゲートON時には20V、ゲートOFF時には−6V、映像信号配線Pjには映像に応じた0.5Vから9Vの信号、共通配線Ziには対向電極(図示せず)の電位と等しい4Vの一定電位を供給した。   Next, a signal or potential similar to that of a general liquid crystal display device may be supplied to the gate wiring Qi, the video signal wiring Pj, and the common wiring Zi of the display circuit. In the first embodiment of the present invention, for example, the gate wiring Qi is 20V when the gate is ON, -6V when the gate is OFF, the video signal wiring Pj is a signal of 0.5V to 9V corresponding to the video, and the common wiring Zi is A constant potential of 4 V that is equal to the potential of the counter electrode (not shown) was supplied.

また、第1電位供給配線Yiは通常の液晶表示装置にはないものであるので、ゲート配線QiのゲートOFF電位と同じ−6Vを供給した。これにより、回路基板上に既に準備されている電位を用いることで、新たな電源を準備する必要が無い。   Further, since the first potential supply wiring Yi is not provided in a normal liquid crystal display device, −6 V, which is the same as the gate OFF potential of the gate wiring Qi, was supplied. Thereby, it is not necessary to prepare a new power supply by using the potential already prepared on the circuit board.

上記構成においては、感光素子Sijに光照射しない場合の感光回路の薄膜トランジスタTijのゲート電位は約4V、感光素子Sijに光照射した場合の感光回路の薄膜トランジスタTijのゲート電位は約−6Vとなる。   In the above configuration, the gate potential of the thin film transistor Tij of the photosensitive circuit when the photosensitive element Sij is not irradiated with light is about 4V, and the gate potential of the thin film transistor Tij of the photosensitive circuit when the photosensitive element Sij is irradiated with light is about −6V.

感光素子Sijに光照射しない場合は、感光回路の薄膜トランジスタTijはON状態になり、直列に接続した感光回路走査用薄膜トランジスタT2ijのソース・ドレインの一方に、共通配線Ziの電位Vzが供給される。そして、ゲート配線Qiのゲート走査信号に連動して感光回路走査用薄膜トランジスタT2ijもON状態とすることで、共通配線Ziと信号検出配線Xjが電気的に接続される。   When the photosensitive element Sij is not irradiated with light, the thin film transistor Tij of the photosensitive circuit is turned on, and the potential Vz of the common wiring Zi is supplied to one of the source and drain of the thin film transistor T2ij for photosensitive circuit scanning connected in series. The photosensitive circuit scanning thin film transistor T2ij is also turned on in conjunction with the gate scanning signal of the gate wiring Qi, so that the common wiring Zi and the signal detection wiring Xj are electrically connected.

感光素子Sijに光照射した場合は、感光回路の薄膜トランジスタTijはOFF状態になり、感光回路走査用薄膜トランジスタT2ijに関係なく、共通配線Ziと信号検出配線Xjは電気的に接続されない。   When the photosensitive element Sij is irradiated with light, the thin film transistor Tij of the photosensitive circuit is turned off, and the common wiring Zi and the signal detection wiring Xj are not electrically connected regardless of the photosensitive circuit scanning thin film transistor T2ij.

信号検出配線Xjに電位0Vを供給し、積分器を接続(図示せず)することにより、上述のように共通配線Ziと電気的に接続された場合に、共通配線Ziから信号検出配線Xjに流れる電流を検出することで、感光素子Sijの光照射を判定することが可能となる。   By supplying a potential 0 V to the signal detection wiring Xj and connecting an integrator (not shown), when electrically connected to the common wiring Zi as described above, the common wiring Zi to the signal detection wiring Xj. By detecting the flowing current, it is possible to determine the light irradiation of the photosensitive element Sij.

また、感光素子Sijの位置検出は、表示回路のゲート配線用走査信号のタイミングにてゲート配線Qiの行座標i、信号検出配線Xjの列座標jにより特定することが可能である。   Further, the position detection of the photosensitive element Sij can be specified by the row coordinate i of the gate wiring Qi and the column coordinate j of the signal detection wiring Xj at the timing of the scanning signal for the gate wiring of the display circuit.

図6は本発明の実施の形態1を示す光センサ内蔵表示装置における全体構成図を示したものである。図1の画素を表示解像度に応じてマトリックス状に配置し、ゲート配線Qiにゲート駆動回路1、映像信号配線Pjにソース駆動回路2、信号検出配線Xjに光センサ検出回路3を接続し、第2電位供給配線である共通配線Ziに共通電位であるVz(約4V)、第1電位供給配線Yiに上述のゲートOFF電位にほぼ等しいVy(約−6V)を供給する。   FIG. 6 shows an overall configuration diagram of the photosensor built-in display device according to the first embodiment of the present invention. The pixels of FIG. 1 are arranged in a matrix according to the display resolution, the gate driving circuit 1 is connected to the gate wiring Qi, the source driving circuit 2 is connected to the video signal wiring Pj, and the photosensor detection circuit 3 is connected to the signal detection wiring Xj. Vz (about 4V) which is a common potential is supplied to the common wiring Zi which is a two-potential supply wiring, and Vy (about -6V) which is substantially equal to the above-described gate OFF potential is supplied to the first potential supply wiring Yi.

なお、図6ではすべての画素に感光回路を設けた例を示したが、感光回路は全画素に入れる必要はなく、光センサ内蔵表示装置が必要とする光位置検出分解能に応じて複数の画素毎に間引いて配置すればよい。例えば、横または縦3画素に1つの感光回路などの構成とすることも可能である。   Although FIG. 6 shows an example in which a photosensitive circuit is provided for all the pixels, the photosensitive circuit does not need to be included in all the pixels, and a plurality of pixels are provided according to the optical position detection resolution required by the display device with a built-in optical sensor. What is necessary is just to thin and arrange every time. For example, it is possible to adopt a configuration such as one photosensitive circuit for three horizontal or vertical pixels.

実施の形態2.
図7は本発明の実施の形態2を示す光センサ内蔵表示装置の1画素を示す回路構成図である。本発明の実施の形態1では第1電位供給配線Yi側に感光素子Sij、共通配線Zi側に基準抵抗Rijを配置した例を示したが、本発明の実施の形態2では、これらを入れ替えて、第1電位供給配線Yi側に基準抵抗Rij、共通配線Zi側に感光素子Sijを配置したものである。
Embodiment 2. FIG.
FIG. 7 is a circuit configuration diagram showing one pixel of the photosensor built-in display device according to Embodiment 2 of the present invention. In the first embodiment of the present invention, an example in which the photosensitive element Sij is arranged on the first potential supply wiring Yi side and the reference resistor Rij is arranged on the common wiring Zi side is shown, but in the second embodiment of the present invention, these are replaced. The reference resistor Rij is disposed on the first potential supply wiring Yi side, and the photosensitive element Sij is disposed on the common wiring Zi side.

この場合、感光素子Sijに光照射しない場合、感光回路の薄膜トランジスタTijのゲート電位は、第1電位供給配線Yiにより供給される電位Vy(約−6V)付近となる。感光素子Sijに光照射した場合、感光回路の薄膜トランジスタTijのゲート電位は共通配線Ziの電位Vz(約4V)付近となり、感光素子Sijに光照射した場合のみ、感光回路の薄膜トランジスタTijがON状態になる。すなわち、感光素子Sijへの光照射・非照射に対する感光回路の薄膜トランジスタTijのON、OFF動作を本発明の実施の形態1と逆にすることができる。   In this case, when the photosensitive element Sij is not irradiated with light, the gate potential of the thin film transistor Tij of the photosensitive circuit is in the vicinity of the potential Vy (about −6 V) supplied by the first potential supply wiring Yi. When the photosensitive element Sij is irradiated with light, the gate potential of the thin film transistor Tij of the photosensitive circuit is near the potential Vz (about 4 V) of the common wiring Zi, and only when the photosensitive element Sij is irradiated with light, the thin film transistor Tij of the photosensitive circuit is turned on. Become. That is, the ON / OFF operation of the thin film transistor Tij of the photosensitive circuit for light irradiation / non-irradiation to the photosensitive element Sij can be reversed from that of the first embodiment of the present invention.

実施の形態3.
図8は本発明の実施の形態3を示す光センサ内蔵表示装置の1画素を示す回路構成図である。本発明の実施の形態1および2では、感光回路の薄膜トランジスタTijのソース・ドレインの一方を共通配線Ziに接続する例を示したが、第1電位供給配線Yiに接続しても良い。
Embodiment 3 FIG.
FIG. 8 is a circuit configuration diagram showing one pixel of the photosensor built-in display device according to Embodiment 3 of the present invention. In the first and second embodiments of the present invention, the example in which one of the source and the drain of the thin film transistor Tij of the photosensitive circuit is connected to the common wiring Zi, but may be connected to the first potential supply wiring Yi.

共通配線Ziに4V、第1電位供給配線Yiに−6V、信号検出配線Xjに0Vを供給する場合、本発明の実施の形態1および2においては、感光回路の薄膜トランジスタTijのソース・ドレイン間の電圧Vdsは約4V、ゲート・ソース間電圧Vgsは感光素子への光照射、非照射により約−6V〜約4Vの範囲で変化する。   In the case where 4 V is supplied to the common wiring Zi, −6 V to the first potential supply wiring Yi, and 0 V to the signal detection wiring Xj, in the first and second embodiments of the present invention, between the source and drain of the thin film transistor Tij of the photosensitive circuit The voltage Vds is about 4 V, and the gate-source voltage Vgs changes in the range of about −6 V to about 4 V depending on whether the photosensitive element is irradiated with light or not.

一方、本発明の実施の形態3では、感光回路の薄膜トランジスタTijのソース・ドレイン間電圧Vdsは約6V、ゲート・ソース間電圧Vgsは感光素子への光照射、非照射により約0V〜約10Vの範囲で変化する。感光回路の薄膜トランジスタTijのゲート・ソース間電圧Vgsが小さい方向に変化する。感光回路の薄膜トランジスタTijを流れる電流の絶対値は大きくなり、光センサ検出回路3の構成を簡略化することが出来る。   On the other hand, in Embodiment 3 of the present invention, the source-drain voltage Vds of the thin film transistor Tij of the photosensitive circuit is about 6 V, and the gate-source voltage Vgs is about 0 V to about 10 V by light irradiation or non-irradiation to the photosensitive element. Varies with range. The gate-source voltage Vgs of the thin film transistor Tij of the photosensitive circuit changes in a small direction. The absolute value of the current flowing through the thin film transistor Tij of the photosensitive circuit becomes large, and the configuration of the photosensor detection circuit 3 can be simplified.

実施の形態4.
本発明の実施の形態1から3では、第2電位供給配線として共通配線Ziと同じ約4V、第1電位供給配線Yiにゲート配線QiのゲートOFF電位と同じ約−6Vを供給したが、両方またはどちらか一方に表示回路とは別の電源を準備し、第1電位供給配線Yiと第2電位供給配線の電位差を大きくすると、さらに感光回路の薄膜トランジスタTijを流れる電流や、光照射・非照射による電流比を大きくし、光センサ検出回路3の構成を簡略化することが出来る。
Embodiment 4 FIG.
In the first to third embodiments of the present invention, about 4 V, which is the same as the common wiring Zi, is supplied as the second potential supply wiring, and about -6 V is supplied to the first potential supply wiring Yi, which is the same as the gate OFF potential of the gate wiring Qi. Alternatively, when a power supply different from the display circuit is prepared in one of them and the potential difference between the first potential supply wiring Yi and the second potential supply wiring is increased, the current flowing through the thin film transistor Tij of the photosensitive circuit, light irradiation / non-irradiation The current ratio can be increased, and the configuration of the photosensor detection circuit 3 can be simplified.

例えば、第1電位供給配線Yiに約−16Vの電圧を加えた場合、本発明の実施の形態3では、感光回路の薄膜トランジスタTijのソース・ドレイン間電圧Vdsは約16V、ゲート・ソース間電圧Vgsは感光素子への光の照射、非照射により約0V〜約20Vの範囲で変化させることが出来、より大きな電流を信号検出配線Xjに供給できるようになる。   For example, when a voltage of about −16 V is applied to the first potential supply wiring Yi, in Embodiment 3 of the present invention, the source-drain voltage Vds of the thin film transistor Tij of the photosensitive circuit is about 16 V, and the gate-source voltage Vgs. Can be changed in a range of about 0 V to about 20 V by irradiating or not irradiating light to the photosensitive element, and a larger current can be supplied to the signal detection wiring Xj.

なお、上記の本発明の実施の形態1から4では液晶表示装置について述べたが、表示装置は液晶に限らず、エレクトロルミネセンス(EL)、エレクトロクロミック、電気泳動などの他の原理による表示装置であってもかまわない。   In the above first to fourth embodiments of the present invention, the liquid crystal display device has been described. However, the display device is not limited to the liquid crystal, and the display device is based on other principles such as electroluminescence (EL), electrochromic, and electrophoresis. It doesn't matter.

本発明の実施の形態1を示す光センサ内蔵液晶表示装置における1画素の回路構成図である。It is a circuit block diagram of 1 pixel in the optical sensor built-in liquid crystal display device which shows Embodiment 1 of this invention. a−Siフォトダイオードの回路構成図である。It is a circuit block diagram of an a-Si photodiode. a−Siフォトダイオードの電圧−電流特性図である。It is a voltage-current characteristic view of an a-Si photodiode. a−Siフォトダイオードの電圧−抵抗特性図である。It is a voltage-resistance characteristic view of an a-Si photodiode. 本発明の実施の形態1を示す感光素子の光照射量−電位特性図である。It is a light irradiation amount-potential characteristic diagram of the photosensitive element showing the first embodiment of the present invention. 本発明の実施の形態1を示す光センサ内蔵液晶表示装置における全体構成図である。It is a whole block diagram in the optical sensor built-in liquid crystal display device which shows Embodiment 1 of this invention. 本発明の実施の形態2を示す光センサ内蔵液晶表示装置における1画素の回路構成図である。It is a circuit block diagram of 1 pixel in the optical sensor built-in liquid crystal display device which shows Embodiment 2 of this invention. 本発明の実施の形態3を示す光センサ内蔵液晶表示装置における1画素の回路構成図である。It is a circuit block diagram of 1 pixel in the optical sensor built-in liquid crystal display device which shows Embodiment 3 of this invention.

符号の説明Explanation of symbols

1ゲート駆動回路、2 ソース駆動回路、3 光センサ検出回路、Cij 画素、Qij ゲート配線、Pj 映像信号配線、Zi 共通配線(第2電位供給配線)、TDij 表示回路の薄膜トランジスタ、Clc 液晶容量、Cs 補助容量、Xj 信号検出配線、Yi 第1電位供給配線、Sij 感光素子、Rij 基準抵抗、Tij 感光回路の薄膜トランジスタ(第1トランジスタ)、T2ij 感光回路走査用薄膜トランジスタ(第2トランジスタ)。
1 gate drive circuit, 2 source drive circuit, 3 photo sensor detection circuit, Cij pixel, Qij gate wiring, Pj video signal wiring, Zi common wiring (second potential supply wiring), thin film transistor of TDij display circuit, Clc liquid crystal capacitance, Cs Auxiliary capacitance, Xj signal detection wiring, Yi first potential supply wiring, Sij photosensitive element, Rij reference resistance, Tij photosensitive circuit thin film transistor (first transistor), T2ij photosensitive circuit scanning thin film transistor (second transistor).

Claims (8)

光センサを構成する感光回路と、表示装置を構成する表示回路を同一基板上に備え、
前記感光回路は、第1電位供給配線および第2電位供給配線との間を、
感光素子および前記感光素子と直列に接続された基準抵抗とで接続し、
前記感光素子の電位によりにスイッチ動作する第1トランジスタと、
前記第1トランジスタと直列に接続され、かつ前記表示回路の走査信号に連動してスイッチ動作する第2トランジスタと、
前記第2トランジスタに接続された信号検出配線と、
を備えたことを特徴とする光センサ内蔵表示装置。
The photosensitive circuit that constitutes the optical sensor and the display circuit that constitutes the display device are provided on the same substrate,
The photosensitive circuit is between the first potential supply wiring and the second potential supply wiring.
Connected with a photosensitive element and a reference resistor connected in series with the photosensitive element;
A first transistor that switches according to the potential of the photosensitive element;
A second transistor that is connected in series with the first transistor and that performs a switching operation in conjunction with a scanning signal of the display circuit;
A signal detection wiring connected to the second transistor;
A display device with a built-in optical sensor.
前記第1トランジスタは、第1電位供給配線または第2電位供給配線に接続することを特徴とする請求項1に記載の光センサ内蔵表示装置。 The display device with a built-in optical sensor according to claim 1, wherein the first transistor is connected to a first potential supply line or a second potential supply line. 前記第2電位供給配線は、前記表示回路の共通配線と兼用することを特徴とする請求項1から請求項2のいずれか1項に記載の光センサ内蔵表示装置。 3. The display device with a built-in optical sensor according to claim 1, wherein the second potential supply wiring is also used as a common wiring of the display circuit. 4. 前記感光素子は、光照射時は前記第1トランジスタがOFF状態となる電位とすることを特徴とする請求項1から請求項3のいずれか1項に記載の光センサ内蔵表示装置。 4. The display device with a built-in photosensor according to claim 1, wherein the photosensitive element is set to a potential at which the first transistor is turned off during light irradiation. 5. 前記感光素子は、光照射時は前記第1トランジスタがON状態となる電位とすることを特徴とする請求項1から請求項3のいずれか1項に記載の光センサ内蔵表示装置。 4. The display device with a built-in photosensor according to claim 1, wherein the photosensitive element is set to a potential at which the first transistor is turned on during light irradiation. 5. 前記第1電位供給配線または前記第2電位供給配線は、前記第1トランジスタがOFFまたはON状態となる電位を供給することを特徴とする請求項1から請求項5のいずれか1項に記載の光センサ内蔵表示装置。 6. The device according to claim 1, wherein the first potential supply wiring or the second potential supply wiring supplies a potential at which the first transistor is turned off or on. Photosensor built-in display device. 前記感光素子は、アモルファスシリコンからなるフォトダイオードであることを特徴とする請求1から請求項6のいずれか1項に記載の光センサ内蔵表示装置。 The display device with a built-in optical sensor according to claim 1, wherein the photosensitive element is a photodiode made of amorphous silicon. 前記基準抵抗は、アモルファスシリコンからなり、遮光されていることを特徴とする請求項1から請求項7のいずれか1項に記載の光センサ内蔵表示装置。
The display device with a built-in photosensor according to claim 1, wherein the reference resistor is made of amorphous silicon and is shielded from light.
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