JP2002023658A - Dimming system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a dimming system which regulates a light emitting element to a proper luminance in a small circuit scale in the case of dimming to many stages. SOLUTION: Four double gate transistors 71 to 74 where filters 75 to 78 with respectively different light transmittances constitute a photo-sensor array 61 in order to detect the light quantity of external light. Even in the case the light quantity of external light is identical, the quantities of light which falls on the semiconductor layers (71c) of double gate transistors 71 to 74 are different because of the presence of filters 75 to 78. Thus the levels of respective output voltages are different though a sensor a sensor driving circuit 62 drives double gate transistors 71 to 74 in the same manner. The level of the light quantity of external light can be detected in many stages by comparing voltage sampled and held by a sampling and holding circuit 64 with the reference voltage of only one level.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a dimming system for adjusting the luminance of a light emitting element according to external light.

[0002]

2. Description of the Related Art There are two types of liquid crystal display devices: a reflection type using external light for display, and a transmission type using backlight light. Further, there is a dual-purpose type that switches between a reflection type and a transmission type according to the amount of external light. Among them, in the reflection type, the visibility of the display is all determined by the brightness of the external light. On the other hand, in the case of the transmission type, the visibility of the display changes depending on the state of turning on the backlight in accordance with the state of external light.

Therefore, a liquid crystal display device having a dimming system for adjusting the light of the backlight has been conventionally proposed. In order to maintain the brightness of the backlight optimally using this dimming system, it is necessary to detect the amount of external light with a photo sensor. Conventionally, a CCD (Charge Coupled Device) or the like has been generally used as the photosensor.

However, such a conventional light control system has the following problems. That is, a photosensor is generally formed on a substrate of a liquid crystal panel. However, since the structure of a CCD is considerably different from the structure of a liquid crystal display element, another process for forming a photosensor is required at the time of manufacturing. Was. For this reason, the manufacturing cost of the entire liquid crystal display device has been increased.

[0005] In addition to simply turning on / off the backlight and adjusting the brightness in multiple steps,
The output signal of the photosensor had to be compared with a number of reference voltages corresponding to the luminance level. That is, the constant voltage generation circuits as many as the number of the reference voltages have to be provided in the dimming system. Here, since the circuit scale of the constant voltage generating circuit is relatively large, the dimming system becomes large, and the manufacturing cost of the entire liquid crystal display device increases.

Further, the characteristic of the relationship between the amount of light incident on the photosensor and its output voltage is generally not linear. That is, when the amount of incident light exceeds a certain amount, the output voltage of the photo sensor hardly changes.
Therefore, when the brightness reaches a certain level or more, it is difficult to adjust the brightness of the backlight to an appropriate state according to the brightness.

[0007]

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems of the prior art, and has as its object to provide a dimming system which can be manufactured at low cost.

Another object of the present invention is to provide a dimming system capable of adjusting a light emitting element to an appropriate luminance with a small circuit scale when dimming in multiple stages.

[0009]

In order to achieve the above object, a dimming system according to a first aspect of the present invention is provided with filters having different light transmittances, each of which is externally input via a filter. A plurality of light detection means for detecting the amount of light, and the amount of light detected by the plurality of light detection means,
It is characterized by comprising a comparison means for comparing each with a predetermined reference amount, and a control means for controlling light emission of a light emitting element to be dimmed according to a comparison result of the comparison means.

In the dimming system, filters having different light transmittances are arranged in the plurality of light detecting means. Therefore, even if the amount of external light is the same, the amount of light incident on each light detecting means is different. Become. Thereby, even when comparing the portion exhibiting the most sensitive characteristic of each light detecting means with the reference value, the difference in the external light amount can be detected in multiple stages, and the light emitting element is adjusted to appropriate brightness. be able to.

In the above dimming system, the plurality of light detecting means may convert the voltage into a voltage corresponding to, for example, the amount of incident light. In this case, the dimming system may further include a constant voltage generating circuit that generates a predetermined constant voltage, and the comparing unit converts the voltages respectively converted by the plurality of light detecting units,
The constant voltage generation circuit may be compared with the constant voltage generated, and each comparison result may be supplied to the control unit as a control signal.

The plurality of light detecting means have different amounts of incident light depending on the filters even if the amount of external light is the same, and the level of the output signal is also different. Therefore, the plurality of light detecting means should be compared with the output signal of each light detecting means. Only one level of the reference voltage is required. As a result, the number of constant voltage generation circuits having a relatively large circuit scale can be suppressed, and the scale of the dimming system can be reduced. Further, since the number of constant voltage generation circuits is reduced, the manufacturing cost can be reduced.

In the above dimming system, the plurality of light detecting means may be driven substantially simultaneously to supply respective detection results to the comparing means. In this case, the comparison unit compares the detection results supplied from the plurality of light detection units with a predetermined reference value substantially simultaneously, and supplies the comparison result as a control signal to the control unit. The control means may control the light emission of the light-emitting element to be dimmed according to control signals supplied substantially simultaneously from the plurality of comparison circuits.

In the above dimming system, the plurality of light detecting means may be driven in a time-division manner and sequentially supply respective detection results to the comparing means.
In this case, the comparing means sequentially compares the detection results sequentially supplied in a time-sharing manner from the plurality of light detecting means with a predetermined reference value, and sequentially supplies the comparison result as a control signal to the control means. Wherein the control means controls light emission of the light emitting element to be dimmed in accordance with a control signal sequentially supplied from the comparison circuit.

The dimming system includes a plurality of pixels arranged in a matrix, and each of the plurality of pixels is connected to the plurality of pixels.
The display device may further include an active drive type display element having a transistor for sequentially selecting the plurality of pixels for each row according to an external selection signal. In this case, the transistor includes a gate electrode formed on a substrate, a semiconductor layer provided to face the gate electrode with an insulating film interposed therebetween, and a drain electrode connected to the semiconductor layer so as to be separated from each other. And a source electrode, wherein the photodetector is separated from a first gate electrode formed on the substrate and a semiconductor layer provided opposite the gate electrode via a first insulating film. A drain electrode and a source electrode connected to the semiconductor layer, and a second electrode provided to face the semiconductor layer via a second insulating film formed so as to cover the semiconductor layer, the drain electrode and the source electrode. 2
And a gate electrode.

The so-called double gate transistor constituting each of the plurality of light detecting means as described above constitutes a display element only in that it has a second gate electrode (the first gate electrode corresponds to the gate electrode of the transistor). The structure differs from that of the transistor. For this reason,
In a process for forming a transistor of a display element, a double-gate transistor as a light detecting means can be formed on the same substrate as the transistor. For this reason, there is almost no need for a process specially required for forming the light detecting means, so that the dimming system can be formed at low cost.

It is to be noted that the display element has a first substrate on which a common electrode is formed, and a plurality of pixel electrodes opposed to the first substrate and each of which is connected to the transistor, in a matrix. And a liquid crystal display element that is sealed between the first and second substrates and includes a liquid crystal that constitutes a pixel capacitance together with each pixel electrode and a common electrode facing each other. In this case, the light emitting element to be dimmed by the control means can be a backlight of the liquid crystal display element.

Further, the display element may have a light emitting element for each of the plurality of pixels, and display an image by light emission of the light emitting element of each pixel. In this case, the light emitting element to be dimmed by the control means may be a light emitting element included in each of the plurality of pixels of the display element.

In the display device, at least a part of the plurality of pixels may be provided with a color filter that transmits light in a specific wavelength range. In this case, the filters respectively provided to the plurality of light detection means may be formed by the same process as the color filters provided to the plurality of pixels.

[0020]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, with reference to the accompanying drawings, illustrating the embodiments of the present invention.

FIG. 1 is a block diagram showing a configuration of a liquid crystal display device according to this embodiment. This liquid crystal display device includes a liquid crystal panel 1, a backlight 2, a gate driver 3, a drain driver 4, a controller 5, and a dimming system 6. The liquid crystal panel 1
It has a liquid crystal display element 11 and a photo sensor array 61. The light control system 6 includes a photo sensor array 61 formed on the liquid crystal panel 1.

The backlight 2 is provided on the back side of the liquid crystal display element 11 and irradiates the liquid crystal display element 11 with light of an amount controlled by the dimming system 6 from the back side. The liquid crystal display element 11 is configured by sealing liquid crystal in a pair of substrates, and has TFTs 12 and pixel capacitors 13 arranged in a matrix. The gate electrode of the TFT 12 is connected to the gate line GL, and the drain electrode is connected to the drain line D.
At L, the source electrode is connected to a pixel electrode arranged in a matrix forming a pixel capacitor 13 together with a common electrode on the other substrate side.

The gate driver 3 sequentially outputs a high-level voltage to the gate line GL according to a control signal Gcnt from the controller 5. The drain driver 4
In accordance with the control signal Dcnt from the controller 5, the image data DATA is sequentially fetched, and the fetched image data DATA for one row is drained to the drain line D in accordance with the selection timing of the gate line GL by the gate driver 3.
L respectively. The controller 5 controls the operation of the gate driver 3 and the drain driver 4.

The light control system 6 includes a photo sensor array 6
1, a sensor drive circuit 62 and a constant voltage generation circuit 63
, A sample and hold circuit 64 and a comparator 65
, An oscillation circuit 66, a pulse width control circuit 67, and an inverter circuit 68. The photo sensor array 61 is formed on the substrate of the liquid crystal panel 1 on which the TFT 12 is formed.

FIG. 2A is a diagram showing the structure of the photosensor array 61. As shown in the figure, the photo sensor array 61 includes four double gate transistors 71 to 74 that are optical sensors. The double gate transistors 71 to 74 are formed on the substrate 70 of the liquid crystal panel 1 on the side where the TFT 12 is formed. Further, each double gate transistor 71-74
Filters 75 to 78 are respectively formed on the above.

The structure of the double gate transistors 71 to 74 will be described by taking the double gate transistor 71 as a representative. On the substrate 70, a bottom gate electrode 71a made of a light-shielding metal is formed, and a gate insulating film 71b made of SiN or the like is formed so as to cover the bottom gate electrode 71a. A semiconductor layer 71c made of ia-Si or the like is formed at a position facing the bottom gate electrode 71a thereon, and a drain electrode 71d and a source electrode 71e connected to the semiconductor layer 71c so as to be separated from each other. ing. Further, a gate insulating film 71f is formed so as to cover them, and a top gate electrode 71g made of transparent ITO (Indium Tin Oxide) is formed at a position facing the semiconductor layer 71c thereon. An insulating protection film 71h is further formed thereon. An impurity layer 71i into which n-type impurity ions are mixed is interposed between the semiconductor layer 71c and the drain electrode 71d and the source electrode 71e, and a channel length is provided between the semiconductor layer 71c and the gate insulating film 71f. Insulating layer 7 for controlling the length of
1j is interposed.

The TFT 12 included in the above-described liquid crystal display element 11 has a structure excluding the top gate electrode 71g, and the TFT 12 corresponding to the bottom gate electrode 71a is connected to the gate line GL, 3 is a gate electrode to which a selection signal is supplied.

FIGS. 2B and 2C are circuit diagrams of the photosensor array 61, that is, diagrams showing a method of connecting the double gate transistors 71 to 74 (hereinafter referred to as connection examples 1 and 2, respectively). . In any of the connection examples, the source electrode (71e) is all grounded or fixed to a predetermined potential other than 0 (V).
d) and the sample hold circuit 64 or the comparator 65
Although not shown, it is assumed that the wiring between them is precharged by a voltage signal from the sensor drive circuit 62 before the reading state. Double gate transistor 7
Since 1 to 74 are formed in the same process, the photosensitivity of the double gate transistors 71 to 74 themselves is set to be equal.

In connection example 1, the top gate electrode (71g) and the bottom gate electrode (71a) of the double gate transistors 71 to 74 are all connected to each other, and a common drive voltage is supplied from the sensor drive circuit 62. Supplied. Further, the wirings connected to the drain electrodes (71d) of the double gate transistors 71 to 74 are connected to the respective comparators 65 while keeping the four systems.

On the other hand, in connection example 2, the drain electrodes (71d) of the double gate transistors 71 to 74 are connected to each other, and are connected to the sample-and-hold circuit 64 by one line from there. The top gate electrode (71g) and the bottom gate electrode (71a) of the double gate transistors 71 to 74 are supplied with drive voltages from the sensor drive circuit 62 at different timings.

The double gate transistors 71 to 7
The circuit configuration of the sensor driving circuit 62, the sample-and-hold circuit 64, and the comparator 65 changes depending on which of the connection example 1 and the connection example 2 is connected to the connection circuit 4. Also,
The control signal input to the pulse width control circuit 67 also changes. In this embodiment, it is assumed that the double-gate transistors 71 to 74 are connected in connection example 1, and portions that differ in connection example 2 will be described together at the end. .

Next, the double gate transistors 71 to 7
The driving principle of No. 4 will be described with reference to the schematic diagrams of FIGS.

As shown in FIG. 3A, the voltage applied to the top gate electrode (TG) 71g is +25 (V).
When the voltage applied to the bottom gate electrode (BG) 71a is 0 (V), the voltage between the top gate electrode 71g and one end of the channel region of the semiconductor layer 71c is
Source electrode 71e having a ground potential or a sufficiently low fixed potential
, A continuous n-channel is not formed in the semiconductor layer 71c, and +1 is added to the drain electrode (D) 71d.
Even if a voltage of 0 (V) is supplied, the source electrode (S) 71
Current does not flow between e. In this state, the holes accumulated on the upper portion of the semiconductor layer 71c in the photo-sensing state described later are replaced with the top gate electrode 71g having the same polarity.
It is discharged by repelling by the voltage of. Less than,
This state is called a reset state.

As shown in FIG. 3B, the semiconductor layer 71c
Is incident on the semiconductor layer 71c according to the amount of light.
A hole-electron pair is generated inside. At this time, the voltage applied to the top gate electrode (TG) 71g is -15 (V).
When the voltage applied to the bottom gate electrode (BG) 71a is 0 (V), the holes of the generated hole-electron pairs are blocked by the blocking insulating layer 71j on the semiconductor layer 71c.
Is accumulated in Hereinafter, this state is referred to as a photosense state. Note that holes accumulated in the semiconductor layer 71c are not discharged from the semiconductor layer 71c until the holes are reset.

As shown in FIG. 3C, in the photo-sensing state, the amount of incident light is small and a sufficient amount of holes are not accumulated in the semiconductor layer 71c, and the top gate electrode (TG) 71
g is -15 (V), and the voltage applied to the bottom gate electrode (BG) 71a is +10 (V).
With (V), a depletion layer spreads in the semiconductor layer 71c,
The n-channel is pinched off, and the semiconductor layer 71c has a high resistance. Therefore, +10 is applied to the drain electrode (D) 71d.
Even if the voltage of (V) is supplied, the source electrode (S) 71e
No current flows between Hereinafter, this state is referred to as a first read state.

As shown in FIG. 3D, in the photo sensing state, a large amount of incident light and a sufficient amount of holes are accumulated in the semiconductor layer 71c, and the top gate electrode (TG) 71g
Is -15 (V), and the voltage applied to the bottom gate electrode (BG) 71a is +10 (V).
In the case of (V), the accumulated holes are attracted to and held by the top gate electrode 71g to which the negative voltage is applied, and the negative voltage of the top gate electrode 71g is reduced by the semiconductor layer 71c.
To reduce the effect on For this reason, the semiconductor layer 71c
An n channel is formed on the bottom gate electrode 71a side of
The semiconductor layer 71c has low resistance. Therefore, when a voltage of +10 (V) is supplied to the drain electrode (D) 71d,
A current flows between the source electrode (S) 71e. Less than,
This state is called a second read state.

The filters 75 to 78 shown in FIG. 2 will be described.
, That is, light that generates an electron-hole pair in the semiconductor layer 71c at a predetermined wavelength is set to decrease in this order. That is, even if the same amount of light is incident on the filters 75 to 78, the amount of light incident on the semiconductor layers (71c) of the double gate transistors 71 to 74 increases in this order.

It is desirable that the filters 75 to 78 use gray filters. However, when the liquid crystal display element 11 has three color filters that transmit light in the respective wavelength ranges of RGB, for example, the transmittance of the color filter that transmits light in the R wavelength range is changed. And the filters 75 to 78, and may be formed in the same process as the color filters of the liquid crystal display element 11.

FIG. 4 is a diagram showing the relationship between the amount of external light and the resistance of the double gate transistors 71 to 74. Since the double gate transistor 71 has the highest light transmittance of the corresponding filter 75, even when the amount of external light is small, a sufficient amount of light is incident on the semiconductor layer 71c, the resistance is reduced, the drain current flows, and the drain electrode 71d Quickly drop the precharged voltage. Since the light transmittance of the corresponding filter 76 is the second highest in the double gate transistor 72, the amount of light incident on the semiconductor layer (71c) is smaller than that of the double gate transistor 71, and the semiconductor layer ( 71c) is large. Therefore, in order to reduce the resistance, the amount of external light must be larger than that of the double gate transistor 71.
It may be less than the case of 4.

Since the light transmittance of the corresponding filter 77 is the third highest in the double gate transistor 73, the quantity of light incident on the semiconductor layer (71 c) is smaller than that of the double gate transistor 72, and the semiconductor light quantity is smaller than that of the double gate transistor 74. A large amount of light is incident on the layer (71c).
Therefore, in order to reduce the resistance, the amount of external light must be larger than in the case of the double gate transistor 72, but may be smaller than in the case of the double gate transistor 74. Further, since the light transmittance of the corresponding filter 78 of the double gate transistor 74 is the lowest, the amount of light incident on the semiconductor layer (71c) is smaller than that of the double gate transistor 73. Therefore, in order to reduce the resistance, the amount of external light must be larger than in the case of the double gate transistor 73.

Returning to FIG. 1, the description will be continued.
In connection example 1, the sensor drive circuit 62 includes the double gate transistors 71 to
The above-described drive voltage is appropriately supplied to the top gate electrode (71g) and the bottom gate electrode (71a). In addition, a timing signal is output to the gate of the sensor drive circuit 62 in accordance with the supply of the drive voltage. The constant voltage generation circuit 63 generates a predetermined reference voltage and
5, but only one level of reference voltage needs to be generated. The binary signals output in parallel from the four comparators 65 are input to the pulse width control circuit 67.

In connection example 2, the sample and hold circuit 64
Is a precharge voltage signal (output voltage) attenuated according to the amount of incident light from the respective drain electrodes 71d of the double gate transistors 71 to 74 constituting the photosensor array 61 in accordance with a timing signal supplied from the sensor drive circuit 62. Signals) are sequentially sampled and held. The comparator 65 outputs the voltage signal sampled and held by the sample and hold circuit 64 to the constant voltage generation circuit 63.
Is supplied to the pulse width control circuit 67 as a control signal.

FIG. 5A is a circuit diagram of the comparator 65 in the first connection example. In the case of connection example 1 described above, such a circuit is provided for each of the double gate transistors 71 to 74. In this case, according to the timing signal supplied substantially simultaneously from the sensor drive circuit 62, the double gate transistor 7
The output voltage signal from any one of 1 to 74 is separated into one of two control signals of dark and light by a comparator 65 and supplied to a pulse width control circuit 67.

On the other hand, in the case of connection example 2 described above, FIG.
Only one circuit as shown in (b) is provided. In this case, a timing signal is supplied to the sample and hold circuit 64 at the same time as the sensor drive circuit 62 sequentially drives the double gate transistors 71 to 74 in a time-division manner.
Each output voltage signal is sampled and held sequentially in time division. The comparator 65 sequentially compares the output voltage signals of the double gate transistors 71 to 74 with the reference voltage, and sequentially supplies the comparison result to the pulse width control circuit 67 as a control signal.

The oscillation circuit 66 oscillates a clock pulse having a predetermined frequency. The pulse width control circuit 67 controls the pulse width based on the control signal supplied from the comparator 65 and supplies the pulse width to the inverter circuit 68. In connection example 2, the comparison result of the comparator 65 corresponding to each of the double gate transistors 71 to 74 is held, and the pulse width is controlled based on the held four comparison results. The inverter circuit 68 supplies a voltage corresponding to the pulse signal from the pulse width control circuit 67 to the backlight 2.

The operation of the liquid crystal display according to this embodiment will be described below. Here, a characteristic part of the present invention is the control of the brightness of the backlight 2 by the dimming system 6, and the driving of the liquid crystal display element 11 is performed in the same manner as in the conventional example. There is no characteristic. Therefore, in the following description, it is assumed that the images displayed on the liquid crystal display element 11 are all the same, and how the dimming system 6 operates according to the external light and the brightness of the backlight 2 can be changed. Will be described.

First, the sensor drive circuit 62 first controls the top gate electrodes (71
g) and a voltage of +25 (V) to the bottom gate electrode (71).
a) A voltage of 0 (V) is output to the reset state by outputting a voltage of 0 (V) for a certain period, and electric charges accumulated in the respective semiconductor layers (71c) of the double gate transistors 71 to 74 are discharged. Thereafter, a voltage of +25 (V) is output to the top gate electrode (71g) of each of the double gate transistors 71 to 74, and a voltage of 0 (V) is output to the bottom gate electrode (71a) for a certain period of time. At this time, electric charges are accumulated in the double gate transistors 71 to 74 in which a sufficient amount of light has entered the semiconductor layer (71d).

Next, the sensor drive circuit 62 supplies the bottom gate electrodes (71
The voltage output to a) is set to +10 (V), and a voltage of +10 (V) is supplied to the drain electrode (71d).
At this time, the double gate transistors 71 to 74 are in the first read state for those to which sufficient light has entered, and current flows between the drain electrode (71d) and the source electrode (71e), Drain electrode (71
The potential d) decreases. On the other hand, the one where sufficient light has not entered enters the second reading state, and the potential of the drain electrode (71d) remains high. At this time, the amounts of light incident on the double gate transistors 71 to 74 are different from each other according to the transmittance of the filters 75 to 78.

Next, the sensor drive circuit 62 outputs a timing signal to the gate of the sensor drive circuit 62, and the drain electrodes (71d) of the double gate transistors 71 to 74.
Of each of the four comparators 65
Respectively.

The four comparators 65 compare the output voltage signal dropped according to the amount of incident light with the reference voltage generated by the constant voltage generating circuit 63, and use the comparison result as a binarized control signal as a pulse. It is supplied to the width control circuit 67. The pulse width control circuit 67 determines the brightness of the external light to be one of five levels based on the four control signals,
The pulse width is controlled according to this judgment, and the inverter circuit 6
8 controls the effective voltage supplied to the backlight 2. Thereby, the light emitted from the backlight 2 is adjusted. On the other hand, in connection example 2, the comparator 65 converts the output voltage signal sequentially output from the sample and hold circuit 64 into a binary control signal of either light or dark and inputs the control signal to the pulse width control circuit 67.

Hereinafter, the backlight 2 depends on the amount of external light.
How to control the brightness of the image will be specifically described. Here, the dimming system 6 performs dimming so that the darker the external light is, the brighter the backlight 2 emits, in order to prevent the external light from being reflected by the substrate of the liquid crystal display element 11 and making the image difficult to see. And

In the first state where there is almost no external light,
Since a sufficient amount of light does not enter any of the semiconductor layers (71d) of the double gate transistors 71 to 74, no charge is accumulated in the photo-sensing state. As a result, all of the double gate transistors 71 to 74 are in the second read state, and the drain electrode (71d)
Remains high. Therefore, the output signals of the four comparators 65 indicate that the reference voltage from the constant voltage generation circuit 63 is lower. And
The pulse width control circuit 67 performs control so as to minimize the pulse width of the output signal and lower the effective voltage of the output signal of the inverter circuit 68. Thereby, the backlight 2
Emits relatively dark light or no light at all.

The second state in which the amount of external light is slightly larger than that in the first state.
In the state, a sufficient amount of light is incident on the semiconductor layer 71c of the double gate transistor 71 via the filter 75 having a high light transmittance, but the filter 7 having a light transmittance lower than this.
External light is absorbed by 6 to 78, and a sufficient amount of light does not enter the semiconductor layers (71c) of the double gate transistors 72 to 74. As a result, the double gate transistor 71 enters the first read state and the drain electrode 71
d decreases, but the double gate transistor 72
74 are in the second read state and the drain electrode 71
The potential of d remains high.

Therefore, the double gate transistor 72
The output signal of the comparator 65 corresponding to .about.74 indicates that the reference voltage is lower, whereas the output signal of the comparator 65 corresponding to the double gate transistor 71 indicates that the reference voltage is higher. Therefore, the pulse width control circuit 67 makes the pulse width of the output signal larger than in the first state, and makes the effective voltage of the output signal of the inverter circuit 68 higher than in the first state. As a result, the backlight 2 emits light brighter than in the first state.

The third state in which the amount of external light is slightly larger than that in the second state.
In this state, a sufficient amount of light is incident on the semiconductor layer (71c) of the double gate transistor 72 via the filter 76 having the next highest light transmittance. In this case, the output signal of the comparator 65 corresponding to the double gate transistors 73 and 74 indicates that the reference voltage is lower, but the comparator 65 corresponding to the double gate transistors 71 and 72
Output signal indicates that the reference voltage is higher. Therefore, the pulse width control circuit 67 sets the pulse width of the output signal larger than that in the second state, and
Is made higher than the second state. Thus, the backlight 2 emits light brighter than in the second state.

The fourth mode in which the amount of external light is slightly larger than that in the third mode.
In this state, a sufficient amount of light is incident on the semiconductor layer (71c) of the double gate transistor 73 via the filter 77 having the next highest light transmittance. In this case, the output signal of the comparator 65 corresponding to the double gate transistor 74 indicates that the reference voltage is lower, but the output signal of the comparator 65 corresponding to the double gate transistors 71 to 73 has a higher reference voltage. It indicates that.
Therefore, the pulse width control circuit 67 makes the pulse width of the output signal larger than that in the third state, and makes the effective voltage of the output signal of the inverter circuit 68 higher than that in the third state. Thus, the backlight 2 emits light brighter than the third state.

In the fifth state in which the amount of external light is large, a sufficient amount of light is incident on the semiconductor layers (71c) of all the double gate transistors 71 to 74 via the filters 75 to 78, respectively. In this case, all the comparators 6 corresponding to the double gate transistors 71 to 74 respectively
The output signal of No. 5 indicates that the reference voltage is higher. Therefore, the pulse width control circuit 67 sets the pulse width of the output signal larger than that in the fourth state, and
8 makes the effective voltage of the output signal higher than that in the fourth state. As a result, the backlight 2 emits light brighter than in the fourth state.

As described above, in the liquid crystal display device according to this embodiment, the double gate transistor 71 is provided in the photo sensor array 61 constituting the light control system 6.
To 74 are used. Double gate transistors 71-
The structure of the TFT 74 constitutes the TFT 12 constituting the liquid crystal display element 11.
Since they are almost the same, they can be manufactured by substantially the same manufacturing process. Therefore, the manufacturing cost of the entire liquid crystal display device can be reduced.

Although four double gate transistors 71 to 74 are provided in the photo sensor array 61, the filters 75 to 78 are disposed on these double gate transistors 71 to 74.
Even if the amount of external light is the same, each output voltage is different. Therefore, the double gate transistor 71
Since the output signals to 74 may be compared with the same reference voltage, only one constant voltage generating circuit 63 for generating a one-level reference voltage may be provided. Thus, the size of the light control system 6 can be reduced, and the manufacturing cost can be reduced.

Further, by providing the filters 75 to 78, even if the amount of external light is the same, the amount of light incident on the semiconductor layers (71c) of the double gate transistors 71 to 74 becomes different. As a result, for example, even when the external light is quite bright, the amount of light incident on the semiconductor layer (71c) can be suppressed by the filter 78 having a low light transmittance. Can be detected with high sensitivity. Similarly, the double gate transistors 71 to 73 can detect a difference in the amount of external light with high sensitivity. For this reason, the backlight 2 can be adjusted to an appropriate luminance in multiple stages.

The present invention is not limited to the above embodiment,
Various modifications and applications are possible. The following describes variation in the form applicable foregoing embodiments of the present invention.

In the above embodiment, the double gate transistors 71 to 74 constituting the photo sensor array 61
Have been described in connection example 1 shown in FIG. 2B. On the other hand, when the connection is made in connection example 2 shown in FIG. 2C, the following points are different.

The sensor drive circuit 62 sequentially sets the double gate transistors 71 to 74 in a reset state, a photo sense state, and a read state, and outputs a voltage signal corresponding to the amount of light incident from each of the double gate transistors 71 to 74. It is assumed that the data is sequentially output in a time division manner.

The sample hold circuit 64 and the comparator 65 are composed of only one circuit as shown in FIG. 5B, and the double gate transistors 71 to 7 are provided in accordance with a timing signal from the sensor drive circuit 62.
4 are sequentially sampled and held by the sample and hold circuit 64 in a time-division manner. As a result, the comparator 65 sequentially compares the output voltage signals of the double gate transistors 71 to 74 with the constant voltages generated by the constant voltage generation circuit 63, and outputs signals indicating the respective comparison results to the sample hold circuit 64. The signal is supplied to the pulse width control circuit 67 in a time-division manner substantially in the same manner as the signal acquisition.

The pulse width control circuit 67 holds the latest comparison result signals of the four comparators 65 corresponding to the double gate transistors 71 to 74, respectively. Then, the pulse width of the output signal is controlled based on the signals of the comparison results of the four comparators 65 held.

In the above embodiment, the light control system 6
In the above, the voltage supplied to the backlight 2 is controlled by the pulse width control circuit 67 and the inverter circuit 68 to adjust the brightness of the light emitted from the backlight 2. On the other hand, instead of controlling the voltage supplied to the backlight 2, the dimming system 6 may control the amount of the supplied current and adjust the brightness of the light emitted from the backlight 2. In addition, not only when the amount of external light is large, the backlight 2 emits light brightly, but also when the amount of external light is small, the backlight 2 emits light brightly. For example, when the amount of external light is large and small, The backlight 2 may emit light more brightly than in the case of the intermediate amount.

In the above embodiment, the light control system 6
Is for adjusting the brightness of the backlight 2 of the liquid crystal display device, but may be for adjusting the brightness of a self-luminous light emitting element. FIG. 6 is a block diagram illustrating a configuration of an organic EL display device including an organic EL element that is a self-luminous light emitting element. This organic EL display device performs display of two gradations of light and dark, and includes a gate driver 3, a drain driver 4, a controller 5, a light control system 6
And an organic EL panel 8. The components having the same reference numbers are substantially the same as those shown in FIG.

The organic EL panel 8 includes an organic EL display element 81 formed on the same substrate and a photo sensor array 6.
And 1. The organic EL display element 81 includes a plurality of pixels formed in a matrix. Each pixel includes a selection TFT 82, a driving TFT 83, a capacitor 84, and an organic EL element 85. The output voltage of the inverter circuit 68 is the organic EL element 8
5 anodes.

When a selection voltage is output from the gate driver 3 to the gate line GL, the selection TFT 82 connected thereto is turned on. At this time, the drain driver 4
Is output to the drain line DL from the selection T
The data is written to the capacitor 84 via the FT 82. If the level of the written voltage is, for example, a high level, the driving TFT 83 is turned on. As a result, a current flows through the organic EL element 85, and the organic EL element 85 emits light at a luminance corresponding to the level of the voltage supplied from the inverter circuit 68. As described above, the dimming system 6 can adjust the level of the light emission luminance of the self-luminous display element. Note that the amount of current supplied to the organic EL element 85 may be controlled.

In the above embodiment, the photo sensor array 61 is configured by a combination of the double gate transistors 71 to 74 and the filters 75 to 78. On the other hand, the filters 75 to 78 may not be provided, and driving signals of different potentials may be output from the sensor driving circuit 62 to the double gate transistors 71 to 74 to detect the amount of external light. Further, a photosensor of a type other than the double gate transistors 71 to 74 and filters 75 to 78 may be combined. The former has an effect that at least the photosensor array can be formed on the same substrate as the liquid crystal display element 11. On the other hand, the latter has the effect of reducing the number of reference voltage generation circuits,
The effect is obtained that only the range of characteristics easy to use as a sensor can be used. The number of the double gate transistors 71 to 74 is not limited to this, and if the number is two or more, the brightness of the external light can be favorably detected at three or more gradations.

[0071]

As described above, by forming the light detecting means by a double gate transistor, the light detecting means can be formed on the same substrate as the active drive type display element.
Since it can be formed by the same process, the manufacturing cost of the light control system can be reduced.

Further, by arranging filters having different light transmittances to the plurality of light detecting means, it is possible to detect the amount of external light using the sensitive portions of the respective light detecting means.

Further, the voltage signal photoelectrically converted by the plurality of light detecting means may be compared with only the voltage signal of one level, so that only one constant voltage generating circuit may be provided. Accordingly, the scale of the dimming system can be reduced, and the manufacturing cost can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a liquid crystal display device according to an embodiment of the present invention.

FIG. 2A is a diagram showing a structure of a photosensor array, and FIGS. 2B and 2C are circuit diagrams of the photosensor array.

FIG. 3 is a diagram schematically showing a driving principle of a double gate transistor.

FIG. 4 is a diagram showing the relationship between the amount of external light and the on-resistance of each double gate transistor.

FIG. 5 is a circuit diagram of a comparator.

FIG. 6 is a block diagram showing a configuration of an organic EL display device according to another embodiment of the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Liquid crystal panel, 2 ... Backlight, 3 ... Gate driver, 4 ... Drain driver, 5 ... Controller, 6 ... Light control system, 8 ... Organic EL panel, 11 ... Liquid crystal display element, 12 ... TFT, 13 ... Pixel capacitance 61, a photo sensor array, 62, a sensor drive circuit, 63, a constant voltage generation circuit, 64, a sample and hold circuit, 65, a comparator, 66, an oscillation circuit, 67, a pulse width control circuit, 68,
Inverter circuit, 70: substrate, 71 to 74: double gate transistor, 71a: bottom gate electrode, 71b ...
Gate insulating film, 71c: semiconductor layer, 71d: drain electrode, 71e: source electrode, 71f: gate insulating film, 71
g: Top gate electrode, 71h: Insulating protective film, 71i ...
Impurity layer, 71j blocking layer, 75-78 filter, 81 organic EL display element, 82 selection TFT,
83: driving TFT, 84: capacitor, 85: organic E
L element

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) G02F 1/13357 G09G 3/34 J 5G435 1/1368 3/36 G09G 3/34 G02F 1/1335 530 3 / 36 1/136 500

Claims (6)

[Claims] A plurality of light detecting means for detecting the amount of light incident from the outside via the filters; and detecting the amounts of light detected by the plurality of light detecting means, respectively. A dimming system comprising: a comparing unit that compares a light amount with a predetermined reference amount; and a control unit that controls light emission of a light emitting element to be dimmed according to a comparison result of the comparing unit. 2. The apparatus according to claim 1, wherein the plurality of light detecting means converts the voltage into a voltage corresponding to the amount of incident light, and further comprises a constant voltage generating circuit for generating a predetermined constant voltage. 2. The method according to claim 1, wherein the voltage detected by the light detecting means is compared with a constant voltage generated by the constant voltage generating circuit, and a result of each comparison is supplied to the control means as a control signal. Dimming system. 3. The plurality of light detection means are driven substantially simultaneously to supply respective detection results to the comparison means, and the comparison means is supplied from the plurality of light detection means, respectively. A plurality of comparison circuits for comparing the detected results with a predetermined reference value substantially simultaneously, and supplying the comparison results as control signals to the control means, wherein the control means is substantially composed of the plurality of comparison circuits. 3. The light control system according to claim 1, wherein light emission of the light-emitting element to be light-controlled is controlled according to a control signal supplied simultaneously to the light control device. 4. 4. The plurality of light detecting means are driven in a time-division manner and sequentially supply respective detection results to the comparing means, and the comparing means is provided in a time-division manner from the plurality of light detecting means. A comparison circuit sequentially compares the sequentially supplied detection results with a predetermined reference value, and sequentially supplies the comparison result as a control signal to the control unit. The control unit includes a control signal sequentially supplied from the comparison circuit. The dimming system according to claim 1, wherein the light emission of the light-emitting element to be dimmed is controlled according to the following. 5. An active drive type display having a plurality of pixels arranged in a matrix and transistors connected to the plurality of pixels and sequentially selecting the plurality of pixels for each row according to an external selection signal. An element, wherein the transistor is connected to the semiconductor layer so as to be separated from a gate electrode formed on a substrate, a semiconductor layer provided to face the gate electrode via an insulating film, and to be separated from each other. A drain electrode and a source electrode, wherein the photodetector is separated from a first gate electrode formed on the substrate and a semiconductor layer provided to face the gate electrode via a first insulating film. The drain electrode and the source electrode connected to the semiconductor layer as described above, and the second insulating film formed so as to cover the semiconductor layer, the drain electrode and the source electrode, Dimming system according to any one of claims 1 to 4, characterized in that it comprises a second gate electrode provided facing the semiconductor layer with. 6. The display device according to claim 1, wherein a first substrate on which a common electrode is formed, and a plurality of pixel electrodes opposed to the first substrate and connected to the respective transistors are formed in a matrix. And a liquid crystal display element comprising a liquid crystal that is sealed between the first and second substrates and forms a pixel capacitance together with each pixel electrode and a common electrode facing each other. 6. The light emitting device according to claim 5, wherein the light emitting device is a backlight of the liquid crystal display device.
The dimming system according to 1.