JP4612640B2 - Data communication system and data communication method - Google Patents

Description

  The present invention relates to a data communication system and a data communication method for dividing and communicating data using a plurality of line cables. For example, a line extension device or a line terminator handles an error in connection of a line cable. The present invention relates to a data communication system and a data communication method that can be used for various purposes.

  When transmitting and receiving bit-serial data via a line, if you can use multiple line cables at the same time, rather than using only one line cable, transfer the data separately. However, the line usage efficiency is increased. Also, the communication time can be shortened when a predetermined amount of data is communicated. Therefore, it has been proposed as a first proposal to communicate using a plurality of channels from a transmission position to a reception position (see, for example, Patent Document 1).

  In the first proposal, a synchronization signal is transmitted to each channel during the initial transmission period, thereby correcting a delay in transmission time when assembling the signals of the respective channels. Further, in order to determine the establishment of the N channel communication path, channel identification signals each representing a channel are transmitted every other consecutive block of code data. For example, when data is transmitted by dividing it into 6 channels in total, numerical values “0” to “5” representing the channels and timing signals of the respective blocks are transmitted alternately.

Similarly, after the communication path is set, the transmitting side transmits an initial setting synchronization signal to both channels B1 and B2 prior to data transmission, and the signal for transmitting two channels in ISDN (Integrated Services Digital Network) is received on the receiving side. Assembling with the above has been proposed as a second proposal (see, for example, Patent Document 2). In the second proposal, the synchronization signals b1 and b2 of the channels B1 and B2 obtained by adding the channel identification data to the synchronization data having a predetermined pattern are generated at the same timing.
JP-T-61-501543 (4th page, upper left column, line 21 to the lower left column, 9th line, FIG. 2) Japanese Patent Laid-Open No. 06-006416 (paragraphs 0016 and 0023, FIG. 1)

  As described above, in the conventional first and second proposals, when data is divided into a plurality of channels and transmitted, the synchronization signal and the channel identification signal are individually transmitted to each channel. Therefore, for example, when data is divided into n channels and transmitted, not only a special pattern synchronization signal that can be distinguished from a bit pattern constituting normal data but also a channel identification signal has n special patterns. It was necessary to prepare a signal. As a result, it is necessary to prepare (n + 1) special patterns of signals that can be distinguished from normal data.

  Accordingly, in order to realize these (n + 1) special patterns when the value of the numerical value n increases, regardless of the case where the number of the numerical value n is small, as in the case of the second proposal. In addition, it is necessary to prohibit communication of the same bit patterns constituting normal data or to transmit the bit patterns as different patterns from the original bit patterns between the transmitting and receiving apparatuses.

  In the former case, various types of bit patterns that cannot be communicated as normal data are generated, which is a big problem that data is lost. In the latter case, when there are normal bit serial data identical to the (n + 1) bit patterns assigned to either the synchronization signal or the channel identification signal, these are specially transmitted on the transmission side. Each bit pattern is converted and transmitted, and the receiving side needs to return these special bit patterns to the original normal bit serial data. For this reason, when the number of types of bit patterns handled exceptionally increases, there arises a problem that the configuration of the transmission device and the reception device becomes complicated for processing.

  Accordingly, an object of the present invention is to provide a data communication system and a data communication method capable of identifying each communication path of data to be divided and transmitted without the need to assign a special identification signal other than the synchronization signal. is there.

  Another object of the present invention is to provide a data communication system and a data communication method capable of notifying a receiving side of various states such as abnormalities on the transmitting side without the need to assign a special identification signal other than the synchronization signal. There is.

In the present invention , (a) when transmitting bit serial data as a transmission target to a specific destination, data division means for dividing the data according to the number of transmission lines of a plurality of systems used for transmission, and this data division The synchronization signal inserting means for inserting a synchronization signal for synchronizing the transmission when the transmission path is different to each divided data that is the data divided by the means, and after the division by the synchronizing signal inserting means A data transmission device comprising synchronization signal continuous adding means for continuously adding a synchronization signal at a specific number of times to each of the plurality of transmission lines described above with respect to the synchronization signal inserted into each of the data; Synchronizing means for synchronizing each of the divided data received from the data transmitting apparatus via any one of the transmission lines of the plurality of systems described above with the synchronizing signal, and the synchronizing signal are continuously added. A transmission path discriminating means for discriminating which of the transmission lines of the plurality of systems passes through the divided data and the divided data transmitted through any one of the transmission lines of the plurality of systems. A data receiving device comprising a reproducing means for reproducing bit-serial data by sequentially combining the divided data received for each transmission path determined by the transmission path determining means while synchronizing each of the data with the synchronizing means It is provided in the communication system.

Further, in the present invention, (a) when transmitting bit serial data to be transmitted to a specific destination, a synchronization signal inserting means for inserting a synchronization signal for synchronizing the data on the receiving side. And a synchronization signal continuous adding means for continuously adding a synchronization signal at a specific number of times corresponding to the information to be notified to the specific destination with respect to the synchronization signal inserted into the data by the synchronization signal inserting means. And (b) synchronization means for synchronizing each of the divided data received from the data transmission device via any one of the plurality of transmission lines described above with a synchronization signal; and A data communication system is provided with a data reception device including notification information determination means for determining information to be notified to the specific destination based on the number of times signals are continuously added.

In the present invention , (a) a data division step of dividing bit serial data as a transmission target according to the number of transmission lines of a plurality of systems used for transmission when transmitting to a specific destination; (B) a synchronization signal insertion step for inserting a synchronization signal for synchronizing each transmission data with different transmission paths into each divided data, which is the data after the division in this data division step; In this synchronization signal insertion step, a synchronization signal is continuously added at a specific number of times to each of the above-described plurality of transmission lines with respect to the synchronization signal inserted into each of the divided data, and the divided data is added to the plurality of divided data. A divided data sending step for sending to the corresponding one of the transmission lines of the system; and (d) the divided data sent in this divided data sending step from each transmission line. After being divided, the data after the division is synchronized with the synchronization signal and the transmission path through which the data after the division passes is determined by the number of times the synchronization signal is continuously added. A data communication method includes a reproduction step of reproducing bit serial data by sequentially combining data.

  As described above, according to the present invention, the transmission path identification information and the notification information in the event of an abnormality are transmitted to the other party using only the bit pattern recognized between the transmission and reception called the synchronization signal. Is not complicated. Also, if the transmission path identification information is transmitted, the relationship between the line and the connection can be recognized on the receiving side, so that it is possible to confirm the connection work and eliminate the need for reconnection work when a connection error occurs. be able to.

  Hereinafter, the present invention will be described in detail with reference to examples.

FIG. 1 shows an outline of the data communication system of the present embodiment. In the data communication system 100, data can be divided and transmitted between the first terminal apparatus 101 and the second terminal apparatus 102. Therefore, the first terminal device 101 is connected to the first data division device 103 that receives data from the first terminal device 101 and divides and transmits the data to the second terminal device 102 side. The second terminal apparatus 102 is connected to a second data dividing apparatus 104 that receives data from the second terminal apparatus 102 and divides and transmits the data to the first terminal apparatus 101 side. Between the first data division device 103 and the second data division device 104, there are first to nth lines 105 _{1 to} 105 _n . Therefore, the first data dividing device 103 and the second data dividing device 104 can communicate data in parallel using the _first to _nth lines 105 _{1 to} 105 _n .

  FIG. 2 shows the first data dividing device and its periphery. The second data dividing device 104 shown in FIG. 1 also has the same circuit configuration as the first data dividing device 103. Therefore, when describing the second data dividing device 104, the description will be made using the reference numerals of the circuit components in the first data dividing device 103 shown in FIG. 2 as they are.

The first terminal device 101 is connected to the terminal interface termination unit 111 in the first data dividing device 103. The terminal interface termination unit 111 performs impedance matching, and adds or deletes a predetermined line identification signal for identifying each line when data is divided and communicated according to a division mode of data to be transmitted. It is supposed to be. Line 105 ₁ to 105 _n of the first to n is connected to a corresponding one of the first to n line terminating unit 112 ₁ to 112 _n of the first data division unit 103. Similarly, the _first to n-th line terminators 112 _{1 to} 112 _n perform impedance matching and add or delete predetermined line identification signals.

Terminal interface terminating unit 111, the data conversion unit 113 is connected to the line terminating unit 112 ₁ to 112 _n of the first to n via the data division-multiplexing unit 114 and the line switching unit 115. The data converter 113 is connected to the alarm display unit 116.

Among these, the line switching unit 115 receives the line identification signals 117 _{1 to} 117 _n obtained from the _first to n-th line termination units 112 _{1 to} 112 _n, thereby allowing the second terminal apparatus shown in FIG. so that the the first to the data 118 ₁ - 118 _n of the n sent from 102 to determine whether sent in the correct line connection relationship. When the connection relationship between the _first to _n-th lines 105 _{1 to} 105 _n is distorted between the first terminal apparatus 101 and the second terminal apparatus 102, the lines are set so as to be correct. The input / output relationship between them is switched.

The data division / multiplexing unit 114 receives data sent from the _first to _n-th lines 105 _{1 to} 105 _n as data 119 ₁ to 119 _n from the line switching unit 115, and predetermined one of these is received as 1 Multiplexed as a set of data. The data 121 received from the first terminal device 101 and sent to the _first to _n-th lines 105 _{1 to} 105 _n is divided into data 122 ₁ to 122 _n .

  The data conversion unit 113 receives the data 123 multiplexed from the data division / multiplexing unit 114, determines whether there is an error, and outputs an alarm signal 124 to the alarm display unit 116 when an error is detected. Yes. Upon receiving the alarm signal 124, the alarm display unit 116 displays an alarm on a display (not shown) or outputs an alarm sound from an alarm sound output device such as a buzzer (not shown).

FIG. 3 shows a case where the line termination units of the first and second data division apparatuses are normally connected to the respective lines. FIG. 4 shows a case where some of the line termination units of the first and second data division apparatuses are connected to the line by mistake. That is, in the case of FIG. 3 in these data communication systems 100, the first line 105 ₁ is connected to the _first line terminator 112 ₁ of the first and second data dividing devices 103 and 104. The second line 105 ₂ is connected to the _second line termination unit 112 ₂ of the first and second data division apparatuses 103 and 104. The same applies hereinafter.

On the other hand, in the case of FIG. 4, the first line 105 ₁ is normally connected to the _first line termination unit 112 ₁ of the first data dividing apparatus 103, but the second data dividing apparatus 104 is mistakenly connected to the _second line terminator 112 ₂ . Further, although the second line 105 ₂ is normally connected to the _second line termination unit 112 ₂ of the first data division apparatus 103, the first line termination unit 112 _{1 of} the second data division apparatus 104 is used. Connected incorrectly. In this example, for the third line 105 ₃ later, it is assumed that is being performed similarly successful connection with FIG.

In such a case, it is assumed that transmission data 125 including configuration data D _{1 to} D _n is sent from the first terminal apparatus 101 in the example shown in FIG. These configuration data D _{1 to} D _n are divided into n, and the first to n-th divided data 126 ₁ to 126 ₁ to 126 ₁ to 112 _n from the first to n- _th line termination units 112 _{1 to} 112 n of the first data dividing device 103. 126 _n is output. Divided after the data 126 ₁ - 126 _n of the first to n is sent allocated sequentially to lines 105 ₁ to 105 _n of the first to n.

In this case, it received in the form of first to line terminating unit 112 ₁ to 112 _n of the n of the second data division unit 104 corresponding configuration data D ₁ to D _n in order. Accordingly, the second of the first to configuration data D ₁ to D _n of line termination units 112 ₁ to 112 _n receives in parallel of the n-th data division unit 104 first to the second data division unit 104 When the n-th line termination units 112 _{1 to} 112 _n are assembled in this order, the reception data 127 received by the second terminal apparatus 102 also includes the configuration data D _{1 to} D _{n in} the same order as the transmission data 125. That is, the transmission data 125 is normally received as the reception data 127.

Next, as shown in FIG. 4, it is assumed that part of the line connection is wrong. The same applies when the line connection is made without regard to the order. In such a case, transmission data 125 composed of the configuration data D _{1 to} D _n is sent out from the first terminal device 101 in the same manner as in FIG. It is assumed that the line switching unit 115 shown in FIG. 2 does not operate unlike the present invention.

In this case, first to n divided after the data 126 ₁ - 126 _n of the first to n output from the line terminating unit 112 ₁ to 112 _n of the first data division unit 103, the second data division As a result of the reverse connection of the first and second line terminators 112 ₁ and 112 ₂ on the device 104 side, the correct arrangement as the received data 127 is not obtained. That is, the reception data 127 of the second terminal apparatus 102 becomes the configuration data D ₂ , D ₁ , D _{3 to} D _n , and an error occurs on the reception side.

In the data communication system 100 of the present embodiment, the first to n-th line terminators 112 _{1 to} 112 _n and the first to n-th lines 105 _{1 to} 105 _{n of} the first and second data dividing devices 103 and 104 are used. Need not maintain the correct correspondence as shown in FIG. As shown in FIG. 4, even when these connection relationships are not correct due to a mistake in line connection work or the like, the data sent from the first terminal device 101 is always correctly received by the second terminal device 102. It is like that. Conversely, the same applies to data sent from the second terminal apparatus 102 to the first terminal apparatus 101.

  FIG. 5 is a diagram for explaining how data is divided and transmitted in the data communication system according to the present embodiment. In this specification, when it is necessary to distinguish between the circuit device on the transmission side and the device on the reception side, a symbol S is assigned to the circuit device on the transmission side, and a symbol R is assigned to the circuit device on the reception side. In the following description, it is assumed that data is transmitted from the first terminal apparatus 101 shown in FIG. 1 or FIG. 2, but the operation of the data communication system 100 is also performed when data is transmitted from the second terminal apparatus 102. Exactly the same.

Data sent from the first terminal device 101 on the transmission side shown in FIG. 1 is input to the first data division device 103 shown in FIG. 2, and divided into two by the data division / multiplexing unit 114S. These divided data is passed through without directly switching processing line switching section 115S as data which is divided into two systems, to reach the first line terminating unit 112S ₁ and the second line terminating unit 112S ₂ It will be explained as a thing.

In the example shown in FIG. 5, the first line termination unit 112S ₁ is mistakenly connected to the second line 105 ₂ , and the second line termination unit 112S ₂ is wrongly connected to the first line 105 _1. ing. Here, the first line terminator 112R ₁ on the receiving side is correctly connected to the first line 105 ₁ as shown in FIG. 5, and the second line terminator 112S ₂ is also connected to the second line 105 ₂ . It is assumed that it is connected correctly.

The first line termination unit 112S ₁ on the transmission side synchronizes the _first line identification signal 117 ₁ having two consecutive idle (IDEL) patterns 131 as transmission data regardless of the success or failure of such a line connection state. Send instead of signal. The second line termination unit 112S ₂ on the transmission side transmits a second line identification signal 117 _{2 including} three consecutive idle patterns 131 as transmission data instead of the synchronization signal. That is, if m is a positive integer, the first data division device 103 side uses the m-th line identification signal 117 _m having (m + 1) consecutive idle patterns 131 as the divided m-th transmission data. It is decided to transmit instead of the synchronization signal.

The reason why (m + 1) consecutive idle patterns 131 are used as the m-th line identification signal 117 _m is to distinguish them from the original idle pattern in which only one idle pattern 131 exists. The idle pattern is inserted for synchronization in an originally blank time slot.

When the second line termination unit 112R ₂ on the receiving side receives the first line identification signal 117 ₁ sent as a synchronization signal, _two idle patterns 131 are continuous, so the first divided line 131 It is determined as data 118 ₁ . Then, the first line identification signal 117 ₁ as the determination result is supplied to the line switching unit 115R as a signal corresponding to the first line termination unit 112R ₁ .

Similarly, when the first line termination unit 112R ₁ on the receiving side receives the second line identification signal 117 ₂ sent as the synchronization signal, three idle patterns 131 are continuous. determine a ₂ second data 118. Then, the second line identification signal 117 ₂ as the determination result is supplied to the line switching unit 115R as a signal corresponding to the first line termination unit 112R ₁ .

If the connection between the _two lines 105 ₁ and 105 ₂ is correct, the line switching unit 115R receives the second line identification signal 117 ₂ at the input terminal that should receive the first line identification signal 117 ₁ , and conversely The first line identification signal 117 ₁ is received at the input terminal to receive the _second line identification signal 117 ₂ . Therefore, the output destinations of the divided first data 118 ₁ and second data 118 ₂ are alternately switched as indicated by broken lines in FIG.

FIG. 6 shows a case where the switching process of the line switching unit for received data is realized by software. The first data division device 103 or the second data division device 104 (FIG. 1) including the line switching unit 115R shown in FIG. 2 includes a CPU (Central Processing Unit) (not shown) and a control program executed by the CPU. A stored storage medium is provided. Then, by executing this control program, a process for switching received data received simultaneously from a plurality of the _first to _nth lines 105 _{1 to} 105 _n is performed.

  That is, the line switching unit 115R determines values obtained by subtracting “1” from the continuous number of idle (IDEL) patterns 131 constituting the line identification signal 117 input to the respective line identification signal input terminals (step S201). ). Then, each output terminal of each line of the line switching unit 115R is in ascending order from “2”, “3”,... In ascending order among the continuous number of idle patterns 131 “2” or more. The output destination of the reception data of each line is switched (step S202).

Once the line switching unit 115R performs the switching process in this manner, the switching destination is fixed until a new reception of data including the idle pattern 131 is started again. For example, in the example shown in FIG. 5, received data in which the connection relationship between the first and second lines 105 ₁ and 105 ₂ is reversed is obtained in the line switching unit 115R. Therefore, when the line switching unit 115R performs switching processing corresponding to these, the connection relationship between the first and second line termination units 112 ₁ and 112 ₂ and the first and second lines 105 ₁ and 105 ₂ is fixed. While the received data is being continued, the switching destination of the line switching unit 115R is held in that state.

As a result, the data division / multiplexing unit 114R inputs the first data 118 ₁ and the second data 118 ₂ in the correct arrangement relationship. As a result, sent from the data division-multiplexing unit 114R in ₂ second data 118 is output to the following first data 118 ₁ to the data conversion unit 113R. Here, a case is shown in which the first data 118 ₁ and the second data 118 ₂ are divided and sent. However, when the first data 118 ₁ and the second data 1182 are divided and sent, the first to nth data are sent. 118 _{1 to} 118 _n are assembled in the correct order and sent to the data conversion unit 113R.

The data conversion unit 113R performs an error check on the data multiplexed in this way by a known technique. If any error has occurred, an alarm signal 124 is sent to the alarm display unit 116 to display the alarm and a predetermined error process is performed. If there is no error in the multiplexed data, the data is sent to the terminal interface termination unit 111R. If the first to n-th line identification signals 117 _{1 to} 117 _n exist in the data, they are deleted and sent to the second data dividing device 104 or the first data dividing device 103 on the receiving side. become.

  The example described above will be described more specifically. For example, a bit pattern “01111110” (7E pattern in hexadecimal) is used as the idle pattern 131. On the other hand, for normal data other than the idle pattern 131, “1” is prevented from continuing for 6 bits. When a bit pattern in which “1” continues for 6 bits or more in normal data is to be sent, for example, when the data is “01111110”, the 7th bit of “1” is added. Thus, “011111110” is distinguished from the idle pattern 131 in which “1” is continuous for 6 bits. When “011111110” is received as data, “1” of the seventh bit is deleted on the receiving side and is changed to “01111110” to reproduce the original normal data.

In the case of this embodiment, the first line identification signal 117 ₁ having two consecutive idle patterns 131 becomes “01111110” and “01111110”, and patterns other than “01111110” follow thereafter. Further, the idle pattern 131 is a second line identification signals 117 ₂ consecutive 3 becomes "01111110", "01111110", "01111110", and pattern other than "01111110" ensue thereto after. Therefore, the line switching unit 115R on the receiving side can determine the continuous number of idle (IDEL) patterns 131 constituting the line identification signal 117 input to each line identification signal input terminal.

  <First Modification of the Present Invention>

FIG. 7 shows the configuration of the first line termination unit in the first modification of the present invention. In the first modification, the first line termination unit 112R ₁ on the receiving side includes a line synchronization detection circuit 301 and an idle pattern detection circuit 302 as hardware. The first divided data 126 ₁ sent from the line side is input to the line synchronization detection circuit 301, where the synchronization timing is detected by detecting the idle pattern. When a plurality of idle patterns are continuous, the leading idle pattern is used as a synchronization signal.

The divided first data 118 ₁ output from the line synchronization detection circuit 301 is supplied to the line switching unit 115R shown in FIG. The idle pattern detection circuit 302 decodes the number of idle patterns when two or more idle patterns are continuous, and supplies the first line identification signal 117 ₁ to the line switching unit 115R.

Showing a first line termination unit 112R ₁ arrangement of Figure 7 the receiving side, but be circuit configuration similarly hardware for line termination unit 112R ₂ ~112R _n of the second to n-th reception side it can.

  <Second Modification of the Present Invention>

FIG. 8 shows the configuration of the first line termination unit in the second modification of the present invention. In the second modification, the first line termination unit 112RA ₁ on the receiving side includes a line synchronization detection circuit 301 and an idle pattern error detection circuit 302A as hardware. The first divided data 126A ₁ sent from the line side is input to the line synchronization detection circuit 301, where the synchronization timing is detected by detecting the idle pattern. The idle pattern error detection circuit 302A detects the number of idle pattern errors per unit time using a timer (not shown).

In the second modification, the number of idle pattern errors per unit time is set in correspondence with each of the _first to _nth lines 105 _{1 to} 105 _n shown in FIG. 1 on the data transmission side. For example, the number of error occurrences per unit time of the idle pattern constituting the synchronization signal of the divided data (data after division) sent to the first line 105 ₁ is “0”, and the nth line 105 _n (however, The number of occurrences of errors per unit time of the idle pattern constituting the synchronization signal (value n is an integer of 2 or more) is “n−1”.

Therefore, in the second modification, it is determined which of the first to nth lines 105 _{1 to} 105 _n is used to receive the divided data by measuring the number of idle pattern errors per unit time. Thus, the data after division can be assembled in order. Of course, since an idle pattern in which an error has occurred can be discriminated as a synchronization signal, it is possible to synchronize the respective divided data between the _first to _nth lines 105 _{1 to} 105 _n .

  <Third Modification of the Present Invention>

  FIG. 9 shows a data communication system in the third modification of the present invention. In the data communication system 100C of the third modification, the first data dividing device 103C and the second data dividing device 104C are connected to the first terminal device 101C or the second terminal device 102C as a connection destination. A state detection unit 401 that detects the occurrence of the abnormal state, and a synchronization signal continuous number state correspondence table 402 that associates the number of consecutive synchronization signals with the detection result of the state detection unit 401. In addition, the first terminal device 101C and the second terminal device 102C include a display unit 403 that displays the occurrence of an abnormal state such as a failure occurrence of a communication partner.

  FIG. 10 shows the contents of the synchronization signal continuous number state correspondence table in the third modification. The synchronization signal continuous number state correspondence table 402 describes the relationship between the synchronization signal continuous number representing the continuous number of synchronization signals composed of the idle (IDEL) pattern 131 shown in FIG. 5 and the state to be notified to the receiving side. Has been.

For example, when the number of consecutive synchronization signals is “1”, there is only one synchronization signal, so that the reception timing of the original synchronization signal is only notified to the receiving side. When the number of consecutive synchronization signals is “2”, two synchronization signals are continued. Thus, although the first synchronization signal has been assumed to notify the receiving side synchronization timing, by the synchronizing signal is continuous two, from the first line terminating unit 112 ₁ shown in FIG. 9 first line 105 ₁ represents the first line identification signal to be transmitted. "First supposed to be transmitted to the line 105 _1" as expressed, for example long as the first line terminator 112 ₁ is connected by mistake to _two second line 105, second line 105 ₂ It is because it is sent to. Similarly, when three synchronization signals are consecutive, the second line identification signal that should be sent to the second line 105 ₂ from the second line termination unit 112 ₂ shown in FIG. 9 is represented. ing. Similarly, when (n + 1) synchronization signals continue, this represents the nth line identification signal.

  When (n + 2) to (n + m) synchronization signals are continued, each abnormal state as a detection result of the state detection unit 401 shown in FIG. 9 is associated. For example, when (n + 2) synchronization signals are continuous, the corresponding one of the first terminal device 101C and the second terminal device 102C is not connected to the first data dividing device 103C or the second data dividing device 104C. It is shown that. Further, for example, when (n + m) synchronization signals are continued, it indicates that the corresponding one of the first terminal device 101C and the second terminal device 102C is turned off.

  Therefore, in the data communication system 100C of the third modified example, when data is divided and transmitted from the first terminal apparatus 101C to the second terminal apparatus 102C, when the transmission side is normal, the synchronization signal continuous number is set. By using a predetermined one of “2” to “n + 1”, a line identification signal indicating which route the divided signal has been sent to is sent to the second data dividing device 104C side. . If an abnormality has occurred on the transmission side, a status signal indicating the cause of the failure is sent instead of these line identification signals, and the contents are displayed on the display unit 403R on the reception side. Become.

  In the embodiment and the modification of the present invention described above, the type of data after division on the transmission side is made to correspond to the increase in the number of idle patterns. However, the present invention is not limited to this. The relationship between the two may be given in the decreasing direction, or they may be associated in a unique order from the viewpoint of encryption.

  In the third modification of the present invention, the line identification signal and the failure status signal are described in the synchronization signal continuous number state correspondence table in association with the synchronization signal continuous number, but only the failure status signal is supported. You may make it describe. In this case, the communication system need not be limited to a system that performs communication by dividing data. That is, even for a system that transmits and receives data without dividing it, information such as a failure can be notified to the receiving side in association with the number of consecutive synchronization signals.

1 is a system configuration diagram illustrating an overview of a data communication system according to an embodiment. It is a block diagram showing the 1st data division | segmentation apparatus of a present Example, and its periphery. It is explanatory drawing which showed operation | movement when each line | wire termination part of the 1st and 2nd data division | segmentation apparatus is normally connected with each line | wire in the present Example. It is explanatory drawing which showed the operation | movement in case a part of line | wire termination | terminus part of the 1st and 2nd data division | segmentation apparatus is mistakenly connected with the line | wire in the present Example. It is explanatory drawing which showed the mode of the division | segmentation transmission of the data in the data communication system of a present Example. It is a flowchart showing the mode of the switching process of the line switching part with respect to received data in a present Example. It is a block diagram showing the structure of the 1st line | wire termination part in the 1st modification of this invention. It is a block diagram showing the structure of the 1st line | wire termination part in the 2nd modification of this invention. It is a system block diagram showing the outline | summary of the data communication system of the 3rd modification of this invention. It is explanatory drawing showing the content of the synchronous signal continuous number state corresponding | compatible table in a 3rd modification.

Explanation of symbols

100, 100C Data communication system 101, 101C, first terminal device 102, 102C second terminal device 103, 103C first data division device 104, 104C second data division device 105 line 111 terminal interface termination unit 112 line Terminating section 114 Data division / multiplexing section 115 Line switching section 117 Line identification signal 301 Line synchronization detection circuit 302, 302A Idle pattern detection circuit 401 State detection section 402 Synchronization signal continuous number state correspondence table 403 Display section

Claims (5)

When transmitting bit serial data as a transmission target to a specific destination, data dividing means for dividing the data according to the number of transmission lines of a plurality of systems used for transmission, and data divided by the data dividing means Synchronization signal insertion means for inserting a synchronization signal for synchronizing each transmission data with a different transmission path and inserted into each of the divided data by the synchronization signal insertion means. A data transmission device comprising: synchronization signal continuous addition means for continuously adding the synchronization signal at a specific number of times to each of the plurality of transmission lines with respect to the synchronization signal;
Synchronization means that synchronizes each of the divided data received from the data transmission device via any one of the transmission lines of the plurality of systems with the synchronization signal, and the synchronization signal are continuously added. Each of the transmission path discrimination means for discriminating which of the transmission lines of the plurality of systems has passed through the divided data by the number of times, and each of the divided data transmitted through any one of the transmission lines of the plurality of systems A data receiving apparatus comprising: reproducing means for reproducing the bit-serial data by sequentially combining the divided data received for each transmission path determined by the transmission path determination means while synchronizing with the synchronization means; A data communication system comprising: When transmitting bit serial data as a transmission target to a specific destination, a synchronization signal inserting means for inserting a synchronization signal for synchronization on the data receiving side, and the synchronization signal inserting means A data transmission device comprising synchronization signal continuous addition means for continuously adding the synchronization signal at a specific number of times corresponding to information to be notified to the specific destination with respect to the synchronization signal inserted into the data;
Synchronization means that synchronizes each of the divided data received from the data transmission device via any one of the transmission lines of the plurality of systems with the synchronization signal, and the synchronization signal are continuously added. A data communication system comprising: a data reception device including a notification information determination unit that determines information to be notified to the specific destination based on the number of times . 2. The synchronization signal continuous adding means adds a number of synchronization signals corresponding to a device status including a number other than the number corresponding to the types of the transmission lines of the plurality of systems to the synchronization signal. data communication system. The data transmitting device includes data dividing means for dividing bit serial data as a transmission target according to the number of transmission lines of a plurality of systems used for transmission when transmitting to the specific destination. 3. The data communication system according to claim 2, wherein the information to be notified to the destination is any one of transmission paths through which the data divided by the data dividing means is transmitted or a specific abnormal state . A data division step for dividing the bit serial data as a transmission target according to the number of transmission lines of a plurality of systems used for transmission when transmitting to a specific destination;
A synchronization signal insertion step for inserting a synchronization signal for synchronizing each transmission data with different transmission paths into each divided data, which is the data after the data division step,
In this synchronization signal inserting step, the synchronization signal is continuously added at a specific number of times to each of the plurality of transmission lines to the synchronization signal inserted into each of the divided data, and the divided data is added to the plurality of divided data. A divided data sending step for sending to the corresponding ones of the transmission lines of the system;
The divided data sent in the divided data sending step is received from the respective transmission lines, and each divided data is synchronized with the synchronization signal, and these synchronization signals are added continuously. A reproduction step of reproducing the bit serial data by sequentially combining the divided data received by determining the transmission path through which the divided data passes.
A data communication method comprising:

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