JP2002101146A - Bulk communication apparatus, bulk communication system as well as method for controlling bulk communication - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a bulk communication system capable of achieving communication of a high quality. SOLUTION: The bulk communication system comprises a first bulk communication apparatus 1A connected to a data communication line 51 and a bulk monitoring data line 52, and having data dividing and sending functions of dividing communication data received from a data terminal 3A via a high speed communication line 31A to meet a communication speed of a bulk communication line 5 and sending the data to the communication line 51, and a function of generating communication quality monitoring data DCRC corresponding to the communication data; and a second bulk communication apparatus 1B having a function of detecting a phase detecting pattern from the data received from the line 51, a function of reading contents of an FIFO at the point of finishing all writing of the writing phase detecting pattern of the received data in the FIFO when detecting the phase detecting pattern, a function of aligning and restoring the communication data, and a function of checking normality of the communication data by using the restored communication data and the DCRC in an opposed disposition.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bulk communication system, a bulk communication device, and a bulk communication control method for providing high-speed communication by using a plurality of ISDN basic group communication lines in a bundle.

[0002]

2. Description of the Related Art The configuration of a conventional bulk communication system will be described with reference to FIG. Data terminal equipment (Data Te
The basic group includes a bulk communication device 1A connected to a primary equipment (DTE) 3A via a primary rate interface (PRI) 31A and a bulk communication device 1B connected to a data terminal device 3B via a primary speed interface 31B. It is configured to be connected oppositely via the I interface dedicated line 5. The bulk communication device 1 and the basic group I interface dedicated line 5 are connected via a data communication line 51. In the bulk communication system, the rate (N lines) required for the data terminal device 3 is end-
Realize end-to-end communication. The trigger of the bulk restart in this system has been performed by detecting a signal level drop due to a physical disconnection of the line or a failure of the layer 1 protocol due to a loss of frame synchronization.

[0003] In such a bulk communication system, an abnormality in line delay fluctuation due to a non-instantaneous switching performed by a line provider in a line is, from the viewpoint of terminal equipment, an abnormality in signal level and an abnormality in frame synchronization. Layer 1
It is not detected as a failure specified by the protocol, only appears as a data delay, and cannot detect an abnormality in line delay fluctuation. Therefore, it is not possible to detect, as a failure, an abnormality in line delay fluctuation caused by instantaneous interruption switching or the like, and the quality of bulk communication may be degraded.

[0004]

SUMMARY OF THE INVENTION An object of the present invention is to provide a bulk communication apparatus and a bulk communication system capable of detecting abnormalities such as delay fluctuations that do not appear as an electrical obstacle and performing high quality bulk communication. Another object of the present invention is to provide a bulk communication control method.

[0005]

In order to solve the above-mentioned problems, the present invention provides a method for transmitting data in a cyclic manner.
c Redundancy Check (CRC) code is generated, transmitted at the same time, and checked on the receiving side to confirm the normality of the data.

In order to solve the above-mentioned problems, the present invention provides a bulk communication device which is connected to a data terminal device via a high-speed communication line such as a primary rate interface (PRI) line, and a basic group is disposed therebetween. Interface (BR
I) Connect the lines with a bulk communication line that bundles multiple lines,
In a bulk communication device constituting a bulk communication system for performing bulk communication between opposing bulk communication devices, a plurality of BRIs connected to a data communication line of the bulk communication line are provided.
An interface, a BRI interface connected to the bulk monitoring data line, data division transmission means for dividing communication data received from the data terminal device in accordance with the communication speed of the bulk communication line, and sending the divided data to each BRI interface; That generates a cyclic code (CRC) code corresponding to the data and outputs the cyclic code to a BRI interface connected to the bulk monitoring data line.
Generating means for transmitting the cyclic code together with the communication data.

[0007] The present invention provides the above bulk communication device,
Further, a phase detection pattern generating means is provided, and the phase detection pattern is output to the BRI interface during the bulk sequence, and the bulk sequence is executed when a failure is detected.

In order to solve the above-mentioned problems, the present invention provides a data terminal device in which a bulk communication device connected via a high-speed communication line such as a primary group speed interface line is arranged to face each other, and a basic group interface line is connected between them. A plurality of BRI interfaces connected to a data communication line of the bulk communication line, wherein the plurality of BRI interfaces are connected to a bulk communication line connected by a bundled bulk communication line to constitute a bulk communication system for performing bulk communication between opposing bulk communication lines; , A BRI interface connected to the bulk monitoring data line, and a plurality of FRIs connected to the BRI interface.
IFO (first in first out) memory, phase detection pattern detection means for detecting a phase detection pattern from the BRI interface, and writing to the FIFO memory is enabled when the phase detection pattern detection means detects the phase detection pattern. A write valid signal, a FIFO control means for outputting a read valid signal for validating the reading of the FIFO memory when all the phase detection patterns have been written to the FIFO memory, and communication data read from the FIFO memory. Serializing means for aligning and restoring the data, and a CRC check for confirming the normality (CRC check) of the communication data using the restored communication data and the cyclic code received by the BRI interface connected to the bulk monitoring data line Means to monitor the health of communications It was.

In order to solve the above-mentioned problem, the present invention provides a plurality of BRs connected to a data communication line of a bulk communication line.
An I interface, a BRI interface connected to the bulk monitoring data line, data division sending means for dividing communication data received from the data terminal device in accordance with the communication speed of the bulk communication line, and sending the divided data to each BRI interface; And a CRC generating means for generating a cyclic code corresponding to the data and outputting the cyclic code to the BRI interface connected to the bulk monitoring data line, and providing the data terminal device with a high speed communication line such as a primary rate interface line. A plurality of BRI interfaces connected to a data communication line of the first bulk communication device and the bulk communication line, a BRI interface connected to a bulk monitoring data line, and a connection to the BRI interface A plurality of FIFO memories and the BRI Phase detection pattern detection means for detecting a phase detection pattern from an interface, a write enable signal for enabling writing to a FIFO memory when the phase detection pattern detection means detects the phase detection pattern, and a FIFO memory FIFO control means for outputting a read valid signal for validating the reading of the FIFO memory when all the phase detection patterns have been written to the memory, and data serialization for aligning and restoring communication data read from the FIFO memory Means, restored communication data and BRI connected to bulk monitoring data line
CRC check means for checking the normality (CRC check) of the communication data using the cyclic code received by the interface, and a second terminal connected to the data terminal device via a high-speed communication line such as a primary rate interface line. 2
And a bulk communication device that opposes the other bulk communication devices is connected to each other by a bulk communication line in which a plurality of basic group interface lines are bundled to constitute a bulk communication system.

According to the present invention, in the above bulk communication system, the first bulk communication device includes a phase detection pattern generating means, and outputs the phase detection pattern at the time of the bulk sequence.

According to the present invention, in the above bulk communication control method, the abnormality of the received communication data is confirmed (CRC check) by using the cyclic code data corresponding to the communication data to be transmitted, and whether the normal communication is performed. Judgment was made.

The present invention relates to a bulk communication control method in the bulk communication system, wherein the normality of received communication data is confirmed (CRC check) using cyclic code data corresponding to the communication data to be transmitted, and the communication data is checked. When an abnormality is detected, a pattern for phase detection is transmitted, a bulk sequence is executed, and bulk communication is set again.

(Operation) By realizing the above configuration,
Since data burst errors and bit errors can be detected, not only electrical or physical failures in the line but also failures due to data fluctuations due to delay fluctuations, etc., are detected, and bulk communication is executed again to ensure high-quality communication. Can be provided.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention provides a method for generating a cyclic code (CRC) for communication data in a bulk communication system, transmitting the generated code simultaneously with the communication data, and using the cyclic code to receive data on a receiving side. Was checked for normality.

Hereinafter, a bulk communication apparatus according to the present invention, which constitutes a bulk communication system, will be described with reference to the drawings.

In this specification, the suffix A of the code indicates the case of the device on one data terminal device side (for example, the data transmission side), and the suffix B indicates the device of the other data terminal device side (for example, the data reception side). In this case, the case where no suffix is added is a case where each device is described in common, or a case where a device characteristic of one of the devices is described.

FIG. 1 is a system configuration diagram showing a configuration of a bulk communication system using a bulk communication device according to the present invention.

A bulk communication system using a bulk communication device according to the present invention includes a bulk communication device 1A to which a data terminal device (DTE) 3A is connected via a primary rate interface (hereinafter, also referred to as a PRI interface) 31A. , And a bulk communication device 1B to which a data terminal device 3B is connected via a PRI interface 31B, and connected via a line 5 such as a dedicated line for a basic group I interface. Line 5 may be an ISDN circuit switched network.

The bulk communication device 1 is a device for realizing end-to-end communication by bulking a rate required for the data terminal device 3, and accommodates a data communication line 51 of a basic group interface. Further, the bulk communication device 1 accommodates a data line 52 for bulk monitoring. Using the bulk monitoring data line 52, the communication quality monitoring data DCRC is transmitted and received between the bulk communication devices to monitor the communication quality of the line. The communication quality monitoring data DCRC is a cyclic (CRC) code which will be described later,
When communication is performed from the side to the data terminal device 3B, a cyclic (CRC) code is generated corresponding to the communication data BRD, and is transmitted together with the communication data BRD to the opposing bulk communication device 1B. The bulk communication device 1B, which has received the communication quality monitoring data DCRC, checks the normality (CRC check) of the communication data based on the communication data BRD and the communication quality monitoring data DCRC, and verifies the communication quality.
Due to the nature of the cyclic (CRC) code, bit errors and burst errors can be detected by the CRC check, and the communication quality can be confirmed for each transmission unit.

Referring to FIG. 2, a functional configuration of the transmitting-side bulk communication device 1A as a transmitting unit during the bulk sequence will be described. The bulk communication device 1A includes a DTE interface 11A, a signal switching unit 12,
3, a pattern detection pattern generation unit 14, a control data generation unit 15, a CRC generation unit 16, and BRI interfaces 17A-1 to 17A-n.

The DTE interface 11A is a means for establishing a PRI interface with the data terminal device 3A.

The signal switching unit 12 selects one of the communication data BRD from the DTE interface 11A and the control data transmitted from the control data generation unit 15 and passes it to the data division transmission unit 13. Means.

The data division transmitting unit 13 transmits the communication data BR
D is a means for dividing and outputting D to each of the BRI interfaces 17A-1 to 17A-4.

The phase detection pattern generation section 14 is a means for generating a phase detection pattern PN at the time of a bulk sequence and outputting it to each of the BRI interfaces 17A-1 to 17A-n.

The control data generator 15 is means for generating control data.

The CRC generator 16 generates communication quality monitoring data (DCRC) corresponding to the communication data BRD.
This is means for outputting to the BRI interfaces 17A-1 to 17A-n.

BRI interfaces 17A-1 to 17A
-N is means for transmitting data to the BRI data communication line 51A and the bulk monitoring data line 52A.

Referring to FIG. 3, bulk communication device 1 on the receiving side will be described.
A functional configuration as a receiving unit at the time of the bulk sequence of B will be described. The bulk communication device 1B includes a BRI interface 17B-1 to 17B-n, a phase detection pattern detection unit 21, a delay amount counter 22, and a FIFO memory 24-B.
1 to 24-n, a data serializer 25, a CRC checker 26, a control data detector 27, and a DTE interface 11B.

BRI interfaces 17B-1 to 17B
-N is means for receiving the communication data BRD, the phase detection pattern PN, or the control data from the BRI data communication line 51B and the bulk monitoring data line 52B.

The phase detection pattern detection unit 21 is a BRI
This is a means for detecting a phase detection pattern from data received by the interfaces 17B-1 to 17B-n.

The delay amount counter 22 is constituted by using, for example, a ring counter, and is a means for measuring the position of the phase detection pattern received by each BRI interface.
The delay amount up to the finally detected phase detection pattern is measured.

The FIFO memories 24-1 to 24-n store B
Communication data or phase detection pattern PN received by RI interfaces 17B-1 to 17B-4, and B
This is a first-in first-out memory in which the phase detection pattern PN or communication quality monitoring data DCRC received by the RI interface 17B-n is temporarily stored, and is simultaneously read out under the control of the FIFO control unit 23.

The data serializing unit 25 is means for converting parallel data sent from the FIFO memories 24-1 to 24-n into serial data in the same order.

[0034] The CRC check unit 26 is provided with the communication data BR.
A means for confirming the normality of the communication data (CRC check) using D and the communication quality monitoring data DCRC.

The control data detecting section 27 is means for detecting control data from the received data.

The DTE interface 11B is means for establishing a PRI interface with the data terminal device 3B.

Referring to FIG. 4 showing a bulk procedure, a bulk procedure (hereinafter, referred to as a bulk sequence) performed to obtain bulk synchronization at the start of bulk communication in the bulk communication system according to the present invention will be described.

When the bulk communication device 1A turns on the power,
When an event that satisfies the condition of bulk sequence trigger detection occurs due to reception of data from the data terminal device 3A, detection of a failure signal, depression of a bulk sequence start switch, and the like (step S1), the phase detection pattern The generation unit 14 generates a phase detection pattern PN, and sends the phase detection pattern to the opposing bulk communication device 1B via the data communication line 51A and the bulk monitoring data line 52A (step S2).

The bulk communication device 1B that has received the phase detection pattern PN sends the phase detection pattern PN to the data communication line 51B and the bulk monitoring data line 52B in the same manner as the bulk communication device 1A (step S3). The phase detection pattern PN transmitted from the bulk communication device 1A received from the data communication line 51B and the bulk monitoring data line 52B is detected, and a phase detection process for determining the delay amount between the lines is performed (step S).
4) Thereafter, in order to restore the communication data BRD based on the delay amount information between the lines obtained by the phase detection process, a channel sort process for rearranging data according to the delay amount of the line is performed (step). S5).

The phase detection processing (step S6) and the channel sort processing (step S7) are similarly performed in the bulk communication device 1A. This channel sorting process will be described later.

After the phase detection processing and the channel sort processing are completed, the bulk communication apparatus 1A checks whether the phase detection processing and the channel sort processing have been normally completed in the bulk communication apparatus 1B toward the bulk communication apparatus 1B. The confirmation data to be confirmed is transmitted (step S8). Upon receiving the confirmation data, the bulk communication device 1B confirms that the processing has been completed normally (step S9), and the phase detection process and the channel sort process in the bulk communication device 1A toward the bulk communication device 1A are normal. Then, confirmation data for confirming whether or not the processing has been completed is transmitted (step S10). The bulk communication device 1A that has received the confirmation data confirms that the processing has been normally completed (step S11).

In step S9, the bulk communication device 1B confirms that the phase detection process and the channel sort process have been completed normally, and sends a bulk completion notification to the bulk communication device 1A.
(Step S12). Similarly, step S1
1, the bulk communication device 1A that has confirmed that the phase detection process and the channel sort process have been normally completed sends a bulk completion notification to the bulk communication device 1B (step S1).
13). The bulk communication apparatuses 1A and 1B that have detected that their own phase detection processing and channel sorting processing and the phase detection processing and channel sorting processing of the opposing bulk communication apparatus have been completed normally are connected between the bulk communication apparatus 1A and the bulk communication apparatus B. That the bulk sequence has been completed.

Thereafter, each of the bulk communication devices 1A and 1B
A communication path is provided to the data terminal devices (DTEs) 3A and 3B, and a data communication state is established between the DTEs (step S1).
4).

The bulk sequence processing at the time of the bulk sequence and the subsequent communication processing will be described.

As shown in FIG. 2, during the bulk sequence,
When detecting the trigger of the bulk sequence, the transmitting unit of the bulk communication device 1A on the transmitting side transmits the BRI interfaces 17A-1 to 17A-
n, and generates and transmits the phase detection patterns PN1 to PNn. Each of the phase detection patterns PN1 to PNn
The pattern is different for each RI interface, and includes the order information of the data sent by the data division sending unit 13.

Next, when the communication data BRD from the data terminal device 3A is input to the data division sending unit 13 via the DTE interface 11A, the data division sending unit 1
3 transmits the communication data BRD to the BRI interface 17A.
The signal is divided and distributed to a size corresponding to the band of -1 to 17A-4, and output following the phase detection pattern.

In this description, the head data is output to the BRI interface 17A-1 and the tail data is output to the BRI interface 17A-4. Thus, the phase detection patterns PN1 to PN
4 and the communication data BRD are transmitted to the data communication line 51A.

[0048] The CRC generation unit 16 transmits data to the data terminal device 3A.
Generates communication quality monitoring data DCRC for communication data BRD from
Output to Thus, the phase detection pattern PN
n and the CRC data DCRC are transmitted to the bulk monitoring data line 52A.

The phase detection patterns PN1 to PNn sent to the data communication line 51A are sent to the receiving bulk communication device 1B on the line 5 with a different delay amount for each line.

As shown in FIG. 3, during the bulk sequence,
The receiving unit of the bulk communication device 1B on the receiving side transmits the phase detection patterns PN1 to PNn having different delay amounts transmitted from the bulk communication device 1A to the BRI interface 17.
When received via B-1 to 17B-n, the pattern detection unit 21 for phase detection and the FIFO memories 24-1 to 24-n
To communicate. The phase detection pattern detection unit 21 performs each of the BRI interfaces 17B-1 to 17B-1 during the bulk sequence.
7B-n is monitored to detect the input of the phase detection patterns PN1 to PNn.

As shown in FIG. 5, when the phase detecting pattern detecting section 21 detects any of the phase detecting patterns PN1 to PNn, the FIFO control section 23 sets the FIFO memory corresponding to the detected phase detecting pattern. 24-1 ~
A write valid signal for validating data writing is output to 24-n (b), and writing of data (PN, BRD) is started from the point in time when the phase detection pattern PN is detected (c).

The FIFO control unit 23 stores the FIFO memories 24-1 to 24-2 of all the phase detection patterns PN1 to PNn.
When the writing to 4-n is completed, a FIFO read valid signal is output (d), and data reading from all FIFOs is started simultaneously (e).

The data read from the FIFO memories 24-1 to 24-n are input in parallel to the data serializer 25 in the next stage, and are serialized in the order distributed by the data division and transmitter 13 (f). ). The data output from the data serializer 25 is restored to the original data.

The receiving operation in the receiving-side bulk communication device 1B will be described with reference to FIGS.

As shown in the FIFO3 input of FIG.
When the phase detection pattern PN3 is first received by the RI interface 17B-3, the FIFO3 write enable signal (b) is output, and the FIFO memory 3 becomes writable, and the received data is written in order. Following, PN
4, when PNN, PN2, PNl are received, FIFO
Upon detection of the phase detection pattern, the control unit 23 sends the FIFO write enable signal of FIG.
Output to the IFO memory to enable writing to the FIFO memory.

When the FIFO control unit 23 detects all the phase detection patterns, as shown in FIG.
Enable reading of the IFO memory. Each FIFO memory for which reading has been enabled outputs each written phase detection data. In this way, the data output at the same time with the heads aligned absorbs the delay amount generated in the line 5,
It is in the same phase.

The transmitted data is restored by passing the in-phase data through the data serializing section 25. This F
Converting the output data of the IFO memory into serial data is the channel sorting process in steps S5 and S7 in FIG.

When the channel sort processing is completed, it is confirmed that the phase detection processing and the channel sort processing have been completed normally using the confirmation data added subsequent to the phase detection pattern (steps S8 to S11). .

The normality check based on the check data is performed by the data output from the control data generator 15.

The control data generator 15 is means for controlling the generation of confirmation data, bulk completion notification data, and bulk start data. At the time of the bulk sequence, the output of the control data generation unit 15 passes through the signal switching unit 12 and is input to the data division transmission unit 13 and the CRC generation unit 16. The confirmation data is transmitted to the opposing device via the data communication line 51A.

The CRC generator 16 generates a cyclic code (CRC), which will be described later, and transmits it to the opposite device via the bulk monitoring data line 52A. These control data and CRC are transmitted to the receiving unit of the opposing bulk communication device, and are input to the data serializing unit 25 via each BRI interface and FIFO memory. Then C
The CRC check unit 26 performs a CRC check based on the check data and the CRC that are input to the RC check unit 26 and the control data detection unit 27 and transmitted.

The control data detecting section 27 is a functional section for detecting a bulk completion notification pattern and a bulk sequence start pattern. Based on the check result, it is determined whether the bulk sequence has been completed normally. If it is normal, the transmission unit transmits a bulk completion notification pattern after generating the confirmation data. (Step S12 bulk completion notification, step S13 bulk completion notification)

The bulk communication device according to the present invention also constitutes a target circuit with the opposing bulk communication device, performs the same operation as each other, and realizes bidirectional communication.

Next, using the bulk communication apparatus according to the present invention, a method of monitoring a line delay fluctuation fault due to a cause such as instantaneous switching of the line, which is a fault other than an electrical or physical fault in the line 5, will be described. I do.

The transmitting-side bulk communication device 1A shown in FIG.
The communication data BRD input from the DTE interface 11A of the
Is input to The CRC generation unit 16 performs an operation by the following polynomial to generate 6-bit CRC data DCRC.

CRC (x) = X ⁶ + X ² +1

The generated CRC data DCRC is
The data is transmitted to the opposing bulk communication device 1B via the bulk monitoring data line 52A.

On the other hand, the communication data BRD is divided by the data division transmitting section 13 into a speed corresponding to the communication speed of the data communication line 51A, and the BRI interfaces 17A-1 to 17A-1 are divided.
Output to 7A-4. Divided communication data B
The RDs are respectively BRI interfaces 17A-1 to 17A-1
The data is transmitted to the opposing bulk communication device 1B via 7A-4 and the line 5.

The communication data BRD and the communication quality monitoring data DCRC are input to the receiving unit of the opposing receiving-side bulk communication device 1B, and are restored to serial data. At this time, the communication quality monitoring data DCRC is located at the end of the data. The communication data BRD restored to the serial data is input to the DTE interface 11B,
The data is input to the receiving data terminal device 3B via the RI interface 31B.

In this manner, communication data BRD is transmitted from data terminal device 3A to data terminal device 3B to realize communication. Further, the communication quality monitoring data DCRC is separated from the communication data BRD in the data serialization unit 25 and input to the CRC check unit 26.

The CRC check unit 26 performs a CRC check operation based on the input communication data BRD and the communication quality monitoring data DCRC, monitors the result, and monitors the normality of the communication.

As described above, in the transmitting-side bulk communication device 1A, the CRC operation is performed on the serial data before division, and the obtained communication quality monitoring data DCRC is obtained separately from the communication data BRD by the bulk monitoring data line 52. To the opposing receiving-side bulk communication device 1B via the communication device, and the receiving-side bulk communication device 1B performs a CRC check using the communication data BRD and the communication quality monitoring data DCRC, so that a failure due to a variation in delay is caused. Can also be detected. When the delay variation is detected, the recovery operation can be executed by executing the bulk sequence again.

Referring to FIGS. 6 and 7, a description will be given of a process of detecting the occurrence of a change in line delay due to instantaneous interruption switching.

FIG. 6 shows a state of communication data when bulk communication is normally performed. In this state, line 5
In this case, since no trouble occurs, the phase differences t1 and t1 with the communication data arriving at the head via each signal line are not considered.
2, t3 keeps a constant value. Therefore, the phase relation between the lines is preserved, and the communication data B1D1, B2D1, B3D1, BkD1, B from the transmitting side data terminal device 3A are stored.
1D2, B2D2... Are divided on the transmission side and communication data B1D1, B1D2, B1D3.
1, B2D2, B2D3 ..., B3D1, B3D2, B3
Line 5 as D3 ..., BkD1, BkD2, BkD3 ...
Is transmitted, and the difference between the delay amounts of the respective lines is absorbed in the receiving-side bulk communication device 1B, and the communication data B in the correct order is
1D1, B2D1, B3D1, BkD1, B1D2, B
2D2...

A state in which instantaneous interruption switching or the like is performed inside the line 5 during bulk communication in a normal state will be described with reference to FIG. As shown in FIG. 7, the communication data B1 changes from the normal state.
, The amount of delay of the data communication line 51 transmitting the communication data B1D1 increases from the phase difference T3 to the phase difference t3 ′.
, The communication data (B1D1,
B1D2, B1D3) are missing. Communication data (B1D
(1, B1D2, B1D3) is lost and the CRC check is performed on the restored serial data to detect that the communication is not normally performed.

When a communication abnormality is detected, the bulk sequence is performed again as shown in FIG. 8, the delay state of each line is checked, and the changed delay amount (phase difference) is recorded. Resume communication.

The failure detection processing, bulk sequence, and communication restart processing when a failure occurs will be described with reference to FIG.

At the time of normal communication, steps S20 to S20
As in step S29, by performing a CRC check on the communication data between the data terminal device 3A and the data terminal device 3B, it is confirmed that the bulk communication is normally executed.

As shown in step S30, when instantaneous interruption switching occurs in the line 5 and the line delay amount fluctuates,
In the receiving-side bulk communication device 1B, the CRC check result becomes abnormal (step S34). The bulk communication device 1B that has detected the abnormality generates a bulk start pattern (step S36), and sends the bulk start pattern to the transmitting-side bulk communication device 1A (step S37). The transmitting-side bulk communication device 1A that has detected the bulk start pattern (step S38) stops transmitting the communication data, executes the bulk sequence processing of steps S2 to S14 shown in FIG. A normal communication path is secured by storing the changed delay amount of the line again.

When the bulk sequence processing is completed, the bulk communication device 1A and the bulk communication device 1B
From step 40, transmission of communication data is restarted as shown in step S49.

[0081]

As described above, according to the present invention, bulk communication can be realized without depending on the communication protocol used.
In addition, it is possible to detect a change in the amount of line delay due to instantaneous interruption switching within the line, and it is possible to reset a communication path corresponding to each line failure.

[Brief description of the drawings]

FIG. 1 is a system block diagram illustrating a configuration of a bulk communication system according to the present invention.

FIG. 2 is a block diagram illustrating a functional configuration of a transmitting unit of the bulk communication device according to the present invention.

FIG. 3 is a block diagram illustrating a functional configuration of a receiving unit of the bulk communication device according to the present invention.

FIG. 4 is a diagram illustrating a bulk establishment process (bulk sequence) according to the present invention;
FIG.

FIG. 5 is a time chart illustrating an operation state of a FIFO memory of a receiving unit according to the present invention.

FIG. 6 is a view for explaining a phase relationship between data within a line in a normal state in the bulk communication system according to the present invention.

FIG. 7 is a view for explaining a phase relationship between data within a line after occurrence of a hitless switch in the bulk communication system according to the present invention.

FIG. 8 is a sequence diagram illustrating a failure occurrence detection operation according to the present invention.

FIG. 9 is a system block diagram illustrating a configuration of a conventional bulk communication system.

[Explanation of symbols]

 Reference Signs List 1 bulk communication device 3 data terminal device (DTE) 5 line (communication line) 11 DTE interface 12 signal switching unit 13 data division transmission unit 14 phase detection pattern generation unit 15 control data generation unit 16 CRC generation unit 17 BRI interface 21 Phase detection pattern detection unit 22 Delay amount counter 23 FIFO control unit 24 FIFO memory 25 Data serialization unit 26 CRC check unit 27 Control data detection unit 31 PRI interface 51 Data communication line 52 Bulk monitoring data line

 ──────────────────────────────────────────────────続 き Continued on the front page F-term (reference)

Claims (7)

[Claims] A bulk communication device connected to a data terminal device via a high-speed communication line such as a primary group speed interface (PRI) line is arranged opposite to each other, and a plurality of basic group interface (BRI) lines are bundled between them. In a bulk communication device constituting a bulk communication system connected by a bulk communication line and performing bulk communication between opposing bulk communication devices, a plurality of BRI interfaces connected to a data communication line of the bulk communication line; A BRI interface connected to the data line, data division and transmission means for dividing communication data received from the data terminal device according to the communication speed of the bulk communication line, and transmitting the divided data to each BRI interface; A) generating a code and using the cyclic code as a bulk monitoring data line; And a CRC generating means for outputting to a BRI interface connected to the BRI interface. 2. The bulk communication apparatus according to claim 1, further comprising a phase detection pattern generation unit, which outputs a phase detection pattern to the BRI interface during a bulk sequence. 3. A bulk communication device connected to a data terminal device via a high-speed communication line such as a primary group speed interface line is disposed to face each other, and a bulk communication line in which a plurality of basic group interface lines are bundled is connected therebetween. In a bulk communication device constituting a bulk communication system for performing bulk communication between opposing bulk communication devices, a plurality of BRI interfaces connected to a data communication line of the bulk communication line and a bulk monitoring data line are connected. B
An RI interface, a plurality of FIFO (first-in first-out) memories connected to the BRI interface, phase detection pattern detection means for detecting a phase detection pattern from the BRI interface, and the phase detection pattern detection means Outputs a write enable signal that enables writing to the FIFO memory when a pattern is detected, and a read enable signal that enables reading of the FIFO memory when all of the phase detection patterns have been written to the FIFO memory. FIFO control means, data serialization means for aligning and restoring communication data read from the FIFO memory, and communication using the restored communication data and the cyclic code received by the BRI interface connected to the bulk monitoring data line. CRC to confirm data normality Bulk communication apparatus characterized by comprising a Ekku means. 4. A plurality of BRI interfaces connected to a data communication line of the bulk communication line, a BRI interface connected to the bulk monitoring data line, and a communication speed of the bulk communication line received from the data terminal device. And a data division transmitting means for dividing the data and transmitting it to each BRI interface, generating a cyclic code corresponding to the communication data, and outputting the cyclic code to a BRI interface connected to the bulk monitoring data line.
A first bulk communication device connected to the data terminal device via a high-speed communication line such as a primary rate interface line, and a plurality of BRI interfaces connected to the data communication line of the bulk communication line. , A BRI interface connected to the bulk monitoring data line, and a plurality of FIs connected to the BRI interface.
FO memory; phase detection pattern detection means for detecting a phase detection pattern from the BRI interface;
A write enable signal for enabling writing to the FIFO memory when the phase detection pattern detection means detects the phase detection pattern; and a write enable signal for the FIFO memory when all the phase detection patterns have been written to the FIFO memory. FIF that outputs a read enable signal to enable read
O control means, data serializing means for aligning and restoring communication data read from the FIFO memory, and B connected to the restored communication data and bulk monitoring data line.
CRC check means for checking the normality of communication data using the cyclic code received at the RI interface,
A second bulk communication device connected to the data terminal device via a high-speed communication line such as a primary group speed interface line is disposed opposite to the data terminal device, and a bulk communication line in which a plurality of basic group interface lines are bundled is connected therebetween. , A bulk communication system that performs bulk communication between opposing bulk communication devices. 5. The bulk communication system according to claim 4, wherein the first bulk communication device includes a phase detection pattern generation unit, and outputs a phase detection pattern to the BRI interface during a bulk sequence. . 6. The bulk communication control method in a bulk communication system according to claim 4, wherein the normality of the received communication data is confirmed using the cyclic code data corresponding to the communication data to be transmitted, and the normal communication is performed. Determining whether or not communication is being performed. 7. The bulk communication control method for a bulk communication system according to claim 5, wherein the normality of the received communication data is confirmed using cyclic code data corresponding to the communication data to be transmitted, and A bulk communication control method comprising transmitting a phase detection pattern, executing a bulk sequence, and setting up bulk communication again when an abnormality is detected.