JP4609552B2 - Parallel / serial converter for optical transmission, optical transmission system, and electronic device - Google Patents

Description

  The present invention relates to a parallel-serial converter for optical transmission, an optical transmission system, and an electronic device.

  In recent years, with the high definition of LCD (Liquid Crystal Display) of mobile phones, it is required to increase the data transmission speed between the LCD and the application processor. In addition, as mobile phones become thinner, it is required to reduce the number of wires for data transmission. Against this background, serial transmission has begun to be widely used as a data transmission method between the LCD and the application processor in place of conventional parallel transmission. However, in conventional electrical wiring, the reduction in wiring space and electromagnetic radiation (EMI) become prominent, and there is a limit to increasing the transmission speed. In order to solve such problems, an attempt has been made to connect an LCD and an application processor through an optical transmission line such as an optical waveguide and transmit a data signal as an optical signal.

  The optical waveguide has a double structure of a core called a core and a sheath called a clad covering the core, and the refractive index of the core is higher than that of the clad. Thus, the optical signal incident on the core is propagated by repeating total reflection inside the core.

  Here, a schematic configuration of an optical transmission module provided with an optical transmission path will be described below with reference to the drawings. FIG. 18 is a block diagram of a portion to which the light transmission module is applied in a foldable mobile phone incorporating the light transmission module.

  The optical transmission module 100 includes a main control board (master side board) 20 and an application circuit board (slave side board) 30. A CPU 29 is mounted on the main control board 20. The application circuit board 30 includes various applications such as an LCD (Liquid Crystal Display), an LCD driver 39 for driving and controlling the LCD, and a camera module.

  An optical transmission processing unit 2 including a light source driving circuit (light emission driving unit) and a light emitting unit (light emitting element; VCSEL (Vertical Cavity-Surface Emitting Laser)) is connected to the main control board 20. The slave substrate 30 is connected to an optical reception processing unit 3 including a light receiving unit (light receiving element; PD (Photo-Diode)) and a reception (amplifier) IC. An optical transmission line 4 such as an optical fiber or a highly bent optical waveguide connects the optical transmission processing unit 2 and the optical reception processing unit 3 to transmit an optical signal.

  Next, a mechanism of optical transmission in the optical transmission module 100 will be briefly described. First, on the basis of an electrical signal input from the main control board 20 via an interface circuit (hereinafter referred to as I / F circuit) 21, a light emission driving unit (driver) 22 drives light emission of the light emitting unit 33 to emit light. The unit 23 irradiates the light incident surface of the optical transmission line 4 with light. The light irradiated on the light incident surface of the light transmission path 4 is introduced into the light transmission path 4 and emitted from the light exit surface of the light transmission path 4. And the light radiate | emitted from the light-projection surface of the optical transmission path 4 is received by the light-receiving part 31, and after receiving light is detected by the detection circuit 32, it is converted into an electrical signal. The converted electric signal is amplified to a desired value by an amplifying unit (amplifier) 33 and input to, for example, the LCD driver 39 of the application circuit board 30 via the I / F circuit 34.

  By using such an optical transmission module, for example, high-speed and large-capacity data transmission from a main control board mounted in a mobile phone to an application circuit board becomes possible. Thus, the light transmission module is very excellent as a data transmission module.

  However, when the optical transmission module is applied to an existing I / F circuit for electric wiring for mobile phones as in the above configuration, there is a problem that it is difficult to transmit a low-frequency signal due to the characteristics of the optical transmission module. In particular, when the continuous bit length of the transmitted signal is increased, the low frequency characteristics of the transmitted signal are extended. Therefore, there is a problem in introducing an optical transmission line as it is into serial transmission by conventional electric wiring.

For example, in Patent Document 1, in order to prevent bit continuation of a transmission signal (to prevent transmission of a low-frequency signal) in an optical transmission system, a coding unit for encoding an output signal is provided in the CPU 29 and a coding function is added. The configuration is disclosed. As a coding function, 8B10B conversion is generally known. The 8B10B conversion is an algorithm for data transmission encoding that expresses 8-bit information with 10-bit symbols (transmission characters). By this 8B10B conversion, a value of “0” or more does not continue in the transmission signal beyond a certain number.
JP 2001-230678 A (published August 24, 2001)

  However, the CPU 29 to which the coding function is added has a problem that power consumption, size, and cost increase. Therefore, the configuration disclosed in Patent Document 1 cannot be put to practical use.

  In addition, since there are only a few IC commercial products having only a coding function, it is difficult to employ a CPU 29 without a coding function in an optical transmission system. Further, when a commercially available IC having only a coding function is used in an optical transmission system with a CPU 29 that does not add a coding function, a number of problems such as an increase in power consumption of the IC for optical communication, deterioration of signal waveform characteristics, and adjustment of sequence timing There is a problem that it cannot be put to practical use.

  The present invention has been made in view of the above-described problems, and its purpose is to increase the bit even if it is a signal source (CPU) having a simple configuration and no coding function without increasing cost and size. It is to realize a parallel-serial converter for optical transmission, an optical transmission system, and an electronic device that can prevent the continuous.

  In order to solve the above problems, the parallel-serial converter for optical transmission of the present invention includes a plurality of input terminals to which a plurality of binary signals are respectively input in parallel, and the plurality of input binary signals are An optical transmission parallel / serial converter for converting to a serial binary signal and transmitting the serial binary signal to an optical transmission module, wherein the plurality of input terminals have the same value of a predetermined number of bits for the serial binary signal. A bit continuation preventing input terminal for inserting a “1” signal or a “0” signal is assigned so as not to be continuous.

  According to said structure, the input terminal for bit continuation prevention is previously allocated to the several input terminal in which the several binary signal is each input in parallel in the parallel serial converter for optical transmission. The bit continuity preventing input terminal inserts a “1” signal or a “0” signal so that the same value does not continue for a predetermined number of bits with respect to the serial binary signal transmitted to the optical transmission module. It has become. Thereby, according to said structure, the serial binary signal restrict | limits the continuous number of the same bits, and the problem of a continuous bit is solved.

  In the above configuration, the problem of continuous bits is solved only by assigning input terminals for bit continuity prevention to the plurality of input terminals of the parallel-serial converter for optical transmission. Compared to the configuration provided with the, continuous bits can be avoided with a simple configuration without increasing the cost, size, and power consumption.

In the parallel-serial converter for optical transmission of the present invention, when the minimum value of the signal transmission rate of the optical transmission module is fmin and the signal transmission rate of the serial binary signal is R, the predetermined number of bits n is The following formula (1)
n <R / fmin (1)
It is preferable that

  In an optical transmission system, there is a limit to the number of bit continuity prevention input terminals that can be assigned due to the relationship between the number of parallel signals input to the optical transmission parallel serial converter and the number of input terminals of the optical transmission parallel serial converter. There may be. In such a case, by limiting the number of bit continuations n as described above, the number of assigned bit continuation preventing input terminals can be appropriately secured.

  Further, when the number of bit continuity prevention input terminals assigned is relatively large, a signal from the bit continuity prevention input terminal is added to a serial signal necessary for transmission of image data. Then, the signal transmission rate of the optical transmission module increases by this added signal, and as a result, power consumption increases. By limiting the number of bit continuations n as described above, it is possible to prevent an increase in power consumption for the signal from the bit continuation prevention input terminal.

  In the parallel-serial converter for optical transmission according to the present invention, the first bit continuation prevention for inserting the “1” signal so that the value of “0” does not continue for a predetermined number of bits as the input terminal for bit continuation prevention. It is preferable that a second input terminal for preventing bit continuation for inserting a “0” signal is assigned so that a predetermined number of bits do not continue the value of “1”.

  According to the above configuration, as the bit continuity preventing input terminal, the first bit continuity preventing input terminal for inserting a “1” signal so that a value of “0” does not continue for a predetermined number of bits, or Since the second bit continuation preventing input terminal for inserting the “0” signal is assigned so that the value of “1” does not continue for a predetermined number of bits, the cost, size, and power consumption are increased. Therefore, continuous bits can be avoided with a simple configuration.

  In the parallel-serial converter for optical transmission according to the present invention, it is preferable that both the first bit continuity preventing input terminal and the second bit continuity preventing input terminal are assigned.

  According to the above configuration, since both the first bit continuation preventing input terminal and the second bit continuation preventing input terminal are allocated, the serial binary signal transmitted through the optical transmission module is , “0” and “1” values are inserted alternately and periodically. This makes it possible to reduce the number of consecutive bits of the value “0” or “1” of the serial binary signal with the minimum number of input terminals for preventing bit continuity.

  In the parallel-serial converter for optical transmission according to the present invention, in the plurality of input terminals, the first bit continuity preventing input terminal and the second bit continuity preventing input terminal are equally spaced from each other, and It is preferable that they are assigned alternately.

  According to the above configuration, in the plurality of input terminals, the first bit continuation preventing input terminal and the second bit continuation preventing input terminal are equally spaced from each other and are alternately arranged. Since the number of input terminals for bit continuity prevention is limited due to the relationship between the number of input terminals of the parallel serial converter for optical transmission and the number of input binary signals, it is effective. The number of consecutive bits of the value “0” or “1” of the serial binary signal can be reduced.

  In the parallel-serial converter for optical transmission according to the present invention, it is preferable that the first bit continuity preventing input terminal and the second bit continuity preventing input terminal are adjacent to each other.

  According to the above configuration, since the first bit continuation preventing input terminal and the second bit continuation preventing input terminal are adjacent to each other, the serial binary signal transmitted through the optical transmission module is “ A series of values of “0” and “1” is periodically inserted. Therefore, the number of consecutive bits of the “0” value or “1” value of the serial binary signal can be surely reduced.

  In the parallel-serial converter for optical transmission according to the present invention, a power supply voltage is input to the first bit continuity preventing input terminal, and a ground voltage is input to the second bit continuity preventing input terminal. It is preferable that

  According to the above configuration, the power supply voltage is input to the first bit continuity preventing input terminal, and the ground voltage is input to the second bit continuation preventing input terminal. With this configuration, the number of consecutive bits of the value “0” or “1” of the serial binary signal transmitted through the optical transmission module can be reduced.

  The parallel-to-serial converter for optical transmission according to the present invention further includes a power supply terminal and a grounding terminal, and the first bit continuation preventing input terminal is disposed and connected in proximity to the power supply terminal. Preferably, the second bit continuity preventing input terminal is disposed and connected in proximity to the ground terminal.

  According to the above configuration, the power supply terminal and the grounding terminal are further provided, and the first bit continuation preventing input terminal is disposed and connected in proximity to the power supply terminal. Wiring of the first bit continuation prevention input terminal to the power supply terminal on the mounting substrate surface of the transmission parallel / serial converter becomes easy, and input of the power supply voltage is facilitated. According to the above configuration, the second bit continuity preventing input terminal is disposed and connected in proximity to the grounding terminal, so that the second bit continuation preventing input terminal is grounded. Wiring to the terminals is easy and the ground voltage can be easily input.

  In the parallel-serial converter for optical transmission according to the present invention, a terminal to which the binary signal having a value of “0” for most of the period is input is assigned as the second bit continuation preventing input terminal, and most of the terminals are assigned. It is preferable to assign a terminal to which the binary signal having a value of the period “1” is input as the first bit continuity preventing input terminal.

  Depending on the configuration and specifications of the optical transmission system, the binary signal to be transmitted through the optical transmission module may be a binary signal having a value of “0” for most of the period, or a value of “1” for most of the period. There may be a binary signal. According to the above configuration, the terminal to which the binary signal having a value of “0” for most of the period is input is assigned as the second bit continuation preventing input terminal, and the terminal for most of the period “1” is allocated. Since the terminal to which the binary signal as a value is input is assigned as the first input terminal for bit continuity prevention, bit continuity can be reliably prevented.

  In the parallel-serial converter for optical transmission according to the present invention, a data signal input terminal to which a data signal is input is assigned to the plurality of input terminals, and a clock signal is input to the input terminal for preventing bit continuity. It is preferable that

  According to the above configuration, a data signal input terminal to which a data signal is input is assigned to the plurality of input terminals, and a clock signal is input to the bit continuation prevention input terminal. The serial binary signal output from the optical transmission parallel / serial converter becomes a signal in which a value of “0” and a value of “1” are inserted at regular intervals, and bit continuity can be prevented.

  In the parallel-serial converter for optical transmission according to the present invention, the clock signal is preferably slower than the data signal.

  In the parallel-serial converter for optical transmission according to the present invention, it is preferable that the clock signal has a higher speed or the same speed as the data signal.

  According to the above configuration, the serial binary signal output from the optical transmission parallel-serial converter becomes a signal in which the clock signal is inserted into the data signal. That is, for each data signal having a predetermined number of bits, the value “0” and the value “1” are alternately changed to become an inserted signal. By transmitting such a serial binary signal through the optical transmission module, bit continuation of the signal is prevented.

  In the parallel-serial converter for optical transmission according to the present invention, it is preferable that an inverted signal of the clock signal is further input to the plurality of input terminals. This reliably prevents bit continuation of the signal.

  In order to solve the above problems, an optical transmission system of the present invention inputs a plurality of binary signals in parallel, and inputs the plurality of binary signals to convert them into serial binary signals. The optical transmission parallel / serial converter and an optical converter that converts the serial binary signal output from the optical transmission parallel / serial converter into an optical signal, and converted by the optical converter. An optical transmission module that transmits an optical signal via an optical transmission path is provided.

  As a result, an optical transmission system capable of avoiding continuous bits with a simple configuration without increasing cost, size, and power consumption as compared with a configuration having a coding unit as in Patent Document 1 is realized. it can.

  The optical transmission system of the present invention includes a control unit that controls the data signal output from the signal generation unit based on a clock signal output from the signal generation unit, and the signal generation unit includes the data The signal and the clock signal are output as parallel binary signals, and further provided with an electric signal line for transmitting the clock signal from the signal generation unit to the control unit. It is preferable that the clock signal from the electric signal line is input to the bit continuation preventing input terminal.

  With the above configuration, the serial binary signal transmitted through the optical transmission line becomes a signal in which the clock signal is inserted into the data signal, so that continuous bits can be avoided with a simple configuration.

  The optical transmission system of the present invention includes a control unit that controls the data signal output from the signal generation unit based on a clock signal output from the signal generation unit, and the signal generation unit includes the data The signal and the clock signal are output as a parallel binary signal, and the optical transmission module converts at least the clock signal into an optical signal by the optical converter, and transmits the optical signal through the optical transmission line. It is preferable to output to the control unit.

  According to the above configuration, the data generation unit includes the control unit that controls the data signal output from the signal generation unit based on the clock signal output from the signal generation unit, and the signal generation unit includes the data signal. And the clock signal as a parallel binary signal, and the optical transmission module converts at least the clock signal into an optical signal by the optical converter, and transmits the optical signal through an optical transmission line. Since the data is output to the control unit, the serial binary signal transmitted through the optical transmission line is a signal in which a clock signal is inserted into the data signal, and is output to the control unit after parallel conversion. Therefore, according to the above configuration, it is possible to realize an optical transmission system that can reduce electrical signal lines as a medium for transmitting a clock signal.

  In order to solve the above problems, an electronic apparatus according to the present invention includes the above-described optical transmission system.

  Thereby, compared with the structure which provided the code | symbol part like patent document 1, a continuous bit can be avoided, without increasing cost, a size, and power consumption. Furthermore, an optical transmission system using an optical transmission module can be applied to an electronic device with a simple configuration. Further, by applying the optical transmission system of the present invention to an electronic device, it is possible to realize simplification of wiring of a mounting board in the electronic device and space saving inside the electronic device.

  As described above, the parallel-to-serial converter for optical transmission according to the present invention has a “1” signal at the plurality of input terminals so that the same value does not continue for a predetermined number of bits for the serial binary signal. Alternatively, a bit continuation preventing input terminal for inserting a “0” signal is assigned.

  As described above, the optical transmission system of the present invention includes the signal generator that outputs a plurality of binary signals in parallel, and the light that receives the plurality of binary signals and converts them into a serial binary signal. A parallel converter for transmission, and an optical converter for converting a serial binary signal output from the parallel serial converter for optical transmission into an optical signal, and the optical signal converted by the optical converter is converted into an optical signal It is the structure provided with the optical transmission module transmitted through a transmission line.

  As described above, the electronic apparatus according to the present invention has the above-described optical transmission system.

  Therefore, it is possible to avoid consecutive bits without increasing the cost, size, and power consumption as compared with the configuration in which the encoding unit is provided as in Patent Document 1. Furthermore, an optical transmission system using an optical transmission module can be applied to an electronic device with a simple configuration. Further, by applying the optical transmission system of the present invention to an electronic device, it is possible to realize simplification of wiring of a mounting board in the electronic device and space saving inside the electronic device.

  An embodiment of the present invention will be described below with reference to FIGS.

  That is, in the present embodiment, in the foldable mobile phone comprising a main body portion having an operation key, a lid portion having a display screen, and a hinge portion that rotatably connects the lid portion to the main body portion, the main body portion. A configuration in which information (data) transmission between the lid portions is performed via an optical transmission module provided in the hinge portion will be described as an example.

  FIG. 1 is a block diagram showing a schematic configuration of the optical transmission system 1 provided in the folding cellular phone 40 of the present embodiment. FIG. 2A is a perspective view showing an appearance of a foldable mobile phone 40 incorporating the optical transmission module 1 of the present embodiment. FIG. 2B is a perspective plan view of the hinge portion 41 (portion surrounded by a broken line) in FIG.

  As shown in FIGS. 1 and 2 (a) and 2 (b), a foldable mobile phone 40 (hereinafter simply referred to as a mobile phone 40) according to the present embodiment includes a main body 42 and one end of the main body 42. The hinge part 41 is provided on the hinge part 41, and the lid part 43 is provided so as to be rotatable about the hinge part 41 as an axis.

  The main body 42 includes an operation key 44 for operating the mobile phone 40 and a main control board 20 therein. The lid 43 includes a display screen 45 and a camera (not shown) on the outside, and an application circuit board 30 on the inside. A driver 39 and the like are installed.

  In the mobile phone 40 having the above-described configuration, information (data) transmission between the main control board 20 and the application circuit board is performed via the optical transmission module 1.

  As shown in FIG. 1, the main control board 20 on the main body 42 side includes a CPU (signal generation unit) 29 that controls each element (not shown) mounted on the board 20 and serial / parallel conversion. And a serializer 15 as a container. The serializer (P / S converter) 15 converts a parallel signal (hereinafter referred to as a parallel signal) into a serial signal (hereinafter referred to as a serial signal).

  The application circuit board 30 is an LCD (Liquid Crystal Display) (not shown) that displays an image based on image data (binary signal) transferred from the CPU 29, and an LCD driver (control) that drives and controls the LCD. Part) 39 and a deserializer 16 as a serial / parallel converter. The deserializer 16 converts a serial signal into a parallel signal.

(Configuration of optical transmission module)
Next, the configuration of the optical transmission module 1 will be described with reference to FIGS. 1 and 3. FIG. 3 is a block diagram showing a schematic configuration of the optical transmission module 1 in the mobile phone 40 according to the present embodiment.

  As shown in FIGS. 1 and 3, the optical transmission module 1 includes an optical transmission processing unit 2 connected to a main control board 20 on which a CPU 29 is mounted, and an application circuit board 30 on which an application circuit such as an LCD driver 39 is mounted. The optical reception processing unit 3 is connected, and the optical transmission processing unit 2 and the optical transmission path 4 serving as an optical wiring for connecting the optical reception processing units 3 to each other.

  The optical transmission path 4 is a medium that transmits an optical signal as a data signal emitted from the light emitting unit 23 to the light receiving unit 31. Details of the optical transmission line 4 will be described later.

  As shown in FIG. 3, the optical transmission processing unit 2 includes an interface circuit (hereinafter referred to as an I / F circuit) 21, a light emission drive unit (light converter) 22, and a light emission unit 23.

  The I / F circuit 21 is a circuit for receiving signals having different frequency levels from the outside. The I / F circuit 21 is provided between the electrical wiring of an electrical signal input from the outside into the optical transmission module 1 and the light emission driving unit 22.

  The light emission drive unit 22 drives light emission of the light emission unit 23 based on an electrical signal input from the outside into the optical transmission module 1 via the I / F circuit 21. This light emission drive part 22 can be comprised by IC (Integrated Circuit) for light emission drive, for example.

  The light emitting unit 23 emits light based on drive control by the light emission driving unit 22. The light emitting unit 23 can be configured by a light emitting element such as a VCSEL (Vertical Cavity-Surface Emitting Laser). The light emitted from the light emitting unit 23 is applied to the light incident side end of the optical transmission line 4 as an optical signal.

  In this way, the optical transmission processing unit 2 converts the electrical signal input to the optical transmission processing unit 2 into an optical signal corresponding to the electrical signal, and outputs the optical signal to the optical transmission line 4.

  Next, the optical reception processing unit 3 includes a light receiving unit 31, a detection circuit 32, an amplification unit (amplifier) 33, and an I / F circuit 34.

  The light receiving unit 31 receives light as an optical signal emitted from the light emitting side end of the optical transmission path 4 and outputs an electrical signal by photoelectric conversion. The light receiving unit 31 can be configured by a light receiving element such as a PD (Photo-Diode). The detection circuit 32 determines whether the light receiving unit 31 has received an optical signal.

  The amplifying unit 33 amplifies the electric signal output from the light receiving unit 31 and the detection circuit 32 to a desired value and outputs the amplified signal to the outside. The amplifying unit 33 can be configured by an amplification IC, for example.

  The I / F circuit 34 is a circuit for outputting the electric signal amplified by the amplifying unit 33 to the outside of the optical transmission module 1. The I / F circuit 34 is connected to an electric wiring that transmits an electric signal to the outside, and is provided between the amplifying unit 32 and the electric wiring.

  As described above, the optical reception processing unit 3 receives the optical signal output from the optical transmission processing unit 2 through the optical transmission path 4, converts the optical signal into an electrical signal corresponding to the optical signal, and then converts the optical signal to a desired signal value. Amplified and output to the outside.

(Configuration of optical transmission line)
Next, details of the optical transmission line 4 will be described with reference to FIGS. 4 (a) and 4 (b). FIG. 4A shows a side view of the optical transmission line 4. As shown in the figure, the optical transmission line 4 includes a columnar core portion 4α having the optical transmission direction as an axis, and a cladding portion 4β provided so as to surround the core portion 4α. ing. The core part 4α and the cladding part 4β are made of a light-transmitting material, and the refractive index of the core part 4α is higher than the refractive index of the cladding part 4β. As a result, the optical signal incident on the core portion 4α is transmitted in the optical transmission direction by repeating total reflection inside the core portion 4α.

  As a material constituting the core portion 4α and the clad portion 4β, glass, plastic, or the like can be used. However, in order to constitute the optical transmission line 4 having sufficient flexibility, an acrylic or epoxy type material is used. It is preferable to use resin materials such as urethane and silicone. Further, the cladding portion 4β may be composed of a gas such as air. Further, the same effect can be obtained even when the clad 4β is used in a liquid atmosphere having a refractive index smaller than that of the core 4α.

  Next, the mechanism of optical transmission by the optical transmission line 4 will be described with reference to FIG. FIG. 4B schematically shows the state of optical transmission in the optical transmission line 4. As shown in the figure, the optical transmission line 4 is constituted by a columnar member having flexibility. A light incident surface 4A is provided at the light incident side end of the light transmission path 4, and a light output surface 4B is provided at the light output side end.

  The light emitted from the light emitting unit 23 enters the light incident side end of the light transmission path 4 from a direction perpendicular to or substantially perpendicular to the light transmission direction of the light transmission path 4. The incident light is reflected in the light incident surface 4A and introduced into the optical transmission line 4 to travel through the core portion 4α. The light that travels in the light transmission path 4 and reaches the light exit side end is reflected by the light exit surface 4B to be perpendicular or substantially perpendicular to the light transmission direction of the light transmission path 4. Emitted. The emitted light is applied to the light receiving unit 31, and photoelectric conversion is performed in the light receiving unit 31.

  According to such a configuration, it is possible to adopt a configuration in which the light emitting unit 23 as a light source is arranged in a direction perpendicular to or substantially perpendicular to the light transmission direction in the light transmission path 4. Therefore, for example, when it is necessary to arrange the optical transmission path 4 parallel to the substrate surface, light is emitted between the optical transmission path 4 and the substrate surface in the normal direction of the substrate surface. The light emitting unit 23 may be installed. Such a configuration is easier to mount than a configuration in which, for example, the light emitting unit 23 is installed so as to emit light parallel to the substrate surface, and the configuration can be made more compact. This is because the general configuration of the light emitting unit 23 is larger in size in the direction perpendicular to the direction of emitting light than in the direction of emitting light. Furthermore, the present invention can also be applied to a configuration in which a light emitting element for planar mounting having an electrode and a light emitting portion 23 in the same plane is used.

  The optical transmission line 4 shown in the figure has a configuration in which the light incident surface 4A and the light emission surface 4B are inclined as described above. However, both ends of the optical transmission line 4 in this embodiment are light. The configuration may be orthogonal to the transmission direction. That is, the outer shape of the optical transmission line 4 may be formed in a rectangular parallelepiped shape.

(Optical transmission system 100)
Next, information transmission between the main body 42 and the lid 43, that is, between the main control board 20 and the application circuit board 30 will be described with reference to FIGS. 1 and 3 as follows. .

  In the optical transmission system 100 via the optical transmission module 1, data communication of parallel signals (parallel binary signals) is performed by the CPU 29 and the LCD driver 39, and serial signals (serial binary signals) are transmitted through the optical transmission path 4. ) Data communication. Here, as an example of data communication, a case will be described in which the CPU 29 transfers image data to the LCD driver 39 in order to display an image on an LCD (not shown). The CPU 29 outputs an image data signal of an image to be displayed on the LCD as a parallel signal. The image data signal output from the CPU 29 is input to the serializer (light transmission parallel / serial converter) 15.

  The serializer 15 converts the image data signal (data) output from the CPU 29 into a serial signal (serial binary signal) and outputs the serial signal to the optical transmission processing unit 2. The serialized image data signal (data) is input to the light emission drive unit 22 via the I / F circuit 21 of the optical transmission processing unit 2. And the light emission drive part 22 drives the light emission part 23, and the light emission part 23 light-emits. The light emitted from the light emitting unit 23 is transmitted to the optical reception processing unit 3 through the optical transmission path 4.

  The light receiving unit 31 of the optical reception processing unit 3 receives the light of the optical signal of the image data signal (data) transmitted through the optical transmission path 4, converts it into an electrical signal by photoelectric conversion, and converts this electrical signal. Output to the detection circuit 32. Based on this electrical signal, the detection circuit 32 determines whether or not the light receiving unit 31 has received the optical signal, and outputs the electrical signal of the image data signal (data) to the amplifying unit 33. The amplifying unit 33 amplifies the electrical signal of the image data signal (data), and then outputs the amplified signal to the deserializer 16 via the I / F circuit 34.

  The deserializer 16 converts an image data signal (data), which is a serial signal transmitted from the main control board 20 side, into a parallel signal and inputs the parallel signal to the LCD driver 39.

  The optical reception processing unit 3 is not limited to the processing unit that can receive a serial signal as described above. The optical reception processing unit 3 may be one that can only receive a parallel signal. In this case, a configuration including a deserializer that converts a serial signal transmitted via the optical transmission path 4 into a parallel signal inside the optical reception processing unit 3 or outside the optical reception processing unit 3 may be mentioned.

  The LCD driver 39 writes image data based on the image data signal (data), and performs display control of the LCD (not shown). The LCD (not shown) displays an image based on the image data transmitted from the CPU 29 under the control of the LCD driver 39.

  The optical transmission system 100 according to this embodiment is characterized in that a parallel signal output from the CPU 29 is converted into a serial signal via the serializer 15. FIG. 5 is a conceptual diagram showing a signal pattern of a serial signal transmitted through the optical transmission line of the optical transmission module. FIG. 5A shows a serial signal pattern in a conventional optical transmission system, and FIG. These show the serial signal pattern in the optical transmission system 100 of this embodiment.

  “?” Shown in FIG. 5A and FIG. 5B has a value of “0” or “1” depending on the parallel signal input to the serializer 15, and signals of different values are displayed. Entered. Here, when the number of input terminals of the parallel signal input to the serializer 15 is b, an n-bit (n ≧ b) signal pattern is repeated for the serial signal transmitted through the optical transmission path. That is, even when the number of input terminals of the parallel signal is b, depending on the serializer 15, the signal output from the serializer 15 is added with a signal such as a parity check function and becomes n bits.

  As shown in FIG. 5A, in the conventional optical transmission system, the serial signal transmitted through the optical transmission path has a different n-bit signal pattern depending on the input parallel signal. For this reason, depending on the signal pattern, there is a possibility that a continuous bit that the value of “0” or the value of “1” continues indefinitely occurs. In order to solve this problem of continuous bits, for example, in the technique of Patent Document 1, an encoding unit that encodes a serial signal transmitted through an optical transmission line is provided.

  On the other hand, in the optical transmission system 100 of the present embodiment, a bit continuation preventing input terminal (dummy bit) 15 a is assigned to the input terminal of the serializer 15 in advance. Therefore, as shown in FIG. 5B, the serial signal transmitted through the optical transmission line is a sequence of “0” and “1” values (“10”) for each predetermined bit (n bits). Or “01”) is inserted. As a result, the serial signal is limited in the number of consecutive identical bits, and the problem of consecutive bits is solved.

  In the optical transmission system 100, as described above, a series of “0” values and “1” values is assigned in advance for each predetermined bit of the serial signal transmitted through the optical transmission path. Therefore, it is possible to avoid consecutive bits with a simple configuration without increasing the cost, size, and power consumption as compared with the configuration in which the encoding unit is provided as in Patent Document 1.

(Definition of the limit on the number of consecutive bits of serial signals transmitted over an optical transmission line)
The signal transmission of the optical transmission module 1 is limited by the band characteristics of the optical communication IC (IF circuit 21, light emission drive unit 22, detection circuit 32, amplification unit 33, I / F circuit 34) mounted on the module. There is a limit value of the signal transmission rate (hereinafter referred to as a transmittable rate fmin). If the transmission rate is lower than the specification, that is, if the signal transmission rate of the optical transmission module 1 is equal to or lower than the transmittable rate fmin, a problem as shown in FIG. 6 occurs. FIG. 6 is a graph showing the relationship between the signal transmission rate and the error rate in the optical transmission module 1. The waveform diagram shown in the figure shows the waveform of the signal output from the optical reception processing unit 3 of the optical transmission module 1, and the hexagonal region indicates the error rate standard. That is, when the waveform shown in the waveform diagram overlaps the hexagonal region, the error rate specification of the transmission standard is not satisfied and the signal transmission rate is deteriorated. The area indicating the error rate standard is called a mask pattern. Further, the mask pattern is not limited to the hexagon shown in FIG. 6, and can be set as appropriate according to the error rate standard. For example, examples of the mask pattern include a rhombus in addition to the hexagon shown in FIG.

  As shown in the figure, when the signal transmission rate of the optical transmission module 1 is equal to or lower than the transmittable rate fmin, the waveform of the signal output from the optical reception processing unit 3 overlaps the hexagonal region. , Some overlap, and the error rate is rising. On the other hand, when the signal transmission rate is larger than the transmittable rate fmin, the waveform of the signal output from the optical reception processing unit 3 does not overlap the hexagonal region, and satisfies the error rate specification of the transmission standard. The error rate is decreasing.

  In addition, even when the signal transmission rate of the optical transmission module 1 is the same, when a “0” signal or “1” signal is continuously input to the module, a low-frequency signal is input to the module as a result. Will be equivalent. For this reason, even when a “0” signal or a “1” signal is continuously input to the module, the error rate increases.

  In the optical transmission system 100, the number of consecutive bits n of the serial signal transmitted through the optical transmission line 4 is defined based on the transmittable rate fmin. Further, considering the case where the “0” signal or “1” signal is continuously input to the above module, the signal transmission rate f of the optical transmission module is R / n (where R is the serializer 15 The signal transmission rate of the serial signal output from

That is, in the optical transmission system 100, when the minimum value of the signal transmission rate of the optical transmission module 1 is fmin and the signal transmission rate of the serial signal output from the serializer 15 is R, the optical transmission line 4 is transmitted. For serial signals, the number of consecutive bits n is given by the following formula (1)
n <R / fmin (1)
A bit continuation preventing input terminal is assigned to the input terminal portion of the serializer 15 so as to satisfy the above.

Hereinafter, the result of a verification experiment performed on the limit number R / fmin of bit continuations calculated based on the above formula (1) will be described. The conditions of the signal transmission rate R and the transmittable rate fmin in this verification experiment are as follows.
Signal transmission rate R: 450 Mbit / s
Transmission possible rate fmin: 30 Mbit / s (low frequency cut-off frequency: 6 MHz)
Note that the transmittable rate fmin may be specified by the expression of the low-frequency cutoff frequency of the optical transmission module 1 in some cases. The relationship between the transmittable rate fmin and the low frequency cutoff frequency will be described later.

  The limited number of consecutive bits calculated under the conditions of the signal transmission rate R and the transmittable rate fmin is 15 bits. Therefore, it was verified whether or not the error rate specification of the transmission standard is satisfied when the continuous number n of continuous bits is actually smaller than 15 (limit number). The verification result is shown in FIG.

  When a signal having a continuous bit number of 7, 9, 11, 13, 15 is input to the optical transmission module 1, whether or not the waveform of the signal output from the optical reception processing unit 3 satisfies the error rate specification of the transmission standard I verified. As shown in FIG. 7, it can be seen that when a signal having a number of consecutive bits smaller than 13 is input to the optical transmission module 1, the error rate specification of the transmission standard is satisfied and signal transmission by the optical transmission module 1 is established. On the other hand, when a signal having 15 consecutive bits is input to the optical transmission module 1, it can be seen that the error rate specification of the transmission standard is not satisfied and the signal transmission rate is deteriorated.

From the above verification results, the bit continuation number n is expressed by the following formula (1).
n <R / fmin (1)
If it is limited to satisfy the above, it can be seen that the transmission rate error rate specification is satisfied, and signal transmission by the optical transmission module 1 is established.

  In the optical transmission system 100, the number of bit continuity preventing input terminals that can be allocated may be limited due to the relationship between the number of parallel signals output from the CPU 29 and the number of input terminals of the serializer 15. In such a case, by limiting the number of bit continuations n as described above, the number of assigned bit continuation preventing input terminals can be appropriately secured.

  Further, when the number of bit continuity prevention input terminals assigned is relatively large, a signal from the bit continuity prevention input terminal is added to a serial signal necessary for transmission of image data. Then, the signal transmission rate of the optical transmission module 1 increases by the added signal, and as a result, power consumption increases. By limiting the number of bit continuations n as described above, it is possible to prevent an increase in power consumption for the signal from the bit continuation prevention input terminal.

  As described above, the transmittable rate fmin may be specified by the expression of the low-frequency cutoff frequency of the optical transmission module 1 in some cases. Here, the relationship between the transmittable rate fmin and the low-frequency cutoff frequency will be described with reference to FIG. FIG. 8 is a graph showing the frequency characteristics of the gain in the optical transmission module 1 and showing the relationship between the frequency and the gain.

  In the figure, the low-frequency cutoff frequency is a frequency when the gain changes by -3 dB on the low-frequency side compared to a portion where the frequency characteristic is flat (a portion where the frequency characteristic is constant and constant). Defined.

The relationship between the transmittable rate fmin and the low-frequency cutoff frequency of the optical transmission module 1 is expressed by the following equation (2).
Transmission possible rate fmin = low cut-off frequency × m
Here, m is determined by the filter configuration that determines the low-frequency cut-off frequency characteristics in the optical communication IC mounted on the optical transmission module 1.

  When the filter configuration is first order, m≈5, and m is the largest. Many optical communication ICs employ a first-order filter configuration. In such a case, the limit number of consecutive bits is the largest. On the other hand, when the filter configuration is second order, m> 5, and the slope of gain with respect to frequency becomes steep. A small number of optical communication ICs employ a secondary filter configuration.

  Hereinafter, a specific configuration of the bit continuation preventing input terminal assigned to the serializer 15 will be described with reference to FIG.

  As shown in FIG. 1, the input terminal portion of the serializer 15 is provided with a bit continuation preventing input terminal 15a and an input terminal 15b. The input terminal 15 b is connected to the input signal line 18. The input signal line 18 is a signal line for parallel transmission from the CPU 29 to the serializer 15. The bit continuation preventing input terminal 15a is assigned separately from the input terminal 15b. A signal having a voltage level of LOW is always input to the bit continuation preventing input terminal 15a, or a signal having a voltage level of HIGH is always input. Then, it is determined whether the input signal is a “0” signal or a “1” signal according to the voltage level of the signal input to the bit continuation preventing input terminal 15a.

  With such a configuration, for example, when the number of parallel signals input to the serializer 15 is m, the serial signal transmitted through the optical transmission path 4 is “0” signal or “1” for each m bits. The signal becomes a repeated signal, and consecutive bits can be avoided.

  The serial signal transmitted through the optical transmission line 4 is converted into a parallel signal by the deserializer 16. At this time, a signal from the bit continuation preventing input terminal 15 a is input to the terminal 16 a of the deserializer 16. As shown in FIG. 1, the terminal 16 a and the LCD driver 39 are not connected, and a signal from the bit continuation preventing input terminal 15 a is not input to the LCD driver 39.

  Here, the number of input terminals 15 a for preventing bit continuation can be appropriately set according to the number of input terminals 15 b allocated to the input terminal portion of the serializer 15, the design of the optical transmission system 100, and the like.

  In addition, the input terminal portion of the serializer 15 is a first bit continuity preventing input terminal to which a signal having a value of “1” is always input as a bit continuity preventing input terminal 15 a and a value of “0”. Both of the second bit continuation preventing input terminals to which the above signal is input may be assigned. FIG. 9A is a block diagram showing a configuration in which both the first bit continuation preventing input terminal and the second bit continuation preventing input terminal are assigned, and FIG. It is a conceptual diagram which shows a serial signal pattern in case both the input terminal for bit continuation prevention of this and the input terminal for 2nd bit continuation prevention are allocated.

  As shown in FIG. 9A, the input terminal portion of the serializer 15 includes a bit continuity prevention input terminal 151a (first bit continuity prevention input terminal) and a bit continuity prevention input terminal 152a (first). Both of the two consecutive bit prevention input terminals) are assigned. With this configuration, as shown in FIG. 9B, the serial signal transmitted through the optical transmission line 4 is a signal in which a value of “0” and a value of “1” are alternately inserted periodically. Become. As a result, the number of consecutive bits of the value “0” or “1” of the serial signal can be reduced with the minimum number of input terminals for preventing bit continuity.

  In FIG. 9A, the first bit continuity preventing input terminal 151a and the second bit continuity preventing input terminal 152a are adjacent to each other. However, the first bit continuity prevention input terminal 151a and the second bit continuity prevention input terminal 152a are not limited to the configuration of FIG. 9A, and they may be separated from each other.

  When the number of bit continuity prevention input terminals 151a and 152a is limited due to the number of input terminals of the serializer 15 and the number of input parallel signals, the bit continuity prevention input terminals 151a and 152a are It is preferable that they are assigned at equal intervals and alternately. For example, when the number of input terminals of the serializer 15 is 30 and the number of assignable terminals of the bit continuity prevention input terminals 151a and 152a is 3, the bit continuity prevention input terminals 151a and 152a are the first, 11 The th and 21st input terminals are preferably assigned alternately. With such a configuration, it is possible to effectively reduce the number of consecutive bits of the value “0” or “1” of the serial signal.

  Further, if a large number of bit continuity prevention input terminals are allocated, the transmission rate of the serial signal is increased by the allocated amount, resulting in an increase in power consumption. According to the above configuration, it is possible to effectively reduce the number of consecutive bits of the serial signal without excessively assigning the bit continuity preventing input terminals 151a and 152a, thereby preventing an increase in power consumption.

  FIG. 10 is a block diagram showing a specific example of the first bit continuation preventing input terminal and the second bit continuation preventing input terminal.

  As shown in the figure, the bit continuity preventing input terminal 151a is a V (1) terminal to which the power supply voltage (V) is inputted. The bit continuation preventing input terminal 152a is a GND (0) terminal to which a ground voltage is input. In addition, a signal in a range in which the value “1” is recognized is input to the V (1) terminal.

  With such a configuration, for example, when the number of parallel signals input to the serializer 15 is m, the serial signal transmitted through the optical transmission line 4 has a value of “0” or “ The value of 1 ″ becomes a repeated signal, and continuous bits can be avoided.

  Furthermore, since the optical transmission system 100 has a simple configuration in which the GND (0) terminal or the V (1) terminal is assigned to the input terminal portion of the serializer 15, the optical transmission system 100 is less expensive than the configuration in which the encoding unit is provided. The increase in size and power consumption can be eliminated. In addition, serializers that do not include a coding unit (that do not have a coding function) are commercially available, but signal transmission of the optical transmission module 1 with a simple configuration is also possible for such serializers. Can be realized.

  Further, as described above, the serializer 15 may have a configuration in which the GND (0) terminal and the V (1) terminal are allocated to the input terminal portion. Even if the serializer 15 is provided in the CPU 29, it is provided outside the CPU 29. It may be done.

  Further, when assigning a value of “0” and a value of “1” to the serial signal transmitted through the optical transmission line 4, the configuration of the signal line connected to the V (1) terminal or the GND (0) terminal is a floating configuration. Is possible. In this case, the signal from the signal line in the floating configuration is recognized as “0” or “1” by the IC circuit mounted on the serializer 15.

(Modification 1)
In the configuration of the optical transmission system 100 of the present embodiment, another modification of the configuration shown in FIGS. 1 and 8 will be described.

  Depending on the configuration and specifications of the optical transmission system, the binary signal output from the CPU 29 is a binary signal that is a value of “0” or “1” for most of the period (hereinafter referred to as a fixed signal). May exist. That is, the input signal line 18 includes a signal line that outputs a fixed signal to the serializer 15.

  As a modification of the optical transmission system 100, the serializer 15 can be assigned the bit continuation preventing input terminal 151a or 152a in consideration of the fixed signal as described above. FIG. 11A is a block diagram schematically showing the arrangement of signal lines between the CPU 29 and the serializer 15 in the optical transmission system 100 as the first modification.

  As shown in FIG. 11A, a signal line 18 ′ for outputting a fixed signal is arranged in the data input signal line 18. The serializer 15 is provided with a data input terminal 15b 'connected to the signal line 18'. Further, the V (1) terminal and the GND (0) terminal are allocated separately from the data input terminal 15b '.

  FIG. 11B is a conceptual diagram showing a serial signal pattern in the optical transmission system 100 as the first modification. As shown in the figure, when the number of parallel signals input to the serializer 15 is m, a signal from the data input terminal 15b ′ (a fixed signal surrounded by a square in FIG. 10B) is Repeated every m bits. In addition to the signal from the data input terminal 15b ', the signals from the V (1) terminal and the GND (0) terminal are repeated every m bits. In Modification 1, since there are two positions where the “0” signal and “1” signal are inserted in the m bits of the serial signal pattern, bit continuity can be reliably prevented.

  Moreover, in the modification 1, since the fixed signal is utilized among the parallel signals output from CPU29, the continuous bit is prevented (the terminal which inputs a fixed signal is used as a bit continuation prevention terminal). It is possible to secure a small number of bit continuation preventing input terminals assigned to the input terminal portion of the serializer 15. In particular, when the number of assigned bit continuation preventing input terminals is limited due to the relationship between the number of signals output from the CPU 29 and the number of input terminals of the serializer 15, the configuration of Modification 1 is particularly effective.

  Further, if a large number of bit continuity prevention input terminals are allocated, the transmission rate of the serial signal is increased by the allocated amount, resulting in an increase in power consumption. In the first modification, a small number of bit continuation preventing input terminals can be allocated, so that an increase in power consumption can be prevented.

  As the fixed signal, a signal having a value of “0” or a value of “1” for most of the period (the frequency that changes with respect to the data signal output from the CPU 29 is sufficiently long) is used. it can. This fixed signal may be a signal that always has a value of “0” or “1” during transmission of a data signal, or a signal that has a different signal value for each data bit. For example, a control signal (such as a vertical synchronization signal) for controlling a data signal output from the CPU 29 can be used as the fixed signal. Depending on the configuration of the optical transmission system, a chip select signal, an address / data selector input signal, or the like can be used as the fixed signal.

(Assignment of input terminal for bit continuity prevention)
Hereinafter, an example of assignment of the bit continuation preventing input terminal will be described.

  In addition to the input terminal for inputting the parallel signal from the CPU 29, the power supply terminal to which the power supply voltage of the serializer 15 is input and the ground voltage are input to the input port (input terminal assignment portion) of the serializer 15. A grounding terminal is assigned.

  FIG. 12 is a schematic diagram illustrating an example of an input port of the serializer 15. The example shown in this figure is a BGA type (Flip chip) input port. Note that the configuration of the input port of the serializer 15 is not limited to the configuration shown in FIG. For example, an SMD type other than the BGA type can be applied as an input port of the serializer 15.

  “V” shown in the figure indicates the assigned position of the power supply terminal. “G” indicates the assigned position of the grounding terminal. A region C surrounded by a square indicates a region allocated for an input terminal of a signal to be serialized in the configuration of the IC circuit.

  In the serializer 15, it is preferable that the V (1) terminal is assigned to the port A adjacent to the power supply terminal “V”. Further, it is preferable that the GND (0) terminal is assigned to the port B adjacent to the ground terminal “G”. By allocating in this way, the wiring of the V (1) terminal to the power supply terminal “V” on the mounting substrate surface of the serializer 15 is facilitated. In addition, the wiring of the GND (0) terminal to the grounding terminal “G” is facilitated. Thereby, it becomes easy to input the “0” signal and the “1” signal to the serializer 15.

(Modification 2)
In the configuration of the optical transmission system 100 of the present embodiment, another modification of the configuration shown in FIGS. 1 and 8 will be described. FIG. 13 is a block diagram illustrating a configuration of the serializer 15 provided in the optical transmission system according to the second modification.

  As shown in the figure, a data signal and a clock signal are input to the input terminal portion of the serializer 15. Of the data signal and the clock signal, the input terminal 15b is assigned to the data signal input. On the other hand, a bit continuation preventing input terminal 15a is assigned to the clock signal input. The clock signal is a signal in which a value of “0” and a value of “1” are repeated at a constant period, and can be used as a signal input to the bit continuity prevention input terminal 15a. That is, the serial signal output from the serializer 15 becomes a signal in which a “0” signal and a “1” signal are inserted at regular intervals, and bit continuity can be prevented.

  Hereinafter, the optical transmission system 100 including the serializer 15 of Modification 2 will be described. FIG. 14 is a block diagram illustrating a configuration of the optical transmission system 100 according to the second modification.

  As shown in the figure, the optical transmission system 100 includes an electrical transmission path 5 that connects between the CPU 29 and the LCD driver 39. The electric transmission path 5 is a medium that is provided in parallel with the optical transmission path 4 and transmits a clock signal output from the CPU 29. On the other hand, the optical transmission line 4 is a medium for transmitting a data signal output from the CPU 29 as described above.

  In the optical transmission system 100 according to the second modification, the clock signal wiring 18 a branched to the electric transmission path 5 is arranged. A clock signal is input to the bit continuation preventing input terminal 18b of the serializer 15 via the clock signal wiring 18a. Thereby, the serial signal output from the serializer 15 becomes a signal in which the clock signal is inserted. Since such a serial signal is transmitted through the optical transmission line 4, bit continuity can be prevented.

  The configuration shown in FIG. 14 is a configuration in which an input terminal 18b for preventing bit continuation as a dummy bit is provided at the input terminal of the serializer 15, and a clock signal is input to this dummy bit. However, the optical transmission system 100 of the second modification is not limited to this configuration.

  FIG. 15A is a block diagram showing another configuration of the optical transmission system 100 according to the second modification, and FIG. 15B shows a clock signal for transmitting the optical transmission system 100 shown in FIG. 15C is a signal waveform diagram in the case where the speed is lower than that of the data signal, and FIG. 15C shows that the clock signal transmitted through the optical transmission system 100 shown in FIG. FIG. In FIGS. 15B and 15C, a signal transmitted through the optical transmission system 100 is a differential signal.

  As illustrated in FIG. 15A, the serializer 15 converts the image data signal and the clock signal output from the CPU 29 into a serial signal and outputs the serial signal to the optical transmission processing unit 2. The serialized image data signal and clock signal are converted into an optical signal by the optical transmission processing unit 2. Then, the converted optical signal is transmitted to the optical reception processing unit 3 through the optical transmission path 4.

  The optical reception processing unit 3 receives light of the optical signal of the image data signal and the clock signal transmitted through the optical transmission path 4 and converts it into an electrical signal by photoelectric conversion, amplifies the electrical signal, Output to the serializer 16.

  The deserializer 16 converts an image data signal and a clock signal, which are serial signals transmitted from the main control board 20 side, into parallel signals and inputs the parallel signals to the LCD driver 39.

  The signals shown in (I) of FIGS. 15B and 15C are parallel signals output from the CPU 29. Also, the signals shown in (II) of FIGS. 15B and 15C are transmitted between the serializer 15 and the optical transmission processing unit 2 and between the optical reception processing unit 3 and the deserializer 16. Indicates the serial signal to be used. Further, the signals shown in (III) of FIGS. 15B and 15C are parallel signals output from the deserializer 16.

  When the clock signal is slower than the data signal, the serial signal transmitted between the serializer 15 and the optical transmission processing unit 2 is converted into an image data signal as shown in (II) of FIG. A signal into which the clock signal is inserted, that is, a value of “0” and a value of “1” are inserted for each data bit. Then, the value of “0” and the value of “1” to be inserted alternately change every predetermined data bit (every 2 data bits in FIG. 15).

  On the other hand, when the clock signal is high speed (same speed as that of the data signal), as shown in (II) of FIG. 15C, serial transmission between the serializer 15 and the optical transmission processing unit 2 is performed. The signal becomes an inserted signal by alternately changing the value of “0” or “1” for each data bit.

  By transmitting such a serial signal through the optical transmission line 4, bit continuation of the signal is prevented.

  15A to 15C convert the image data signal and the optical signal of the clock signal transmitted through the optical transmission path 4 into parallel signals by the deserializer 16. The LCD driver 39 is input. That is, the electric transmission path 5 for transmitting the clock signal is not required. Therefore, the configuration shown in FIGS. 15A to 15C has an effect that electrical wiring for clock transmission can be reduced as compared with the optical transmission system 100 shown in FIG.

  Further, when the clock signal is high speed (same speed as the data signal), the value of “0” or “1” of the serial signal alternately changes every data bit for every data bit. . For this reason, compared to the case where the clock signal is slower than the data signal, the bit continuation length does not become longer, and bit continuity can be reliably prevented. Furthermore, even if the signal transmission rate characteristic (low-frequency cut-off characteristic) of the optical transmission module 1 is set strictly, the configuration of FIG.

  In the configurations of FIGS. 15A to 15C, the signal transmitted through the optical transmission system 100 is a differential signal. However, the signal transmitted through the optical transmission system 100 is not limited to this type of signal, and the same effect can be obtained even if it is a single-ended signal.

  When the clock signal is slower than the data signal, an input terminal to which an inverted signal of the clock signal is input may be separately assigned to the input terminal portion of the serializer 15. Thereby, the bit continuation length of the serial signal transmitted through the optical transmission line 4 can be reliably reduced. When the clock signal is slower than the data signal, in the optical transmission system 100, the clock signal may be about 30 MHz, for example.

  Furthermore, the serializer 15 and the deserializer 16 may be configured to include a phase synchronization circuit (PLL).

(Application example)
In addition, the optical transmission system 100 of this embodiment can be applied to the following application examples, for example. In the above-described embodiment, an example in which the mobile phone 40 is applied as an application example has been described. However, the present invention is not limited to this, and a foldable PHS (Personal Handyphone System), a foldable PDA (Personal Digital Assistant), The present invention can also be applied to a hinge portion of a foldable electronic device such as a foldable notebook personal computer.

  By applying the optical transmission system 100 to these foldable electronic devices, high-speed and large-capacity communication can be realized in a limited space. Therefore, it is particularly suitable for devices that require high-speed and large-capacity data communication, such as a foldable liquid crystal display device, and are required to be downsized.

  As a further application example, the optical transmission system 100 can also be applied to an apparatus having a drive unit such as a printer head in a printing apparatus (electronic device) or a reading unit in a hard disk recording / reproducing apparatus.

  FIGS. 16A to 16C show an example in which the optical transmission system 100 is applied to the printing apparatus 50. FIG. 16A is a perspective view showing the appearance of the printing apparatus 50. As shown in this figure, the printing apparatus 50 includes a printer head 51 that performs printing on the paper 54 while moving in the width direction of the paper 54, and one end of the light transmission module 1 is connected to the printer head 51. Has been.

  FIG. 16B is a block diagram of a portion of the printing apparatus 50 to which the optical transmission system 100 is applied. As shown in this figure, one end of the optical transmission system 100 is connected to the printer head 51, and the other end is connected to a main body side substrate in the printing apparatus 50. The main body side substrate is provided with control means for controlling the operation of each unit of the printing apparatus 50.

  FIGS. 16C and 16D are perspective views illustrating the curved state of the optical transmission path 4 when the printer head 51 is moved (driven) in the printing apparatus 50. As shown in this figure, when the optical transmission path 4 is applied to a driving unit such as the printer head 51, the bending state of the optical transmission path 4 is changed by driving the printer head 51, and each position of the optical transmission path 4 is changed. Is repeatedly curved.

  Therefore, the optical transmission system 100 according to the present embodiment is suitable for these driving units. Further, by applying the optical transmission system 100 to these drive units, high-speed and large-capacity communication using the drive units can be realized.

  FIG. 17 shows an example in which the optical transmission system 100 is applied to a hard disk recording / reproducing apparatus 60.

  As shown in this figure, the hard disk recording / reproducing apparatus 60 includes a disk (hard disk) 61, a head (reading / writing head) 62, a substrate introducing part 63, a driving part (driving motor) 64, and the optical transmission module 1. Yes.

  The drive unit 64 drives the head 62 along the radial direction of the disk 61. The head 62 reads information recorded on the disk 61 and writes information on the disk 61. The head 62 is connected to the substrate introduction unit 63 via the optical transmission module 1, and propagates information read from the disk 61 to the substrate introduction unit 63 as an optical signal, and propagates from the substrate introduction unit 63. In addition, an optical signal of information to be written on the disk 61 is received.

  Thus, by applying the optical transmission module 1 to a drive unit such as the head 62 in the hard disk recording / reproducing apparatus 60, high-speed and large-capacity communication can be realized.

  The optical transmission system 100 according to the present embodiment can be used for signal transmission between an information terminal such as a video camera and a notebook personal computer and a substrate in addition to the application examples described above.

  The present invention is not limited to the above-described embodiments, and various modifications can be made within the scope shown in the claims, and embodiments obtained by appropriately combining technical means disclosed in the embodiments are also included. It is included in the technical scope of the present invention.

  The present invention can be applied to an optical communication path between various devices, and can also be applied to a flexible optical wiring as an in-device wiring mounted in a small and thin consumer device.

It is a block diagram which shows schematic structure of the optical transmission system provided in the folding portable telephone of this embodiment. (A) is a perspective view which shows the external appearance of the foldable mobile telephone 40 which incorporated the optical transmission module 1 of this embodiment. (B) is a transparent top view of the hinge part (part enclosed with the broken line) in (a). It is a block diagram which shows schematic structure of the optical transmission module in the mobile telephone which concerns on this Embodiment. (A) is a side view of an optical transmission line, and (b) is a perspective view schematically showing a state of optical transmission in the optical transmission line. It is a conceptual diagram which shows the signal pattern of the serial signal which transmits the optical transmission line of an optical transmission module, (a) shows the serial signal pattern in the conventional optical transmission system, (b) is the optical transmission of this embodiment 2 shows a serial signal pattern in the system 100. 5 is a graph showing a relationship between a signal transmission rate and an error rate in an optical transmission module. It is a figure which shows the result of having verified whether the error rate specification of a transmission standard is satisfy | filled when the number of continuous bits of continuous bits is smaller than 15 (limit number). It is the graph which showed the frequency characteristic of the gain in an optical transmission module, and showed the relation between frequency and gain. (A) is a block diagram showing a configuration in which both a first bit continuation prevention input terminal and a second bit continuation prevention input terminal are assigned, and (b) is a first bit continuation prevention. It is a conceptual diagram which shows a serial signal pattern in case both the input terminal for signals and the input terminal for 2nd bit continuation prevention are allocated. It is the block diagram which showed the specific example of the input terminal for 1st bit continuation prevention, and the input terminal for 2nd bit continuation prevention. (A) is the block diagram which showed typically arrangement | positioning of the input signal line between CPU and a serializer in an optical transmission system as the modification 1, (b) is optical transmission as the modification 1. It is a conceptual diagram which shows the serial signal pattern in a system. It is the schematic diagram which showed an example of the input port of a serializer. FIG. 10 is a block diagram illustrating a configuration of a serializer provided in an optical transmission system according to a second modification. FIG. 10 is a block diagram illustrating a configuration of an optical transmission system according to Modification 2. (A) is the block diagram which showed the other structure of the optical transmission system of the modification 2, (b) is a low-speed clock signal which transmits the optical transmission system shown to (a) from a data signal. (C) is a signal waveform diagram when the clock signal transmitted through the optical transmission system 100 shown in (a) is high-speed (same speed as the data signal). (A) is a perspective view which shows the external appearance of the printing apparatus provided with the optical transmission system of this embodiment, (b) is a block diagram which shows the principal part of the printing apparatus shown to (a), (c) and (d) are perspective views showing the curved state of the optical transmission path when the printer head is moved (driven) in the printing apparatus. It is a perspective view which shows the external appearance of the hard disk recording / reproducing apparatus provided with the optical transmission system of this embodiment. It is a block diagram of the part to which the optical transmission module is applied in the foldable mobile phone incorporating the optical transmission module.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Optical transmission module 2 Optical transmission process part 21 I / F circuit 22 Light emission drive part (optical converter)
23 Light Emitting Unit 29 CPU (Signal Generation Unit)
3 Optical reception processing unit 31 Light receiving unit 32 Detection circuit 33 Amplifying unit 34 I / F circuit 4 Optical transmission path 5 Electrical transmission path (electrical signal line)
15 Serializer (Parallel / serial converter for optical transmission)
15a Bit continuous prevention input terminal 15b Data input terminal 16 Deserializer 100 Optical transmission system

Claims (15)

A parallel serial conversion for optical transmission that includes a plurality of input terminals through which a plurality of binary signals are input in parallel, converts the input plurality of binary signals into a serial binary signal, and transmits the serial binary signal to the optical transmission module A vessel,
The multiple input terminals include
A bit continuation preventing input terminal for inserting a “1” signal or a “0” signal is assigned to the serial binary signal so that the same value does not continue for a predetermined number of bits. When the minimum value of the signal transmission rate of the module is fmin and the signal transmission rate of the serial binary signal is R,
The predetermined number of bits n is given by the following formula (1)
n <R / fmin (1)
A parallel-to-serial converter for optical transmission, characterized in that: As the input terminal for bit continuation prevention
A first bit continuation preventing input terminal for inserting a “1” signal so that a value of “0” does not continue for a predetermined number of bits, or
2. The optical transmission according to claim 1, wherein a second bit continuation preventing input terminal for inserting a “0” signal is assigned so that a value of “1” does not continue for a predetermined number of bits. Parallel series converter.   3. The parallel-to-serial converter for optical transmission according to claim 2, wherein both the first bit continuation preventing input terminal and the second bit continuation preventing input terminal are assigned.   In the plurality of input terminals, the first bit continuation preventing input terminal and the second bit continuation preventing input terminal are allocated at equal intervals and alternately. The parallel-serial converter for optical transmission according to claim 3.   4. The parallel / serial converter for optical transmission according to claim 3, wherein the first bit continuation preventing input terminal and the second bit continuation preventing input terminal are adjacent to each other. A power supply voltage is input to the first bit continuation preventing input terminal,
3. The parallel / serial converter for optical transmission according to claim 2, wherein a ground voltage is input to the second bit continuation preventing input terminal. A parallel serial conversion for optical transmission that includes a plurality of input terminals through which a plurality of binary signals are input in parallel, converts the input plurality of binary signals into a serial binary signal, and transmits the serial binary signal to the optical transmission module A vessel,
The multiple input terminals include
A bit continuity preventing input terminal for inserting a “1” signal or a “0” signal is assigned to the serial binary signal so that the same value does not continue for a predetermined number of bits,
As the input terminal for bit continuation prevention
A first bit continuation preventing input terminal for inserting a “1” signal so that a value of “0” does not continue for a predetermined number of bits, or
A second bit continuation preventing input terminal for inserting a “0” signal is assigned so that a value of “1” does not continue for a predetermined number of bits, and
A power supply voltage is input to the first bit continuation preventing input terminal,
A parallel-serial converter for optical transmission, wherein a ground voltage is input to the second bit continuation preventing input terminal. A power terminal and a ground terminal;
The first bit continuation prevention input terminal is disposed and connected in proximity to the power supply terminal,
8. The parallel / serial converter for optical transmission according to claim 7, wherein the second bit continuation preventing input terminal is disposed and connected in proximity to the ground terminal. A terminal to which the binary signal having a value of “0” for most of the period is input is assigned as the second bit continuation preventing input terminal;
3. The parallel series for optical transmission according to claim 2, wherein a terminal to which the binary signal having a value of "1" for most of the period is input is assigned as the first bit continuity preventing input terminal. converter. Provided with a plurality of input terminals to which a plurality of binary signals are respectively input in parallel, converted the plurality of input binary signals into a serial binary signal, and provided with an optical transmission line as wiring in an electronic device A parallel-serial converter for optical transmission that transmits to an optical transmission module,
The multiple input terminals include
For the serial binary signal, a bit continuation preventing input terminal for inserting a “1” signal or a “0” signal so that the same value does not continue for a predetermined number of bits, and data to which a data signal is input Signal input terminal is assigned,
A parallel-to-serial converter for optical transmission, wherein a clock signal is input to the input terminal for bit continuity prevention, and the clock signal is slower than the data signal . Provided with a plurality of input terminals to which a plurality of binary signals are respectively input in parallel, converted the plurality of input binary signals into a serial binary signal, and provided with an optical transmission line as wiring in an electronic device A parallel-serial converter for optical transmission that transmits to an optical transmission module,
The multiple input terminals include
For the serial binary signal, a bit continuation preventing input terminal for inserting a “1” signal or a “0” signal so that the same value does not continue for a predetermined number of bits, and data to which a data signal is input Signal input terminal is assigned,
The aforementioned bit continuous prevention input terminals are input clock signal, the clock signal is parallel-to-serial converter for optical transmission you being a fast or the same speed than the data signal. Provided with a plurality of input terminals to which a plurality of binary signals are respectively input in parallel, converted the plurality of input binary signals into a serial binary signal, and provided with an optical transmission line as wiring in an electronic device A parallel-serial converter for optical transmission that transmits to an optical transmission module,
The multiple input terminals include
For the serial binary signal, a bit continuation preventing input terminal for inserting a “1” signal or a “0” signal so that the same value does not continue for a predetermined number of bits, and data to which a data signal is input Signal input terminal is assigned,
A clock signal is input to the input terminal for preventing bit continuity,
Above the plurality of input terminals, a parallel-serial converter for optical transmission characterized in that the inverted signal of the clock signal is further input. A signal generator for outputting a plurality of binary signals in parallel;
A parallel-to-serial converter for optical transmission that inputs the plurality of binary signals and converts them into serial binary signals;
A light having an optical converter for converting a serial binary signal output from the optical transmission parallel / serial converter into an optical signal, and transmitting the optical signal converted by the optical converter via an optical transmission line An optical transmission system comprising a transmission module,
The parallel-to-serial converter for optical transmission includes a plurality of input terminals to which a plurality of binary signals are respectively input in parallel, and converts the plurality of input binary signals into serial binary signals,
The multiple input terminals include
A bit continuation preventing input terminal for inserting a “1” signal or a “0” signal is assigned to the serial binary signal so that the same value does not continue for a predetermined number of bits, and
A control unit that controls the data signal output from the signal generation unit based on a clock signal output from the signal generation unit;
The signal generation unit outputs the data signal and the clock signal as parallel binary signals,
An electrical signal line for transmitting the clock signal from the signal generator to the controller;
In the optical transmission parallel-serial converter, the clock signal from the electric signal line is input to the bit continuation preventing input terminal. A signal generator for outputting a plurality of binary signals in parallel;
A parallel-to-serial converter for optical transmission that inputs the plurality of binary signals and converts them into serial binary signals;
Light having an optical converter for converting a serial binary signal output from the parallel serial converter for optical transmission into an optical signal, and transmitting the optical signal converted by the optical converter via an optical transmission line An optical transmission system comprising a transmission module,
The parallel-to-serial converter for optical transmission includes a plurality of input terminals to which a plurality of binary signals are respectively input in parallel, and converts the plurality of input binary signals into serial binary signals,
The multiple input terminals include
A bit continuation preventing input terminal for inserting a “1” signal or a “0” signal is assigned to the serial binary signal so that the same value does not continue for a predetermined number of bits, and
A control unit that controls the data signal output from the signal generation unit based on a clock signal output from the signal generation unit;
The signal generator outputs the data signal and the clock signal as parallel binary signals,
The optical transmission module converts at least a clock signal into an optical signal by the optical converter, transmits the optical signal through an optical transmission path, and outputs the optical signal to the control unit. . The electronic device provided with the optical transmission system of Claim 13 or 14.

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