KR20110009176A - Parallel-serial converter for optical transmission, optical transmission system, and electronic apparatus - Google Patents

Abstract

The serializer 15 of the present invention includes a plurality of input terminals 15a and 15b in which a plurality of binary signals are input in parallel, respectively, and converts a plurality of input binary signals into serial binary signals. The "1" signal or "0" is transmitted to the optical transmission module 1 so that the plurality of input terminals 15a and 15b do not have the same number of consecutive bits for the serial binary signal. Since the bit continuous prevention input terminal 15a for inserting a signal is assigned, it is possible to realize the continuous prevention of bits even in a signal source without a coding function with a simple configuration without increasing the cost and size.

Description

PARALLEL-SERIAL CONVERTER FOR OPTICAL TRANSMISSION, OPTICAL TRANSMISSION SYSTEM, AND ELECTRONIC APPARATUS}

The present invention relates to a parallel serial converter for optical transmission, an optical transmission system, and an electronic device.

In recent years, along with the high definition of liquid crystal displays (LCDs) in mobile phones, there is a demand for higher data transfer speeds between LCDs and application processors. In addition, as the number of mobile phones becomes thinner, a reduction in the number of wirings for data transmission is required. Under such a background, as a data transmission method between the LCD and the application processor, serial transmission has begun to be widely used in place of the conventional parallel transmission. However, in the conventional electric wiring, since the space of the wiring and the electromagnetic interference (EMI) are remarkable, there is a limit to the speed of the transmission. Thus, in order to solve such a problem, a method of connecting an LCD and an application processor to an optical transmission path such as an optical waveguide and transmitting a data signal as an optical signal has been attempted.

The optical waveguide has a double structure of a core called a core and a sheath called a clad covering the core, and a refractive index of the core is higher than that of the clad. As a result, the optical signal incident on the core is propagated by repeating total reflection inside the core.

Here, the schematic structure of the optical transmission module provided with an optical transmission path is shown below using drawing. Fig. 18 is a block diagram of a portion to which an optical transmission module is applied in a folding cellular phone incorporating an optical transmission module.

The optical transmission module 100 includes a main control substrate (master side substrate) 20 and an application circuit board (slave side substrate) 30. The CPU 29 is mounted on the main substrate 20. The application circuit board 30 is also equipped with various applications such as an LCD (Liquid Crystal Display), an LCD driver 39 for driving control of the LCD, a camera module, and the like.

The main transmission board 20 is connected to an optical transmission processing unit 2 including a light source driving circuit (light emitting drive unit) and a light emitting unit (light emitting element; VCSEL (Vertical Cavity-Surface Emitting Laser)). The slave side substrate 30 is also connected to a light receiving processing unit 3 including a light receiving unit (light receiving element; PD (Photo-Diode)) and a receiving (amplifier) IC. Then, an optical transmission path 4 such as an optical fiber or a high curved optical waveguide is connected between the optical transmission processing unit 2 and the optical reception processing unit 3 to transmit an optical signal.

Next, the structure of the optical transmission in the optical transmission module 100 will be briefly described. First, the light emission driver (driver) 22 emits light from the light emitting unit 33 based on an electric signal input from the main board 20 through an interface circuit (hereinafter referred to as an I / F circuit) 21. The light emitting unit 23 irradiates light to the light incident surface of the light transmission path 4. The light irradiated onto the light incident surface of the optical transmission path 4 is introduced into the optical transmission path 4 and emitted from the light exit surface of the optical transmission path 4. Then, the light emitted from the light exit surface of the light transmission path 4 is received by the light receiving unit 31, and after the light reception is detected by the detection circuit 32, it is converted into an electric signal. The converted electric signal is amplified to a desired value by the amplifier 33 (amplifier) 33, and is input to, for example, the LCD driver 39 of the application circuit board 30 through the I / F circuit 34. do.

By using such an optical transmission module, for example, high-speed and large-capacity data transmission from a main control board mounted in a mobile phone to an application circuit board is possible. In this way, the optical transmission module is very excellent as a data transmission module.

By the way, when the optical transmission module is applied to the electric wiring I / F circuit for the existing mobile phone as in the above-described configuration, there is a problem that it is difficult to transmit low-frequency signals due to the characteristics of the optical transmission module. In particular, the longer the continuous length of the bits of the transmitted signal increases the low pass characteristics of the transmitted signal. Therefore, there is a problem in introducing the optical transmission path as it is to the conventional serial transmission by electric wiring.

For example, in Patent Document 1, in the optical transmission system, in order to prevent bit continuation of a transmission signal (preventing transmission of low-band signals), the CPU 29 provides a coder for encoding an output signal, and provides a coding function. An additional configuration is disclosed. In addition, 8B10B transform is generally known as a coding function. This 8B10B conversion is an algorithm of data transfer encoding that expresses 8 bits of information in a 10-bit symbol (transmission character). This 8B10B conversion prevents the value of "0" from being continuous for a predetermined number or more in the transmission signal.

However, the CPU 29 to which the coding function is added has a problem in that power consumption, size, and cost increase. Therefore, the structure disclosed by the said patent document 1 cannot be provided practically.

In addition, since IC commercial products having only a coding function are not common, it is difficult to employ a CPU 29 without a coding function in an optical transmission system. In addition, when an IC commercial product having only a coding function is employed in an optical transmission system of a CPU 29 without a coding function, there are a number of problems such as an increase in power consumption of an optical communication IC, deterioration of signal waveform characteristics, and adjustment of sequence timing. Therefore, there is a problem that it cannot be provided for practical use.

Patent Document 1: Japanese Patent Application Laid-Open No. 2001-230678 (published August 24, 2001)

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and its object is to provide an optical transmission that can prevent bit continuity even in a signal generation source (CPU) without a coding function without increasing the cost and size. A parallel-serial converter, an optical transmission system, and an electronic device are provided.

In order to solve the above-mentioned problems, the optical serial-to-parallel converter of the present invention includes a plurality of input terminals to which a plurality of binary signals are input in parallel, respectively, and inputs a plurality of binary signals in series to a binary value. A parallel transmission converter for optical transmission, which is converted into a signal and transmitted to an optical transmission module, wherein the plurality of input terminals have a " 1 " signal or " An input terminal for preventing bit continuation for inserting a 0 "signal is assigned.

According to the above configuration, the bit continuous prevention input terminal is assigned to a plurality of input terminals to which a plurality of binary signals are respectively input in parallel in the parallel transmission converter for optical transmission. This bit continuous prevention input terminal inserts a "1" signal or a "0" signal to a serial binary signal transmitted to the optical transmission module so that the same value does not continue a predetermined number of bits. Thus, according to the above configuration, the serial binary signal is limited in the number of consecutive bits of the same bit, thereby solving the problem of continuous bits.

In addition, in the above-described configuration, since the problem of continuous bits is solved only by allocating input terminals for preventing bit continuation to a plurality of input terminals of an optical serial-to-parallel converter, as in Patent Document 1, the code portion Compared with the configuration in which the system is provided, continuous bits can be avoided with a simple configuration without increasing the cost, size, and power consumption.

In order to solve the above problems, the optical transmission system of the present invention inputs a signal generator that outputs a plurality of binary signals in parallel, and the plurality of binary signals, and converts them into serial binary signals, The above-described optical transmission parallel serial converter and an optical converter for converting a serial binary signal outputted from the optical transmission parallel serial converter into an optical signal, and transmit the optical signal converted by the optical converter through the optical transmission path. An optical transmission module is provided.

Thereby, compared with the structure provided with the code part like patent document 1, the optical transmission system which can avoid continuous bits with a simple structure can be realized, without increasing cost, a size, and power consumption.

In order to solve the said subject, the electronic device of this invention was equipped with the optical transmission system mentioned above. It is characterized by the above-mentioned.

Thereby, compared with the structure provided with the code part like patent document 1, continuous bits can be avoided without increasing cost, size, and power consumption. Furthermore, the optical transmission system by an optical transmission module can be applied to an electronic device with a simple structure. Moreover, by applying the optical transmission system of this invention to an electronic device, the wiring arrangement of the mounting board in an electronic device can be simplified, and the space saving in an electronic device can be realized.

Further objects, features, and advantages of the present invention will be fully understood from the description below.

1 is a block diagram showing a schematic configuration of an optical transmission system provided in the folding cellular phone of the present embodiment.
Fig. 2A is a perspective view showing the appearance of a folding cellular phone 40 incorporating the optical transmission module 1 of the present embodiment. (b) is the perspective plan view of the hinge part (part enclosed by the broken line) in (a).
3 is a block diagram showing a schematic configuration of an optical transmission module in the mobile telephone according to the present embodiment.
Figure 4 (a) is a side view of the optical transmission path, (b) is a perspective view schematically showing the state of the optical transmission in the optical transmission path.
5 is a conceptual diagram showing a signal pattern of a serial signal for transmitting an optical transmission path of an optical transmission module, (a) is a diagram showing a serial signal pattern in a conventional optical transmission system, (b) is an optical transmission system of the present embodiment Diagram showing a serial signal pattern at 100;
6 is a graph showing a relationship between a signal transmission rate and an error rate in the optical transmission module.
Fig. 7 is a diagram showing a result of verifying whether or not the continuous number of consecutive bits satisfies the error rate specification of the transmission standard when it is smaller than 15 (limit number).
8 is a graph showing the frequency characteristics of the gain in the optical transmission module and showing the relationship between the frequency and the gain.
Fig. 9A is a block diagram showing a configuration in which both of the first bit continuous prevention input terminal and the second bit continuous prevention input terminal are assigned; (b) is the first bit continuous prevention input terminal; And a conceptual diagram showing a serial signal pattern in a case where both of the second bit continuous prevention input terminals are allocated.
Fig. 10 is a block diagram showing a specific example of a first bit continuous prevention input terminal and a second bit continuous prevention input terminal.
FIG. 11A is a block diagram schematically showing the arrangement of input signal lines between a CPU and a serializer in an optical transmission system as Modification 1; and (b) a serial signal pattern in the optical transmission system as Modification 1. FIG. Conceptual diagram illustrating the concept.
12 is a schematic diagram showing an example of an input port of a serializer.
FIG. 13 is a block diagram showing a configuration of a serializer included in the optical transmission system of Modification 2. FIG.
14 is a block diagram showing a configuration of an optical transmission system of Modification 2. FIG.
15A is a block diagram showing another configuration of the optical transmission system of Modification 2. FIG. 15B is a signal waveform diagram when the clock signal for transmitting the optical transmission system shown in (a) is slower than the data signal. and (c) are signal waveform diagrams when the clock signal for transmitting the optical transmission system 100 shown in (a) is high speed (constant with the data signal).
(A) is a perspective view which shows the external appearance of the printing apparatus provided with the optical transmission system of this embodiment, (b) is a block diagram which shows the principal part of the printing apparatus shown in (a), (c) and ( d) is a perspective view which shows the curved state of an optical transmission path when the print head is moved (driven) by a printing apparatus.
Fig. 17 is a perspective view showing an appearance of a hard disk recording / reproducing apparatus provided with the optical transmission system of this embodiment.
Fig. 18 is a block diagram of a portion to which an optical transmission module is applied in a folding cellular phone incorporating an optical transmission module.

An embodiment of the present invention will be described below with reference to FIGS. 1 to 17.

That is, in this embodiment, the said main body part is a foldable portable telephone which consists of a main body part provided with an operation key, the cover part provided with a display screen, and the hinge part which rotatably connected the said cover part to the said main body part, The said main body part And a configuration in which information (data) transmission between the lid portions is performed through an optical transmission module provided in the hinge portion.

1 is a block diagram showing a schematic configuration of an optical transmission system 1 provided in the folding portable telephone 40 of the present embodiment. FIG. 2A is a perspective view showing the appearance of a folding cellular phone 40 incorporating the optical transmission module 1 of the present embodiment. FIG. 2B is a perspective plan view of the hinge portion 41 (part enclosed by a broken line) in FIG. 2A.

As shown to FIG. 1 and FIG. 2 (a), (b), the folding portable telephone 40 (henceforth only the mobile telephone 40 hereafter) concerning this embodiment is the main-body part 42 ), A hinge portion 41 provided at one end of the main body portion 42, and a lid portion 43 provided to be rotatable about the hinge portion 41.

The main body 42 has an operation key 44 for operating the mobile phone 40 and has a main controller 20 therein. The cover portion 43 includes a display screen 45 and a camera (not shown) on the outside, and an application circuit board 30 therein. The driver 39 and the like are mounted.

In the mobile telephone 40 having the above-described configuration, information (data) transmission between the main control board 20 and the application circuit board is performed through the optical transmission module 1.

As shown in FIG. 1, the main control board 20 on the main body part 42 side includes a CPU (signal generator) 29 which collectively controls each element (not shown) mounted on the own board 20. And a serializer 15 as a serial / parallel converter. The serializer (P / S converter) 15 converts a parallel (parallel) signal (hereinafter referred to as a parallel signal) to a serial (serial) signal (hereinafter referred to as a serial signal).

The application circuit board 30 includes an LCD (Liquid Crystal Display) (not shown) for displaying an image based on image data (binary signal) transmitted from the CPU 29, and an LCD driver as a driving unit for driving control of the LCD ( Control unit) 39 and a deserializer 16 as a serial / parallel converter. This deserializer 16 converts a serial signal into a parallel signal.

(Configuration of Optical Transmission Module)

Next, the configuration of the optical transmission module 1 will be described with reference to FIGS. 1 and 3. 3 is a block diagram showing the schematic configuration of the optical transmission module 1 in the mobile telephone 40 according to the present embodiment.

As shown in FIG. 1 and FIG. 3, the optical transmission module 1 includes an optical transmission processor 2 connected to a main control board 20 on which the CPU 29 is mounted, and application circuits such as an LCD driver 39. And an optical transmission path (4) comprising an optical reception processing section (3) connected to an application circuit board (30) mounted thereon and an optical wiring connecting the optical transmission processing section (2) and the optical reception processing section (3). Configuration.

The optical transmission path 4 is a medium for transmitting an optical signal as a data signal emitted from the light emitting section 23 to the light receiving section 31. The details of the optical transmission path 4 will be described later.

As shown in FIG. 3, the optical transmission processing unit 2 includes an interface circuit (hereinafter referred to as an I / F circuit) 21, a light emission driver (light converter) 22, and a light emitting unit 23. It is a configuration made by.

The I / F circuit 21 is a circuit for receiving a signal having a different frequency level from the outside. The I / F circuit 21 is provided between the electric wiring of the electric signal input into the optical transmission module 1 from the outside and the light emission driver 22.

The light emission driver 22 drives the light emission of the light emission unit 23 based on an electric signal input into the optical transmission module 1 from the outside through the I / F circuit 21. This light emission drive part 22 can be comprised, for example by IC (Integrated Circuit) for light emission drive.

The light emitting unit 23 emits light based on the drive control by the light emission driving unit 22. This light emitting part 23 can be comprised by light emitting elements, such as a vertical cavity-surface Emitting Laser (VCSEL), for example. Light emitted from the light emitting portion 23 is irradiated to the light incident side end portion of the light transmission path 4 as an optical signal.

In this way, the optical transmission processing unit 2 converts the electrical signal input to the optical transmission processing unit 2 into an optical signal corresponding to the electrical signal, and outputs it to the optical transmission path 4.

Next, the light receiving processing unit 3 is configured to include a light receiving unit 31, a detection circuit 32, an amplifier (amplifier) 33, and an I / F circuit 34.

The light receiving unit 31 receives light as an optical signal emitted from the light output side end of the light transmission path 4 and outputs an electric signal by photoelectric conversion. This light receiving part 31 can be comprised, for example by light receiving elements, such as PD (Photo-Diode). In addition, the detection circuit 32 determines whether the light receiving section 31 has received an optical signal.

The amplifier 33 amplifies the electric signal output from the light receiving unit 31 and the detection circuit 32 to a desired value and outputs it to the outside. This amplifier 33 can be configured by, for example, an IC for amplification.

The I / F circuit 34 is a circuit for outputting the electric signal amplified by the amplifier 33 to the outside of the optical transmission module 1. The I / F circuit 34 is connected to an electric wiring for transmitting an electric signal to the outside, and is provided between the amplifier 32 and this electric wiring.

In this way, the optical reception processing section 3 receives the optical signal output from the optical transmission processing section 2 via the optical transmission path 4, converts the optical signal into an electrical signal corresponding to the optical signal, and then amplifies the signal to a desired signal value. Can be output to the outside.

(Configuration of the optical transmission path)

Next, the detail of the optical transmission path 4 is demonstrated using FIG. 4A and FIG. 4B. 4A shows a side view of the optical transmission path 4. As shown in the figure, the optical transmission path 4 includes a columnar core portion 4α having an optical transmission direction as an axis, and a clad portion 4β provided to surround the core portion 4α. It is in one configuration. The core portion 4α and the cladding portion 4β are made of a light transmitting material, and the refractive index of the core portion 4α is higher than that of the cladding portion 4β. As a result, the optical signal incident on the core portion 4α is transmitted in the light transmission direction by repeating total reflection inside the core portion 4α.

As a material constituting the core portion 4α and the cladding portion 4β, glass, plastic, or the like can be used. However, in order to form the optical transmission path 4 having sufficient flexibility, acrylic, epoxy, urethane, and It is preferable to use resin materials, such as silicone type. In addition, the cladding portion 4β may be made of a gas such as air. The same effect can be obtained even when the cladding portion 4β is used in an atmosphere of a liquid having a smaller refractive index than the core portion 4α.

Next, the structure of the optical transmission by the optical transmission path 4 will be described with reference to Fig. 4B. FIG. 4B schematically shows the state of light transmission in the light transmission path 4. As shown in the same figure, the optical transmission path 4 is comprised by the member of the columnar shape which has flexibility. A light incident surface 4A is provided at the light incident side end of the light transmission path 4, and a light exit surface 4B is provided at the light exit side end.

Light emitted from the light emitting section 23 is incident on the light incident side end of the light transmission path 4 in a direction perpendicular to or substantially perpendicular to the light transmission direction of the light transmission path 4. The incident light is introduced into the optical transmission path 4 by being reflected by the light incident surface 4A and travels in the core portion 4α. Light traveling through the optical transmission path 4 and reaching the light output side end is reflected by the light exit surface 4B and is emitted in a direction perpendicular to or substantially perpendicular to the optical transmission direction of the optical transmission path 4. . The light emitted is irradiated to the light receiving unit 31, and photoelectric conversion is performed by the light receiving unit 31.

According to such a structure, it becomes possible to set it as the structure which arrange | positions the light emission part 23 as a light source in the direction orthogonal to or substantially perpendicular to the optical transmission direction in the optical transmission path 4. Thus, for example, when it is necessary to arrange the light transmission path 4 in parallel with the substrate surface, the light emitting portion (3) emits light between the light transmission path 4 and the substrate surface in the normal direction of the substrate surface. It is good to have 23). Such a configuration is easier to mount and more compact than the configuration in which the light emitting portion 23 is provided so as to emit light in parallel with the substrate surface, for example. This is because the general configuration of the light emitting portion 23 is larger in size in the direction perpendicular to the direction in which light is emitted than in the size in the direction in which light is emitted. The present invention can also be applied to a configuration using a flat mounting light emitting element having an electrode and a light emitting portion 23 in the same plane.

In addition, although the light transmission path 4 shown in the same figure is the structure in which the light incident surface 4A and the light output surface 4B are inclined as mentioned above, the optical transmission path 4 in this embodiment is The cross sections may be perpendicular to the light transmission direction. That is, the external shape of the optical transmission path 4 may be formed in the rectangular parallelepiped shape.

(Optical transmission system 100)

Next, information transmission between the main body part 42 and the cover part 43, that is, between the main control board 20 and the application circuit board 30 will be described with reference to FIGS. 1 and 3. same.

In the optical transmission system 100 via the optical transmission module 1, data communication of parallel signals (parallel binary signals) is performed by the CPU 29 and the LCD driver 39, and the optical transmission path 4 transmits serial data. Data communication of a signal (serial binary signal) is performed. Here, as an example of data communication, the case where the CPU 29 transmits image data to the LCD driver 39 in order to display an image on an LCD (not shown) will be described. The CPU 29 outputs the image data signal of the image displayed on the LCD as a parallel signal. The image data signal output from the CPU 29 is input to the serializer (parallel and serial converter for optical transmission) 15.

The serializer 15 converts the image data signal data output from the CPU 29 into a serial signal (serial binary signal) and outputs it to the optical transmission processing unit 2. The serial signalized image data signal data is input to the light emission driver 22 through the I / F circuit 21 of the optical transmission processor 2. And the light emission part 22 drives the light emission part 23, and the light emission part 23 emits light. The light emitted from the light emitting section 23 is transmitted to the light receiving processing section 3 via the light transmission path 4.

The light receiving unit 31 of the light receiving processing unit 3 receives the light of the optical signal of the image data signal data transmitted through the optical transmission path 4, converts the light into an electric signal by photoelectric conversion, The signal is output to the detection circuit 32. The detection circuit 32 judges whether the light receiving section 31 has received the optical signal on the basis of this electrical signal, and outputs the electrical signal of the image data signal data to the amplifier 33. The amplifier 33 amplifies the electrical signal of the image data signal data and then outputs it to the deserializer 16 via the I / F circuit 34.

The deserializer 16 converts the image data signal data, which is a serial signal transmitted from the main control board 20 side, into a parallel signal and inputs it to the LCD driver 39.

In addition, the light receiving processing section 3 is not limited to the processing section capable of receiving serial signals as described above. The light receiving processing unit 3 may be capable of receiving only a parallel signal. In this case, a configuration including a deserializer for converting a serial signal transmitted through the optical transmission path 4 into a parallel signal in the optical reception processing section 3 or outside the optical reception processing section 3 may be mentioned.

The LCD driver 39 writes image data based on the image data signal data, and performs display control of the LCD (not shown). In addition, the LCD (not shown) displays an image based on the image data transmitted from the CPU 29 under the control of the LCD driver 39.

The optical transmission system 100 in this embodiment is characterized by serial signalization through the serializer 15 of parallel signals output from the CPU 29. FIG. 5 is a conceptual diagram illustrating a signal pattern of a serial signal for transmitting an optical transmission path of an optical transmission module. FIG. 5A illustrates a serial signal pattern in a conventional optical transmission system, and FIG. The serial signal pattern in the optical transmission system 100 of this embodiment is shown.

5 (a) and 5 (b) show a value of "0" or a value of "1" in response to the parallel signal input to the serializer 15, and other values. Signal is input. Here, when the number of input terminals of the parallel signal input to the serializer 15 is b, the signal pattern of n bits (n≥b) is repeated for the serial signal which transmits an optical transmission path. In other words, even when the number of input terminals of the parallel signal is b, the signal output from the serializer 15 is added to the signal output from the serializer 15 by the serializer 15 to be n bits.

As shown in Fig. 5A, in the conventional optical transmission system, a serial signal for transmitting an optical transmission path is repeated with another n-bit signal pattern in response to an input parallel signal. For this reason, there exists a possibility that a continuous pattern in which the value of "0" or the value of "1" may be infinitely continuous may arise with a signal pattern. In order to solve the problem of this continuous bit, for example, in the technique of Patent Document 1, an encoding unit for encoding a serial signal for transmitting an optical transmission path is provided.

On the other hand, in the optical transmission system 100 of this embodiment, the bit continuous prevention input terminal (dummy bit) 15a is previously assigned to the input terminal of the serializer 15. As shown in FIG. Therefore, as shown in Fig. 5B, the serial signal that transmits the optical transmission path is a sequence ("10" or "10" or a value of "0" and a value of "1" for every predetermined bit (n bit). "01") is inserted. As a result, the serial signal is limited in the number of consecutive bits of the same bit, and the problem of continuous bits is solved.

In the optical transmission system 100, as described above, a serial of a value of "0" and a value of "1" is assigned in advance for each predetermined bit to a serial signal for transmitting the optical transmission path. Therefore, compared with the structure provided with the code part like patent document 1, a continuous bit can be avoided with a simple structure, without increasing cost, size, and power consumption.

(Definition of limit number of bit sequence of serial signal to transmit optical path)

The signal transmission of the optical transmission module 1 includes optical communication ICs (IF circuit 21, light emission driver 22, detection circuit 32, amplifier 33, I / F circuit 34) mounted in the module. Is limited by the band characteristic, and there is a limit of the signal transmission rate (hereinafter, referred to as a transmission rate fmin). When the signal transmission rate of the optical transmission module 1 is lower than the transmission rate fmin or less than the transmission rate other than the specification, the abnormality as shown in FIG. 6 arises. 6 is a graph showing the relationship between the signal transmission rate and the error rate in the optical transmission module 1. In addition, the waveform diagram shown in the same figure shows the waveform of the signal output from the optical reception processing part 3 of the optical transmission module 1, and the area | region shown by the hexagon shows the specification of an error rate. That is, when the waveform shown in the waveform diagram overlaps with the hexagonal region, the signal transmission rate is deteriorated without satisfying the error rate specification of the transmission standard. In addition, the area | region which shows the specification of this error rate is said to be a mask pattern. In addition, the mask pattern is not limited to the hexagon shown in FIG. 6, and can be set suitably according to the specification of an error rate. For example, as a mask pattern, a lozenge etc. other than the hexagon shown in FIG. 6 are mentioned.

As shown in the figure, when the signal transmission rate of the optical transmission module 1 is equal to or less than the transmission possible rate fmin, is the waveform of the signal output from the optical reception processing section 3 overlapping with the hexagonal region? It is partially overlapped, and the error rate is rising. On the other hand, when the signal transmission rate is larger than the transmission possible rate fmin, the waveform of the signal output from the optical reception processing section 3 does not overlap the above hexagonal area, and satisfies the error rate specification of the transmission standard. The error rate is decreasing.

Further, even when the signal transmission rate of the optical transmission module 1 is the same, when the "0" signal or the "1" signal is continuously input to the module, as a result, the low-pass signal is input to the module. For this reason, even when a "0" signal or a "1" signal is continuously input to the module, the error rate increases.

In the optical transmission system 100, the number of consecutive bits n of the serial signal for transmitting the optical transmission path 4 is defined based on the transmission possible rate fmin. In addition, considering the case where the "0" signal or the "1" signal is continuously input to the above module, the signal transmission rate f of the optical transmission module is set to R / n (where R is the serializer 15). Signal transmission rate of the serial signal output from

That is, in the optical transmission system 100, when the minimum value of the signal transmission rate of the optical transmission module 1 is fmin and the signal transmission rate of the serial signal output from the serializer 15 is R, the optical transmission path 4 For the serial signal that transmits, the number of consecutive bits (n) is equal to

n <R / fmin... (One)

In order to satisfy the requirement, an input terminal for preventing bit continuation is assigned to an input terminal portion of the serializer 15.

Hereinafter, the result of having performed the verification experiment with respect to the limit number R / fmin of the bit continuation computed based on said Formula (1) is demonstrated. In this verification experiment, the conditions of the signal transmission rate R and the transferable rate fmin are as follows.

Signal transmission rate (R); 450 Mbit / s

Transmittable rate (fmin); 30 Mbit / s (low pass cutoff frequency; 6 MHz)

In addition, the transmittable rate fmin may be specified by the expression of the low cutoff frequency of the optical transmission module 1. The association between the transmittable rate fmin and the low pass cutoff frequency will be described later.

The limit number of bit continuations calculated on the conditions of the signal transmission rate R and the transmission rate fmin is 15 bits. Therefore, it is verified whether or not the number n of consecutive bits actually meets the error rate specification of the transmission standard when it is smaller than 15 (limit number). The verification result is shown in FIG.

When a signal having a continuous number of bits 7, 9, 11, 13, or 15 is input to the optical transmission module 1, it is determined whether or not the waveform of the signal output from the optical reception processing section 3 satisfies the error rate specification of the transmission standard. Verified. As shown in Fig. 7, when a signal having a continuous number of bits smaller than 13 is input to the optical transmission module 1, it is found that the error rate specification of the transmission standard is satisfied and the signal transmission by the optical transmission module 1 is established. Can be. On the other hand, when a signal having 15 consecutive bits is input to the optical transmission module 1, it can be seen that the signal transmission rate is deteriorated without satisfying the error rate specification of the transmission standard.

From the above verification results, the bit continuation number n is represented by the following expression (1).

n <R / fmin... (One)

If it is limited to satisfy, it can be seen that the error rate specification of the transmission standard is satisfied and the signal transmission by the optical transmission module 1 is established.

In the optical transmission system 100, there is a case where there is a limit to the number of bit continuous prevention input terminals that can be allocated in relation to the number of parallel signals output from the CPU 29 and the number of input terminals of the serializer 15. In such a case, by limiting the number of bit continuations n as described above, it is possible to ensure the allocation number of the input terminal for preventing the bit continuity as appropriate.

In addition, when the allocation number of the bit continuous prevention input terminal becomes relatively large, the signal from the bit continuous prevention input terminal is added to the serial signal required for image data transmission. And the signal transmission rate of the optical transmission module 1 increases only by this added signal, and as a result, power consumption increases. By limiting the number of bit continuations n as described above, it is possible to prevent an increase in power consumption of the signal from the input terminal for preventing bit continuation.

As mentioned above, the transmittable rate fmin may be specified by the expression of the low-frequency cutoff frequency of the optical transmission module 1. Here, the relationship between this transmittable rate fmin and the low-frequency cutoff frequency is demonstrated based on FIG. 8 is a graph showing the frequency characteristics of the gain in the optical transmission module 1 and showing the relationship between the frequency and the gain.

In the same figure, the low pass cutoff frequency is defined as the frequency when the gain changes by -3 dB on the low pass side in comparison with the portion where the frequency characteristic is flat (a portion which is not dependent on the frequency and becomes constant).

The relationship between the transmittable rate fmin of the optical transmission module 1 and the low pass cutoff frequency is expressed by the following equation (2).

Transmission possible rate (fmin) = low pass cutoff frequency * m

Here, m is determined by the filter structure which determines the lowpass cutoff frequency characteristic in the optical communication IC mounted in the optical transmission module 1.

When the filter configuration is first order, m ≒ 5 is obtained, and m is largest. In addition, many optical communication ICs employ a primary filter configuration. In this case, the limit of consecutive bits is the largest. On the other hand, when the filter configuration is secondary, m> 5, and the slope of the gain with respect to the frequency becomes steep. In addition, a few optical communication ICs employ a secondary filter configuration.

Hereinafter, the specific structure of the bit continuous prevention input terminal assigned to the serializer 15 is demonstrated based on FIG.

As shown in FIG. 1, the bit terminal prevention input terminal 15a and the input terminal 15b are provided in the input terminal part of the serializer 15. As shown in FIG. The input terminal 15b is connected to the input signal line 18. The input signal line 18 is a signal line for parallel transfer from the CPU 29 to the serializer 15. The bit continuous prevention input terminal 15a is allocated separately from the input terminal 15b. To the bit continuous prevention input terminal 15a, a signal having a low voltage level is always input or a signal having a high voltage level is always input. Then, in accordance with the voltage level of the signal input to the bit continuous prevention input terminal 15a, it is determined whether the input signal is a "0" signal or a "1" signal.

With such a configuration, for example, when the number of parallel signals input to the serializer 15 is m, the serial signal for transmitting the optical transmission path 4 is a "0" signal or a "m" every m bits. The 1 &quot; signal becomes a repeated signal, and consecutive bits can be avoided.

Moreover, the serial signal which transmits the optical transmission path 4 is converted into the parallel signal by the deserializer 16. FIG. At this time, a signal from the input terminal 15a for preventing bit continuous is input to the terminal 16a of the deserializer 16. As shown in FIG. 1, the terminal 16a and the LCD driver 39 are not connected, and the signal from the bit continuous prevention input terminal 15a is not input to the LCD driver 39. As shown in FIG. .

Here, the number of bit continuous prevention input terminals 15a can be appropriately set depending on the number of input terminals 15b assigned to the input terminal portion of the serializer 15, the design of the optical transmission system 100, and the like. .

In addition, the input terminal portion of the serializer 15 is a first bit continuous prevention input terminal to which a signal having a value of "1" is always input as an input terminal 15a for preventing bit continuous, and a value of "0" at all times. Both of the second bit continuous prevention input terminals to which the signal is input may be allocated. FIG. 9A is a block diagram showing a configuration in which both of the first bit continuous prevention input terminal and the second bit continuous prevention input terminal are allocated, and FIG. 9B is the first bit continuous. It is a conceptual diagram which shows the serial signal pattern in the case where both the prevention input terminal and the 2nd bit continuous prevention input terminal are allocated.

As shown in Fig. 9A, the input terminal portion of the serializer 15 includes a bit continuous prevention input terminal 151a (a first bit continuous prevention input terminal) and a bit continuous prevention input terminal 152a. ) (Second bit continuous prevention input terminal) are allocated. With this configuration, as shown in Fig. 9B, the serial signal for transmitting the optical transmission path 4 is a signal in which a value of "0" and a value of "1" are periodically inserted alternately. do. Thereby, the number of consecutive bits of the value of "0" or the value of "1" of a serial signal can be made small by the allocation number of the input terminal for minimum bit continuation prevention.

In FIG. 9A, the first bit continuous prevention input terminal 151a and the second bit continuous prevention input terminal 152a are adjacent to each other. However, the 1st bit continuous prevention input terminal 151a and the 2nd bit continuous prevention input terminal 152a are not limited to the structure of FIG. 9 (a), and both may be separated.

In addition, when the number of assignments of the bit continuous prevention input terminals 151a and 152a is limited in relation to the number of input terminals of the serializer 15 and the number of parallel signals to be input, the bit continuous prevention input terminals 151a 152a) is preferably assigned to be equally spaced from each other and alternately. For example, when the number of input terminals of the serializer 15 is 30 and the number of assignable terminals of the bit continuous prevention input terminals 151a and 152a is three, the bit continuous prevention input terminals 151a and 152a are the first, It is preferable to alternately assign to the 11th and 21st input terminals. With such a configuration, the number of consecutive bits of the value "0" or "1" of the serial signal can be effectively reduced.

In addition, when a large number of input terminals for bit continuation prevention are allocated, the transmission rate of the serial signal increases by the assigned amount, and as a result, power consumption increases. According to the above structure, the number of consecutive bits of the serial signal can be effectively reduced without excessively allocating the bit continuous prevention input terminals 151a and 152a, thereby preventing the increase in power consumption.

FIG. 10 is a block diagram showing a specific example of a first bit continuous prevention input terminal and a second bit continuous prevention input terminal.

As shown in the figure, the bit continuous prevention input terminal 151a is a V (1) terminal to which a power supply voltage V is input. The bit continuous prevention input terminal 152a is a GND (0) terminal to which a ground voltage is input. In addition, a signal of a range in which a value of "1" is recognized is input to the V (1) terminal.

With such a configuration, for example, when the number of parallel signals input to the serializer 15 is m, the serial signal for transmitting the optical transmission path 4 has a value of "0" every m bits, or The value of "1" becomes a repeated signal, and consecutive bits can be avoided.

In addition, since the optical transmission system 100 is a simple configuration in which the GND (0) terminal or the V (1) terminal is assigned to the input terminal portion of the serializer 15, the cost and size are compared with the configuration in which the code section is provided. , And increase in power consumption can be eliminated. In addition, serializers which do not have a code part (with no coding function) are commercially available. However, even with such a serializer, the signal transmission of the optical transmission module 1 can be realized with a simple configuration.

As described above, the serializer 15 may be configured such that the GND (0) terminal and the V (1) terminal are assigned to the input terminal portion, and provided outside the CPU 29 even if the serializer 15 is provided in the CPU 29. You may be.

Furthermore, in assigning the value of "0" and the value of "1" to the serial signal transmitting the optical transmission path 4, the structure of the signal line connected to the V (1) terminal or the GND (0) terminal is floated. It is possible to make a configuration. In this case, the signal on the signal line having the floating configuration is recognized as "0" or "1" by the IC circuit mounted in the serializer 15. FIG.

(Variation 1)

In the structure of the optical transmission system 100 of this embodiment, another modification of the structure shown in FIG. 1 and FIG. 8 is demonstrated.

Depending on the configuration and specifications of the optical transmission system, a binary signal that becomes a value of most of the period "0" or a value of "1" among the parallel signals output from the CPU 29 (hereinafter referred to as a fixed signal). There is a thing that exists. That is, in the input signal line 18, there is a signal line for outputting a fixed signal to the serializer 15.

As a modification of the optical transmission system 100, in consideration of the fixed signal as described above, the serializer 15 may be assigned an input terminal 151a or 152a for preventing bit continuous. FIG. 11A is a block diagram schematically showing the arrangement of signal lines between the CPU 29 and the serializer 15 in the optical transmission system 100 as the first modified example.

As shown in Fig. 11A, in the data input signal line 18, a signal line 18 'for outputting a fixed signal is arranged. The serializer 15 is provided with a data input terminal 15b 'for connection with this signal line 18'. The V (1) terminal and the GND (0) terminal are assigned separately from the data input terminal 15b '.

FIG. 11B is a conceptual diagram illustrating a serial signal pattern in the optical transmission system 100 as Modification Example 1. FIG. As shown in the figure, when the number of parallel signals input to the serializer 15 is m, the signal from the data input terminal 15b '(a fixed signal enclosed in a square in Fig. 10 (b)) is is repeated every m bits. Apart from the signal from the data input terminal 15b ', the signals from the V (1) terminal and the GND (0) terminal are repeated every m bits. In the modification 1, since two positions where the "0" signal and the "1" signal are inserted are present in m bits of the serial signal pattern, it is possible to reliably prevent bit continuation.

In addition, in the modification 1, since the continuous bit is prevented using the fixed signal among the parallel signals output from the CPU 29 (the terminal which inputs a fixed signal is used as a terminal for preventing bit continuous), the serializer ( In the input terminal portion of 15), the number of allocation of the input terminal for preventing bit continuous can be ensured. In particular, the configuration of Modification Example 1 is particularly effective when the number of allocations of the bit continuous prevention input terminals is limited in relation to the number of signals output from the CPU 29 and the number of input terminals of the serializer 15.

In addition, when a large number of input terminals for bit continuation prevention are allocated, the transmission rate of the serial signal increases by the assigned amount, and as a result, power consumption increases. In the modification 1, since the allocation number of the bit continuous prevention input terminals can be ensured, the increase in power consumption can be prevented.

As the fixed signal, a signal having a value of most of the period " 0 " or a value of " 1 " (a frequency sufficiently changing with respect to the data signal output from the CPU 29) can be used. This fixed signal may be a signal that always has a value of "0" or a value of "1" during transmission of the data signal, or a signal having a different signal value for each data bit. For example, a control signal (vertical synchronization signal or the like) for controlling the data signal output from the CPU 29 can be used as the fixed signal. In addition, depending on the configuration of the optical transmission system, a chip select signal, an address / data selector input signal, or the like can be used as the fixed signal.

(About assignment of input terminal for prevention of bit continuation)

An example of the assignment of the input terminal for preventing bit continuation will be described below.

In addition to the input terminal for inputting the parallel signal from the CPU 29, an input terminal for the serializer 15, a power supply terminal to which the power supply voltage of the serializer 15 is input, and a ground voltage are provided. The ground terminal to be input is allocated.

12 is a schematic diagram illustrating an example of an input port of the serializer 15. An example shown in this figure is an input port of a BGA type (Flip chip). In addition, the structure of the input port of the serializer 15 is not limited to the structure shown in FIG. For example, in addition to the BGA type, even the SMD type is applicable as an input port of the serializer 15.

"V" shown in the same figure shows the assignment position of the terminal for a power supply. In addition, "G" shows the assignment position of the grounding terminal. In addition, the area C enclosed by the square indicates an area allocated for the input terminal of the signal to be serialized due to the configuration of the IC circuit.

In the serializer 15, it is preferable that the terminal V (1) is assigned to the port A adjacent to the power supply terminal "V". In addition, it is preferable that the GND (0) terminal is assigned to the port B adjacent to the grounding terminal "G". By assigning in this way, wiring arrangement to the power supply terminal "V" of the V (1) terminal in the mounting board surface of the serializer 15 becomes easy. In addition, the wiring arrangement to the grounding terminal "G" of the GND (0) terminal becomes easy. This makes it easy to input the "0" signal and the "1" signal to the serializer 15.

(Variation 2)

In the structure of the optical transmission system 100 of this embodiment, another modification of the structure shown in FIG. 1 and FIG. 8 is demonstrated. FIG. 13 is a block diagram showing the configuration of the serializer 15 included in the optical transmission system of the second modification.

As shown in the figure, a data signal and a clock signal are input to an input terminal portion of the serializer 15. The input terminal 15b is assigned to the data signal input among the data signal and the clock signal. On the other hand, an input terminal 15a for preventing bit continuous is allocated to the clock signal input. The clock signal is a signal in which a value of "0" and a value of "1" are repeated at a constant cycle and can be used as a signal input to the bit continuous prevention input terminal 15a. That is, the serial signal output from the serializer 15 becomes a signal into which the "0" signal and the "1" signal are inserted at regular intervals, and bit continuity can be prevented.

Hereinafter, the optical transmission system 100 provided with the serializer 15 of the modification 2 is demonstrated. 14 is a block diagram showing the configuration of the optical transmission system 100 of the second modification.

As shown in the figure, the optical transmission system 100 includes an electric transmission path 5 for connecting between the CPU 29 and the LCD driver 39. The electric transmission path 5 is provided in parallel with the optical transmission path 4 and is a medium for transmitting the clock signal output from the CPU 29. On the other hand, the optical transmission path 4 is a medium for transmitting the data signal output from the CPU 29 as described above.

In the optical transmission system 100 of the modification 2, the clock signal wiring 18a branched to the electrical transmission path 5 is arrange | positioned. The clock signal is input to the bit continuous prevention input terminal 18b of the serializer 15 via this clock signal wire 18a. As a result, the serial signal output from the serializer 15 becomes a signal into which the clock signal is inserted. And since such a serial signal transmits the optical transmission path 4, bit continuation can be prevented.

In the configuration shown in Fig. 14, an input terminal 18b for preventing bit continuous as a dummy bit is provided at an input terminal of the serializer 15, and a clock signal is input to the dummy bit. However, the optical transmission system 100 of the modification 2 is not limited to this structure.

FIG. 15A is a block diagram showing another configuration of the optical transmission system 100 of Modification Example 2, and FIG. 15B is a diagram for transmitting the optical transmission system 100 shown in FIG. FIG. 15C is a signal waveform diagram when the clock signal is slower than the data signal, and FIG. 15C is a high speed clock signal for transmitting the optical transmission system 100 shown in FIG. ) Is the waveform diagram of the signal. In addition, in FIG.15 (b) (c), the signal which transmits the optical transmission system 100 is made into the differential signal.

As shown in Fig. 15A, the serializer 15 converts the image data signal and the clock signal output from the CPU 29 into serial signals, and outputs them to the optical transmission processing unit 2. The serial signalized image data signal and clock signal are converted into an optical signal by the optical transmission processing unit 2. The converted optical signal is transmitted to the optical reception processing section 3 via the optical transmission path 4.

The light receiving processing unit 3 receives the light of the optical signal of the image data signal and the clock signal transmitted through the optical transmission path 4, converts it into an electrical signal by photoelectric conversion, amplifies the electrical signal, Output to the deserializer 16.

The deserializer 16 converts the image data signal and the clock signal, which are serial signals transmitted from the main control board 20 side, into parallel signals and inputs them to the LCD driver 39.

The signal shown to (I) of FIG.15 (b) (c) shows the parallel signal output from CPU29. In addition, the signal shown to (II) of FIG.15 (b) (c) is between the serializer 15 and the optical transmission processing part 2, and the signals of the optical reception processing part 3 and the deserializer 16. Represents a serial signal to transmit between. In addition, the signal shown to (III) of FIG.15 (b) (c) shows the parallel signal output from the deserializer 16. As shown in FIG.

When the clock signal is slower than the data signal, as shown in FIG. 15B, the serial signal transmitted between the serializer 15 and the optical transmission processing unit 2 is an image data signal. The signal into which the clock signal is inserted into, i.e., each of the value of "0" and the value of "1" is inserted for every one data bit. The inserted " 0 " and " 1 " values alternately change for every predetermined data bit (every 2 data bits in FIG. 15).

On the other hand, when the clock signal is high speed (constant with the data signal), as shown in (II) of FIG. 15 (c), the serial to transfer between the serializer 15 and the optical transmission processing unit 2 is shown. The signal is an inserted signal in which a value of "0" or a value of "1" is alternately changed for every one data bit.

This serial signal transmits the optical transmission path 4, whereby bit continuation of the signal is prevented.

In addition, the structure shown to Fig.15 (a)-(c) converts the optical signal of the image data signal and the clock signal transmitted through the optical transmission path 4 into the parallel signal by the deserializer 16, The LCD driver 39 is configured to input. That is, the structure does not require the electric transmission path 5 which transmits a clock signal. Therefore, the configuration shown in Figs. 15A to 15C has the effect that the electrical wiring for the clock transmission can be reduced as compared with the optical transmission system 100 shown in Fig.14.

In addition, when the clock signal is high speed (same as the data signal), the serial signal alternately changes the value of "0" or the value of "1" for every one data bit for every one data bit. For this reason, compared with the case where the clock signal is slower than the data signal, the bit continuation length does not become long and it is possible to reliably prevent the bit continuation. Furthermore, even if the signal transmission rate characteristic (low pass cutoff characteristic) of the optical transmission module 1 is set strictly, the structure of FIG. 15C becomes compatible.

In the configuration of FIGS. 15A to 15C, a signal for transmitting the optical transmission system 100 is used as a differential signal. However, the signal for transmitting the optical transmission system 100 is not limited to this kind of signal, and even a single-ended signal has the same effect.

In addition, when the clock signal is slower than the data signal, an input terminal to which the inverted signal of the clock signal is input may be separately allocated to the input terminal portion of the serializer 15. Thereby, the bit continuous length of the serial signal which transmits the optical transmission path 4 can be reduced reliably. When the clock signal is slower than the data signal, the clock signal in the optical transmission system 100 may be, for example, about 30 MHz.

In addition, the serializer 15 and the deserializer 16 may be configured to include a phase synchronization circuit PLL.

(Application)

In addition, the optical transmission system 100 of this embodiment can be applied to the following application examples, for example. In the above-described embodiment, the present invention has been described using an example applied to the mobile telephone 40. However, the present invention is not limited to this, but is not limited to a folding personal handyphone system (PHS), a personal digital assistant (PDA), and a folding type. The present invention can also be applied to a hinge portion of a folding electronic device such as a notebook personal computer.

By applying the optical transmission system 100 to these folding electronic devices, it is possible to realize high speed and large capacity communication in a limited space. Therefore, for example, it is especially suitable for the apparatus which requires high-speed, large-capacity data communication, such as a folding liquid crystal display device, and requires downsizing.

As another application example, the optical transmission system 100 can be applied to a device having a drive unit, such as a printer head in a printing apparatus (electronic device) or a reading unit in a hard disk recording / reproducing apparatus.

16A to 16C show an example in which the optical transmission system 100 is applied to the printing apparatus 50. FIG. 16A is a perspective view illustrating the appearance of the printing apparatus 50. As shown in this figure, the printing apparatus 50 is provided with the printer head 51 which prints with respect to the paper 54, moving in the width direction of the paper 54, and this printer head 51 One end of the optical transmission module 1 is connected.

FIG. 16B is a block diagram of a portion of the printing apparatus 50 to which the optical transmission system 100 is applied. As shown in this figure, one end of the optical transmission system 100 is connected to the printer head 51, and the other end is connected to the main body side substrate in the printing apparatus 50. As shown in FIG. Moreover, the main body side board is provided with control means etc. which control the operation | movement of each part of the printing apparatus 50. FIG.

16C and 16D are perspective views illustrating the curved state of the optical transmission path 4 when the print head 51 moves (drives) in the printing apparatus 50. As shown in this figure, when the optical transmission path 4 is applied to a driving unit such as the print head 51, the curved state of the optical transmission path 4 is changed by the driving of the printer head 51 and the optical transmission is performed. Each position of the furnace 4 is repeatedly curved.

Therefore, the optical transmission system 100 which concerns on this embodiment is suitable for these drive parts. In addition, by applying the optical transmission system 100 to these drive units, high-speed, high-capacity communication using the drive units can be realized.

17 shows an example in which the optical transmission system 100 is applied to the hard disk recording / reproducing apparatus 60.

As shown in this figure, the hard disk recording / reproducing apparatus 60 includes a disk (hard disk) 61, a head (reading and recording head) 62, a substrate introducing portion 63, a driving portion (driving motor). 64, the optical transmission module 1 is provided.

The drive unit 64 drives the head 62 along the radial direction of the disk 61. The head 62 reads the information recorded on the disk 61 and records the information on the disk 61. In addition, the head 62 is connected to the substrate introduction portion 63 via the optical transmission module 1, and propagates the information read out from the disk 61 to the substrate introduction portion 63 as an optical signal, and further, the substrate introduction portion. The optical signal of the information recorded on the disk 61 propagated from 63 is received.

In this way, by applying the optical transmission module 1 to a drive unit such as the head 62 in the hard disk recording and reproducing apparatus 60, high speed and large capacity communication can be realized.

The optical transmission system 100 of this embodiment can be used also for signal transmission between information terminals, such as a video camera and a notebook personal computer, and a board | substrate in addition to the said application example.

As described above, the parallel-to-serial converter for optical transmission of the present invention has a "1" signal or a "0" signal so that the same value does not continue a predetermined number of bits with respect to the series of binary signals in the plurality of input terminals. It is a configuration in which an input terminal for preventing bit continuation is inserted.

As described above, the optical transmission system of the present invention includes a signal generator that outputs a plurality of binary signals in parallel, and the optical transmission parallel that inputs the plurality of binary signals and converts them into serial binary signals. And an optical converter for converting a serial binary signal output from the parallel serial converter for optical transmission into an optical signal, and an optical transmission module for transmitting the optical signal converted by the optical converter through an optical transmission path. One configuration.

As described above, the electronic device of the present invention is provided with the optical transmission system.

Therefore, compared with the structure provided with the code | symbol part like patent document 1, a continuous bit can be avoided without increasing cost, a size, and power consumption. Furthermore, the optical transmission system by an optical transmission module can be applied to an electronic device with a simple structure. Moreover, by applying the optical transmission system of this invention to an electronic device, the wiring arrangement of the mounting board in an electronic device can be simplified, and the space saving in an electronic device can be realized.

In the parallel serial converter for optical transmission of the present invention, when the minimum value of the signal transmission rate of the optical transmission module is fmin and the signal transmission rate of the serial binary signal is R, the predetermined number of bits n is Formula (1)

n <R / fmin... (One)

It is desirable to meet.

In the optical transmission system, there is a case in which the number of input terminals for bit continuation prevention that can be allocated is limited in relation to the number of parallel signals input to the parallel transmission converter for optical transmission and the number of input terminals of the parallel transmission converter for optical transmission. In such a case, by limiting the number of bit continuations n as described above, it is possible to ensure the allocation number of the input terminal for preventing the bit continuity as appropriate.

In addition, when the allocation number of the bit continuous prevention input terminal becomes comparatively large, the signal from the bit continuous prevention input terminal is added to the serial signal required for image data transmission. By this added signal, the signal transmission rate of the optical transmission module increases, and as a result, power consumption increases. By limiting the number of bit continuations n as described above, it is possible to prevent an increase in power consumption of the signal from the input terminal for preventing bit continuation.

In the parallel serial converter for optical transmission of the present invention, the bit continuous prevention input terminal is a first bit continuous prevention input terminal for inserting a "1" signal so that a value of "0" does not continue a predetermined number of bits, or It is preferable that a second bit continuous prevention input terminal for inserting a "0" signal is allocated so that the value of "1" does not continue the predetermined number of bits.

According to the above arrangement, the bit continuous prevention input terminal is a first bit continuous prevention input terminal for inserting a "1" signal so that the value of "0" does not continue a predetermined number of bits, or "1". Since a second bit continuous prevention input terminal for inserting a " 0 " signal is assigned so that the value does not continue a predetermined number of bits, the continuous bits can be continuously configured with a simple configuration without increasing the cost, size, and power consumption. Can be avoided.

In the parallel-to-serial converter for optical transmission of the present invention, it is preferable that both the first bit continuous prevention input terminal and the second bit continuous prevention input terminal are assigned.

According to the above arrangement, since both of the first bit continuous prevention input terminal and the second bit continuous prevention input terminal are allocated, the serial binary signal for transmitting the optical transmission module is set to "0". The value and the value of "1" are alternately inserted signals periodically. This makes it possible to reduce the number of consecutive bits of the value "0" or "1" of the binary signal in series with the minimum number of allocations of the input terminal for preventing bit continuation.

In the parallel serial converter for optical transmission of the present invention, the first bit continuous prevention input terminal and the second bit continuous prevention input terminal are assigned to be equally spaced from each other and alternately at the plurality of input terminals. It is desirable to have.

According to the above configuration, in the plurality of input terminals, the first bit continuous prevention input terminal and the second bit continuous prevention input terminal are assigned to be equally spaced and alternate with each other. In relation to the number of input terminals of the parallel-to-serial converter for optical transmission and the number of input binary signals, when the number of allocations of the input terminals for preventing bit continuity is limited, the value of "0" of the serial binary signals effectively or The number of consecutive bits of the value "1" can be made small.

In the parallel-to-serial converter for optical transmission of the present invention, it is preferable that the first bit continuous prevention input terminal and the second bit continuous prevention input terminal are adjacent to each other.

According to the above configuration, since the first terminal for preventing the bit continuation and the input terminal for the second bit continuation prevention are adjacent to each other, the serial binary signal for transmitting the optical transmission module has a value of " 0 " A continuation of the value of "1" becomes a signal inserted periodically. Therefore, it is possible to reliably reduce the number of consecutive bits of the value "0" or the value "1" of the serial binary signal.

In the parallel serial converter for optical transmission of the present invention, it is preferable that a power supply voltage is input to the first bit continuous prevention input terminal, and a ground voltage is input to the second bit continuous prevention input terminal.

According to the above configuration, the power transmission voltage is input to the first bit continuous prevention input terminal, and the ground voltage is input to the second bit continuous prevention input terminal. The number of consecutive bits of a value of "0" or a value of "1" of a serial binary signal can be reduced.

In the parallel-to-serial converter for optical transmission of the present invention, a terminal for power supply and a terminal for grounding are further provided, and the first bit continuous prevention input terminal is arranged in close proximity to the power supply terminal and connected to the second bit. It is preferable that the continuous prevention input terminal is arrange | positioned adjacent to the said grounding terminal, and is connected.

According to the above structure, the terminal for power supply and the terminal for grounding are further provided, and since the said 1st bit continuous prevention input terminal is arrange | positioned adjacent to the said power supply terminal, and is connected, the board of the parallel serial converter for optical transmission From the surface, the wiring arrangement of the first bit continuous prevention input terminal to the power supply terminal becomes easy, and the input of the power supply voltage becomes easy. According to the above configuration, since the second bit continuous prevention input terminal is arranged in close proximity to the ground terminal and is connected, the wiring arrangement to the ground terminal of the second bit continuous prevention input terminal is arranged. It becomes easy, and input of a ground voltage becomes easy.

In the parallel-to-serial converter for optical transmission of the present invention, a terminal to which the binary signal, which is the value of most period "0", is inputted as the second bit continuous prevention input terminal, and the terminal of most period "1" is assigned. It is preferable to assign the terminal into which the binary signal as a value is input as the first terminal for preventing the continuous bit operation.

According to the configuration and specifications of the optical transmission system, among the binary signals to which the optical transmission module is to be transmitted, the binary signal which is the value of most period "0" or the binary signal which is the value of most period "1" is There is something that exists. According to the above arrangement, the terminal to which the binary signal, which is the value of most period "0", is inputted as the second bit continuous prevention input terminal, and the value which is the value of most period "1". Since the terminal into which the binary signal is input is assigned as the input terminal for preventing the first bit continuous, the bit continuous can be reliably prevented.

In the parallel serial converter for optical transmission of the present invention, it is preferable that a data signal input terminal to which a data signal is input is assigned to the plurality of input terminals, and a clock signal is input to the input terminal for preventing bit continuous.

According to the above configuration, since the data signal input terminal to which the data signal is input is assigned to the plurality of input terminals, and the clock signal is input to the bit continuous prevention input terminal, the output from the parallel serial converter for optical transmission. One serial binary signal becomes a signal in which a value of "0" and a value of "1" are inserted at regular intervals, thereby preventing bit continuation.

In the parallel serial converter for optical transmission of the present invention, it is preferable that the clock signal is slower than the data signal.

In the parallel-to-serial converter for optical transmission of the present invention, it is preferable that the clock signal is higher speed or the same speed as the data signal.

According to the above configuration, the serial binary signal outputted from the parallel serial converter for optical transmission becomes a signal in which a clock signal is inserted into the data signal. That is, the value of "0" and the value of "1" are alternately changed for each data signal of a predetermined number of bits, resulting in an inserted signal. This serial binary signal transmits the optical transmission module, whereby bit continuation of the signal is prevented.

In the parallel serial converter for optical transmission of the present invention, it is preferable that an inverted signal of the clock signal is further input to the plurality of input terminals. This reliably prevents bit continuation of the signal.

In the optical transmission system of the present invention, there is provided a control unit for controlling the data signal output from the signal generator based on a clock signal output from the signal generator, wherein the signal generator includes the data signal and the clock signal. And an electrical signal line for outputting a parallel binary signal and transmitting the clock signal from the signal generator to the control unit. The parallel serial converter for optical transmission includes the clock signal from the electrical signal line. It is preferable that it is input to the said input terminal for bit continuous prevention.

According to the above configuration, since the serial binary signal for transmitting the optical transmission path becomes a signal in which a clock signal is inserted into the data signal, continuous bits can be avoided with a simple configuration.

In the optical transmission system of the present invention, there is provided a control unit for controlling the data signal output from the signal generator based on a clock signal output from the signal generator, wherein the signal generator includes the data signal and the clock signal. Is output as a parallel binary signal, and the optical transmission module converts at least a clock signal into an optical signal by the optical converter, transmits the optical signal through an optical transmission path, and outputs the optical signal to the controller. desirable.

According to the above configuration, a control unit for controlling the data signal output from the signal generation unit based on a clock signal output from the signal generation unit is provided, and the signal generation unit provides the data signal and the clock signal. And output as parallel binary signals, and the optical transmission module converts at least a clock signal into an optical signal by the optical converter, transmits the optical signal through the optical transmission path, and outputs the optical signal to the controller. The serial binary signal for transmitting the optical transmission path becomes a signal in which a clock signal is inserted into the data signal, and is output to the control unit after parallel conversion. Therefore, according to the above structure, it is possible to realize an optical transmission system capable of reducing an electric signal line as a medium for transmitting a clock signal.

In addition, specific embodiments or examples made in the best mode for carrying out the invention are intended to clarify the technical contents of the present invention to the last, and should be interpreted in consultation with only such specific examples. Rather than within the spirit of the present invention and the claims described below, embodiments obtained by appropriately combining the technical means disclosed in the other embodiments are also included in the technical scope of the present invention.

[Industrial Availability]

The present invention can be applied to optical communication paths between various devices, and also to flexible optical wiring as in-device wiring mounted in small, thin consumer devices.

1: optical transmission module
2: optical transmission processing unit
21: I / F circuit
22: light emission driver (light converter)
23: light emitting unit
29 CPU (signal generator)
3: light receiving processing unit
31: light receiver
32: detection circuit
33: amplification unit
34: I / F circuit
4: optical transmission path
5: Electric transmission line (electric signal line)
15: Serializer (Parallel to Serial Converter)
15a: Input terminal for preventing bit continuous
15b: Data input terminal
16: deserializer
100: optical transmission system

Claims (17)

A parallel serial converter for optical transmission, comprising a plurality of input terminals to which a plurality of binary signals are respectively input in parallel, converting a plurality of input binary signals into serial binary signals and transmitting the same to a optical transmission module.
In the plurality of input terminals,
Regarding the serial binary signal, an input terminal for preventing bit continuation for inserting a "1" signal or a "0" signal is assigned so that the same value does not continue a predetermined number of bits. converter. The method of claim 1,
When the minimum value of the signal transmission rate of the optical transmission module is set to fmin and the signal transmission rate of the serial binary signal is set to R,
The predetermined number of bits n is represented by the following formula (1)
n <R / fmin... (One)
Parallel serial converter for optical transmission, characterized in that to satisfy. The method of claim 1,
As the input terminal for preventing the bit continuous,
A first bit continuous prevention input terminal for inserting a " 1 " signal so that the value of " 0 "
And a second bit continuation preventing input terminal for inserting a " 0 " signal such that a value of " 1 " is not continuous for a predetermined number of bits. The method of claim 3,
Both of the first bit continuous prevention input terminal and the second bit continuous prevention input terminal are assigned. The method of claim 4, wherein
In the plurality of input terminals, the first bit continuous prevention input terminal and the second bit continuous prevention input terminal are allocated so as to be equally spaced and alternate with each other. converter. The method of claim 4, wherein
And said first bit continuous prevention input terminal and said second bit continuous prevention input terminal are adjacent to each other. The method of claim 3,
A power supply voltage is input to the first bit continuous prevention input terminal,
And a ground voltage is input to said second bit continuous prevention input terminal. The method of claim 7, wherein
It further includes a terminal for power supply and a terminal for grounding,
The said 1st bit continuous prevention input terminal is arrange | positioned near the said power supply terminal, and is connected,
And the second bit continuous prevention input terminal is disposed in close proximity to the ground terminal and connected to the second bit continuous prevention input terminal. The method of claim 3,
The terminal to which the binary signal, which becomes the value of most of the period " 0 &quot;, is inputted as the second bit continuous prevention input terminal,
And a terminal to which the binary signal, which is the value of most of the periods "1", is input as the first bit continuous prevention input terminal. The method of claim 1,
Data signals input terminals to which data signals are input are assigned to the plurality of input terminals.
And a clock signal is input to the bit continuous prevention input terminal. The method of claim 10,
And said clock signal is slower than said data signal. The method of claim 10,
And said clock signal is faster or at the same speed as said data signal. The method of claim 10,
And a reversal signal of the clock signal is further input to the plurality of input terminals. A signal generator for outputting a plurality of binary signals in parallel, respectively;
An optical transmission parallel-serial converter according to claim 1 for inputting the plurality of binary signals and converting them into serial binary signals;
And an optical converter for converting a serial binary signal output from the parallel serial converter for optical transmission into an optical signal, and having an optical transmission module for transmitting the optical signal converted by the optical converter through an optical transmission path. Optical transmission system. The method of claim 14,
A control unit for controlling the data signal output from the signal generator based on a clock signal output from the signal generator;
The signal generator outputs the data signal and the clock signal as parallel binary signals,
And an electrical signal line for transmitting the clock signal from the signal generator to the controller,
And said clock signal on said electric signal line is input to said bit continuous prevention input terminal. The method of claim 14,
A control unit for controlling the data signal output from the signal generator based on a clock signal output from the signal generator;
The signal generator outputs the data signal and the clock signal as parallel binary signals,
And the optical transmission module converts at least a clock signal into an optical signal by the optical converter, transmits the optical signal through an optical transmission path, and outputs the optical signal to the controller. An electronic device comprising the optical transmission system according to claim 14.

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