JP4593792B2 - 32ビット・マイクロプロセッサにおける4および8バイト・ページ・テーブル・エントリを使用した線形アドレス拡張および物理メモリへのマッピング - Google Patents
32ビット・マイクロプロセッサにおける4および8バイト・ページ・テーブル・エントリを使用した線形アドレス拡張および物理メモリへのマッピング Download PDFInfo
- Publication number
- JP4593792B2 JP4593792B2 JP2000605886A JP2000605886A JP4593792B2 JP 4593792 B2 JP4593792 B2 JP 4593792B2 JP 2000605886 A JP2000605886 A JP 2000605886A JP 2000605886 A JP2000605886 A JP 2000605886A JP 4593792 B2 JP4593792 B2 JP 4593792B2
- Authority
- JP
- Japan
- Prior art keywords
- linear address
- address
- microprocessor
- extended linear
- page
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
- G06F9/342—Extension of operand address space
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/0292—User address space allocation, e.g. contiguous or non contiguous base addressing using tables or multilevel address translation means
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Executing Machine-Instructions (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/267,796 | 1999-03-12 | ||
| US09/267,796 US6349380B1 (en) | 1999-03-12 | 1999-03-12 | Linear address extension and mapping to physical memory using 4 and 8 byte page table entries in a 32-bit microprocessor |
| PCT/US2000/005420 WO2000055723A1 (en) | 1999-03-12 | 2000-02-29 | Linear address extension and mapping to physical memory using 4 and 8 byte page table entries in a 32-bit microprocessor |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2002539555A JP2002539555A (ja) | 2002-11-19 |
| JP2002539555A5 JP2002539555A5 (https=) | 2007-03-29 |
| JP4593792B2 true JP4593792B2 (ja) | 2010-12-08 |
Family
ID=23020153
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000605886A Expired - Fee Related JP4593792B2 (ja) | 1999-03-12 | 2000-02-29 | 32ビット・マイクロプロセッサにおける4および8バイト・ページ・テーブル・エントリを使用した線形アドレス拡張および物理メモリへのマッピング |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US6349380B1 (https=) |
| EP (1) | EP1188113B1 (https=) |
| JP (1) | JP4593792B2 (https=) |
| CN (1) | CN1149473C (https=) |
| AU (1) | AU3390900A (https=) |
| DE (1) | DE60023002T2 (https=) |
| HK (1) | HK1043215B (https=) |
| WO (1) | WO2000055723A1 (https=) |
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| US6487627B1 (en) * | 1999-12-22 | 2002-11-26 | Intel Corporation | Method and apparatus to manage digital bus traffic |
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| US6578122B2 (en) * | 2001-03-01 | 2003-06-10 | International Business Machines Corporation | Using an access key to protect and point to regions in windows for infiniband |
| US6671791B1 (en) * | 2001-06-15 | 2003-12-30 | Advanced Micro Devices, Inc. | Processor including a translation unit for selectively translating virtual addresses of different sizes using a plurality of paging tables and mapping mechanisms |
| DE10131124A1 (de) * | 2001-06-28 | 2003-01-23 | Infineon Technologies Ag | Konfigurierbare Adressierungsvorrichtung |
| EP1278120A1 (de) | 2001-07-18 | 2003-01-22 | Infineon Technologies AG | Controller und Verfahren zum Ansteuern einer zentralen Verarbeitungseinheit für eine Speicheradressierung |
| US6807616B1 (en) * | 2001-08-09 | 2004-10-19 | Advanced Micro Devices, Inc. | Memory address checking in a proccesor that support both a segmented and a unsegmented address space |
| US6851040B2 (en) * | 2001-08-15 | 2005-02-01 | Transmeta Corporation | Method and apparatus for improving segmented memory addressing |
| FR2831289B1 (fr) | 2001-10-19 | 2004-01-23 | St Microelectronics Sa | Microprocesseur disposant d'un espace adressable etendu |
| EP1512069B1 (en) * | 2002-05-24 | 2020-12-09 | Telefonaktiebolaget LM Ericsson (publ) | An address generation unit for a processor |
| US7299338B2 (en) * | 2002-12-04 | 2007-11-20 | Agere Systems Inc. | Vector indexed memory unit and method |
| US7240179B1 (en) * | 2004-12-13 | 2007-07-03 | Nvidia Corporation | System, apparatus and method for reclaiming memory holes in memory composed of arbitrarily-sized memory devices |
| US7707385B2 (en) * | 2004-12-14 | 2010-04-27 | Sony Computer Entertainment Inc. | Methods and apparatus for address translation from an external device to a memory of a processor |
| US7743233B2 (en) * | 2005-04-05 | 2010-06-22 | Intel Corporation | Sequencer address management |
| CN100468349C (zh) * | 2005-08-24 | 2009-03-11 | 英业达股份有限公司 | 存储器测试方法 |
| US7644251B2 (en) * | 2005-12-19 | 2010-01-05 | Sigmatel, Inc. | Non-volatile solid-state memory controller |
| US7725656B1 (en) | 2006-10-18 | 2010-05-25 | Guillermo Rozas | Braided set associative caching techniques |
| US9244855B2 (en) | 2007-12-31 | 2016-01-26 | Intel Corporation | Method, system, and apparatus for page sizing extension |
| US8635415B2 (en) * | 2009-09-30 | 2014-01-21 | Intel Corporation | Managing and implementing metadata in central processing unit using register extensions |
| US10163187B2 (en) * | 2009-10-30 | 2018-12-25 | Intel Corproation | Graphics rendering using a hierarchical acceleration structure |
| GB2478727B (en) * | 2010-03-15 | 2013-07-17 | Advanced Risc Mach Ltd | Translation table control |
| US8478922B2 (en) | 2010-06-23 | 2013-07-02 | International Business Machines Corporation | Controlling a rate at which adapter interruption requests are processed |
| US8745292B2 (en) | 2010-06-23 | 2014-06-03 | International Business Machines Corporation | System and method for routing I/O expansion requests and responses in a PCIE architecture |
| US8639858B2 (en) | 2010-06-23 | 2014-01-28 | International Business Machines Corporation | Resizing address spaces concurrent to accessing the address spaces |
| US8549182B2 (en) | 2010-06-23 | 2013-10-01 | International Business Machines Corporation | Store/store block instructions for communicating with adapters |
| US9195623B2 (en) | 2010-06-23 | 2015-11-24 | International Business Machines Corporation | Multiple address spaces per adapter with address translation |
| US8645606B2 (en) | 2010-06-23 | 2014-02-04 | International Business Machines Corporation | Upbound input/output expansion request and response processing in a PCIe architecture |
| US8615622B2 (en) | 2010-06-23 | 2013-12-24 | International Business Machines Corporation | Non-standard I/O adapters in a standardized I/O architecture |
| US8416834B2 (en) | 2010-06-23 | 2013-04-09 | International Business Machines Corporation | Spread spectrum wireless communication code for data center environments |
| US9213661B2 (en) | 2010-06-23 | 2015-12-15 | International Business Machines Corporation | Enable/disable adapters of a computing environment |
| US8635430B2 (en) | 2010-06-23 | 2014-01-21 | International Business Machines Corporation | Translation of input/output addresses to memory addresses |
| US9342352B2 (en) | 2010-06-23 | 2016-05-17 | International Business Machines Corporation | Guest access to address spaces of adapter |
| US8918573B2 (en) | 2010-06-23 | 2014-12-23 | International Business Machines Corporation | Input/output (I/O) expansion response processing in a peripheral component interconnect express (PCIe) environment |
| US8510599B2 (en) | 2010-06-23 | 2013-08-13 | International Business Machines Corporation | Managing processing associated with hardware events |
| US8505032B2 (en) | 2010-06-23 | 2013-08-06 | International Business Machines Corporation | Operating system notification of actions to be taken responsive to adapter events |
| US8656228B2 (en) | 2010-06-23 | 2014-02-18 | International Business Machines Corporation | Memory error isolation and recovery in a multiprocessor computer system |
| US8671287B2 (en) | 2010-06-23 | 2014-03-11 | International Business Machines Corporation | Redundant power supply configuration for a data center |
| US8683108B2 (en) | 2010-06-23 | 2014-03-25 | International Business Machines Corporation | Connected input/output hub management |
| US8650335B2 (en) | 2010-06-23 | 2014-02-11 | International Business Machines Corporation | Measurement facility for adapter functions |
| US8621112B2 (en) | 2010-06-23 | 2013-12-31 | International Business Machines Corporation | Discovery by operating system of information relating to adapter functions accessible to the operating system |
| US8626970B2 (en) | 2010-06-23 | 2014-01-07 | International Business Machines Corporation | Controlling access by a configuration to an adapter function |
| US8650337B2 (en) | 2010-06-23 | 2014-02-11 | International Business Machines Corporation | Runtime determination of translation formats for adapter functions |
| US8417911B2 (en) | 2010-06-23 | 2013-04-09 | International Business Machines Corporation | Associating input/output device requests with memory associated with a logical partition |
| US8615645B2 (en) | 2010-06-23 | 2013-12-24 | International Business Machines Corporation | Controlling the selectively setting of operational parameters for an adapter |
| US8566480B2 (en) | 2010-06-23 | 2013-10-22 | International Business Machines Corporation | Load instruction for communicating with adapters |
| US8677180B2 (en) | 2010-06-23 | 2014-03-18 | International Business Machines Corporation | Switch failover control in a multiprocessor computer system |
| US8504754B2 (en) | 2010-06-23 | 2013-08-06 | International Business Machines Corporation | Identification of types of sources of adapter interruptions |
| US8645767B2 (en) | 2010-06-23 | 2014-02-04 | International Business Machines Corporation | Scalable I/O adapter function level error detection, isolation, and reporting |
| US8572635B2 (en) | 2010-06-23 | 2013-10-29 | International Business Machines Corporation | Converting a message signaled interruption into an I/O adapter event notification |
| US8468284B2 (en) | 2010-06-23 | 2013-06-18 | International Business Machines Corporation | Converting a message signaled interruption into an I/O adapter event notification to a guest operating system |
| GB2485602A (en) * | 2010-11-22 | 2012-05-23 | F Secure Corp | Executing a program with a smaller address size than the processor on which it is executing |
| CN102103543B (zh) * | 2011-02-22 | 2012-07-04 | 哈尔滨工业大学 | 利用处理器gpio管脚扩展m模块地址空间的方法 |
| US9331855B2 (en) | 2011-07-01 | 2016-05-03 | Intel Corporation | Apparatus, system, and method for providing attribute identity control associated with a processor |
| US10417001B2 (en) * | 2012-12-27 | 2019-09-17 | Intel Corporation | Physical register table for eliminating move instructions |
| US9507599B2 (en) | 2013-07-22 | 2016-11-29 | Globalfoundries Inc. | Instruction set architecture with extensible register addressing |
| US9734083B2 (en) | 2014-03-31 | 2017-08-15 | International Business Machines Corporation | Separate memory address translations for instruction fetches and data accesses |
| US9824021B2 (en) | 2014-03-31 | 2017-11-21 | International Business Machines Corporation | Address translation structures to provide separate translations for instruction fetches and data accesses |
| US9715449B2 (en) * | 2014-03-31 | 2017-07-25 | International Business Machines Corporation | Hierarchical translation structures providing separate translations for instruction fetches and data accesses |
| US10146699B2 (en) | 2015-04-30 | 2018-12-04 | Hewlett Packard Enterprise Development Lp | Mapping apertures of different sizes |
| US9990282B2 (en) | 2016-04-27 | 2018-06-05 | Oracle International Corporation | Address space expander for a processor |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60134937A (ja) * | 1983-12-23 | 1985-07-18 | Hitachi Ltd | アドレス拡張装置 |
| EP0148478B1 (en) | 1983-12-23 | 1989-08-09 | Hitachi, Ltd. | A data processor with control of the significant bit lenghts of general purpose registers |
| DE3683123D1 (de) * | 1985-04-30 | 1992-02-06 | Fujitsu Ltd | Adressenerweiterungssystem. |
| JPS63305443A (ja) * | 1987-06-08 | 1988-12-13 | Hitachi Ltd | 仮想空間群管理方法 |
| US5249280A (en) * | 1990-07-05 | 1993-09-28 | Motorola, Inc. | Microcomputer having a memory bank switching apparatus for accessing a selected memory bank in an external memory |
| US5423013A (en) * | 1991-09-04 | 1995-06-06 | International Business Machines Corporation | System for addressing a very large memory with real or virtual addresses using address mode registers |
| US5381537A (en) * | 1991-12-06 | 1995-01-10 | International Business Machines Corporation | Large logical addressing method and means |
| US5617554A (en) * | 1992-02-10 | 1997-04-01 | Intel Corporation | Physical address size selection and page size selection in an address translator |
| US5664139A (en) * | 1994-05-16 | 1997-09-02 | Compaq Computer Corporation | Method and a computer system for allocating and mapping frame buffers into expanded memory |
| US5566308A (en) | 1994-05-25 | 1996-10-15 | National Semiconductor Corporation | Processor core which provides a linear extension of an addressable memory space |
| US5963984A (en) * | 1994-11-08 | 1999-10-05 | National Semiconductor Corporation | Address translation unit employing programmable page size |
| US5612911A (en) * | 1995-05-18 | 1997-03-18 | Intel Corporation | Circuit and method for correction of a linear address during 16-bit addressing |
| US5895503A (en) * | 1995-06-02 | 1999-04-20 | Belgard; Richard A. | Address translation method and mechanism using physical address information including during a segmentation process |
| TW382090B (en) * | 1997-08-13 | 2000-02-11 | United Microeletronics Corp | System and method for converting computer addresses |
| US6009510A (en) * | 1998-02-06 | 1999-12-28 | Ip First Llc | Method and apparatus for improved aligned/misaligned data load from cache |
| US6108773A (en) * | 1998-03-31 | 2000-08-22 | Ip-First, Llc | Apparatus and method for branch target address calculation during instruction decode |
-
1999
- 1999-03-12 US US09/267,796 patent/US6349380B1/en not_active Expired - Lifetime
-
2000
- 2000-02-29 CN CNB008049394A patent/CN1149473C/zh not_active Expired - Fee Related
- 2000-02-29 DE DE60023002T patent/DE60023002T2/de not_active Expired - Lifetime
- 2000-02-29 JP JP2000605886A patent/JP4593792B2/ja not_active Expired - Fee Related
- 2000-02-29 HK HK02104595.9A patent/HK1043215B/en not_active IP Right Cessation
- 2000-02-29 EP EP00912127A patent/EP1188113B1/en not_active Expired - Lifetime
- 2000-02-29 AU AU33909/00A patent/AU3390900A/en not_active Abandoned
- 2000-02-29 WO PCT/US2000/005420 patent/WO2000055723A1/en not_active Ceased
Also Published As
| Publication number | Publication date |
|---|---|
| EP1188113B1 (en) | 2005-10-05 |
| HK1043215B (en) | 2006-04-28 |
| AU3390900A (en) | 2000-10-04 |
| DE60023002T2 (de) | 2006-07-20 |
| US6349380B1 (en) | 2002-02-19 |
| JP2002539555A (ja) | 2002-11-19 |
| DE60023002D1 (de) | 2006-02-16 |
| EP1188113A1 (en) | 2002-03-20 |
| HK1043215A1 (en) | 2002-09-06 |
| CN1149473C (zh) | 2004-05-12 |
| CN1343332A (zh) | 2002-04-03 |
| WO2000055723A1 (en) | 2000-09-21 |
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