DE60023002D1 - Erweiterung und abbildung auf physikalischem speicher von linearen adressen unter verwendung von 4 und 8 byte seitentabelleneinträgen in einem 32-bit mikroprozessor - Google Patents

Erweiterung und abbildung auf physikalischem speicher von linearen adressen unter verwendung von 4 und 8 byte seitentabelleneinträgen in einem 32-bit mikroprozessor

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Publication number
DE60023002D1
DE60023002D1 DE60023002T DE60023002T DE60023002D1 DE 60023002 D1 DE60023002 D1 DE 60023002D1 DE 60023002 T DE60023002 T DE 60023002T DE 60023002 T DE60023002 T DE 60023002T DE 60023002 D1 DE60023002 D1 DE 60023002D1
Authority
DE
Germany
Prior art keywords
illustration
expansion
physical storage
table entries
side table
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60023002T
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English (en)
Other versions
DE60023002T2 (de
Inventor
Shahrokh Shahidzadeh
E Bigbee
B Papworth
Frank Binns
P Colwell
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Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of DE60023002D1 publication Critical patent/DE60023002D1/de
Application granted granted Critical
Publication of DE60023002T2 publication Critical patent/DE60023002T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G06F9/342Extension of operand address space
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/0292User address space allocation, e.g. contiguous or non contiguous base addressing using tables or multilevel address translation means

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Executing Machine-Instructions (AREA)
DE60023002T 1999-03-12 2000-02-29 Erweiterung und abbildung auf physikalischem speicher von linearen adressen unter verwendung von 4 und 8 byte seitentabelleneinträgen in einem 32-bit mikroprozessor Expired - Lifetime DE60023002T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US267796 1999-03-12
US09/267,796 US6349380B1 (en) 1999-03-12 1999-03-12 Linear address extension and mapping to physical memory using 4 and 8 byte page table entries in a 32-bit microprocessor
PCT/US2000/005420 WO2000055723A1 (en) 1999-03-12 2000-02-29 Linear address extension and mapping to physical memory using 4 and 8 byte page table entries in a 32-bit microprocessor

Publications (2)

Publication Number Publication Date
DE60023002D1 true DE60023002D1 (de) 2006-02-16
DE60023002T2 DE60023002T2 (de) 2006-07-20

Family

ID=23020153

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60023002T Expired - Lifetime DE60023002T2 (de) 1999-03-12 2000-02-29 Erweiterung und abbildung auf physikalischem speicher von linearen adressen unter verwendung von 4 und 8 byte seitentabelleneinträgen in einem 32-bit mikroprozessor

Country Status (8)

Country Link
US (1) US6349380B1 (de)
EP (1) EP1188113B1 (de)
JP (1) JP4593792B2 (de)
CN (1) CN1149473C (de)
AU (1) AU3390900A (de)
DE (1) DE60023002T2 (de)
HK (1) HK1043215B (de)
WO (1) WO2000055723A1 (de)

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US8745292B2 (en) 2010-06-23 2014-06-03 International Business Machines Corporation System and method for routing I/O expansion requests and responses in a PCIE architecture
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Also Published As

Publication number Publication date
JP4593792B2 (ja) 2010-12-08
WO2000055723A1 (en) 2000-09-21
DE60023002T2 (de) 2006-07-20
US6349380B1 (en) 2002-02-19
JP2002539555A (ja) 2002-11-19
EP1188113B1 (de) 2005-10-05
CN1149473C (zh) 2004-05-12
AU3390900A (en) 2000-10-04
HK1043215A1 (en) 2002-09-06
EP1188113A1 (de) 2002-03-20
HK1043215B (zh) 2006-04-28
CN1343332A (zh) 2002-04-03

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Legal Events

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8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: HEYER, V., DIPL.-PHYS. DR.RER.NAT., PAT.-ANW., 806