JP4588300B2 - Semiconductor devices, electronic equipment - Google Patents

Description

【０１１８】
本実験は上記の全てのサンプルに対して行ったものであり、まずは初期状態として、各駆動用ＴＦＴのしきい値電圧及び立ち上がり電圧を測定した。次に、発光素子の画素電極が接続される端子（ドレイン側の端子）に、２．５kVの電圧値を１秒間隔で５回印加した後、再度、しきい値電圧及び立ち上がり電圧を測定した。
そして、各サンプルで、初期状態と、各電圧値を印加した後の変化量（差）の絶対値を求めた。そのときのしきい値電圧の変化量（ΔVｔｈ）、立ち上がり電圧（△Ｓｈｉｆｔ）の変化量を表１に示す。なお、立ち上がり電圧とは、反転層が形成され始めたとき、またはログスケールで電流が流れ始めたときのＶ_Gに相当する。
【０１１９】
そして、表１に示すように、保護手段を有するサンプルは、normalのサンプルより、しきい値電圧の変動と、立ち上がり電圧の変動が緩和されていることが分かる。
【０１２０】
【発明の効果】
本発明は、画素電極とトランジスタの間に抵抗素子を配置して、画素電極に帯電した余分な電荷が一度に且つ直接トランジスタに供給されないようにすることで、該トランジスタのソース電極又はドレイン電極の電位の急激な変動を緩和する。また、画素電極とトランジスタの間に容量素子を配置して、該画素電極に帯電した余分な電荷が、容量素子及びトランジスタに分配されることで、該トランジスタのソース電極又はドレイン電極の電位の急激な変動を緩和する。
【０１２１】
また、画素電極とトランジスタの間にダイオードを配置して、画素電極に帯電した余分な電荷を電源線に放電することで、該トランジスタのソース電極又はドレイン電極の電位の急激な変動を緩和する。このように本発明は、画素電極に帯電した電荷によるトランジスタのソース電極又はドレイン電極の電位の急激な変動を緩和することで、静電破壊を防止する。また本発明は、作製工程における静電破壊、特に画素電極まで作製した状態における静電破壊を防止する。
【図面の簡単な説明】
【図１】本発明の半導体装置の上面図及び回路図。
【図２】本発明の半導体装置の断面図。
【図３】本発明の半導体装置に具備される画素の上面写真。
【図４】本発明の半導体装置の上面図及び回路図。
【図５】本発明の半導体装置の上面図及び回路図。
【図６】本発明の半導体装置の上面図及び回路図。
【図７】本発明の半導体装置の断面図。
【図８】本発明の半導体装置に具備される画素の上面写真。
【図９】本発明の半導体装置に具備される画素の上面写真。
【図１０】本発明の半導体装置の回路図。
【図１１】本発明の半導体装置の断面図。
【図１２】本発明の半導体装置の全体図。
【図１３】信号線駆動回路及び走査線駆動回路の図。
【図１４】本発明が適用される電子機器の図。
【図１５】半導体装置の図。
【図１６】モジュールを示す図。
【図１７】電源回路を示す図。
【図１８】シリーズレギュレータを示す図。
【図１９】スイッチングレギュレータを示す図。
【図２０】バンドギャップ回路を示す図。
【図２１】ＤＣアンプを示す図。
【図２２】オペアンプを示す図。
【図２３】オペアンプを示す図。
【図２４】電流源を示す図。[0001]
BACKGROUND OF THE INVENTION
The present invention belongs to the technical field related to semiconductor devices. More specifically, the present invention belongs to a technical field related to a semiconductor device using a semiconductor element such as a transistor.
[0002]
[Prior art]
In recent years, development of semiconductor devices having light-emitting elements has been advanced. In addition to the advantages of existing liquid crystal display devices, the semiconductor device has features such as a high response speed, excellent video display, and a wide viewing angle. It is attracting attention as a display.
[0003]
A semiconductor device including a light-emitting element includes a plurality of pixels each including the light-emitting element and at least two transistors. A transistor (hereinafter referred to as a driving transistor) connected in series with a light emitting element in the pixel plays a role of controlling light emission of the light emitting element. The light-emitting element has a structure in which a light-emitting layer is sandwiched between the first and second electrodes and the first and second electrodes. One electrode connected to the source electrode or the drain electrode of the driving transistor is called a pixel electrode, and the other electrode is called a counter electrode.
[0004]
By the way, static electricity generated by friction, contact, or the like is charged on any object, such as a conductor, a semiconductor, or an insulator, and air. When the object is strongly charged, electrostatic discharge occurs. When this phenomenon occurs with respect to a released node such as an input terminal of a semiconductor device, a fine semiconductor element manufactured on the substrate is deteriorated or destroyed. This is called electrostatic breakdown.
[0005]
Therefore, as shown in FIG. 15, in order to prevent electrostatic breakdown, a circuit (hereinafter referred to as an internal circuit 64) formed on the substrate is externally connected through a protective means (also referred to as a protective circuit) 63 and an FPC 62. Connected to an IC (hereinafter referred to as an external circuit 61). The protection means 63 detects the voltage and current supplied from the external circuit 61 to the internal circuit 64, and controls the voltage and current value in order to prevent damage to the internal circuit 64 when an abnormality occurs.
[0006]
[Problems to be solved by the invention]
In the case of manufacturing a semiconductor device having a light-emitting element, a TFT is first formed over a substrate, and then a light-emitting element is manufactured. More specifically, a TFT is first formed on a substrate, and then a wiring is formed so as to be electrically connected to a source region and a drain region of the TFT. Subsequently, a pixel electrode of a light emitting element is manufactured so as to be electrically connected to the wiring. Since the state manufactured up to this point is a state in which the pixel electrode is exposed, the pixel electrode is easily charged with static electricity. In particular, in a manufacturing process involving charged particles such as dry etching or electron beam evaporation, the pixel electrode serves as an antenna and electrostatic breakdown is likely to be induced. The rapid discharge of the electric charge charged in the pixel electrode leads to deterioration or destruction of the semiconductor element connected to the pixel electrode.
[0007]
The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a semiconductor device that has a light emitting element and prevents electrostatic breakdown during a manufacturing process. More specifically, it is an object of the present invention to provide a semiconductor device that prevents electrostatic breakdown in a state where even pixel electrodes are manufactured.
[0008]
[Means for Solving the Problems]
In order to solve the above-described problems, the present invention provides a semiconductor device in which each pixel is provided with protection means including one or more selected from a resistor element, a capacitor element, and a rectifier element. The present invention also provides a semiconductor device in which the protection means is disposed between a pixel electrode of a light emitting element and a source electrode or a drain electrode of a transistor. Note that the rectifying element is an element having a rectifying action, and corresponds to, for example, a transistor or a diode in which a drain electrode and a gate electrode are connected. In other words, the essential configuration of the present invention is that each pixel is provided with a protection means, and the protection means is disposed between the pixel electrode of the light emitting element and the source electrode or drain electrode of the transistor. The source electrode or drain electrode of the transistor is connected to the pixel electrode when the protection means is not provided.
[0009]
When the protection means is a resistance element, the transistor is disposed between the pixel electrode and the source electrode or the drain electrode of the transistor so that the charge charged in the pixel electrode is not supplied to the transistor at once and directly. Abrupt fluctuations in the potential of the source electrode or the drain electrode are alleviated.
[0010]
In the case where the protection means is a capacitor element, the capacitor element charges or discharges the charge charged in the pixel electrode, and distributes the charge to the capacitor element and the transistor, thereby rapidly increasing the potential of the source electrode or the drain electrode of the transistor. Alleviate any fluctuations.
[0011]
When the protection means is a transistor in which a drain electrode and a gate electrode are connected, the source electrode of the transistor is connected to a power supply line. The transistor discharges the electric charge charged in the pixel electrode to the power supply line, thereby setting the potential of the pixel electrode to the same potential as the potential of the power supply line or a potential equivalent thereto. In this manner, a sudden change in the potential of the source electrode or the drain electrode of the transistor due to the charge charged in the pixel electrode is reduced.
[0012]
When the protection means is a diode, one electrode of the diode is connected to the pixel electrode, and the other electrode is connected to a power supply line. The diode sets the potential of the pixel electrode to the same potential as the potential of the power supply line by discharging the electric charge charged in the pixel electrode to the power supply line. In this manner, a sudden change in the potential of the source electrode or the drain electrode of the transistor due to the charge charged in the pixel electrode is reduced.
[0013]
According to the present invention having the above-described structure, a sudden change in the potential of the source electrode or the drain electrode of the transistor due to the electric charge charged in the pixel electrode is reduced, and electrostatic breakdown is prevented. Further, the present invention prevents electrostatic breakdown during the manufacturing process, particularly electrostatic breakdown in a state where the pixel electrode is manufactured.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
(Embodiment 1)
Embodiments of the present invention will be described with reference to FIGS. FIG. 1 shows a state where a pixel electrode is fabricated, FIG. 1A is a schematic diagram of a top view (mask drawing) of one pixel of a semiconductor device, and FIG. 1B schematically shows a circuit configuration thereof. FIG. FIG. 2 is a cross-sectional view of the pixel of FIG. FIG. 3 is a photograph in which a panel in which this pixel was actually produced was magnified about 635 times with an optical microscope.
[0015]
Each pixel shown in FIGS. 1A and 1B is arranged in a region surrounded by a signal line 17 and a power supply line 18 arranged in the column direction, a scanning line 20 arranged in the row direction, and a reset line 19. . Each pixel includes a switching transistor 11 (hereinafter referred to as transistor 11), a driving transistor 12 (hereinafter referred to as transistor 12), an erasing transistor 13 (hereinafter referred to as transistor 13), a resistance element 14, a capacitive element 15, and a pixel. It has an electrode 16. The resistance element 14 and the capacitive element 15 correspond to the protection means 21.
[0016]
A feature of each pixel shown in FIGS. 1A and 1B is that a resistance element 14 and a capacitance element 15 which are protection means 21 are arranged. The resistance element 14 alleviates a rapid change in the potential of the transistor 12 due to the extra charge charged in the pixel electrode 16. More specifically, the resistive element 14 is disposed between the pixel electrode 16 and the transistor 12 so that the extra charge charged in the pixel electrode 16 is not supplied to the transistor 12 at once and directly. The rapid fluctuation of the potential of the source electrode or the drain electrode is reduced.
[0017]
In the present embodiment, the resistance element 14 is made of a semiconductor and has a resistance value of several tens of kΩ. Specifically, it has a resistance value of 20 kΩ to 50 kΩ. However, the present invention is not limited to this, and a metal or the like constituting a gate electrode or a wiring may be used as a material constituting the resistance element 14. Further, the shape of the resistance element 14 arranged in the pixel is not particularly limited, and can be arbitrarily set. Further, the resistance value of the resistance element 14 is not particularly limited, and the constituent material and shape may be arbitrarily set so that a desired resistance value can be obtained.
[0018]
Similarly, the capacitor element 15 alleviates rapid fluctuations in the potential of the transistor 12 due to excess charges charged in the pixel electrode 16. More specifically, the capacitive element 15 charges or discharges extra charges charged in the pixel electrode 16. That is, excessive charges charged in the pixel electrode 16 are distributed to the capacitor 15 and the transistor 12, so that a sudden change in the potential of the source electrode or the drain electrode of the transistor 12 is reduced.
[0019]
In the present embodiment, the capacitor element 15 is formed of a stacked body of a semiconductor, a gate insulating film, and a gate electrode, and has a capacitance value of several hundred fF. Specifically, it has a capacitance value of 100 to 200 fF. However, the present invention is not limited to this, and the material constituting the capacitor 15 and the shape of the capacitor 15 can be arbitrarily set. Further, the capacitance value of the capacitor 15 is not particularly limited, and a material and a shape to be configured may be arbitrarily set so that a desired capacitance value can be obtained.
[0020]
Another feature other than the above is that the channel length (L) / channel width (W) of the transistor 12 is set to a value of 10 or more. The value of L / W is usually 0.1 to 2, but is set to 10 or more in the present invention. Then, since the gate-source capacitance of the transistor 12 itself is large, the transistor 12 can also serve as a capacitor element.
[0021]
The light-emitting element is formed using a wide variety of materials such as an organic material, an inorganic material, a thin film material, a bulk material, and a dispersion material. Among them, organic light emitting diodes (OLEDs) mainly composed of organic materials are listed as typical light emitting elements. The OLED has a structure in which a light emitting layer is sandwiched between an anode and a cathode, and the anode and the cathode, and the light emitting layer is made of one or more materials selected from the above materials. Luminescence in the light-emitting layer includes light emission (fluorescence) when returning from the singlet excited state to the ground state and light emission (phosphorescence) when returning from the triplet excited state to the ground state.
[0022]
Next, typical cross-sectional structures of one pixel of the semiconductor device illustrated in FIGS. 1A and 1B are illustrated in FIGS. 2A to 2C show a state where a transistor and a light-emitting element are formed over a substrate. 2A is a cross-sectional view taken along the line AA of the pixel in FIG. 1A and is a cross-sectional view of the transistor 11 and the transistor 13. FIG. 2B is a cross-sectional view taken along line BB ′, and is a cross-sectional view of the transistor 12, the power supply line 18, and the signal line 17. FIG. 2C is a cross-sectional view taken along the line CC, and is a cross-sectional view of the capacitor 15 and the pixel electrode 16.
[0023]
2A to 2C, reference numeral 101 denotes a substrate, and a glass substrate, a ceramic substrate, a quartz substrate, a silicon substrate, or a plastic substrate (including a plastic film) can be used. Reference numeral 102 denotes a base film made of a silicon nitride oxide film, a silicon oxynitride film, or a laminated film thereof.
[0024]
A semiconductor serving as an active layer of the transistors 11 and 13 is provided over the base film 102, and the active layer includes a source region 103, a drain region 104, and a source region 107. LDD regions 105 a to 105 h and channel formation regions 106 a to 106 d are provided between the source region 103 and the drain region 104 and between the drain region 104 and the source region 107. Note that the impurity regions of the transistors 11 and 13 are n-type. At the same time, semiconductors 108 to 110 to be active layers of the transistor 12 and a semiconductor constituting the capacitor 15 are provided. As a semiconductor constituting the capacitor element 15, a p-type impurity region 111 and an intrinsic semiconductor 112 are provided.
[0025]
On the semiconductor, a silicon oxide film, a silicon oxynitride film (containing 25 to 35 atomic% of Si, 55 to 65 atomic% of oxygen, 1 to 20 atomic% of nitrogen, and 0.1 to 10 atomic% of hydrogen) A gate insulating film 113 using an aluminum nitride film, an aluminum oxide film, an aluminum oxynitride film, or a stacked film of these insulating films and a silicon nitride film is provided. The gate insulating film 113 functions as a gate insulating film for the transistors 11 to 13. The gate insulating film functions as a dielectric for the capacitor 15.
[0026]
On the gate insulating film 113, a metal layer is patterned to provide gate electrodes 114 and 115 of the transistor 11, gate electrodes 116 and 117 of the transistor 13, and gate electrodes 118 and 119 of the transistor 12. Note that the gate electrodes of the transistors 11 and 13 are different in the shape of the first layer electrode (tantalum nitride film) and the second layer electrode (tungsten film), and the first layer electrode is more than the second layer electrode. The line width is wide. For the formation method of this feature and the reason and advantage of the gate electrode having such a structure, refer to Japanese Patent Application Laid-Open No. 2002-57162 filed by the present applicant. In addition, the electrodes 120 and 121 constituting the capacitor 15 are provided simultaneously with the gate electrode.
[0027]
A silicon nitride oxide film (Si is 25 to 35 atom%, oxygen is 15 to 30 atom%, and nitrogen is 20 to 35 atoms is formed on the gate electrode and the capacitor 15 as the first inorganic insulating film 122. %, Corresponding to a silicon compound film containing 15 to 25 atomic% of hydrogen) or a silicon nitride film formed by a plasma CVD method is provided in an amount of 0.1 to 1 μm (preferably 0.2 to 0.5 μm). Since the first inorganic insulating film 122 contains hydrogen at a concentration of 15 to 25 atomic%, the first inorganic insulating film 122 can function as a hydrogen supply source by heating and perform hydrogen termination of the semiconductor to be an active layer.
[0028]
A first organic resin film 123 made of a positive photosensitive organic resin is provided on the first inorganic insulating film 122 in a range of 0.7 to 5 μm (preferably 2 to 4 μm). The first organic resin film 123 is formed by applying and baking by a spin coating method, and then exposing a portion where an opening is to be formed using a photomask. Specifically, a portion where the wiring of the transistor 11 and the transistor 13 is formed and a portion which takes capacity with the gate electrodes 118 and 119 of the transistor 12 are exposed. When the opening is formed in the first organic resin film 123, the first inorganic insulating film 122 is partially exposed in the opening.
[0029]
The partially exposed first inorganic insulating film 122 and the first organic resin film 123 are covered with a silicon oxynitride film, a silicon nitride film, an aluminum nitride film, or an aluminum oxynitride film as the second inorganic insulating film 124. ˜0.2 μm is provided. The second inorganic insulating film 124 has a function of suppressing the entry and exit of water with respect to the first organic resin film 123.
[0030]
Contact holes are formed in the gate insulating film 113, the first inorganic insulating film 122, and the second inorganic insulating film 124 by dry etching, and the conductive film formed so as to cover the contact holes is patterned to form source wiring 125 and 127 and the drain wiring 126 are formed by stacking a Ti film of 0.1 μm, an Al film of 0.35 μm, and a Ti film of 0.15 μm. At the same time, a wiring 128 corresponding to the power supply line 18, a wiring 129 corresponding to the signal line 17, and a wiring 130 for connecting the p-type impurity region 111 and the pixel electrode 131 are provided.
[0031]
Note that in FIG. 2B, a stacked body of the gate electrodes 118 and 119 and the wiring 128 with the first inorganic insulating film 122 and the second inorganic insulating film 124 interposed therebetween corresponds to a capacitor. That is, in this structure, the stacked body and the stacked body of the semiconductors 108 to 110 and the gate electrodes 118 and 119 function as a capacitor with the gate insulating film 113 interposed therebetween. If it does so, the capacitance value which was 100-500 fF per transistor conventionally can be raised to 1000-1200 fF. The above two stacked bodies hold the gate electrode (voltage between the gate electrode and the source electrode) of the transistor 12.
[0032]
In FIG. 2C, a stacked body of the gate electrodes 120 and 121 and the wiring 130 with the first inorganic insulating film 122 and the second inorganic insulating film 124 interposed therebetween corresponds to a capacitor. This capacitive element plays a role of holding the gate electrode of the transistor 12. In this structure, the stacked body of the intrinsic semiconductor 112 and the gate electrodes 120 and 121 also functions as a capacitor with the gate insulating film 113 interposed therebetween. This capacitive element functions as a protection means.
[0033]
Next, a pixel electrode 131 in contact with the wiring 130 is provided by patterning a transparent conductive film such as ITO. A second organic resin film 132 made of a positive photosensitive organic resin is provided on the pixel electrode 131. The second organic resin film 132 is formed by applying and baking by a spin coating method, and then exposing a portion where an opening is to be formed using a photomask. When the opening is formed, a part of the pixel electrode 131 is exposed in the opening.
[0034]
In this configuration, the negative or positive organic resin can be used to round the cross section of the opening, so that the coverage of the light emitting layer and the counter electrode to be formed later can be improved. In this case, it is possible to reduce the shrinkage defect in which the light emitting area is reduced.
[0035]
Then, a third inorganic insulating film 124 is provided in a thickness of 0.1 to 0.2 μm by patterning an inorganic insulating film containing nitrogen so as to cover the exposed pixel electrode 131 and the second organic resin film 132. Next, the light emitting layer 134 is provided by an evaporation method, and the counter electrode 135 is further provided by an evaporation method. A stacked body of the pixel electrode 131, the light emitting layer 134, and the counter electrode 135 corresponds to a light emitting element. In this manner, the TFT and the light emitting element are provided over the substrate 101.
[0036]
Next, FIG. 3 shows a photograph in which a panel in which pixels are actually manufactured is magnified about 635 times with an optical microscope. Specifically, the transistor 12 has a channel length of 390 μm, a channel width of 5 μm, and the transistors 11 and 13 have a channel length of 4.5 μm. The pixel pitch was 63 μm long and 189 μm wide, and the aperture ratio was 40%.
[0037]
In the present invention having the above-described configuration, the resistive element 14 is disposed between the pixel electrode 16 and the transistor 12 so that the extra charge charged in the pixel electrode 16 is not supplied to the transistor 12 at once and directly. The rapid fluctuation of the potential of the source electrode or the drain electrode of the transistor 12 is alleviated. In addition, the capacitor 15 is disposed between the pixel electrode 16 and the transistor 12, and excess charge charged in the pixel electrode 16 is distributed to the capacitor 15 and the transistor 12, so that the source electrode or drain of the transistor 12 Alleviates sudden fluctuations in electrode potential. As described above, the present invention prevents electrostatic breakdown by mitigating rapid fluctuations in the potential of the source electrode or the drain electrode of the transistor due to charges charged in the pixel electrode. Further, the present invention prevents electrostatic breakdown during the manufacturing process, particularly electrostatic breakdown in a state where the pixel electrode is manufactured.
[0038]
(Embodiment 2)
An embodiment of the present invention will be described with reference to FIGS. 4 to 6 show a state where the pixel electrode is manufactured, and FIGS. 4A to 6A are schematic views of a top view (mask drawing) in one pixel of the semiconductor device, and FIG. FIG. 6B is a circuit diagram schematically showing the circuit configuration. FIG. 7 is a cross-sectional view of the pixel of FIGS. 8 and 9 are photographs obtained by enlarging a panel on which pixels are actually manufactured by an optical microscope at about 695 times.
[0039]
Each pixel shown in FIGS. 4 to 6 is arranged in a region surrounded by the signal line 17 and the power supply line 18 arranged in the column direction, the scanning line 20 arranged in the row direction, and the reset line 19. Each pixel includes transistors 11 to 13 and a pixel electrode 16. Each of the pixels shown in FIGS. 4A and 4B has a resistance element 14 corresponding to the protection means 21. On the other hand, each pixel shown in FIGS. 5A and 5B has a capacitor 15 corresponding to the protection means 21. Each of the pixels shown in FIGS. 6A and 6B includes a resistance element 14 corresponding to the protection means 21 and a transistor 22 in which a gate and a drain are connected.
[0040]
A feature of each pixel shown in FIGS. 4A and 4B is that a resistance element 14 serving as a protection means 21 is disposed. The resistance element 14 alleviates a rapid change in the potential of the transistor 12 due to the extra charge charged in the pixel electrode 16. More specifically, the resistive element 14 is disposed between the pixel electrode 16 and the transistor 12 so that the extra charge charged in the pixel electrode 16 is not supplied to the transistor 12 at once and directly. The rapid fluctuation of the potential of the source electrode or the drain electrode is reduced.
[0041]
In the present embodiment, the resistance element 14 is made of a semiconductor and has a resistance value of several tens of kΩ. Specifically, it has a resistance value of 20 kΩ to 50 kΩ. However, the present invention is not limited to this, and a metal or the like constituting a gate electrode or a wiring may be used as a material constituting the resistance element 14. Further, the shape of the resistance element 14 arranged in the pixel is not particularly limited, and can be arbitrarily set. Further, the resistance value of the resistance element 14 is not particularly limited, and the constituent material and shape may be arbitrarily set so that a desired resistance value can be obtained.
[0042]
A feature of each pixel shown in FIGS. 5A and 5B is that a capacitor element 15 serving as a protection unit 21 is disposed. The capacitor element 15 alleviates rapid fluctuations in the potential of the transistor 12 caused by excess charges charged in the pixel electrode 16. More specifically, the capacitive element 15 charges or discharges extra charges charged in the pixel electrode 16. That is, excessive charges charged in the pixel electrode 16 are distributed to the capacitor 15 and the transistor 12, so that a sudden change in the potential of the source electrode or the drain electrode of the transistor 12 is reduced.
[0043]
In this embodiment, the capacitor 15 is formed of a stacked body of a semiconductor, a gate insulating film, and a gate electrode, and has a capacitance value of several hundred fF. Specifically, it has a capacitance value of 100 to 200 fF. However, the present invention is not limited to this, and the material constituting the capacitor 15 and the shape of the capacitor 15 can be arbitrarily set. Further, the capacitance value of the capacitor 15 is not particularly limited, and a material and a shape to be configured may be arbitrarily set so that a desired capacitance value can be obtained.
[0044]
A feature of each pixel shown in FIGS. 6A and 6B is that a resistance element 14 serving as a protection means 21 and a transistor 22 having a gate-drain connected are arranged. The transistor 22 connected between the gate and the drain relieves a rapid change in the potential of the transistor 12 due to the extra charge charged in the pixel electrode 16. More specifically, the source electrode 23 of the transistor 22 is connected to the power supply line 18 or the power supply line 24 to which the counter electrode of the light emitting element is connected, and excess charge charged to the pixel electrode is transferred to the power supply line 18 or the power supply line 24. By discharging to a rapid level, a sudden change in the potential of the source electrode or the drain electrode of the transistor 12 is reduced. If the source electrode 23 is connected to the power supply line 18, the extra charge charged to the pixel electrode 16 is discharged to the power supply line 18, and the potential of the pixel electrode 16 becomes the potential of the power supply line 18 (power supply potential). V _DD ). Further, when the source electrode 23 is connected to the power supply line 24, the extra charge charged in the pixel electrode 16 is discharged to the power supply line 24, and the potential of the pixel electrode 16 becomes the potential of the power supply line ( Ground potential V _SS ). Thus, the potential of the pixel electrode 16 is set to the power supply potential V. _DD Or ground potential V _SS Is set to mitigate a rapid change in the potential of the source electrode or the drain electrode of the transistor 12.
[0045]
Note that a PN junction or PIN junction diode may be used instead of the transistor 22. When a diode is used, one electrode is connected to the pixel electrode and the other electrode is connected to the power supply line. In addition to the elements described above, elements having any structure may be used as long as they have a rectifying action.
[0046]
The P-type and N-type impurity regions, intrinsic semiconductor regions, and electrodes of the diode used here may be manufactured by a method similar to that of the transistor in the pixel portion or the transistor 22 in which the gate and drain are connected.
[0047]
Another feature other than the above is that the channel length (L) / channel width (W) of the transistor 12 is set to a value of 10 or more. The value of L / W is usually 0.1 to 2, but is set to 10 or more in the present invention. Then, since the gate-source capacitance of the transistor 12 itself is large, the transistor 12 can also serve as a capacitor element.
[0048]
Next, typical cross-sectional structures of one pixel of the semiconductor device illustrated in FIGS. 4 to 6 are illustrated in FIGS. 7A to 7D show a state where a transistor and a light-emitting element are formed over a substrate. FIG. 7A is a cross-sectional view taken along the line DD ｀ of the pixels in FIGS. 4 to 6 and is a cross-sectional view of the transistor 11 and the transistor 13. FIG. 7B is a cross-sectional view taken along line EE ′ of the pixel in FIG. 4, and is a cross-sectional view of the resistance element 14 and the pixel electrode 16. FIG. 7C is a cross-sectional view taken along the line FF of the pixel in FIG. 5, and is a cross-sectional view of the capacitor 15 and the pixel electrode 16. FIG. 7D is a cross-sectional view taken along the line GG of the pixel of FIG. 6, and is a cross-sectional view of the transistor 22 and the pixel electrode 16.
[0049]
7A to 7D, reference numeral 201 denotes a substrate, which can be a glass substrate, a ceramic substrate, a quartz substrate, a silicon substrate, or a plastic substrate (including a plastic film). Reference numeral 202 denotes a base film made of a silicon nitride oxide film, a silicon oxynitride film, or a laminated film thereof.
[0050]
A semiconductor serving as an active layer of the transistors 11 and 13 is provided over the base film 202, and the active layer includes a source region 203, a drain region 204, and a source region 207. LDD regions 205a to 205h and channel formation regions 206a to 206d are provided between the source region 203 and the drain region 204 and between the drain region 204 and the source region 207. Note that the active layers of the transistors 11 and 13 are n-type impurity regions. At the same time, a semiconductor 208 constituting the resistive element 14 and a semiconductor constituting the capacitive element 15 are provided. As a semiconductor constituting the capacitor 15, a p-type impurity region 209 and an intrinsic semiconductor 210 are provided. Further, a semiconductor serving as an active layer of the transistor 22 is provided, and the active layer includes a source region 211 and a drain region 212. LDD regions 213 and 214 and a channel formation region 215 are provided between the source region 211 and the drain region 212.
[0051]
On the semiconductor, a silicon oxide film, a silicon oxynitride film (containing 25 to 35 atomic% of Si, 55 to 65 atomic% of oxygen, 1 to 20 atomic% of nitrogen, and 0.1 to 10 atomic% of hydrogen) A gate insulating film 216 using an aluminum nitride film, an aluminum oxide film, an aluminum oxynitride film, or a stacked film of these insulating films and a silicon nitride film is provided. The gate insulating film 216 functions as a gate insulating film for the transistors 11, 13, and 22. Further, the gate insulating film 216 functions as a dielectric of the capacitor 15.
[0052]
On the gate insulating film 216, a metal layer is patterned so that the gate electrodes 217 and 218 of the transistor 11, the gate electrodes 219 and 220 of the transistor 13, the electrodes 221 and 222 constituting the capacitor 15, and the gate electrode of the transistor 22 223 is provided. Each gate electrode of each transistor is different in shape of the first layer electrode (tantalum nitride film) and the second layer electrode (tungsten film), and the first layer electrode is more linear than the second layer electrode. The width is wide.
[0053]
An insulating film containing silicon such as a silicon nitride film is provided as a first interlayer insulating film 224 on the gate electrode and the electrode constituting the capacitor 15 by 0.1 μm to 0.2 μm. Next, as the second interlayer insulating film 225, an insulating film made of an organic resin such as acrylic, polyimide, polyamide, and BCB (benzocyclobutene) is provided in an amount of 0.7 to 5 μm (preferably 2 to 4 μm). Subsequently, a film containing silicon such as a silicon nitride film formed by a sputtering method is provided as the third interlayer insulating film 226 by 0.1 μm to 0.2 μm. Note that the second interlayer insulating film 225 is preferably a film having excellent flatness because it has a strong meaning of alleviating unevenness due to the transistor formed on the substrate 201 and flattening.
[0054]
Next, a transparent conductive film such as ITO is patterned to provide pixel electrodes 234 to 236 of 0.1 μm to 0.2 μm. Subsequently, contact holes are formed in the gate insulating film 216, the first interlayer insulating film 224, the second interlayer insulating film 225, and the third interlayer insulating film 226 by dry etching, and the conductive film formed so as to cover the contact holes is formed. By patterning the film, a Ti film of 0.1 μm, an Al film of 0.35 μm, and a Ti film of 0.15 μm are stacked as the source wirings 227, 229, 231 and the drain wirings 228, 233. At the same time, a wiring 230 that connects the semiconductor 208 and the pixel electrode 234 and a wiring 231 that connects the p-type impurity region 209 and the pixel electrode 234 are provided. Note that the drain wiring 233 connects the drain electrode and the gate electrode of the transistor 22.
[0055]
On the pixel electrode and the wiring, as the fourth interlayer insulating film 237, an insulating film made of an organic resin such as acrylic, polyimide, polyamide, and BCB (benzocyclobutene) is 0.7 to 5 μm (preferably 2 to 4 μm). Provided. The fourth interlayer insulating film 237 is formed by applying and baking by a spin coating method, and then exposing a portion where an opening is to be formed using a photomask. When the opening is formed, part of the pixel electrodes 234 to 236 is exposed in the opening.
[0056]
In this structure, the organic resin can be used to round the cross section of the opening, so that the coverage of the light emitting layer and the counter electrode to be formed later can be improved, and the light emitting region is reduced. The defect called shrink can be reduced.
[0057]
Next, the light emitting layer 238 is provided by an evaporation method, and the counter electrode 239 is further provided by an evaporation method. A stacked body of the pixel electrodes 234 to 236, the light emitting layer 238, and the counter electrode 239 corresponds to a light emitting element. In this manner, the TFT and the light emitting element are provided over the substrate 101.
[0058]
Next, FIGS. 8 and 9 show photographs obtained by enlarging the panel on which the pixels were actually manufactured by an optical microscope at about 695 times. Each pixel illustrated in FIG. 8 corresponds to the pixel illustrated in FIG. 4, and each pixel illustrated in FIG. 9 corresponds to the pixel illustrated in FIG. 5. As specific specifications, the channel length of the transistor 12 was 390 μm, the channel width was 5 μm, and the channel lengths of the transistors 11 and 13 were 4.5 μm. The pixel pitch was 63 μm in length and 189 μm in width. In the pixel shown in FIG. 8, the shape of the resistance element 14 is S-shaped unlike the pixel shown in FIG. 8 and 9, the transistors 11 and 13 are covered with wiring.
[0059]
In the present invention having the above-described configuration, the resistive element 14 is disposed between the pixel electrode 16 and the transistor 12 so that the extra charge charged in the pixel electrode 16 is not supplied to the transistor 12 at once and directly. The rapid fluctuation of the potential of the source electrode or the drain electrode of the transistor 12 is alleviated. In addition, the capacitor 15 is disposed between the pixel electrode 16 and the transistor 12, and excess charge charged in the pixel electrode 16 is distributed to the capacitor 15 and the transistor 12, so that the source electrode or drain of the transistor 12 Alleviates sudden fluctuations in electrode potential. Further, the transistor 22 having a gate-drain connection is disposed between the pixel electrode 16 and the transistor 12, and the extra charge charged in the pixel electrode 16 is discharged to the power supply line, whereby the source electrode of the transistor 12 is discharged. Alternatively, rapid fluctuations in the potential of the drain electrode are alleviated. As described above, the present invention prevents electrostatic breakdown by mitigating rapid fluctuations in the potential of the source electrode or the drain electrode of the transistor due to charges charged in the pixel electrode. Further, the present invention prevents electrostatic breakdown during the manufacturing process, particularly electrostatic breakdown in a state where the pixel electrode is manufactured.
[0060]
(Embodiment 3)
In the above-described first and second embodiments, the circuit diagram in a state where the pixel electrode is manufactured is shown; however, in this embodiment, the circuit diagram in the state where the light-emitting element is manufactured will be described with reference to FIGS.
[0061]
Each pixel shown in FIGS. 10A to 10D corresponds to each pixel shown in FIGS. In all the pixels, protective means corresponding to one or a plurality selected from the resistor element 14, the capacitor element 15, and the rectifier element 22 is provided between the transistor 12 and the pixel electrode of the light emitting element 25. The counter electrode of the light emitting element 25 is connected to the power line 24.
[0062]
Further, in each pixel shown in FIGS. 10A to 10D, the transistors 11 and 13 are n-channel type and the transistor 12 is p-channel type. However, in the present invention, the conductivity type of the transistor is particularly limited. Not. Further, the structure of the pixel is not limited to the structure having the transistors 11 to 13 and the protection means. The essential structure of the present invention is that each pixel is provided with a protection means, and the protection means is disposed between the pixel electrode of the light emitting element and the source electrode or the drain electrode of the transistor. The source electrode or the drain electrode of the transistor is a transistor connected to the pixel electrode of the light emitting element if the protection means is not disposed.
[0063]
Note that in FIG. 10D, any of a transistor and a diode in which a drain electrode and a gate electrode are connected may be used as the rectifying element 22.
[0064]
This embodiment can be arbitrarily combined with Embodiments 1 and 2.
[0065]
(Embodiment 4)
In this embodiment, the entire structure of the semiconductor device will be described with reference to FIGS. First, a state where an element substrate provided with a transistor or the like is sealed with a sealing material will be described with reference to FIGS.
[0066]
FIG. 11A is a cross-sectional view simply showing a pixel portion and a driver circuit of the pixel shown in FIGS. In the pixel portion of FIG. 11A, the L / W value of the transistor 12 is originally set to 10 or more, but is simplified here. In the drive circuit, part of the counter electrode 135 is connected to the lead wiring 140. The lead-out wiring 140 is connected to an input terminal connected to an FPC (flexible printed circuit).
[0067]
FIG. 11B is a cross-sectional view illustrating a portion (FPC connection portion 145) connected to the FPC. On the gate insulating film 113, a lead wiring 144 formed of the same conductor as the gate electrode is provided. The lead wiring 144 is connected to the lead wiring 140 through the contact hole 143 in the opening of the first organic resin film 123. An opening of the first organic resin film 123 is provided on the lead wiring 144, and the first inorganic insulating film 122 and the second inorganic insulating film 124 are removed by etching, so that the lead wiring 144 is exposed. Is done. An input terminal 145 made of the same transparent conductor as the pixel electrode 131 is provided on the lead wiring 144. The input terminal 145 is connected to an FPC terminal 152 via an anisotropic conductive resin 150. 151 is a protective film for wiring, and 153 is a film film. Reference numeral 141 denotes a cover material, which is sealed with a sealing material 142 having high airtightness and low degassing.
[0068]
Next, the entire structure of the semiconductor device will be described with reference to FIG. FIG. 12 is a top view of a semiconductor device formed by sealing an element substrate over which a transistor is formed with a sealing material, and FIG. 12B is a cross-sectional view taken along line BB ′ in FIG. FIG. 12C is a cross-sectional view taken along the line AA ′ of FIG.
[0069]
12A to 12C, on a substrate 401, a pixel portion (display portion) 402, a signal line driver circuit 403 provided so as to surround the pixel portion 402, a scanning line driver circuit 404a, 404b and protection means 405 are arranged, and a sealing material 406 is provided so as to surround them. For the structure of the pixel portion 402, the above embodiment and the description thereof may be referred to. As the sealing material 406, a glass material, a metal material (typically a stainless steel material), a ceramic material, or a plastic material (including a plastic film) is used.
[0070]
This sealant 406 may be provided so as to overlap with part of the signal line driver circuit 403, the scan line driver circuits 404 a and 404 b, and the protection means 405. A sealing material 407 is provided using the sealing material 406, and a sealed space 408 is formed by the substrate 401, the sealing material 406, and the sealing material 407. The sealing material 407 is previously provided with a hygroscopic agent (barium oxide, calcium oxide, or the like) 409 in the recess, and adsorbs moisture, oxygen, or the like inside the sealed space 408 to maintain a clean atmosphere. Plays a role in suppressing deterioration. This concave portion is covered with a fine mesh-shaped cover material 410, and the cover material 410 allows air and moisture to pass therethrough and does not allow the moisture absorbent 409 to pass. Note that the sealed space 408 may be filled with a rare gas such as nitrogen or argon, and may be filled with a resin or a liquid if inactive.
[0071]
An input terminal portion 411 for transmitting signals to the signal line driver circuit 403 and the scan line driver circuits 404a and 404b is provided on the substrate 401, and a video signal or the like is connected to the input terminal portion 411 via the FPC 412. Data signals are transmitted. A cross section of the input terminal portion 411 is as shown in FIG. 12B. An input wiring 413 including a wiring formed simultaneously with a scanning line or a signal line and a wiring 415 provided on the FPC 412 side are connected to a conductor 416. Electrical connection is made using a dispersed resin 417. Note that the conductor 416 may be a spherical polymer compound that is plated with gold or silver.
[0072]
In this embodiment mode, protection means is provided between the pixel portion 202 and the input terminal portion 411 and the signal line driver circuit 403. The protective means 405 provided between the input terminal portion 411 and the signal line driver circuit 403 plays a role of releasing the pulse signal to the outside when static electricity such as a sudden pulse signal enters between them. . Needless to say, the protection means may be provided at another location, for example, between the pixel portion 402 and the signal line driver circuit 403 or between the pixel portion 402 and the scanning line driver circuits 404a and 404b.
[0073]
This embodiment can be arbitrarily combined with Embodiments 1 to 3.
[0074]
(Embodiment 5)
In this embodiment mode, structures and operations of a signal line driver circuit and a scan line driver circuit that control pixels through signal lines and the like are briefly described with reference to FIGS.
[0075]
First, the signal line driver circuit is described with reference to FIG. A signal line driver circuit, a shift register 311, a first latch circuit 312, and a second latch circuit 313 are included. The shift register 311 includes a plurality of columns of flip-flop circuits (FF) and the like, and receives a clock signal (S-CLK), a start pulse (S-SP), and a clock inversion signal (S-CLKb). Sampling pulses are sequentially output according to the timing of these signals. The sampling pulse output from the shift register 311 is input to the first latch circuit 312. A digital video signal is input to the first latch circuit 312, and the video signal is held in each column in accordance with the timing at which the sampling pulse is input.
[0076]
When the first latch circuit 312 completes holding of the video signal up to the last column, a latch pulse is input to the second latch circuit 313 and held in the first latch circuit 312 during the horizontal blanking period. The video signals are transferred all at once to the second latch circuit 313. Then, the video signal held in the second latch circuit 313 is simultaneously sent to the signal line S for one row. ₁ ~ S _x Is input. The video signal held in the second latch circuit 313 is the signal line S. ₁ ~ S _x In the shift register 311, the sampling pulse is output again. Thereafter, this operation is repeated.
[0077]
Next, the scan line driver circuit is described with reference to FIG. Each scanning line driver circuit includes a shift register 314 and a buffer 315. In brief, the shift register 314 sequentially outputs sampling pulses in accordance with a clock signal (G-CLK), a start pulse (G-SP), and a clock inversion signal (G-CLKb). Thereafter, the sampling pulse amplified by the buffer 315 is input to the scanning line and selected one row at a time. The pixel controlled by the selected scanning line is sequentially connected to the signal line S. ₁ ~ S _x A digital video signal is written from. Note that a level shifter circuit may be provided between the shift register 314 and the buffer 315. By arranging the level shifter circuit, the voltage amplitude of the logic circuit portion and the buffer portion can be changed.
[0078]
This embodiment can be arbitrarily combined with Embodiments 1 to 4.
[0079]
(Embodiment 6)
In this embodiment mode, a driving method applied to the semiconductor device of the present invention will be briefly described.
[0080]
Driving methods for displaying a multi-gradation image are roughly classified into an analog gradation method and a digital gradation method, but both methods can be applied to the semiconductor device of the present invention. The difference between the two systems is in the method of controlling the light emitting element in each of the light emitting and non-light emitting states of the light emitting element. The former analog gradation method is a method of obtaining gradation by controlling the amount of current flowing through the light emitting element. The latter digital gradation method is a method in which the light emitting element is driven only in two states: an on state (a state where the luminance is approximately 100%) and an off state (a state where the luminance is approximately 0%). .
[0081]
In the digital gradation method, in order to express a multi-gradation image, a method combining a digital gradation method and an area gradation method (hereinafter referred to as an area gradation method) or a digital gradation method and a time gradation method. Has been proposed (hereinafter referred to as a time gradation method).
[0082]
In the area gradation method, one pixel is divided into a plurality of sub-pixels, and light emission or non-light emission is selected in each sub-pixel, so that there is a difference between the area emitting light in one pixel and the other areas. This is a method for expressing gradation. The time gradation method is a method for performing gradation expression by controlling the time during which the light emitting element emits light, as reported in Japanese Patent Application Laid-Open No. 2001-5426. Specifically, one frame period is divided into a plurality of subframe periods having different lengths, and light emission or non-light emission of the light-emitting element in each period is selected, thereby the length of time during which light is emitted within one frame period The gradation is expressed with the difference of.
[0083]
The semiconductor device of the present invention can employ either an analog gradation method or a digital gradation method. In addition, both monochromatic display and multicolor display can be performed. In the case of performing multicolor display, a plurality of subpixels corresponding to each color of RGB are provided in one pixel. Even if the same voltage is applied to each sub-pixel, the luminance of the emitted light may differ depending on the current density of each of the RGB materials and the transmittance of the color filter. Therefore, it is preferable to change the potential of the power supply line in each subpixel corresponding to each color.
[0084]
This embodiment can be arbitrarily combined with Embodiments 1 to 5.
[0085]
(Embodiment 7)
As an electronic device to which the present invention is applied, a video camera, a digital camera, a goggle type display (head mounted display), a navigation system, a sound reproduction device (car audio, audio component, etc.), a notebook type personal computer, a game device, portable information Plays back a recording medium such as a terminal (mobile computer, mobile phone, portable game machine or electronic book), and a recording medium (specifically, Digital Versatile Disc (DVD)) and displays the image. And the like). Specific examples of these electronic devices are shown in FIGS.
[0086]
FIG. 14A illustrates a light-emitting device, which includes a housing 2001, a support base 2002, a display portion 2003, a speaker portion 2004, a video input terminal 2005, and the like. The present invention can be applied to the display portion 2003. Since the light-emitting device is a self-luminous type, a backlight is not necessary and a display portion thinner than a liquid crystal display can be obtained. Note that the light emitting device includes all display devices for displaying information such as for personal computers, for receiving TV broadcasts, and for displaying advertisements.
[0087]
FIG. 14B shows a digital still camera, which includes a main body 2101, a display portion 2102, an image receiving portion 2103, operation keys 2104, an external connection port 2105, a shutter 2106, and the like. The present invention can be applied to the display portion 2102.
[0088]
FIG. 14C illustrates a laptop personal computer, which includes a main body 2201, a housing 2202, a display portion 2203, a keyboard 2204, an external connection port 2205, a pointing mouse 2206, and the like. The present invention can be applied to the display portion 2203.
[0089]
FIG. 14D illustrates a mobile computer, which includes a main body 2301, a display portion 2302, a switch 2303, operation keys 2304, an infrared port 2305, and the like. The present invention can be applied to the display portion 2302.
[0090]
FIG. 14E shows a portable image reproducing device (specifically, a DVD reproducing device) provided with a recording medium, which includes a main body 2401, a housing 2402, a display portion A2403, a display portion B2404, and a recording medium (DVD or the like). A reading unit 2405, operation keys 2406, a speaker unit 2407, and the like are included. Although the display portion A 2403 mainly displays image information and the display portion B 2404 mainly displays character information, the present invention can be applied to the display portions A, B 2403, and 2404. Note that an image reproducing device provided with a recording medium includes a home game machine and the like.
[0091]
FIG. 14F illustrates a goggle type display (head mounted display), which includes a main body 2501, a display portion 2502, and an arm portion 2503. The present invention can be applied to the display portion 2502.
[0092]
FIG. 14G shows a video camera, which includes a main body 2601, a display portion 2602, a housing 2603, an external connection port 2604, a remote control receiving portion 2605, an image receiving portion 2606, a battery 2607, an audio input portion 2608, operation keys 2609, and the like. . The present invention can be applied to the display portion 2602.
[0093]
FIG. 14H illustrates a mobile phone, which includes a main body 2701, a housing 2702, a display portion 2703, an audio input portion 2704, an audio output portion 2705, operation keys 2706, an external connection port 2707, an antenna 2708, and the like. The present invention can be applied to the display portion 2703. Note that the display portion 2703 can suppress current consumption of the mobile phone by displaying white characters on a black background.
[0094]
If the emission luminance of the luminescent material is increased in the future, the light including the output image information can be enlarged and projected by a lens or the like to be used for a front type or rear type projector.
[0095]
In addition, the electronic devices often display information distributed through electronic communication lines such as the Internet and CATV (cable television), and in particular, opportunities to display moving image information are increasing. Since the response speed of the light emitting material is very high, the light emitting device is preferable for displaying moving images.
[0096]
In addition, since the light emitting device consumes power in the light emitting portion, it is desirable to display information so that the light emitting portion is minimized. Therefore, when a light emitting device is used for a display unit mainly including character information, such as a portable information terminal, particularly a mobile phone or a sound reproduction device, it is driven so that character information is formed by the light emitting part with the non-light emitting part as the background It is desirable to do.
[0097]
As described above, the applicable range of the present invention is so wide that it can be used for electronic devices in various fields. Further, the electronic device of this embodiment may use the semiconductor device having any structure described in Embodiments 1 to 6.
[0098]
(Embodiment 8)
In the electronic device described in mode 7, a module in which an IC including a controller, a power supply circuit, and the like is mounted is mounted on a panel in which a light emitting element is sealed. Both the module and the panel correspond to one mode of the display device. Here, a specific configuration of the module will be described.
[0099]
FIG. 16A shows an external view of a module in which a controller 801 and a power supply circuit 802 are mounted on a panel 800. The panel 800 includes a pixel portion 803 in which a light emitting element is provided in each pixel, a scanning line driver circuit 804 that selects a pixel included in the pixel portion 803, and a signal line driver circuit that supplies a video signal to the selected pixel. 805 is provided. The printed circuit board 806 is provided with a controller 801 and a power supply circuit 802, and various signals and power supply voltages output from the controller 801 or the power supply circuit 802 are supplied to the pixel portion 803 of the panel 800, the scanning line driving circuit 804, and The signal is supplied to the signal line driver circuit 805. The power supply voltage and various signals to the printed circuit board 806 are supplied via an interface (I / F) unit 808 in which a plurality of input terminals are arranged.
[0100]
In this embodiment, the printed circuit board 806 is mounted on the panel 800 using FPC, but the present invention is not necessarily limited to this configuration. The controller 801 and the power supply circuit 802 may be directly mounted on the panel 800 using a COG (Chip on Glass) method. Further, in the printed circuit board 806, noise may occur in a power supply voltage or a signal, or a signal may be slow to rise due to a capacitance formed between the drawn wirings, a resistance of the wiring itself, or the like. Therefore, various elements such as a capacitor and a buffer may be provided on the printed circuit board 806 to prevent noise from being applied to the power supply voltage and the signal and the rise of the signal from being slowed down.
[0101]
FIG. 16B is a block diagram illustrating a structure of the printed circuit board 806. Various signals and power supply voltage supplied to the interface 808 are supplied to the controller 801 and the power supply voltage 802. The controller 801 includes an analog interface circuit 809, a phase locked loop (PLL) 810, a control signal generation circuit 811, and SRAMs (Static Random Access Memory) 812 and 813. Here, SRAM is used, but instead of SRAM, SDRAM or dynamic random access memory (DRAM) can be used if data can be written and read at high speed.
[0102]
The analog video signal supplied via the interface 808 is A / D converted and parallel-serial converted in the analog interface circuit 809 and input to the control signal generation circuit 811 as a digital video signal corresponding to each color of R, G, and B. Is done. Further, based on various signals supplied via the interface 808, an analog interface circuit 809 generates an Hsync signal, a Vsync signal, a clock signal CLK, and the like, and inputs them to the control signal generation circuit 811. When a digital video signal is directly input to the interface 808, the analog interface circuit 809 may not be provided.
[0103]
The phase locked loop 810 has a function of matching the frequency of various signals supplied via the interface 808 with the phase of the operating frequency of the control signal generation circuit 811. The operation frequency of the control signal generation circuit 811 is not necessarily the same as the frequency of various signals supplied via the interface 808, but the operation frequency of the control signal generation circuit 811 is adjusted in the phase locked loop 810 so as to be synchronized with each other. .
[0104]
The video signal input to the control signal generation circuit 811 is once written into the SRAMs 812 and 813 and held. The control signal generation circuit 811 reads out video signals corresponding to all the pixels bit by bit out of the video signals of all bits held in the SRAM 812, and supplies them to the signal line driver circuit 805 of the panel 800. The control signal generation circuit 811 supplies information regarding a period during which the light emitting element of each bit emits light to the scanning line driving circuit 804 of the panel 800. The power supply circuit 802 supplies a predetermined power supply voltage to the signal line driver circuit 805, the scan line driver circuit 804, and the pixel portion 803 of the panel 800.
[0105]
Next, the structure of the power supply circuit 802 will be described with reference to FIG. The power supply circuit 802 includes a switching regulator 854 and a series regulator 855 using four switching regulator controls 860. In general, a switching regulator is smaller and lighter than a series regulator, and can perform step-up and positive / negative inversion as well as step-down. On the other hand, series regulators are used only for step-down, but output voltage accuracy is better than switching regulators, and almost no ripple or noise occurs. In the power supply circuit 802 of this embodiment, both are used in combination.
[0106]
The switching regulator 854 shown in FIG. 17 includes a switching regulator control (SWR) 860, an attenuator (ATT) 861, a transformer (T) 862, an inductor (L) 863, a reference power supply (Vref) 864, an oscillation circuit ( OSC) 865, a diode 866, a bipolar transistor 867, a variable resistor 868, and a capacitor 869. When the voltage of the external Li ion battery (3.6 V) or the like is converted in the switching regulator 854, a power supply voltage supplied to the cathode and a power supply voltage supplied to the switching regulator 854 are generated.
[0107]
The series regulator 855 includes a band gap circuit (BG) 870, an amplifier 871, operational amplifiers 1 to 6, a current source 873, a variable resistor 874, and a bipolar transistor 875, and is supplied with the power supply voltage generated in the switching regulator 854. . The series regulator 855 uses a power supply voltage generated in the switching regulator 854 and based on a constant voltage generated in the band gap circuit 870, wiring for supplying current to the anodes of the light emitting elements of the respective colors (current supply lines) ) To generate a DC power supply voltage.
[0108]
Note that the current source 873 is used in a driving method in which a current of a video signal is written to a pixel. In this case, the current generated in the current source 873 is supplied to the signal line driver circuit 805 of the panel 800. Note that in the case of a driving method in which a voltage of a video signal is written to a pixel, the current source 873 is not necessarily provided.
[0109]
Next, the operation of the series regulator 855 which is a component of the power supply circuit 802 will be briefly described with reference to FIG. The band gap circuit 870 generates a reference voltage, and the reference voltage is amplified by an amplifier 871, and a power supply of 10 V is created here. The voltage generated by the band gap circuit 870 is also used for the current source 873.
Band gap circuit 870 is controlled by an external ON / OFF terminal. This is because the voltage supplied from the switching regulator 854 may not be stable mainly when the power supply is turned on, and it is difficult to obtain a desired signal from the band gap circuit 870 if used as it is. Therefore, a delay is provided by the ON / OFF terminal to suppress such a phenomenon.
[0110]
The operational amplifier 1 supplies a voltage obtained by dividing the voltage of + 10V supplied from the amplifier 871 to + 5V by an internal resistor, and functions as a buffer. The operational amplifier 2 functions as a buffer by supplying the + 10V voltage supplied from the amplifier 871 to + 8V by an internal resistor. The operational amplifier 3 supplies a voltage obtained by dividing the + 10V voltage supplied from the amplifier 871 by an external variable resistor, and functions as a buffer. The operational amplifiers 4 to 6 supply a voltage obtained by dividing the + 10V voltage supplied from the amplifier 871 by an external variable resistor, and function as a buffer. Since the operational amplifiers 4 to 6 require a large amount of output current, a transistor 875 is used for the final output stage. The current source 873 converts the reference voltage generated by the band gap circuit 870 into a current with an external resistor, inverts it with an internal current mirror, and outputs it. Since the amount of current supplied to the current source 873 may be affected by the temperature change, it is necessary to suppress the temperature change to be small. In this configuration, the series regulator 855 configures six DC power sources by the +12 V power source configured by the switching regulator 854.
[0111]
Next, the configuration and operation of the switching regulator 854 which is a component of the power supply circuit 802 will be briefly described with reference to FIG. The switching regulator control (SWR) 860 includes error amplifiers 1 to 4, comparators 1 to 4, and output circuits 1 to 4. The ATT 861 includes resistors 890 and 891. The error amplifiers 1 to 4 detect the output voltage of the switching regulator. The error amplifiers 1 to 4 have a fixed voltage gain and can perform stable phase compensation for the system. Comparators 1 to 4 are voltage comparators having one inverting input and two non-inverting inputs, and are voltage-pulse width converters that control the on-time of output pulses in accordance with the input voltage. Since the other components of the switching regulator 854 have been described above, they are omitted.
[0112]
In the switching regulator 854, the transistor 867 always operates in either the on or off mode. The DC output voltage is stabilized by changing the time ratio of this mode. Therefore, the power loss of the transistor 867 is small, and the power source has high power conversion efficiency. However, since the on / off switching frequency is high, the transformer 862 can be miniaturized. Here, the switching regulator 854 inputs a voltage of +3.6 V and boosts the voltage to constitute six DC power supplies. The output voltages are + 12V, -2V, + 8V, -12V, + 5V, and -3V. Among them, + 12V and -2V, + 5V and -3V are generated from the same circuit.
[0113]
Next, the configuration of the ON / OFF terminal and the band gap circuit 870 will be described with reference to FIG. The band gap circuit 870 includes transistors 892 to 899 and resistors 900 to 903. The output terminal is connected to the amplifier 871. The band gap circuit 870 having the configuration of FIG. 20 has a function of generating a reference voltage.
Next, the configuration of an amplifier (DC amplifier) 871 that is a component of the series regulator 855 will be described with reference to FIG. The amplifier 871 includes transistors 905 to 915, resistors 916 to 920, and a capacitor 922. A signal is supplied from the band gap circuit 870 to the input terminal. A signal output from the output terminal is supplied to the operational amplifiers 1 to 6.
The configuration of the operational amplifiers 1 to 3 will be described with reference to FIG. The operational amplifiers 1 to 3 include transistors 925 to 935 and 940, resistors 936 to 939 and 941, and a capacitor element 942. A signal is supplied from the band cap circuit 870 to the input terminal. A signal output from the output terminal is supplied to the panel 800.
The configuration of the operational amplifiers 4 to 6 will be described with reference to FIG. The operational amplifiers 4 to 6 include transistors 945 to 955 and 960, resistors 956 to 959, 961 and 962, and a capacitor 962. A signal is supplied from the band cap circuit 870 to the input terminal. A signal output from the output terminal is applied to a wiring (current supply line) for supplying a current to the anode of each color light emitting element.
The configuration of the current source 873 will be described with reference to FIG. The current source 873 includes transistors 965 to 973, resistors 974 to 980, and capacitor elements 981 and 982. A signal is supplied from the band gap circuit 870 to the input terminal.
[0114]
The power supply circuit 802 and the controller 801 having the above configuration are mounted on the panel 800, and a module according to an embodiment of the present invention is completed.
[0115]
【Example】
Example 1
In this example, the results of an electrostatic breakdown test using an electrostatic breakdown tester will be described with reference to Table 1. This experiment compares the characteristics of the driving TFTs with and without protective means, and more specifically, the threshold voltage (Vth) of each driving TFT and the rise The result of comparing the characteristics of the voltage (Shift) will be described. The protection means is disposed between the pixel electrode of the light emitting element and the drain or source of the driving TFT, and as shown in the above embodiment, the protection means includes a resistance element, a capacitor One or a plurality selected from an element and a rectifying element are provided. The rectifying element corresponds to a transistor or a diode in which a drain electrode and a gate electrode are connected.
[0116]
First, the horizontal axis in Table 1 will be described. In order from the left, normal corresponds to the case where no protection means is provided. Other than normal, it has protection means, res1 has a resistance element (20kΩ) as protection means, res2 has a resistance element (50kΩ) as protection means, cap1 has a capacitance element (100fF) as protection means This is the case.
The res + Di has a resistance element and a rectifying element as protection means, and the resistance element is connected in series to the driving TFT, and the rectifying element is connected in parallel. The rectifying element at this time corresponds to a P-type TFT (channel length (L) is 8.5 μm, channel width (W) is 3 μm) in which the gate and drain are connected.
Di (P) corresponds to the case of having a resistance element and a rectifying element connected in series as protection means. The rectifying element at this time corresponds to a P-type TFT (L is 5 μm, W is 5 μm) in which the gate and drain are connected.
Di (N) corresponds to the case of having a resistance element and a rectifying element connected in series as a protection means. The rectifying element at this time corresponds to an N-type TFT (L is 5 μm, W is 5 μm) in which the gate and the drain are connected.
Di (PIN) corresponds to the case where a resistance element and a rectifier element connected in series are provided as protection means. The rectifying element at this time corresponds to a PIN junction diode (I layer portion has L of 1 μm and W of 15.5 μm). All the driving TFTs have L of 390 μm and W of 5 μm.
[0117]
[Table 1]

[0118]
This experiment was performed for all the above samples. First, as an initial state, the threshold voltage and the rising voltage of each driving TFT were measured. Next, a voltage value of 2.5 kV was applied to the terminal to which the pixel electrode of the light emitting element is connected (drain side terminal) five times at intervals of 1 second, and then the threshold voltage and the rising voltage were measured again. .
And in each sample, the initial state and the absolute value of the amount of change (difference) after each voltage value was applied were determined. Table 1 shows the amount of change in threshold voltage (ΔVth) and the amount of change in rising voltage (ΔShift) at that time. The rising voltage is V when the inversion layer starts to be formed, or when current starts to flow on a log scale. _G It corresponds to.
[0119]
As shown in Table 1, it can be seen that the threshold voltage fluctuation and the rise voltage fluctuation are more relaxed in the sample having the protection means than in the normal sample.
[0120]
【The invention's effect】
According to the present invention, a resistive element is arranged between a pixel electrode and a transistor so that extra charge charged to the pixel electrode is not supplied to the transistor at once and directly. Mitigates sudden fluctuations in potential. In addition, a capacitor is arranged between the pixel electrode and the transistor, and excess charge charged to the pixel electrode is distributed to the capacitor and the transistor, so that the potential of the source electrode or the drain electrode of the transistor is rapidly increased. Alleviate any fluctuations.
[0121]
In addition, by disposing a diode between the pixel electrode and the transistor and discharging the extra charge charged in the pixel electrode to the power supply line, a rapid change in the potential of the source electrode or the drain electrode of the transistor is reduced. As described above, the present invention prevents electrostatic breakdown by mitigating rapid fluctuations in the potential of the source electrode or the drain electrode of the transistor due to charges charged in the pixel electrode. In addition, the present invention prevents electrostatic breakdown in the manufacturing process, particularly electrostatic breakdown in a state where the pixel electrode is manufactured.
[Brief description of the drawings]
1A and 1B are a top view and a circuit diagram of a semiconductor device of the present invention.
FIG. 2 is a cross-sectional view of a semiconductor device of the present invention.
FIG. 3 is a top view photograph of a pixel included in a semiconductor device of the present invention.
4A and 4B are a top view and a circuit diagram of a semiconductor device of the present invention.
FIGS. 5A and 5B are a top view and a circuit diagram of a semiconductor device of the invention. FIGS.
6A and 6B are a top view and a circuit diagram of a semiconductor device of the present invention.
FIG. 7 is a cross-sectional view of a semiconductor device of the present invention.
FIG. 8 is a top view photograph of pixels included in the semiconductor device of the present invention.
FIG. 9 is a top view photograph of a pixel provided in a semiconductor device of the present invention.
FIG. 10 is a circuit diagram of a semiconductor device of the present invention.
FIG. 11 is a cross-sectional view of a semiconductor device of the present invention.
FIG. 12 is an overall view of a semiconductor device of the present invention.
FIG. 13 is a diagram of a signal line driver circuit and a scan line driver circuit.
FIG. 14 is a diagram of an electronic device to which the present invention is applied.
FIG. 15 is a diagram of a semiconductor device.
FIG. 16 shows a module.
FIG 17 illustrates a power supply circuit.
FIG. 18 is a diagram showing a series regulator.
FIG. 19 shows a switching regulator.
20 shows a bandgap circuit. FIG.
FIG. 21 is a diagram showing a DC amplifier.
FIG 22 illustrates an operational amplifier.
FIG 23 illustrates an operational amplifier.
FIG. 24 is a diagram showing a current source.

Claims (9)

A plurality of pixels each having a light emitting element, a protection means, a first transistor, and a second transistor;
The first transistor has a gate as a scanning line, a source or drain as a signal line,
The other of the source and the drain is electrically connected to the gate of the second transistor;
In the second transistor, one of a source and a drain is electrically connected to the pixel electrode of the light-emitting element, and the other of the source and the drain is electrically connected to a first power supply line,
The protection means includes a diode that discharges a charge charged in a pixel electrode of the light emitting element to a second power supply line,
One electrode of the diode is electrically connected to the pixel electrode and one of a source or a drain of the second transistor,
The other electrode of the diode is electrically connected to the second power line ;
Wherein the first power supply line and the second power supply line and wherein a same power line der Rukoto. A plurality of pixels each having a light emitting element, a protection means, a first transistor, and a second transistor;
The first transistor has a gate as a scanning line, a source or drain as a signal line,
The other of the source and the drain is electrically connected to the gate of the second transistor;
In the second transistor, one of a source and a drain is electrically connected to the pixel electrode of the light-emitting element, and the other of the source and the drain is electrically connected to a first power supply line,
The protection means includes a third transistor that discharges a charge charged in a pixel electrode of the light emitting element to a second power supply line,
A gate of the third transistor is electrically connected to the pixel electrode, one of a source or a drain of the second transistor and one of a source or a drain of the third transistor;
The other of the source and the drain of the third transistor is electrically connected to the second power supply line ,
Wherein the first power supply line and the second power supply line and wherein a same power line der Rukoto. In claim 1,
The pixel further includes a third transistor;
In the third transistor, the gate is the reset line, one of the source and the drain is the other of the source and the drain of the first transistor and the gate of the second transistor, and the other of the source and the drain is the first A semiconductor device which is electrically connected to a power supply line. In claim 2,
The pixel further includes a fourth transistor;
In the fourth transistor, the gate is a reset line, one of the source and the drain is the other of the source and the drain of the first transistor and the gate of the second transistor, and the other of the source and the drain is the first A semiconductor device which is electrically connected to a power supply line. In any one of Claims 1 thru | or 4 ,
A value obtained by dividing the channel length of the second transistor by the channel width is 10 or more. In any one of Claims 1 thru | or 5 ,
The protection means further includes a resistance element,
One terminal of the resistive element is electrically connected to the pixel electrode of the light emitting element,
The other terminal of the resistance element is electrically connected to one of a source and a drain of the second transistor. In any one of Claims 1 thru | or 5 ,
The protection means further includes a capacitive element,
One electrode of the capacitor is electrically connected to one of the pixel electrode of the light emitting element and the source or drain of the second transistor,
The other electrode of the capacitor is electrically connected to the gate of the second transistor. In any one of Claims 1 thru | or 5 ,
The protection means further includes a resistance element and a capacitance element,
One terminal of the resistive element is electrically connected to the pixel electrode of the light emitting element,
The other terminal of the resistive element is electrically connected to one of a source or a drain of the second transistor;
One electrode of the capacitor is electrically connected to one of the pixel electrode of the light emitting element and the source or drain of the second transistor,
The other electrode of the capacitor is electrically connected to the gate of the second transistor. An electronic apparatus using the semiconductor device according to any one of claims 1 to 8 .

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