JP4585564B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP4585564B2
JP4585564B2 JP2007321792A JP2007321792A JP4585564B2 JP 4585564 B2 JP4585564 B2 JP 4585564B2 JP 2007321792 A JP2007321792 A JP 2007321792A JP 2007321792 A JP2007321792 A JP 2007321792A JP 4585564 B2 JP4585564 B2 JP 4585564B2
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JP
Japan
Prior art keywords
pad
bump
electrode
semiconductor device
bump electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP2007321792A
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English (en)
Japanese (ja)
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JP2008091947A5 (enExample
JP2008091947A (ja
Inventor
明彦 吉岡
進也 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
Original Assignee
Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Priority to JP2007321792A priority Critical patent/JP4585564B2/ja
Publication of JP2008091947A publication Critical patent/JP2008091947A/ja
Publication of JP2008091947A5 publication Critical patent/JP2008091947A5/ja
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Publication of JP4585564B2 publication Critical patent/JP4585564B2/ja
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)
JP2007321792A 2007-12-13 2007-12-13 半導体装置 Expired - Lifetime JP4585564B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007321792A JP4585564B2 (ja) 2007-12-13 2007-12-13 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007321792A JP4585564B2 (ja) 2007-12-13 2007-12-13 半導体装置

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP2005294902A Division JP4708148B2 (ja) 2005-10-07 2005-10-07 半導体装置

Publications (3)

Publication Number Publication Date
JP2008091947A JP2008091947A (ja) 2008-04-17
JP2008091947A5 JP2008091947A5 (enExample) 2009-09-03
JP4585564B2 true JP4585564B2 (ja) 2010-11-24

Family

ID=39375678

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007321792A Expired - Lifetime JP4585564B2 (ja) 2007-12-13 2007-12-13 半導体装置

Country Status (1)

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JP (1) JP4585564B2 (enExample)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101068623B1 (ko) * 2008-12-31 2011-09-28 주식회사 하이닉스반도체 Rfid 태그칩을 위한 플립칩 본딩 구조물

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01155641A (ja) * 1987-12-14 1989-06-19 Hitachi Ltd 半導体集積回路装置
JP2555924B2 (ja) * 1993-04-14 1996-11-20 日本電気株式会社 半導体装置
JP3855495B2 (ja) * 1998-10-16 2006-12-13 セイコーエプソン株式会社 半導体装置、それを用いた半導体実装基板、液晶表示装置、および電子機器
JP4021104B2 (ja) * 1999-08-05 2007-12-12 セイコーインスツル株式会社 バンプ電極を有する半導体装置
US6717270B1 (en) * 2003-04-09 2004-04-06 Motorola, Inc. Integrated circuit die I/O cells
JP3880600B2 (ja) * 2004-02-10 2007-02-14 松下電器産業株式会社 半導体装置およびその製造方法
JP4228948B2 (ja) * 2004-03-16 2009-02-25 日本電気株式会社 表示装置
JP2005268282A (ja) * 2004-03-16 2005-09-29 Nec Corp 半導体チップの実装体及びこれを用いた表示装置
JP4708148B2 (ja) * 2005-10-07 2011-06-22 ルネサスエレクトロニクス株式会社 半導体装置
JP4094656B2 (ja) * 2007-12-13 2008-06-04 株式会社ルネサステクノロジ 半導体装置

Also Published As

Publication number Publication date
JP2008091947A (ja) 2008-04-17

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