JP4584801B2 - Threshold detection device for variable length frame buffer - Google Patents

Description

  The present invention relates to a technique for extracting a permitted amount of data from a Queue buffer in units of frames after accumulating a plurality of variable-length frames in a Queue buffer, and in particular, rapidly increasing the amount of data (threshold). The present invention relates to a threshold detection device in a variable-length frame buffer for detecting and outputting.

2. Description of the Related Art Conventionally, there is known a variable-length frame buffer device that searches and notifies a buffer amount of a certain threshold value or less in a frame unit when buffering a plurality of variable-length frames and reporting a transmittable burst data amount in a frame unit. (For example, refer to Patent Document 1).
Japanese Patent Laying-Open No. 2005-27029 (page 11, etc.)

  However, in Patent Document 1, since it is necessary to search the buffer (memory) a plurality of times, there is a problem in that processing time is required and high-speed search (frame boundary detection) cannot be performed.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a threshold detection apparatus for a variable-length frame buffer that can perform threshold detection (frame boundary detection) in a variable-length frame buffer at a higher speed.

  A threshold detection apparatus for a variable length frame buffer according to the present invention includes a main signal memory for sequentially storing a plurality of variable length frames, which are supplied main signal data, for each byte, and a counter for each byte of the variable length frame. Increment the value by +1 and detect the last byte of the variable-length frame to sequentially store the counter value from the byte counter with the same address configuration as the main signal memory and the byte counter that clears the counter value And a control device that detects a frame boundary from a counter value stored in the threshold search memory based on the number of bytes specified by an output permission [Req] signal given from the outside. The

This control device outputs the distance [Dis] from the frame boundary, which is the frame boundary distance data, from the threshold search memory,
Maximum number of bytes that can be read [Act] = Output allowance [Req] −Distance [Dis]
To detect the frame boundary.

  Preferably, data is written between the variable length frames and the variable length frames in the main signal memory of the present invention without any gap.

  According to the present invention, the distance from the frame boundary is written in the threshold search memory, and the frame distance is obtained by subtracting the distance [Dis] from the frame boundary, which is the frame boundary distance data, from the output permission [Req]. As a result, the maximum number of bytes that can be output in units of frames can be calculated in a single memory (threshold search memory) search, thereby enabling frame boundaries to be detected at high speed.

  Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment)
[Configuration of this embodiment]
FIG. 1 is a block diagram showing the configuration of a threshold detection device in a variable-length frame buffer according to the present invention.

  The control device 16 controls the overall operation of the threshold detection device in the variable-length frame buffer of the present invention. Main signal data (a plurality of variable-length frames) is supplied from a variable-length frame supply means (not shown). A control means (not shown) supplies an output permission [Req] signal, a write request signal, and a read request signal. This output permission [Req] signal is a signal that specifies how many bytes the variable-length frame stored in the main signal memory 10 is to be output.

  The main signal memory 10 is a memory for accumulating variable length frames, and receives an address signal, main signal data, a read enable a signal, and a write enable signal from the control device 16, and main signal data (a plurality of variable length frames). Frame) is output.

  The byte counter 14 increments the variable-length frame by 1 for each byte and outputs it as a counter value, and also clears the counter value of the byte counter 14 at the boundary (last) of the write enable signal and variable-length frame from the control device 16 ( 0) to supply a frame end flag.

  The threshold value search memory 12 is a memory for storing data for searching for a threshold value (maximum number of readable bytes [Act]). The threshold value search memory 12 is configured with the same address as the main signal memory 10 and receives an address signal from A read enable b signal and a write enable signal are supplied, a counter value is supplied from the byte counter 14, and a frame boundary distance data output signal is supplied to the controller 16.

[Operation of this embodiment]
FIG. 2 is a diagram showing an example of the contents stored in the memory for explaining an example of the operation of the threshold detection device in the variable length frame buffer of the present invention. The operation will be described with reference to FIGS.

<Write to memory>
First, when a write request signal is supplied from the control means (not shown) to the control device 16, the control device 16 sends a write enable signal to the main signal memory 10 from the variable length frame supply means (not shown). The main signal data (a plurality of variable length frames) and the address signal counted up for each byte of the main signal data frame are output. Receiving this, the main signal memory 10 writes the main signal data at the address indicated by the address signal. At this time, data is written into the main signal memory 10 without a gap between frames.

  At the same time, the write enable signal is output to the byte counter 14 and the threshold value search memory 12, and the address signal is also output to the threshold value search memory 12. The byte counter 14 to which the write enable signal indicating the validity of the frame is input increments the counter by +1 for each byte and outputs it to the threshold value search memory 12 as a counter value. The threshold value search memory 12 to which the counter value is input writes the counter value as memory data at the address indicated by the address signal (the first memory data of the frame is 1).

  Next, when the control device 16 detects that the frame of the main signal data (variable length frame) has ended while outputting the write enable signal indicating the validity of the frame, it outputs a frame end flag to the byte counter 14. To do. Receiving this, the byte counter 14 clears the counter value, increments the counter by +1 for each byte again from the next frame, and outputs it to the threshold value search memory 12 as the counter value. As a result, 0 is written in the last byte (memory data) of the first frame (the memory data at the head of the frame is 1).

  The above processing is repeated while the write enable signal is output (valid), that is, while the write request signal is supplied to the control device 16, and the output of the write enable signal is completed, that is, control is performed. When the supply of the write request to the device 16 is finished, the write process is finished.

<Read from memory>
Next, when a read request signal and an output permission [Req] signal are supplied from the control means (not shown) to the control device 16, the control device 16 sends a read enable a signal to the main signal memory 10, and An address signal indicating the read address of the main signal data (variable length frame) is output.

  At the same time, the control device 16 outputs a read enable b signal and an address signal to the threshold search memory 12. As a result, a frame boundary distance data output signal is output from the threshold search memory 12 to the control device 16. Based on this, the control device 16 uses the main signal based on the distance [Dis] from the frame boundary, which is output from the frame boundary distance data output signal, after the frame data read up to the previous time. The frame data is read from the memory 10 and output as main signal data.

  Here, when data is read from the data written in the main signal memory 10 by the permitted output, that is, by the designated number of bytes, the data is read in units of frames based on the frame boundary distance data output signal (see above). Main signal data output), it is necessary to search the boundary of the frame (omitted in the above description of the operation). A method for reading frame data will be specifically described with reference to FIG.

  FIG. 2 shows an example of numerical values (data) written in the main signal memory 10 and the threshold value search memory 12. Based on this, a method for reading out frame data will be described below.

  A total of three frames of 64 bytes, 96 bytes, and 128 bytes are written in the main signal memory 10, and the corresponding frame and the distance from the frame boundary are written in the threshold search memory 12. And When the address value read from the memory up to the previous time is [Sum], the start address of the 64-byte length frame data read this time is [Sum + 1], and the memory data distance written in the threshold search memory 12 at that time [ Dis] is 1. Similarly, the address of the next byte is [Sum + 2], and the memory data written in the threshold detection memory 12 at that time is the distance 2 (the same applies hereinafter).

  The address of the last byte of the 64-byte frame data is [Sum + 64], and the distance of the memory data written in the threshold search memory 12 at that time is 0 (not 64) due to the frame end flag. .

  The start address of the next 96-byte frame data is [Sum + 65], and the memory data written in the threshold search memory 12 at that time is the distance 1. The address of the last byte of the frame data of 96 bytes is [Sum + 160], and the distance of the memory data written to the threshold search memory 12 at that time is 0 by the frame end flag.

  Similarly, the start address of the next 128-byte frame data is [Sum + 161], and the memory data written in the threshold value search memory 12 at that time is distance 1. The address of the last byte of the 128-byte frame data is [Sum + 288], and the distance of the memory data written to the threshold search memory 12 at that time is 0 by the frame end flag.

  That is, the first byte of the frame data has a distance 1 and the last byte has a distance 0.

  Next, when 163 bytes are given to the control device 16 as the output permission [Req], the control device 16 sends the frame boundary distance data output signal, which is the memory data of the address [Sum + 163], to the threshold search memory 12. That is, the distance [Dis] from the frame boundary is output. In this example, the value of the read memory data is 3, and therefore the distance [Dis] from the frame boundary is 3. Thereby, the maximum number of readable bytes [Act], which is also a frame boundary, can be obtained by the following equation.

That is,
Maximum number of bytes that can be read [Act] = Output allowance [Req] −Distance [Dis]
= 163-3
= 160
Thus, the maximum number of bytes that can be read in units of frames within the permitted amount of output is 160 bytes (frame data that can be read in this example is 64-byte frame data and 96-byte frame data).

(Modification of embodiment)
It should be noted that the present invention is not limited to the above-described embodiment, and modifications, improvements, etc. within a scope that can achieve the object of the present invention are included in the present invention.

  For example, the best configuration for carrying out the present invention has been disclosed in the above description, but the present invention is not limited to this. That is, the present invention has been illustrated and described with particular reference to particular embodiments, but may be configured with respect to the above-described embodiments without departing from the scope of the technical idea and objects of the invention. Various modifications can be made by those skilled in the art in operation, quantity, and other detailed configurations.

  Therefore, the description limited to the configuration, operation, etc. disclosed above is exemplary for easy understanding of the present invention, and does not limit the present invention. The description of the name of the configuration excluding a part or all of the limitation is included in the present invention.

  In the present invention, a case where a plurality of input variable-length frames (data having no gap between frames) is written is described as an example, but a Gigabit Ethernet (registered trademark) passive optical network (Gigabit Ethernet) is described. (Registered trademark) -passive optical network: GE-PON), etc., data having a gap (gap) between frames can also be used (this invention is applied).

It is the block diagram which showed the structure of the threshold value detection apparatus in the variable-length frame buffer of this invention. It is the figure which showed an example of the memory content for demonstrating an example of operation | movement of the threshold value detection apparatus in the variable-length frame buffer of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Main signal memory 12 ... Threshold search memory 14 ... Byte counter 16 ... Control apparatus

Claims (2)

A main signal memory for sequentially storing a plurality of variable-length frames that are supplied main signal data for each byte;
A byte counter that clears the counter value by incrementing the counter value by +1 for each byte of the variable-length frame and detecting the last byte of the variable-length frame;
A threshold value search memory for sequentially storing counter values from the byte counter with the same address configuration as the main signal memory;
A control device for detecting a frame boundary from a counter value stored in the threshold value search memory based on the number of bytes specified by an output permission [Req] signal given from outside;
With
The control device causes the threshold search memory to output a distance [Dis] from a frame boundary which is frame boundary distance data, and the following equation:
Maximum number of bytes that can be read [Act] = Output allowance [Req] −Distance [Dis]
A threshold detection apparatus in a variable-length frame buffer, wherein a frame boundary is detected from the frame length.   2. The threshold detection apparatus for a variable-length frame buffer according to claim 1, wherein data is written without any gap between the plurality of variable-length frames and the variable-length frames in the main signal memory.

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