JP4580528B2 - コンピュータシステムおよびそのレジューム処理方法 - Google Patents

コンピュータシステムおよびそのレジューム処理方法 Download PDF

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Publication number
JP4580528B2
JP4580528B2 JP2000291171A JP2000291171A JP4580528B2 JP 4580528 B2 JP4580528 B2 JP 4580528B2 JP 2000291171 A JP2000291171 A JP 2000291171A JP 2000291171 A JP2000291171 A JP 2000291171A JP 4580528 B2 JP4580528 B2 JP 4580528B2
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Japan
Prior art keywords
resume
processing
state
devices
computer system
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Expired - Fee Related
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JP2000291171A
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Japanese (ja)
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JP2002099436A (ja
JP2002099436A5 (https=
Inventor
俊一 森沢
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Toshiba Corp
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Toshiba Corp
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Priority to JP2000291171A priority Critical patent/JP4580528B2/ja
Priority to US09/942,751 priority patent/US6832311B2/en
Publication of JP2002099436A publication Critical patent/JP2002099436A/ja
Publication of JP2002099436A5 publication Critical patent/JP2002099436A5/ja
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/4401—Bootstrapping
    • G06F9/4418—Suspend and resume; Hibernate and awake
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Power Sources (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
JP2000291171A 2000-09-25 2000-09-25 コンピュータシステムおよびそのレジューム処理方法 Expired - Fee Related JP4580528B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2000291171A JP4580528B2 (ja) 2000-09-25 2000-09-25 コンピュータシステムおよびそのレジューム処理方法
US09/942,751 US6832311B2 (en) 2000-09-25 2001-08-31 Information processing system and resume processing method used in the system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000291171A JP4580528B2 (ja) 2000-09-25 2000-09-25 コンピュータシステムおよびそのレジューム処理方法

Publications (3)

Publication Number Publication Date
JP2002099436A JP2002099436A (ja) 2002-04-05
JP2002099436A5 JP2002099436A5 (https=) 2007-06-14
JP4580528B2 true JP4580528B2 (ja) 2010-11-17

Family

ID=18774294

Family Applications (1)

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JP2000291171A Expired - Fee Related JP4580528B2 (ja) 2000-09-25 2000-09-25 コンピュータシステムおよびそのレジューム処理方法

Country Status (2)

Country Link
US (1) US6832311B2 (https=)
JP (1) JP4580528B2 (https=)

Families Citing this family (28)

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US7017052B2 (en) * 2001-11-16 2006-03-21 Lenovo Pte. Ltd. Method and system for reducing boot time for a computer
US20040218351A1 (en) * 2002-11-12 2004-11-04 Mitac Technology Corp. Method and apparatus for integrating personal computer and electronic device functions
TW591478B (en) 2002-11-12 2004-06-11 Mitac Technology Corp Apparatus and method of using personal computer to integrate functions of home electronics
US7100037B2 (en) * 2002-11-27 2006-08-29 Intel Corporation Method for reducing BIOS resume time from a sleeping state
US7870376B2 (en) * 2004-03-23 2011-01-11 International Business Machines Corporation System, method and program product for controlling access to computer system
US7496929B2 (en) * 2004-05-28 2009-02-24 Intel Corporation Performance of operations on a hardware resource through integral interpretive execution
JP4630023B2 (ja) 2004-08-31 2011-02-09 富士通株式会社 システム制御装置、システム制御方法およびシステム制御プログラム
CN100383744C (zh) * 2004-12-24 2008-04-23 联想(北京)有限公司 一种计算机多操作系统的切换方法
US20060284840A1 (en) * 2005-06-15 2006-12-21 Research In Motion Limited Portable electronic device including pointer and related methods
US7480791B2 (en) * 2005-09-15 2009-01-20 Intel Corporation Method and apparatus for quick resumption where the system may forego initialization of at least one memory range identified in the resume descriptor
US20070234028A1 (en) * 2005-09-15 2007-10-04 Rothman Michael A Method and apparatus for quickly changing the power state of a data processing system
US7523323B2 (en) * 2005-09-15 2009-04-21 Intel Corporation Method and apparatus for quick resumption
US20070080946A1 (en) * 2005-10-07 2007-04-12 Research In Motion Limited Portable electronic device including trackball unit and associated methods
JP4746404B2 (ja) 2005-10-31 2011-08-10 株式会社東芝 情報処理装置およびレジューム制御方法
US7793127B2 (en) * 2005-12-30 2010-09-07 Intel Corporation Processor state restoration and method for resume
US7584374B2 (en) * 2006-03-07 2009-09-01 Intel Corporation Driver/variable cache and batch reading system and method for fast resume
US7900074B2 (en) * 2006-06-02 2011-03-01 Apple Inc. Method and apparatus for quickly reanimating devices from hibernation
US7757098B2 (en) 2006-06-27 2010-07-13 Intel Corporation Method and apparatus for verifying authenticity of initial boot code
US7765392B2 (en) * 2006-06-29 2010-07-27 Intel Corporation Method and apparatus for establishing processor as core root of trust for measurement
US7962734B2 (en) * 2006-09-20 2011-06-14 Hewlett-Packard Development Company, L.P. Method of restarting a computer platform
JP5281942B2 (ja) * 2009-03-26 2013-09-04 株式会社日立製作所 計算機およびその障害処理方法
JP5666526B2 (ja) * 2012-09-05 2015-02-12 東芝テック株式会社 ハンディターミナル装置、制御方法及び制御プログラム
US9383812B2 (en) * 2012-09-28 2016-07-05 Intel Corporation Method and apparatus for efficient store/restore of state information during a power state
CN103796066B (zh) 2014-01-21 2017-08-04 上海晨思电子科技有限公司 一种智能电视系统及其关机和开机方法
US10317974B2 (en) * 2016-04-08 2019-06-11 Intel Corporation Power supply unit (PSU) switching
US10452561B2 (en) 2016-08-08 2019-10-22 Raytheon Company Central processing unit architecture and methods for high availability systems
CN108334358B (zh) * 2017-12-15 2021-05-07 山东超越数控电子股份有限公司 一种基于ec单片机的笔记本系统重启控制方法
US11138072B2 (en) * 2017-12-22 2021-10-05 Intel Corporation Protected runtime mode

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62226216A (ja) * 1986-03-27 1987-10-05 Nec Corp システム立上げ方式
JP3011751B2 (ja) * 1990-10-20 2000-02-21 富士通株式会社 システム立ち上げ方法
JP3278885B2 (ja) * 1992-03-06 2002-04-30 富士通株式会社 コンピュータシステム
US5694583A (en) * 1994-09-27 1997-12-02 International Business Machines Corporation BIOS emulation parameter preservation across computer bootstrapping
US6393584B1 (en) * 1995-04-26 2002-05-21 International Business Machines Corporation Method and system for efficiently saving the operating state of a data processing system
JP3930116B2 (ja) * 1997-08-29 2007-06-13 株式会社東芝 コンピュータシステム
US6385721B1 (en) * 1999-01-22 2002-05-07 Hewlett-Packard Company Computer with bootable hibernation partition
US6681336B1 (en) * 1999-06-18 2004-01-20 Kabushiki Kaisha Toshiba System and method for implementing a user specified processing speed in a computer system and for overriding the user specified processing speed during a startup and shutdown process
US6691234B1 (en) * 2000-06-16 2004-02-10 Intel Corporation Method and apparatus for executing instructions loaded into a reserved portion of system memory for transitioning a computer system from a first power state to a second power state

Also Published As

Publication number Publication date
JP2002099436A (ja) 2002-04-05
US20020038328A1 (en) 2002-03-28
US6832311B2 (en) 2004-12-14

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