JP4568465B2 - Semiconductor wafer protection sheet - Google Patents
Semiconductor wafer protection sheet Download PDFInfo
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- JP4568465B2 JP4568465B2 JP2001378066A JP2001378066A JP4568465B2 JP 4568465 B2 JP4568465 B2 JP 4568465B2 JP 2001378066 A JP2001378066 A JP 2001378066A JP 2001378066 A JP2001378066 A JP 2001378066A JP 4568465 B2 JP4568465 B2 JP 4568465B2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
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Description
【０００１】
【発明の属する技術分野】
本発明は、半導体ウエハ保護用シートに係り、特に、半導体ウエハを１００μｍ以下の厚さまで研磨でき、半導体ウエハを研磨した後にダイボンディングフィルムを融着させても半導体ウエハが破損しない半導体ウエハ保護用シートに関する。
【０００２】
【従来の技術】
半導体チップの製造に用いられるウエハにはシリコンウエハ、ガリウム−砒素等があり、中でもシリコンウエハが多用されている。シリコンウエハは高純度の単結晶シリコンを厚さ５００〜１０００μｍ程度に薄くスライスすることにより製造されているが、近年ＩＣカード（インテグレーテッド サーキット カード）の普及やスタックドＣＳＰ（チップ サイズ パッケージ）の多層化により、さらなる薄肉化が望まれており、厚さが３５０μｍ程度であった半導体ウエハを１００μｍ以下まで研磨することが必要とされてきた。
【０００３】
また、半導体チップを基板へ実装させる際に、半導体チップと基板を安定的に固定するための接着剤として、ダイボンディングフィルムが使用されている。ダイボンディングフィルムは、半導体ウエハに熱融着されるものであり、厚さが３５０μｍ程度の半導体ウエハでは、半導体ウエハ保護用シートを剥離させた後に融着させることができる。しかし、厚さが１００μｍ以下の半導体ウエハにあっては、半導体ウエハ保護用シートを剥離させてしまうと半導体ウエハが自重によって破損してしまうため、半導体ウエハ保護用シートを貼り付けたままダイボンディングフィルムを融着させることが必要とされてきた。
【０００４】
ここで、半導体ウエハを研磨する際に半導体ウエハを保持するための半導体ウエハ保護用シートとしては、例えば、特開２００１−１２３１３９号の手段が知られている。この手段は、特定の粘着剤を軟質の支持体上に積層させたものであり、半導体ウエハの裏面へ粘着剤が移行することを防止するというものである。
【０００５】
【発明が解決しようとする課題】
しかしながら、この手段のような半導体ウエハ保護用シートでは、ダイボンディングフィルムを融着させる際に、半導体ウエハ保護用シートの支持体が融着熱によって軟化し、半導体ウエハが安定的に保持されなくなって破損してしまうという課題があった。
【０００６】
この課題を解決するために、支持体として硬質のものを採用する手段が考えられるが、単に支持体を硬質のものに変更しただけでは、半導体ウエハを研磨する際に半導体ウエハにかかる応力を緩和することができず、研磨中に半導体ウエハが破損してしまうという新たな課題が発生した。
【０００７】
したがって、本発明の目的は、半導体ウエハを１００μｍ以下の厚さまで研磨できるとともに、半導体ウエハを研磨した後にダイボンディングフィルムを融着させても半導体ウエハが破損しない半導体ウエハ保護用シートを提供することにある。
【０００８】
【課題を解決するための手段】
本発明者は、上記に鑑み鋭意検討を行った結果、単層又は複数層からなる支持体と、支持体上に積層された粘着剤層を有する半導体ウエハ保護用シートであって、支持体が、融点１６０〜３００℃で、引張弾性率０．１〜１．５ＧＰａである耐熱支持層を少なくとも１層有することにより、上記課題を解決できることを見出し本発明を完成した。
【０００９】
【発明の実施の形態】
本発明の半導体ウエハ保護用シートにおける耐熱支持層の融点は、あまりに低いと、ダイボンディングフィルムを融着させる際の融着熱によって支持体が軟化し半導体ウエハが破損してしまい、あまりに高いと、支持体が硬くなってしまい半導体ウエハを研磨する際に発生する応力を緩和できなくなり半導体ウエハが破損してしまう。このため、耐熱支持層の融点にあっては、１６０〜３００℃の範囲が良く、好ましくは、１８０〜３００℃の範囲が良い。ここで融点とは、ＪＩＳ Ｋ ７１２１に準じて測定して得られた値であり、示差走査熱量計による融解熱量測定で得られた融解曲線における吸熱ピークの頂点の温度をいう。
【００１０】
本発明の半導体ウエハ保護用シートにおける耐熱支持層の引張弾性率は、あまりに低いと、研磨時に発生する応力によって半導体ウエハが変形して破損してしまい、あまりに高いと半導体ウエハを研磨する際に発生する応力を緩和できなくなり半導体ウエハが破損してしまう。このため、耐熱支持層の引張弾性率にあっては、０．１〜１．５ＧＰａの範囲が良く、好ましくは、０．１〜１．０ＧＰａの範囲が良い。ここで引張弾性率とは、ＪＩＳ Ｋ ７１２１に準じて測定して得られた値であり、幅１０ｍｍの短冊状の試料を、雰囲気温度２３℃、引張速度１００％／ｍｉｎで引張試験をして得られた応力−ひずみ曲線から求められる初期弾性率をいう。
【００１１】
本発明の半導体ウエハ保護用シートにおける耐熱支持層は、単層で使用する際は何ら問題がない。しかし、耐熱支持層と粘着剤層の間に介在層を設ける際には、介在層の総厚が７５μｍ以下のものが良い。これは、介在層の厚さがあまりに厚いと、耐熱支持層の上記効果が得られなくなってしまうからである。なお、耐熱支持層の粘着剤層を積層させない面に積層させる層については特に限定するものではない。
【００１２】
本発明の半導体ウエハ保護用シートの耐熱支持層として採用できる材料としては、融点及び引張弾性率が上記値であれば適宜選択して採用でき、具体的にはポリブチレンテレフタレート、ポリ−１、４−シクロヘキサンジメチレンテレフタレート、ポリブチレンナフタレート、ナイロン等がある。
【００１３】
本発明の半導体ウエハ保護用シートの支持体は、後述する粘着剤層が紫外線硬化型粘着剤の場合には、支持体側から照射される紫外線を粘着剤層にまで届かせる必要があるため、紫外線透過性のものでなければならない。また、支持体は、後述する粘着剤層が加熱硬化型粘着剤や加熱発泡型粘着剤の場合には、加熱時に使用される温度より高い温度の融点を有していなければならない。なお、支持体の厚さにあっては、特に限定するものではないが、一般的な半導体ウエハ保護用シートで採用されている５〜５００μｍの範囲から適宜選択して採用すれば良い。
【００１４】
本発明の半導体ウエハ保護用シートの粘着剤層は、一般的な感圧型粘着剤、紫外線硬化型粘着剤、加熱硬化型粘着剤等を用いることができる。感圧型粘着剤としてはアクリル系、ゴム系、シリコン系等従来公知の粘着剤が用いられる。また、紫外線硬化型粘着剤としてはベースポリマ、紫外線硬化性化合物、紫外線硬化開始剤等を配合したものが採用され、加熱硬化型粘着剤としてはベースポリマ、加熱硬化性化合物、加熱硬化開始剤等を配合したものが採用される。ここで、紫外線硬化型粘着剤及び加熱硬化型粘着剤のベースポリマとしては、一般的なアクリル系粘着剤、ゴム系粘着剤等を用いることができる。
【００１５】
なお、紫外線硬化型粘着剤の硬化を開始するためには、紫外線の照射が必要になる。また、熱硬化型粘着剤及び加熱発泡型粘着剤については剥離時に加熱が必要となる。紫外線照射及び加熱のタイミングとしては、半導体ウエハを研磨し、搬送した後に行われる。なお、粘着剤層の厚さにあっては、特に限定するものではないが、一般的な半導体ウエハ保護用シートで採用されている５〜２００μｍの範囲から適宜選択して採用すれば良い。
【００１６】
本発明にかかる半導体ウエハ保護用シートは、必要に応じて、粘着剤層の粘着面にポリエチレンラミネート紙、剥離処理プラスチックフィルム等の剥離紙又は剥離シートを密着させて保存される。
【００１７】
本発明にあっては、単層又は複数層からなる支持体と、支持体上に積層された粘着剤層を有する半導体ウエハ保護用シートであって、支持体が、融点１６０〜３００℃で、引張弾性率０．１〜１．５ＧＰａである耐熱支持層を少なくとも１層有することにより、半導体ウエハを１００μｍ以下の厚さまで研磨できるとともに、半導体ウエハを研磨した後にダイボンディングフィルムを融着させても半導体ウエハが破損しない半導体ウエハ保護用シートが得られた。
【００１８】
【実施例】
本発明にかかる半導体ウエハ保護用シートの実施例１を、比較例と比較しつつ、表１及び図１を用いて説明する。ここで、表１は、本実施例及び比較例の半導体ウエハ保護用シートの配合及び特性を示したものであり、図１は、本実施例及び比較例の半導体ウエハ保護用シートを模式的に示した断面図である。
【００１９】
【表１】
ここで、表１の特性値における「研磨性」は、半導体ウエハ保護用シート上に直径８インチ、厚さ７００μｍの半導体ウエハを貼り付けてから研磨機（株式会社ディスコ製バックグラインダーＤＦＧ−８５０）を用いて半導体ウエハの厚みが２５μｍになるまで研磨した後、目視にて半導体ウエハの状態を観察したものである。研磨性にあっては、半導体ウエハが破損していなかったものを○、破損が確認されたものを×として評価した。なお、試験のサンプル数は３０とした。
【００２１】
また、表１の特性値における「耐熱性」は、研磨性試験に合格したサンプルについてダイボンディングフィルムを融着させる際の条件（１４０℃、１０秒）で熱処理した後、目視にて半導体ウエハの状態を観察したものである。耐熱性にあっては、半導体ウエハが破損していなかったものを○、破損が確認されたものを×として評価した。なお、試験のサンプル数は研磨性と同様に３０とした。
【００２２】
本実施例の半導体ウエハ保護用シートは、図１に示すように、単層の耐熱支持層３からなる支持体１と、支持体１上に積層された粘着剤層２を有するものである。ここで、耐熱支持層３は、融点２２０℃、引張弾性率０．３ＧＰａ、厚さ１５０μｍのポリブチレンテレフタレート製である。また、粘着剤層２は、厚さ２０μｍの紫外線硬化型粘着剤であり、ベースポリマとしてのアクリル酸エチル−アクリル酸２−エチルヘキシルの共重合体１００重量部、紫外線硬化性化合物としての６官能性ウレタンアクリレートオリゴマ１２０重量部、紫外線硬化開始剤としてのベンゾインイソプロピルエーテル８重量部、架橋剤としての２，４−トルイレンジイソシアナート３重量部を配合して得られたものである。なお、特に記載しない限り、以下の実施例及び比較例は本実施例と同様なものである。
【００２３】
本実施例にあっては、研磨性及び耐熱性が良く、目標とする半導体ウエハ保護用シートが得られた。
【００２４】
比較例1及び比較例２について説明する。比較例１は、実施例１の耐熱支持層３を融点９０℃のポリエチレンに変更したものであり、比較例２は、実施例１の耐熱支持層３を融点３３０℃のポリテトラフルオロエチレンに変更したものである。
【００２５】
比較例１にあっては耐熱性が悪く、比較例2にあっては研磨性が悪かった。
【００２６】
比較例３及び比較例４について説明する。比較例３は、実施例１の耐熱支持層３を引張弾性率０．０７ＧＰａのエチレンビニルアセテートに変更したものであり、比較例４は、実施例１の耐熱支持層３を引張弾性率３．０ＧＰａのポリエチレンテレフタレートに変更したものである。
【００２７】
比較例３及び比較例４にあっては研磨性が悪かった。
【００２８】
本発明における実施例２及び実施例３について、図２及び図３を参照しつつ説明する。実施例２は、図２に示すように、実施例１の耐熱支持層３と粘着剤層２の間に、厚さ７０μｍのポリエチレンテレフタレート層４を介在させたものであり、実施例３は、図３に示すように、実施例1における耐熱支持層３の粘着剤層２を積層していない面に、厚さ７０μｍのポリエチレンテレフタレート層４を積層させたものである。
【００２９】
これら図２及び図３に示した実施例についても、研磨性及び耐熱性が良く、目標とする半導体ウエハ保護用シートが得られた。
【００３０】
【発明の効果】
本発明にあっては、単層又は複数層からなる支持体と、支持体上に積層された粘着剤層を有する半導体ウエハ保護用シートであって、支持体が、融点１６０〜３００℃で、引張弾性率０．１〜１．５ＧＰａである耐熱支持層を少なくとも１層有することにより、半導体ウエハを１００μｍ以下の厚さまで研磨できるとともに、半導体ウエハを研磨した後にダイボンディングフィルムを融着させても半導体ウエハが破損しない半導体ウエハ保護用シートが得られた。
【図面の簡単な説明】
【図１】実施例１及び比較例の半導体ウエハ保護用シートを模式的に示した断面図である。
【図２】実施例２の半導体ウエハ保護用シートを模式的に示した断面図である。
【図３】実施例３の半導体ウエハ保護用シートを模式的に示した断面図である。
【符号の説明】
１ 支持体
２ 粘着剤層
３ 耐熱支持層[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor wafer protection sheet, and more particularly, a semiconductor wafer protection sheet that can polish a semiconductor wafer to a thickness of 100 μm or less and that does not break even if a die bonding film is fused after polishing the semiconductor wafer. About.
[0002]
[Prior art]
There are silicon wafers, gallium arsenide, and the like as wafers used for manufacturing semiconductor chips, and among these, silicon wafers are frequently used. Silicon wafers are manufactured by thinly slicing high-purity single crystal silicon to a thickness of about 500 to 1000 μm. Recently, IC cards (integrated circuit cards) have become popular and stacked CSPs (chip size packages) have become multilayered. Therefore, further thinning has been desired, and it has been necessary to polish a semiconductor wafer having a thickness of about 350 μm to 100 μm or less.
[0003]
In addition, when the semiconductor chip is mounted on the substrate, a die bonding film is used as an adhesive for stably fixing the semiconductor chip and the substrate. The die bonding film is heat-sealed to a semiconductor wafer. For a semiconductor wafer having a thickness of about 350 μm, the die-bonding film can be fused after the semiconductor wafer protection sheet is peeled off. However, in the case of a semiconductor wafer having a thickness of 100 μm or less, if the semiconductor wafer protection sheet is peeled off, the semiconductor wafer will be damaged by its own weight. Therefore, the die bonding film remains attached with the semiconductor wafer protection sheet attached. It has been required to fuse.
[0004]
Here, as a semiconductor wafer protection sheet for holding a semiconductor wafer when polishing the semiconductor wafer, for example, means of JP-A-2001-123139 is known. This means is that a specific pressure-sensitive adhesive is laminated on a soft support and prevents the pressure-sensitive adhesive from moving to the back surface of the semiconductor wafer.
[0005]
[Problems to be solved by the invention]
However, in the semiconductor wafer protection sheet like this means, when the die bonding film is fused, the support of the semiconductor wafer protection sheet is softened by the heat of fusion, and the semiconductor wafer is not stably held. There was a problem of being damaged.
[0006]
In order to solve this problem, it is conceivable to adopt a hard support as a support. However, simply changing the support to a hard support will alleviate the stress applied to the semiconductor wafer when polishing the semiconductor wafer. A new problem has arisen that the semiconductor wafer is damaged during polishing.
[0007]
Accordingly, an object of the present invention is to provide a semiconductor wafer protection sheet that can polish a semiconductor wafer to a thickness of 100 μm or less and that does not break the semiconductor wafer even if the die bonding film is fused after polishing the semiconductor wafer. is there.
[0008]
[Means for Solving the Problems]
As a result of intensive studies in view of the above, the present inventor is a semiconductor wafer protection sheet having a support composed of a single layer or a plurality of layers and an adhesive layer laminated on the support, wherein the support is The inventors have found that the above-mentioned problems can be solved by having at least one heat-resistant support layer having a melting point of 160 to 300 ° C. and a tensile elastic modulus of 0.1 to 1.5 GPa, thereby completing the present invention.
[0009]
DETAILED DESCRIPTION OF THE INVENTION
If the melting point of the heat-resistant support layer in the sheet for protecting a semiconductor wafer of the present invention is too low, the support is softened by the heat of fusion at the time of fusing the die bonding film, and the semiconductor wafer is damaged. The support becomes hard and the stress generated when the semiconductor wafer is polished cannot be relaxed, and the semiconductor wafer is damaged. For this reason, the melting point of the heat-resistant support layer is preferably in the range of 160 to 300 ° C, and preferably in the range of 180 to 300 ° C. Here, the melting point is a value obtained by measurement according to JIS K 7121, and refers to the temperature at the top of the endothermic peak in the melting curve obtained by the measurement of heat of fusion using a differential scanning calorimeter.
[0010]
If the tensile elastic modulus of the heat-resistant support layer in the sheet for protecting a semiconductor wafer of the present invention is too low, the semiconductor wafer is deformed and damaged by the stress generated during polishing, and if it is too high, it occurs when polishing the semiconductor wafer. As a result, the semiconductor wafer cannot be relieved and the semiconductor wafer is damaged. For this reason, in the tensile elasticity modulus of a heat-resistant support layer, the range of 0.1-1.5 GPa is good, Preferably, the range of 0.1-1.0 GPa is good. Here, the tensile modulus is a value obtained by measurement according to JIS K 7121. A strip-like sample having a width of 10 mm is subjected to a tensile test at an ambient temperature of 23 ° C. and a tensile speed of 100% / min. It refers to the initial elastic modulus obtained from the obtained stress-strain curve.
[0011]
The heat-resistant support layer in the semiconductor wafer protection sheet of the present invention has no problem when used as a single layer. However, when an intervening layer is provided between the heat-resistant support layer and the pressure-sensitive adhesive layer, it is preferable that the intervening layer has a total thickness of 75 μm or less. This is because if the intervening layer is too thick, the above-mentioned effect of the heat-resistant support layer cannot be obtained. In addition, it does not specifically limit about the layer laminated | stacked on the surface which does not laminate | stack the adhesive layer of a heat-resistant support layer.
[0012]
As a material that can be used as the heat-resistant support layer of the semiconductor wafer protection sheet of the present invention, any material can be selected and used as long as the melting point and the tensile modulus are the above values. Specifically, polybutylene terephthalate, poly-1, 4 -Cyclohexane dimethylene terephthalate, polybutylene naphthalate, nylon and the like.
[0013]
The support for the semiconductor wafer protection sheet of the present invention requires that the ultraviolet ray irradiated from the support side reaches the pressure-sensitive adhesive layer when the pressure-sensitive adhesive layer described later is an ultraviolet-curable pressure-sensitive adhesive. Must be permeable. Moreover, the support body must have melting | fusing point of temperature higher than the temperature used at the time of heating, when the adhesive layer mentioned later is a thermosetting adhesive or a heating foaming adhesive. In addition, although it does not specifically limit in the thickness of a support body, What is necessary is just to select suitably from the range of 5-500 micrometers employ | adopted with the sheet | seat for general semiconductor wafer protection.
[0014]
For the pressure-sensitive adhesive layer of the semiconductor wafer protection sheet of the present invention, a general pressure-sensitive pressure-sensitive adhesive, ultraviolet curable pressure-sensitive adhesive, heat-curable pressure-sensitive adhesive, or the like can be used. As the pressure-sensitive adhesive, conventionally known adhesives such as acrylic, rubber, and silicon are used. In addition, as a UV curable pressure sensitive adhesive, a base polymer, a UV curable compound, a UV curable initiator, etc. are used. As a heat curable pressure sensitive adhesive, a base polymer, a heat curable compound, a heat curable initiator, etc. Is used. Here, as the base polymer of the ultraviolet curable adhesive and the heat curable adhesive, a general acrylic adhesive, rubber adhesive, or the like can be used.
[0015]
In order to start the curing of the ultraviolet curable adhesive, it is necessary to irradiate with ultraviolet rays. Moreover, about a thermosetting adhesive and a heat-foaming adhesive, heating is needed at the time of peeling. The timing of ultraviolet irradiation and heating is performed after polishing and transporting the semiconductor wafer. The thickness of the pressure-sensitive adhesive layer is not particularly limited, but may be appropriately selected from a range of 5 to 200 μm that is employed in a general semiconductor wafer protection sheet.
[0016]
The sheet for protecting a semiconductor wafer according to the present invention is stored with a release paper or release sheet such as a polyethylene laminated paper or a release-treated plastic film in close contact with the adhesive surface of the adhesive layer as necessary.
[0017]
In the present invention, it is a sheet for protecting a semiconductor wafer having a support composed of a single layer or a plurality of layers and an adhesive layer laminated on the support, and the support has a melting point of 160 to 300 ° C. By having at least one heat-resistant support layer having a tensile modulus of 0.1 to 1.5 GPa, the semiconductor wafer can be polished to a thickness of 100 μm or less, and the die bonding film can be fused after polishing the semiconductor wafer. A semiconductor wafer protection sheet was obtained in which the semiconductor wafer was not damaged.
[0018]
【Example】
Example 1 of the semiconductor wafer protection sheet according to the present invention will be described with reference to Table 1 and FIG. Here, Table 1 shows the composition and characteristics of the semiconductor wafer protection sheets of the present example and the comparative example, and FIG. 1 schematically shows the semiconductor wafer protection sheets of the present example and the comparative example. It is sectional drawing shown.
[0019]
[Table 1]
Here, the “abrasiveness” in the characteristic values in Table 1 is a polishing machine (back grinder DFG-850 manufactured by DISCO Corporation) after a semiconductor wafer having a diameter of 8 inches and a thickness of 700 μm is pasted on a semiconductor wafer protection sheet. After polishing until the thickness of the semiconductor wafer becomes 25 μm, the state of the semiconductor wafer is visually observed. In terms of abrasiveness, the case where the semiconductor wafer was not damaged was evaluated as ◯, and the case where damage was confirmed was evaluated as X. The number of test samples was 30.
[0021]
Further, the “heat resistance” in the characteristic values of Table 1 indicates that the sample that passed the abrasiveness test was heat-treated under the conditions (140 ° C., 10 seconds) for fusing the die bonding film, and then visually observed on the semiconductor wafer. The state is observed. In terms of heat resistance, the semiconductor wafers that were not damaged were evaluated as ◯, and those that were confirmed to be damaged were evaluated as X. Note that the number of samples in the test was 30 as in the case of abrasiveness.
[0022]
As shown in FIG. 1, the sheet for protecting a semiconductor wafer of this example has a
[0023]
In this example, the polishing property and heat resistance were good, and the target semiconductor wafer protection sheet was obtained.
[0024]
Comparative Example 1 and Comparative Example 2 will be described. In Comparative Example 1, the heat-
[0025]
In Comparative Example 1, the heat resistance was poor, and in Comparative Example 2, the polishing property was poor.
[0026]
Comparative Example 3 and Comparative Example 4 will be described. In Comparative Example 3, the heat-
[0027]
In Comparative Example 3 and Comparative Example 4, the abrasiveness was poor.
[0028]
Examples 2 and 3 according to the present invention will be described with reference to FIGS. In Example 2, as shown in FIG. 2, a
[0029]
2 and 3 also had good polishing properties and heat resistance, and a target semiconductor wafer protection sheet was obtained.
[0030]
【The invention's effect】
In the present invention, it is a sheet for protecting a semiconductor wafer having a support composed of a single layer or a plurality of layers and an adhesive layer laminated on the support, and the support has a melting point of 160 to 300 ° C. By having at least one heat-resistant support layer having a tensile modulus of 0.1 to 1.5 GPa, the semiconductor wafer can be polished to a thickness of 100 μm or less, and the die bonding film can be fused after polishing the semiconductor wafer. A semiconductor wafer protection sheet was obtained in which the semiconductor wafer was not damaged.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view schematically showing a semiconductor wafer protection sheet of Example 1 and a comparative example.
2 is a cross-sectional view schematically showing a semiconductor wafer protection sheet of Example 2. FIG.
3 is a cross-sectional view schematically showing a semiconductor wafer protection sheet of Example 3. FIG.
[Explanation of symbols]
1
Claims (3)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001378066A JP4568465B2 (en) | 2001-12-12 | 2001-12-12 | Semiconductor wafer protection sheet |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001378066A JP4568465B2 (en) | 2001-12-12 | 2001-12-12 | Semiconductor wafer protection sheet |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2003176464A JP2003176464A (en) | 2003-06-24 |
| JP4568465B2 true JP4568465B2 (en) | 2010-10-27 |
Family
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001378066A Expired - Fee Related JP4568465B2 (en) | 2001-12-12 | 2001-12-12 | Semiconductor wafer protection sheet |
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| Country | Link |
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| JP (1) | JP4568465B2 (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4519409B2 (en) * | 2003-02-24 | 2010-08-04 | リンテック株式会社 | Adhesive sheet and method of using the same |
| JP4511840B2 (en) * | 2004-01-13 | 2010-07-28 | 三井化学株式会社 | Adhesive film and method for protecting semiconductor wafer using the same |
| JP5006015B2 (en) * | 2006-12-05 | 2012-08-22 | 古河電気工業株式会社 | Semiconductor wafer surface protective tape and semiconductor chip manufacturing method using the same |
| JP6195839B2 (en) * | 2012-10-19 | 2017-09-13 | リンテック株式会社 | Adhesive sheet for processing electronic parts and method for manufacturing semiconductor device |
| JP7311284B2 (en) * | 2019-03-22 | 2023-07-19 | 日東電工株式会社 | back grind tape |
-
2001
- 2001-12-12 JP JP2001378066A patent/JP4568465B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2003176464A (en) | 2003-06-24 |
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