JP4554645B2 - Electronic control device and data communication method thereof - Google Patents

Description

The present invention includes a plurality of arithmetic processing means, and one of the plurality of arithmetic processing means reads out a correction value used by each of the plurality of arithmetic processing means for correction of the input / output signal from the storage means. More particularly, the present invention relates to an electronic control device that starts a plurality of arithmetic processing means at high speed with a simple configuration and a data communication method thereof .

  In recent years, an electronic control device (ECU) is mounted on a vehicle to electronically control various processes necessary for the operation of the vehicle. For example, by applying an ECU to control the jet of gasoline in the engine and connecting it to a speed sensor, a water temperature sensor, or the like, the jet quantity of gasoline can be controlled in accordance with the speed of the vehicle or the temperature of engine coolant.

  In this ECU, a plurality of arithmetic processing means (microcomputers) are provided therein, so that advanced processing can be realized with an inexpensive system. On the other hand, in a system having a plurality of arithmetic processing means, it is important how to improve the cooperation between the arithmetic processing means.

  For example, in the multiprocessor system disclosed in Patent Document 1, the main processor is activated before the sub processor, and the sub processor memory is stored in the sub processor memory as needed within a specified time until the sub processor is activated. A technique for avoiding the runaway of the secondary processor by writing a startup program is disclosed.

  In the multiprocessor board startup method disclosed in Patent Document 2, initial programs of a plurality of slave processing devices are stored in a shared volatile memory accessible from a plurality of slave processing devices. By reading the initial program from the simultaneously or sequentially shared volatile memory and performing the initial processing, the read-only nonvolatile memory storing the initial program is not necessary.

  Furthermore, speeding up communication means in the system such as DMA (Direct Memory Access) is also effective for improving the efficiency of the entire system. For example, Patent Literature 3 determines a data boundary according to data transfer control information including a transfer control condition, a data transfer source address, a data transfer destination address, and the number of transfer words, and based on the determination result, the data transfer destination or data data A technique for improving the buffer usage efficiency by controlling the transfer source and the number of transfer words is disclosed.

  Further, in the printer device disclosed in Patent Document 4, the common bus is effectively used by changing the transmission method of communication data from the host device depending on whether or not print data is being transferred.

JP 2002-31334 A JP-A-8-87481 Japanese Patent Application Laid-Open No. 5-28979 JP 2003-48345 A

  By the way, in an ECU in which analog data is input as an input signal, it is necessary to correct the input signal. Specifically, since the power supply IC of each ECU is not strictly uniform, when an input signal is evaluated based on the voltage supplied by the power supply IC, an evaluation variation depending on the output variation of the power supply IC occurs. Therefore, in order to accurately evaluate the value of the input signal, it is necessary to correct variations in the supply voltage of the power supply IC.

  Since the amount of correction to be performed on the input signal depends on the power supply IC, the correction value is determined when the ECU is assembled and stored in a nonvolatile storage medium such as an EEPROM (Electrically Erasable and Programmable ROM). And by reading out and using this correction value at the time of starting each arithmetic processing means (microcomputer etc.), evaluation of an input signal can be performed correctly.

  When there are a plurality of arithmetic processing means in the ECU, providing a dedicated non-volatile recording medium for each arithmetic processing means leads to an increase in cost and an increase in the size of the housing. It is desirable that the data is stored in one storage medium and one of the arithmetic processing means reads the correction value and transmits it to the other arithmetic processing means.

  However, in such a configuration in which correction values are centrally managed in one storage medium and transmitted to a plurality of calculation processing means, each calculation processing means cannot correctly process an input signal until the correction value is received. Therefore, if the ECU is not operated until all the arithmetic processing means receive the correction value, there is a problem that the start-up time increases. If the ECU is operated before the correction value reception is completed, an accurate input signal There has been a problem in that an abnormal operation occurs due to failure to obtain the desired value.

  Therefore, it has been an important problem in the past to operate the ECU at a high speed and accurately and safely in an ECU having a plurality of arithmetic processing means and using an analog signal that needs to be corrected.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems of the prior art, and an object thereof is to provide an electronic control device that starts at high speed and operates accurately and safely, and a data communication method therefor.

In order to solve the above-described problems and achieve the object, an electronic control device according to the present invention includes a plurality of arithmetic processing units , and each of the plurality of arithmetic processing units uses a correction value used for correcting an input signal, An electronic control device in which any one of the plurality of arithmetic processing means reads from the storage means and transmits to another arithmetic processing means, and each of the plurality of arithmetic processing means includes the correction between the plurality of arithmetic processing means. Communication means for transmitting and receiving values, wherein the communication means transmits data in accordance with the structure of a buffer used for communication, and corrects an input signal when communicating when starting the plurality of arithmetic processing means. the transmission of correction value used to perform, when the communication after starting the plural arithmetic processing means, at startup with correction values are those for transmission of data not transmitted, the server used for communication The first buffer used when communicating when the plurality of arithmetic processing means is activated and the second buffer having a larger capacity than the first buffer and used when communicating after activation of the plurality of arithmetic processing means. The buffer used for communication is switched between at startup and after startup .

According to the invention of the present invention, the electronic control device includes a plurality of arithmetic processing means, and the correction value used by each of the plurality of arithmetic processing means for correcting the input signal is any one of the plurality of arithmetic processing means. Is an electronic control device that reads from the storage means and transmits it to other arithmetic processing means, each of the plurality of arithmetic processing means comprising a communication means for transmitting and receiving the correction value between the plurality of arithmetic processing means. The communication means transmits data in accordance with the structure of a buffer used for communication. When communicating when starting the plurality of arithmetic processing means, the communication means transmits a correction value used for correcting an input signal. , when communicating after starting the plural arithmetic processing means, at startup with correction values are those for transmission of data not transmitted, as the buffer used for communication, the plurality of arithmetic processing hand Provided with a first buffer used for communication at the time of startup, and a second buffer having a larger capacity than the first buffer and used for communication after startup of the plurality of arithmetic processing means. Since the buffer used for communication is switched between when and after activation, it is possible to obtain an electronic control device and its data communication method that can be activated at high speed and operate accurately and safely.

Exemplary embodiments of an electronic control unit and a data communication method thereof according to the present invention will be explained below in detail with reference to the accompanying drawings.

  First, a schematic configuration of an electronic control unit (ECU) 1 that is Embodiment 1 of the present invention will be described with reference to FIG. As shown in the figure, the ECU 1 according to the first embodiment has input terminals T11 to T14 and input terminals T21 to T23. The ECU 1 has a main microcomputer 10, a sub-microcomputer 20, and an EEPROM 2 therein.

  The ECU 1 is, for example, an engine control ECU for a vehicle. Inputs indicating water temperature, intake pressure, intake air temperature, battery voltage, oil pressure, oil temperature, throttle opening, and the like are input to the input terminals T11 to T14 and the input terminals T21 to T23. The signal is input as an analog voltage signal.

  The main microcomputer 10 is processing means for performing arithmetic processing using analog signals input to the input terminals T11 to T14, and the sub-microcomputer 20 performs arithmetic processing using analog signals input to the input terminals T21 to T23. A processing means for performing processing.

  Specifically, the main microcomputer 10 includes an input processing unit 13, a correction processing unit 12, a main control unit 11, and a DMA controller 14 therein. The sub-microcomputer 20 includes an input processing unit 23, a correction processing unit 22, a main control unit 21, a DMA controller 24, and an EEPROM driver 25 therein. Further, the EEPROM 2 stores therein a main microcomputer correction value 2a and a sub microcomputer correction value 2b.

  Here, the main microcomputer correction value 2a is a value used by the main microcomputer 10 to correct the input signal, is determined when the ECU 1 is manufactured, and is stored in the EEPROM 2. Similarly, the sub-microcomputer correction value 2b is a value used by the sub-microcomputer 20 to correct the input signal, is determined when the ECU 1 is manufactured, and is stored in the EEPROM 2.

  As described above, the main microcomputer 10 and the sub-microcomputer 20 perform an arithmetic process by inputting an analog signal. However, since the supply voltage of the power supply IC mounted on the ECU is not strictly uniform, When the power supply IC is mounted on the ECU, a necessary correction value is calculated and stored in the EEPROM 2, and the value of the input signal is accurately evaluated by correcting the output variation of the power supply IC.

  The input processing unit 23 in the sub-microcomputer 20 outputs an analog voltage signal input from the input terminals T21 to T23 to the correction processing unit 22. The EEPROM driver 25 reads the main microcomputer correction value 2 a and the sub microcomputer correction value 2 b from the EEPROM 2 and outputs them to the correction processing unit 22.

  The correction processing unit 22 corrects the value of the input signal input from the input processing unit 23 using the sub microcomputer correction value 2b and outputs the corrected value to the main control unit 21. In addition, the correction processing unit 22 outputs the main microcomputer correction value 2 a to the DMA controller 24.

  The DMA controller 24 is a communication unit that performs communication between the sub-microcomputer 20 and the main microcomputer 10, and specifically performs data communication by a DMA transfer method. The data communication by the DMA controller 24 is used for exchanging various data between the main microcomputer 10 and the sub-microcomputer 20, and the main microcomputer correction value 2a is also transmitted by the DMA controller 24.

  The main control unit 21 is an arithmetic processing unit that executes arithmetic processing based on the corrected input signal. Specifically, the main control unit 21 includes a CPU (Central Processing Unit) and a memory, and executes an application that performs engine control.

  The input processing unit 13 inside the main microcomputer 10 outputs an analog voltage signal input from the input terminals T11 to T14 to the correction processing unit 12. The DMA controller 14 outputs the main microcomputer correction value 2 a received from the DMA controller 24 to the correction processing unit 12.

  The correction processing unit 12 uses the main microcomputer correction value 2 a to correct the value of the input signal input from the input processing unit 13 and outputs the corrected value to the main control unit 11. The main control unit 11 is an arithmetic processing unit that executes arithmetic processing based on the corrected input signal. Specifically, the main control unit 11 includes a CPU (Central Processing Unit) and a memory, and executes an application that performs engine control.

  Next, DMA communication performed between the main microcomputer 10 and the sub-microcomputer 20 will be described. In data transmission / reception by DMA, buffers having the same structure are provided on the transmission side and the reception side, and the transmission side writes and transmits data according to the buffer structure. Therefore, the receiving side can know which data is written at which position from the buffer structure.

  In the ECU 1, the sub microcomputer 20 reads the main microcomputer correction value 2a and transmits it by DMA. This eliminates the need for an EEPROM dedicated to the main microcomputer 10 and simplifies the configuration. However, when the main microcomputer 10 is activated, initialization cannot be completed until the main microcomputer correction value 2a is received. Furthermore, only the main microcomputer correction value 2a needs to be transmitted when performing initialization.

  With this configuration, if data communication is performed with a DMA controller having a single buffer as in the prior art, the time required for initialization of the main microcomputer 10 is required because DMA communication requires time corresponding to the capacity of the buffer. Increase.

  Therefore, in the ECU 1 according to the present invention, the initialization buffers 14a and 24a and the normal buffers 14b and 24b are provided in the DMA controllers 14 and 24, and the buffers used at the time of initialization and after initialization processing are switched. . An example of the buffer structure in the DMA controllers 14 and 24 is shown in FIG.

  FIG. 2A is an explanatory diagram for explaining the structure of the initialization buffer 14a, and FIG. 2B is an explanatory diagram for explaining the structure of the normal buffer 24a. The structures of the initialization buffer 24a and the normal buffer 24b are the same as those of the initialization buffer 14a and the normal buffer 14b, respectively.

  The initialization buffer 14a has only a main microcomputer correction value 2a and a check code as shown in FIG. On the other hand, as shown in FIG. 2B, the normal buffer 14b is a normal process after the main microcomputer 10 and the sub-microcomputer 20 start up such as water temperature data and oil temperature data in addition to the main microcomputer correction value 2a and check code. It has an area for various data to communicate.

  In this way, the initialization buffers 14a and 24a and the normal buffers 14b and 24b are switched and used, and the initialization buffers 14a and 24a normally communicate with the main microcomputer correction value 2a necessary for activation. The initialization of the main microcomputer 10 can be speeded up by providing only the check code for confirming that the error has occurred. In addition, since the normal buffers 14b and 24b have areas for various data necessary for the processing after startup, the operation is not limited in the communication processing after startup.

  Next, processing when the ECU 1 is activated will be described. FIG. 3 is a flowchart for explaining the processing operation when the ECU 1 is activated. The flow shown in the figure is started when the ECU 1 is powered on, and the main microcomputer 10 and the sub-microcomputer 20 start the initialization process independently. The main microcomputer 10 first initializes the platform layer (step S101), and then starts waiting for reception of the main microcomputer correction value 2a (step S102).

  When the main microcomputer 10 receives the main microcomputer correction value 2a from the sub-microcomputer 20 (step S103, Yes), the main microcomputer 10 initializes the application layer (step S104) and ends the initialization process.

  On the other hand, the sub microcomputer 20 first initializes the platform layer (step S201), and then reads the main microcomputer correction value 2a and the sub microcomputer correction value 2b from the EEPROM 2 (step S202). The sub-microcomputer 20 transmits the main microcomputer correction value 2a to the main microcomputer 10 by the DMA controller 24 (step S203). At this time, the DMA controller 24 uses the initialization buffer 24a. Thereafter, the sub-microcomputer 20 initializes the application layer (step S204) and ends the initialization process.

  Thus, the sub-microcomputer 20 transmits the main microcomputer correction value 2a to the main microcomputer 10 during the initialization process, and the main microcomputer 10 waits for the reception of the main microcomputer correction value 2a and performs the initialization process. By using the initialization buffers 14a and 24a for transmission of the main microcomputer correction value 2a, the waiting time of the main microcomputer 10 can be minimized.

  Here, the DMA activation of the main microcomputer 10 and the sub-microcomputer 20 may be performed from either. FIG. 4 is a flowchart for explaining in more detail the starting process when starting the DMA from the sub-microcomputer 20. The flow shown in the figure is a process started when the ECU 1 is turned on, similarly to the flow shown in FIG. The main microcomputer 10 first initializes the platform layer (step S301), and then starts waiting for DMA activation from the sub-microcomputer 20 (step S302).

  When the sub-microcomputer 20 transmits the main microcomputer correction value 2a by DMA, the main microcomputer 10 activates DMA and receives the main microcomputer correction value 2a (step S303). Thereafter, the main microcomputer 10 determines whether or not the main microcomputer correction value 2a is normally received using the check code (step S304).

  If the main microcomputer correction value 2a is not normally received (No at Step S304), the main microcomputer 10 starts waiting for DMA activation again (Step S302). On the other hand, if the main microcomputer correction value 2a is normally received (step S304, Yes), the main microcomputer 10 transmits a reception completion notification to the sub-microcomputer 20 (step S305), and initializes the application layer (step S306). ), The initialization process is terminated.

  On the other hand, the sub microcomputer 20 first initializes the platform layer (step S401), and then reads the main microcomputer correction value 2a and the sub microcomputer correction value 2b from the EEPROM 2 (step S402). Thereafter, the sub-microcomputer 20 starts DMA (step S403), and transmits the main microcomputer correction value 2a to the main microcomputer 10 by the DMA controller 24 (step S404).

  Then, the sub-microcomputer 20 determines whether or not a reception completion notification has been received from the main microcomputer 10 (step S405). If no reception completion notification has been received from the main microcomputer 10 (step S405, No), the main microcomputer again The microcomputer correction value 2a is transmitted to the main microcomputer 10 (step S404).

  On the other hand, if a reception completion notification is received from the main microcomputer 10 (step S405, Yes), the sub-microcomputer 20 initializes the application layer (step S406) and ends the initialization process.

  Next, a start process when starting the DMA from the main microcomputer 10 will be described. FIG. 5 is a flowchart for explaining in more detail the startup process when starting up DMA from the main microcomputer 10. Note that the flow shown in the figure is a process started when the ECU 1 is turned on, as in the flow shown in FIG. 3. The main microcomputer 10 first initializes the platform layer (step S501), and then starts waiting for transmission permission from the sub-microcomputer 20 (step S502).

  When receiving transmission permission from the sub-microcomputer 20 (step S503), the main microcomputer 10 initializes the DMA and transmits a DMA initialization code to the sub-microcomputer 20 (step S504). Then, the main microcomputer correction value 2a is received from the sub-microcomputer 20 (step S505), and it is determined whether or not it has been normally received (step S506).

  If the main microcomputer correction value 2a is not normally received (step S506, No), the main microcomputer 10 starts waiting for transmission permission again (step S502). On the other hand, if the main microcomputer correction value 2a is normally received (step S506, Yes), the main microcomputer 10 transmits a reception completion notification to the sub-microcomputer 20 (step S507), and initializes the application layer (step S508). ), The initialization process is terminated.

  On the other hand, the sub microcomputer 20 first initializes the platform layer (step S601), and then reads the main microcomputer correction value 2a and the sub microcomputer correction value 2b from the EEPROM 2 (step S602), and transmits a transmission permission to the main microcomputer 10. (Step S603). Then, the DMA initialization code transmitted by the main microcomputer 10 is received to activate the DMA (step S604), and the main microcomputer correction value 2a is transmitted to the main microcomputer 10 (step S605).

  Thereafter, the sub-microcomputer 20 determines whether or not a reception completion notification has been received from the main microcomputer 10 (step S606). If no reception completion notification has been received from the main microcomputer 10 (step S606, No), the main microcomputer 10 again. The microcomputer correction value 2a is transmitted to the main microcomputer 10 (step S605).

  On the other hand, if a reception completion notification is received from the main microcomputer 10 (step S606, Yes), the sub-microcomputer 20 initializes the application layer (step S607) and ends the initialization process.

  Next, normal processing of the ECU 1 will be described. Even after the ECU 1 is turned on and the main microcomputer 10 and the sub microcomputer 20 are activated, the sub microcomputer 20 periodically reads the main microcomputer correction value 2a and the sub microcomputer correction value 2b from the EEPROM 2, and uses the main microcomputer correction value 2a as the main microcomputer correction value 2a. It transmits to the microcomputer 10. On the main microcomputer 10 side, abnormal operation due to garbled correction value data or the like can be prevented by always using the latest received main microcomputer correction value 2a.

  The normal processing operation of the ECU 1 is shown in FIG. The flow shown in FIG. 6 explains the operation from the time when the ECU 1 is turned on until the normal process, and is started when the power is turned on to the ECU 1. The main microcomputer 10 starts the main loop (step S702) after executing the initialization process (step S701). Note that the initialization process shown in step S701 may use the process described with reference to FIGS.

  After starting the main loop (step S702), the main microcomputer 10 receives the main microcomputer correction value 2a from the sub-microcomputer 20 (step S703), and updates the correction value used by the correction processing unit 12 to the received value ( Step S704), the main loop is terminated (Step S705). The main loop shown in steps S702 to S705 is repeatedly executed until the ECU 1 is turned off or the main microcomputer 10 is restarted.

  On the other hand, after executing the initialization process (step S801), the sub-microcomputer 20 starts a main loop (step S802). The initialization process shown in step S801 may use the process described with reference to FIGS.

  After starting the main loop (step S802), the sub microcomputer 20 reads the main microcomputer correction value 2a and the sub microcomputer correction value 2b from the EEPROM 2 (step S803), and transmits the main microcomputer correction value 2a to the main microcomputer 10 by the DMA controller 24. (Step S804). At this time, the DMA controller 24 uses the normal buffer 24b.

  Thereafter, the sub-microcomputer 20 updates the correction value used by the correction processing unit 22 to the value read from the EEPROM 2 (step S805), and ends the main loop (step S806). The main loop shown in steps S802 to S806 is repeatedly executed until the ECU 1 is powered off or the sub-microcomputer 20 is restarted.

  By the way, when the correction value is not normal due to the abnormality of the main microcomputer 10, the abnormality of the sub-microcomputer 20, the failure of the EEPROM 2, or the noise of the DMA communication line, the malfunction caused by using the abnormal correction value is prevented. Therefore, it is desirable to perform fail-safe.

  Whether or not the correction value is within a normal range can be detected, for example, by determining whether or not the value is within the guaranteed range of the power supply IC mounted on the ECU 1. For example, when the accuracy of the power supply IC is ± 5%, if the correction value is 0.95 or more and 1.05 or less, it is determined to be normal, and if it is outside this range, it is determined to be abnormal. Here, the correction process is performed by multiplying the correction value.

  Further, when the abnormality of the correction value is caused by the abnormal operation of the sub-microcomputer 20, it can be recovered by restarting the sub-microcomputer 20 from the main microcomputer 10. FIG. 7 is a flowchart for explaining fail-safe processing by resetting the sub-microcomputer 20. This flow explains the operation from the time when the ECU 1 is turned on until the normal process, and is started when the ECU 1 is turned on. After executing the initialization process (step S901), the main microcomputer 10 starts the main loop (step S902). Here, the initialization process shown in step S901 may use a process similar to the process described with reference to FIGS.

  After starting the main loop (step S902), the main microcomputer 10 receives the main microcomputer correction value 2a from the sub-microcomputer 20 (step S903), and determines whether or not the received correction value is within a predetermined range (step S903). S904). As a result, if the received correction value deviates from the predetermined range (step S904, No), the main microcomputer 10 resets the sub-microcomputer 20, that is, restarts (step S905), and proceeds to step S904 again. .

  On the other hand, if the received correction value is within the predetermined range (step S904, Yes), the main microcomputer 10 updates the correction value used by the correction processing unit 12 to the received value (step S906), and the main loop. Is finished (step S907). The main loop shown in steps S902 to S907 is repeatedly executed until the power of the ECU 1 is turned off or the main microcomputer 10 is restarted.

  As another fail-safe process, a predetermined fail-safe value may be used as the correction value when the correction value is abnormal. The fail-safe value is a value that can safely control the microcomputer. FIG. 8 is a flowchart for explaining processing using a fail-safe value when the correction value is abnormal. This flow explains the operation from the time when the ECU 1 is turned on until the normal process, and is started when the ECU 1 is turned on. After executing the initialization process (step S1001), the main microcomputer 10 starts the main loop (step S1002). Here, the initialization process shown in step S1001 may use a process similar to the process described with reference to FIGS.

  After starting the main loop (step S1002), the main microcomputer 10 receives the main microcomputer correction value 2a from the sub-microcomputer 20 (step S1003), and determines whether or not the received correction value is within a predetermined range (step S1003). S1004). As a result, if the received correction value deviates from the predetermined range (step S1004, No), the main microcomputer 10 updates the correction value used by the correction processing unit 12 to the fail-safe value (step S1006). Then, the main loop is terminated (step S1007).

  On the other hand, if the received correction value is within the predetermined range (step S1004, Yes), the main microcomputer 10 updates the correction value used by the correction processing unit 12 to the received value (step S1005), and the main loop. Is finished (step S1007). The main loop shown in steps S1002 to S1007 is repeatedly executed until the ECU 1 is turned off or the main microcomputer 10 is restarted.

  Thus, when there is an abnormality in the correction value, the fail-safe process is executed, so that the ECU 1 can be operated safely without causing an operation abnormality. Although the correction value abnormality detection during the normal operation has been described in the flowcharts of FIGS. 7 and 8, the correction value abnormality can be detected by the same process during the initialization process, and the fail-safe process can be executed. is there.

  In the flowchart of FIG. 8, the processing in the main microcomputer 10 has been described as an example. Similarly, in the sub-microcomputer 20, it is determined whether or not the correction value read from the EEPROM 2 is within a predetermined range. When the value deviates from the range, the correction process can be performed using the fail-safe value.

  As described above, in the first embodiment, an initialization buffer and a normal buffer are provided in the DMA controller, and an initialization buffer having only a correction value and a check code is used during the initialization process. Since the correction value is transmitted to the main microcomputer 10, the start-up of the main microcomputer 10 and thus the start-up of the ECU 1 can be speeded up.

  In addition, when an abnormality occurs in the correction value, automatic fail safe is performed so that the ECU can be operated safely without causing abnormal operation of the ECU.

  Furthermore, since the initialization of the application layer in the main microcomputer is performed after completion of reception of the correction value from the sub-microcomputer, the main microcomputer can be started up without malfunctioning.

  That is, since DMA communication is impossible until the platform layer is initialized, if the DMA communication is performed for a microcomputer that has not been initialized, whether the transmitted data is normally received or not. Such a determination is difficult, which is not preferable. Therefore, in the conventional technology, the initialization of the platform layer is completed earlier than the microcomputer (sub-microcomputer in this embodiment) on the transmission side (the main microcomputer in this embodiment) on the microcomputer that receives the correction value. As described above, the reading-side microcomputer is caused to perform a time-consuming EEPROM reading process, or the receiving-side microcomputer is activated first to instruct the activation of the transmitting-side microcomputer.

  However, if this conventional technology is set so that the initialization of the platform layer is completed earlier on the receiving side of the microcomputer, the initialization of the application layer that is subsequently performed is not receiving the correction value. There is a danger of being done.

  Therefore, as in this embodiment, after the initialization of the platform layer of the receiving microcomputer is completed, the application layer is not initialized until the correction value is received, so that the DMA communication and the application layer can be performed. Both initialization and normalization can be performed normally.

  Here, by initializing the platform layer of the sending microcomputer, that is, starting the sending microcomputer from the receiving microcomputer, it is possible to optimize the starting time of multiple microcomputers and start them up quickly and safely. Become.

  Next, a second embodiment of the present invention will be described. FIG. 9 is a schematic configuration diagram showing a schematic configuration of an electronic control unit (ECU) that is Embodiment 2 of the present invention. The ECU 3 according to the second embodiment is provided with SRAMs (Static Random Access Memory) 32 and 42 in the main microcomputer 30 and the sub-microcomputer 40, respectively. The correction processing units 31 and 41 store the correction values in the SRAMs 32 and 42, and read them as needed. To use. Since other configurations and operations are the same as those of the ECU 1 shown in the first embodiment, the same components are denoted by the same reference numerals and description thereof is omitted.

  The correction processing unit 41 in the sub-microcomputer 40 stores the sub-microcomputer correction value 2b in the SRAM 42. Thereafter, when correcting the value of the input signal input from the input processing unit 23, the sub microcomputer correction value 2b is read from the SRAM 42 and used. In addition, the correction processing unit 42 outputs the main microcomputer correction value 2 a to the DMA controller 24.

  Similarly, the correction processing unit 31 inside the main microcomputer 30 stores the main microcomputer correction value 2 a received via the DMA controller 14 in the SRAM 32. Thereafter, when correcting the value of the input signal input from the input processing unit 13, the main microcomputer correction value 2a is read from the SRAM 32 and used.

  Next, processing when the ECU 3 is activated will be described. FIG. 10 is a flowchart for explaining the processing operation when the ECU 3 is activated. The flow shown in the figure is started when the ECU 3 is turned on, and the main microcomputer 30 and the sub-microcomputer 40 start the initialization process independently of each other. The main microcomputer 30 first initializes the platform layer (step S1101), and then starts waiting for reception of the main microcomputer correction value 2a (step S1102).

  When the main microcomputer 30 receives the main microcomputer correction value 2a from the sub microcomputer 40 (step S1103, Yes), the main microcomputer 30 stores the received main microcomputer correction value 2a in the SRAM 32 (step S1104), and then initializes the application layer. (Step S1105), the initialization process is terminated.

  On the other hand, the sub microcomputer 40 first initializes the platform layer (step S1201), and then reads the main microcomputer correction value 2a and the sub microcomputer correction value 2b from the EEPROM 2 (step S1202). Further, the sub-microcomputer 40 transmits the main microcomputer correction value 2a to the main microcomputer 30 by the DMA controller 24 (step S1203). At this time, the DMA controller 24 uses the initialization buffer 24a. Thereafter, the sub-microcomputer 40 stores the sub-microcomputer correction value 2b in the SRAM 42 (step S1204), initializes the application layer (step S1205), and ends the initialization process.

  Next, normal processing of the ECU 3 will be described. After the ECU 3 is powered on and the main microcomputer 30 and the sub-microcomputer 40 are activated, the main microcomputer 30 reads the main microcomputer correction value 2a from the SRAM 32 and uses it. The sub-microcomputer 40 reads the sub-microcomputer correction value 2b from the SRAM 42 and uses it.

  The normal processing operation of the ECU 3 is shown in FIG. The flow shown in FIG. 11 explains the operation from the time when the ECU 3 is turned on until the normal process, and is started when the power is turned on to the ECU 3. After executing the initialization process (step S1301), the main microcomputer 30 starts the main loop (step S1302). Note that the initialization process shown in step S1301 may use the process described in FIG.

  After the main loop is started (step S1302), the main microcomputer 30 reads the main microcomputer correction value 2a from the SRAM 32 and performs input signal correction processing (step S1303), and ends the main loop (step S1304). The main loop shown in steps S1302 to S1304 is repeatedly executed until the ECU 3 is turned off or the main microcomputer 30 is restarted.

  On the other hand, after executing the initialization process (step S1401), the sub-microcomputer 40 starts the main loop (step S1402). Note that the initialization process shown in step S1401 may use the process described in FIG.

  After the main loop is started (step S1402), the sub-microcomputer 40 reads the sub-microcomputer correction value 2b from the SRAM 32, performs input signal correction processing (step S1403), and ends the main loop (step S1404). The main loop shown in steps S1402 to S1404 is repeatedly executed until the power of the ECU 3 is turned off or the sub-microcomputer 40 is restarted.

  In the flow shown in FIG. 11, the correction value stored in the SRAM at startup is read and used as needed. However, during normal operation, the sub-microcomputer 40 periodically reads the correction value from the EEPROM 2 and stores it in the SRAM. The correction value stored in the SRAM may be operated to determine whether or not there is an abnormality.

  FIG. 12 is a flowchart for explaining normal processing of the ECU 3 when the correction value is stored in the SRAM and the correction value is periodically read from the EEPROM to update the stored content of the SRAM. This flowchart explains the operation from when the ECU 3 is turned on to the normal process, and is started when the ECU 3 is turned on. After executing the initialization process (step S1501), the main microcomputer 30 starts the main loop (step S1502). Note that the initialization process shown in step S1501 may use the process described in FIG.

  After starting the main loop (step S1502), the main microcomputer 30 reads the main microcomputer correction value 2a from the SRAM 32 (step S1503). Thereafter, the main microcomputer 30 receives the main microcomputer correction value 2a from the sub-microcomputer 40 (step S1504), and determines whether or not the correction value read from the SRAM 32 matches the correction value received from the sub-microcomputer 40 ( Step S1505).

  When the correction value read from the SRAM 32 and the correction value received from the sub-microcomputer 40 do not match (step S1505, No), the main microcomputer 30 writes the correction value received from the sub-microcomputer 40 into the SRAM 32 and updates it (step S1506). ).

  When updating the SRAM 32 (step S1506) or when the correction value read from the SRAM 32 matches the correction value received from the sub-microcomputer 40 (step S1505, Yes), the main microcomputer 30 ends the main loop (step S1507). . The main loop shown in steps S1502 to S1507 is repeatedly executed until the power of the ECU 3 is turned off or the main microcomputer 30 is restarted.

  On the other hand, after executing the initialization process (step S1601), the sub-microcomputer 40 starts the main loop (step S1602). Note that the initialization process shown in step S1601 may use the process described in FIG.

  After starting the main loop (step S1602), the sub-microcomputer 40 reads the sub-microcomputer correction value 2b from the SRAM 42 (step S1603). Thereafter, the sub microcomputer 40 reads the main microcomputer correction value 2a and the sub microcomputer correction value 2b from the EEPROM 2 (step S1604), and transmits the main microcomputer correction value 2a to the main microcomputer 30 (step S1605). Further, the sub-microcomputer 40 determines whether or not the sub-microcomputer correction value 2b read from the SRAM 42 matches the sub-microcomputer correction value 2b read from the EEPROM 2 (step S1606).

  If the sub-microcomputer correction value 2b read from the SRAM 42 does not match the sub-microcomputer correction value 2b read from the EEPROM 2 (No in step S1606), the sub-microcomputer 40 writes the correction value read from the EEPROM 2 to the SRAM 42 and updates it ( Step S1607).

  When the SRAM 42 is updated (step S1607) or the correction value read from the SRAM 42 matches the correction value read from the EEPROM 2 (step S1606, Yes), the sub-microcomputer 40 ends the main loop (step S1608). The main loop shown in steps S1602 to S1608 is repeatedly executed until the power of the ECU 3 is turned off or the sub-microcomputer 40 is restarted.

  As described above, in the second embodiment, the main microcomputer correction value 2a and the sub microcomputer correction value 2b are stored in the SRAMs 32 and 42, respectively, and read and used at any time, thereby suppressing the occurrence of an abnormality in the correction value. The microcomputer 30 and the sub-microcomputer 40 can be operated accurately.

  Further, by periodically reading the correction value from the EEPROM 2 and comparing it with the value stored in the SRAM, the correction value stored in the SRAM is automatically corrected even when an abnormality occurs, and the normal correction value is used. Correction processing can be performed.

  In the second embodiment, the same fail-safe process as in the first embodiment can be performed, and the safety in the operation of the ECU 3 can be further enhanced.

  In the first and second embodiments, the configuration in which the ECU includes two microcomputers has been described. However, the embodiment of the present invention is not limited to this, and a desired number of microcomputers can be provided in the ECU. Is.

  In the first and second embodiments, an EEPROM is connected to the sub-microcomputer, and the sub-microcomputer is responsible for reading the correction value from the EEPROM and transmitting it to the main microcomputer. For example, the EEPROM is connected to the main microcomputer. The correction value may be read out and the main microcomputer may transmit the correction value to the sub-microcomputer.

  FIG. 13 is a schematic configuration diagram showing a schematic configuration of an electronic control unit (ECU) that is Embodiment 3 of the present invention. The ECU 4 according to the third embodiment includes a main microcomputer 50, sub-microcomputers 60, 70, and 80 and an EEPROM 5 therein.

  The main microcomputer 50 is processing means for performing arithmetic processing using analog signals input to the input terminals T51 to T54, and the sub-microcomputer 60 performs arithmetic processing using analog signals input to the input terminals T61 to T63. A processing means for performing processing. Similarly, the sub-microcomputers 70 and 80 are processing means for performing arithmetic processing using analog signals input to the input terminals T71 to T73 and the input terminals T81 to T83, respectively.

  The EEPROM 5 includes a main microcomputer correction value 5a used by the main microcomputer 50 for correcting the input signal, a sub microcomputer correction value 5b used by the sub microcomputer 60 for correcting the input signal, and a sub microcomputer used by the sub microcomputer 70 for correcting the input signal. The correction value 5c and the sub microcomputer correction value 5d used by the sub microcomputer 80 to correct the input signal are stored.

  The main microcomputer 51 includes a DMA controller 51 therein, and the sub microcomputers 60, 70, and 80 include DMA controllers 61, 71, and 81, respectively. Since other internal configurations and operations of the main microcomputer 50 and the sub-microcomputers 60, 70, 80 are the same as those in the first and second embodiments, illustration and description are omitted here.

  The main microcomputer 50 reads the main microcomputer correction value 5a and the sub microcomputer correction values 5b to 5d from the EEPROM 5. Thereafter, the input signal is corrected using the main microcomputer correction value 5a, and the sub microcomputer correction values 5b to 5d are transmitted to the sub microcomputers 60 to 80 via the DMA controller 51, respectively.

  The sub-microcomputer 60 corrects the input signal using the sub-microcomputer correction value 5b received via the DMA controller 61. Similarly, the sub microcomputers 70 and 80 correct the input signal using the sub microcomputer correction values 5c and 5d received via the DMA controllers 71 and 81, respectively.

  In this way, even when three or more microcomputers are installed in the ECU, or even when the main microcomputer reads out the correction value and transmits it to another microcomputer, the activation is performed in the same manner as in the first and second embodiments. It is faster and can be operated accurately and safely.

  In the first to third embodiments, the correction of the analog voltage of the input signal has been described as an example. Needless to say, the same effect can be obtained in the correction of the output signal.

As described above, the electronic control device and the data communication method thereof according to the present invention are useful for an ECU having a plurality of microcomputers, and in particular, an ECU that requires high-speed startup with a simple configuration and requires accurate and safe operation. Suitable for

1 is a schematic configuration diagram showing a schematic configuration of an ECU that is Embodiment 1 of the present invention. It is explanatory drawing explaining the structure of the buffer for initialization shown in FIG. It is explanatory drawing explaining the structure of the buffer for normal use shown in FIG. 2 is a flowchart illustrating a processing operation when the ECU shown in FIG. 1 is activated. It is a flowchart explaining in more detail the starting process in starting DMA from a submicrocomputer. 7 is a flowchart for explaining in more detail a startup process when starting up a DMA from the main microcomputer 10; FIG. 2 is a flowchart for explaining a processing operation after the ECU shown in FIG. It is a flowchart explaining the fail safe process by the reset of a submicrocomputer. It is a flowchart explaining the process which uses a fail safe value at the time of abnormality of a correction value. It is a schematic block diagram which shows the schematic structure of ECU which is Example 2 of this invention. FIG. 10 is a flowchart for explaining a processing operation when the ECU shown in FIG. 9 is activated. FIG. 10 is a flowchart illustrating a processing operation after the ECU shown in FIG. 9 is activated. 5 is a flowchart for explaining normal processing of the ECU when storing correction values in the SRAM and periodically reading the correction values from the EEPROM to update the stored contents of the SRAM. It is a schematic block diagram which shows schematic structure of ECU which is Example 3 of this invention.

Explanation of symbols

1,3,4 ECU
2,5 EEPROM
2a, 5a Main microcomputer correction value 2b, 5b to 5d Sub microcomputer correction value 10, 30, 50 Main microcomputer 11, 21 Main control unit 12, 22 Correction processing unit 13, 23 Input processing unit 14, 24, 51, 61, 71 , 81 DMA controller 14a, 24a Initialization buffer 14b, 24b Normal buffer 20, 40, 60, 70, 80 Sub-microcomputer 32, 42 SRAM
25 EEPROM drivers T11 to T14, T21 to T23, T51 to T54, T61 to T63, T711 to T73, T81 to T83 Input terminals

Claims (6)

A plurality of arithmetic processing means, each of the plurality of arithmetic processing means reads a correction value used for correcting an input signal from one of the plurality of arithmetic processing means and transmits it to another arithmetic processing means; An electronic control device,
Each of the plurality of arithmetic processing units includes a communication unit that transmits and receives the correction value between the plurality of arithmetic processing units.
The communication means includes
A buffer having the same structure as that of a communication partner used for communication is provided, and data is transmitted to the buffer according to the buffer structure, and then the data is transmitted. When communicating when starting the plurality of arithmetic processing means The correction value is transmitted, and when communicating after activation of the plurality of arithmetic processing means, data that is not transmitted at the time of activation is transmitted together with the correction value, and the buffer used for communication is transmitted. The first buffer used when communicating when the plurality of arithmetic processing means is activated and the second buffer having a larger capacity than the first buffer and used when communicating after activation of the plurality of arithmetic processing means An electronic control device comprising a buffer and switching a buffer used for communication between startup and after startup. The electronic control apparatus according to claim 1 , wherein the communication unit performs data communication by DMA. The engine is mounted on a vehicle and controls an engine. The engine includes a plurality of arithmetic processing units, and each of the plurality of arithmetic processing units uses a correction value used for correcting an input signal as one of the plurality of arithmetic processing units. Is an electronic control device for engine control that is read from the storage means and transmitted to other arithmetic processing means,
Each of the plurality of arithmetic processing units includes a communication unit that transmits and receives the correction value between the plurality of arithmetic processing units.
The communication means includes
A buffer having the same structure as that of a communication partner used for communication is provided, and data is transmitted to the buffer according to the buffer structure, and then the data is transmitted. When communicating when starting the plurality of arithmetic processing means The correction value is transmitted, and when communicating after starting the plurality of arithmetic processing means, the correction value is transmitted together with the data used for engine control that is not transmitted at the start time. The first buffer used when communicating when starting the plurality of arithmetic processing means as the buffer used in the above, and a capacity larger than the first buffer, and when communicating after starting the plurality of arithmetic processing means A second buffer to be used, and an engine control characterized by switching a buffer used for communication between startup and after startup The electronic control unit. The data used for engine control, which is transmitted after activation of the plurality of arithmetic processing means by the communication means and is not transmitted at the time of activation, is at least one of water temperature data and oil temperature data. an electronic control unit for engine control according to 3. A plurality of arithmetic processing means, each of the plurality of arithmetic processing means reads a correction value used for correcting an input signal from one of the plurality of arithmetic processing means and transmits it to another arithmetic processing means; An electronic control device data communication method
When starting up the plurality of arithmetic processing means, the first buffer having the same structure provided in the arithmetic processing means on both the transmission side and the receiving side is used , and the arithmetic processing means on the transmission side corresponds to the structure of the first buffer. A startup communication step of transmitting the correction value to the arithmetic processing means on the receiving side after writing the correction value to the first buffer provided in the arithmetic processing means on the transmitting side ;
After activation of the plurality of processing means, said first capacity much larger than the buffer, the processing means of the transmitting and receiving sides using a second buffer of the same structure both included in the calculation of the transmission side The correction value is written after the processing means writes data that is not transmitted together with the correction value to the second buffer provided in the calculation processing means on the transmission side according to the structure of the second buffer. and after activation communication step of transmitting the data which is not transmitted to the processing means of the receiving side in at the start with,
A data communication method for an electronic control device, comprising: The engine is mounted on a vehicle and controls an engine. The engine includes a plurality of arithmetic processing units, and each of the plurality of arithmetic processing units uses a correction value used for correcting an input signal as one of the plurality of arithmetic processing units. Is a data communication method of an electronic control device for engine control that is read from the storage means and transmitted to other arithmetic processing means,
When starting up the plurality of arithmetic processing means, the first buffer having the same structure provided in the arithmetic processing means on both the transmission side and the receiving side is used , and the arithmetic processing means on the transmission side corresponds to the structure of the first buffer. A startup communication step of transmitting the correction value to the arithmetic processing means on the receiving side after writing the correction value to the first buffer provided in the arithmetic processing means on the transmitting side ;
After activation of the plurality of processing means, said first capacity much larger than the buffer, the processing means of the transmitting and receiving sides using a second buffer of the same structure both included in the calculation of the transmission side After the processing means writes the data used for engine control that is not transmitted at the time of startup together with the correction value to the second buffer provided in the transmission side arithmetic processing means according to the structure of the second buffer. A post-startup communication step of transmitting data used for the engine control that is not transmitted together with the correction value to the calculation processing means on the receiving side ;
A data communication method for an electronic control device for engine control, comprising:

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