JP4530322B2 - High frequency power amplifier module - Google Patents

High frequency power amplifier module Download PDF

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Publication number
JP4530322B2
JP4530322B2 JP2001310857A JP2001310857A JP4530322B2 JP 4530322 B2 JP4530322 B2 JP 4530322B2 JP 2001310857 A JP2001310857 A JP 2001310857A JP 2001310857 A JP2001310857 A JP 2001310857A JP 4530322 B2 JP4530322 B2 JP 4530322B2
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Prior art keywords
power amplifier
amplifier module
frequency power
semiconductor element
layer
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JP2003124426A (en
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健治 関根
哲 栗山
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Renesas Electronics Corp
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Renesas Electronics Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap

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  • Microwave Amplifiers (AREA)

Description

【０００１】
【発明の属する技術分野】
この発明は通信用送受信器の送信部に使われる高周波増幅装置に関するもので、特に携帯電話等で要求される装置の小型化に適した高周波パワーアンプモジュールに関する。
【０００２】
【従来の技術】
携帯電話端末はその利便性の観点から小型、高機能化が要求されており、これに伴い、送信部に用いられる高周波パワーアンプにおいても小型化が重要な課題となっている。この高周波パワーアンプの小型化手法の一つとして多層誘電体基板上に部品類を搭載したモジュール化の方法が知られており、特開平９−２８３７００等に記載されている。
【０００３】
図６に上記特開平９−２８３７００の多層基板を用いたパワーアンプモジュールを示す。図において、増幅用半導体素子２−１、２−２は、６層の誘電体層を有する多層基板１の２層分をくり貫いた凹部に搭載され、ボンディングワイヤ８により表層の回路パタンに接続されている。コンデンサ、インダクタ、抵抗等のチップ部品６は基板１の表面に搭載されており、その上をキャップ９で覆っている。誘電体層の２層毎に接地導体層３を設け、その層間に線路導体層７を設け、線路用ビア５により表層に設けた回路パタンやチップ部品とのコンタクトをとっている。半導体素子の下には複数のサーマルビア４を設け、熱を裏面に逃がす構造としている。
【０００４】
【発明が解決しようとする課題】
一般に、多層基板を用いたパワーアンプモジュールでは表面に半導体素子やコンデンサ、インダクタ、抵抗、等のチップ部品を搭載し、伝送線路やＤＣバイアス印加用線路の一部は層間の導体層を使う方法がとられており、上記従来の技術で示した例でも同様の構成となっている。
【０００５】
しかし、上記従来例では増幅用半導体素子の下の部分は最下層のアース導体まで全てサーマルビアが設けられており、表層以下の層間を伝送線路やＤＣバイアス印加用線路として使用できるスペースは限られたものとなる。より小型化を目指し、使用する半導体チップとモジュールの大きさが近づくほどこのスペースはほとんど無くなってしまう。特に半導体素子と周辺回路の一部を半導体基板上に取り込んだＭＭＩＣチップとした場合にはこの状態が著しくなり、多層基板を用いた小型化の利点を生かすことができなくなるという課題がある。
【０００６】
【課題を解決するための手段】
本発明は、上で述べた課題を解決するため、増幅用半導体素子の下に設けたサーマルビアを前記半導体素子を搭載した面の次の層のアース導体層までとし、その下の層に伝送線路を設ける構造とした。また、誘電体基板として窒化アルミニウムのような熱伝導率のよい材料を用いれば半導体素子の下に設けるサーマルビアも特に必要無く、接地面への接続用ビアだけでよい。
【０００７】
一般に送信用パワーアンプモジュールの性能として重要となる効率の低下を抑えるための回路損失低減の観点から、出力側のインピーダンス整合回路を構成する伝送線路が最も広い面積を必要とする。より多くのチップ部品を基板表面に搭載するには、上記出力側のインピーダンス整合回路を構成する伝送線路を、半導体素子の下を通るように形成することが最も有効である。これにより多層基板の内層の面積を有効に利用でき、もって小型な高周波パワーアンプモジュールが実現できる。
【０００８】
【発明の実施の形態】
以下、本発明の実施例について詳細に説明する。図１は本発明の高周波パワーアンプモジュールの上面図であり、図２は上記高周波パワーアンプモジュールのＡ−Ｂ断面図である。本実施例において、出力側のインピーダンス整合回路を構成する伝送線路は、その一部が増幅用半導体素子および周辺回路の一部を組み込んだＭＭＩＣチップの下を通る構造となっている。
【０００９】
図１、図２において多層基板１−１〜１−４の最上層の誘電体基板１−１上にＭＭＩＣチップ２、やコンデンサ、インダクタ、抵抗等の受動チップ部品４−１〜４−６が搭載されている。高周波信号はモジュールの裏面に設けられた高周波信号入力端１２からビア６−１を通り、表層の入力端子５からボンディングワイヤ８−１を通り、ＭＭＩＣの入力パッド側に入り、ＭＭＩＣ出力側のボンディングワイヤ８−２を経て出力側のインピーダンス整合回路を形成するマイクロストリップ線路７に出力され、ビア６−２を通り誘電体の２層と３層の間に設けたストリップ線路３を経て再びビア６−３を通り、表層に設けたチップコンデンサ４−３を経た後、再びビアを通りモジュールの裏面に設けた出力端子１３に至る。
【００１０】
本実施例では、誘電体の１層目と２層目の間に第１接地導体層９および３層目と４層目の間に第２接地導体層１０を設け、最下層のモジュールのグランドとなるグランド層１１と多数のビアで接続している。またＭＭＩＣチップの下面には、第１接地導体層との間に多数のサーマルビア６−４を設けて熱抵抗の低減をはかっている。
【００１１】
図３は図１、図２に示した高周波パワーアンプモジュールの誘電体基板の２層目と３層目の間に設けた出力側インピーダンス整合回路用ストリップ線路を示す図である。図において３層目誘電体基板１−３の上にストリップ線路導体３が、基板表層に取り付けられたＭＭＩＣチップ２の真下を通るように設けられている。ＭＭＩＣからの高周波信号は表層からビア６−２を通り、ストリップ線路３、ビア６−３を経て再び表層に現れる。
【００１２】
また、ストリップ線路の途中にビア６−４が設けられており、基板表層に設けたインピーダンス整合用のチップコンデンサと接続されている。３層目誘電体基板を貫通する形でサーマルビア６−５がストリップ線路を避ける形で設けられている。なお、多層誘電体基板材料を窒化アルミニウムとすれば、基板の熱抵抗が低減され、サーマルビアを設けなくてもよくなる。ただし、グランドをとるためのビアは必要であり、グランドまでのインダクタンスを低減するにはあまり数を減らすのは得策ではない。
【００１３】
図４は図３で示した出力側インピーダンス整合回路用ストリップ線路の他の実施例を示す図である。図においてストリップ線路３の出力側ビア６−３の位置が同じで入力側ビア６−２の位置が９０度違う場合である。図３または図４の構成は、ストリップ線路が必要とする長さにより選択できる。
【００１４】
図５は本発明の高周波パワーアンプモジュールの回路構成図である。図においてモジュール２１の高周波信号入力端子２４からの高周波信号は２段アンプからなるＭＭＩＣ２２に入り、初段のトランジスタ２６出力段のトランジスタ２７を経て出力側のインピーダンス整合回路を構成するストリップ線路２３に入りモジュールの出力端子２５から出力される。各トランジスタにはＤＣバイアスがＤＣバイアス端子２８−１〜２８−４から印加される。図において出力側のストリップ線路の一部（斜線部）がＭＭＩＣチップの下の内層に形成される部分である。
【００１５】
【発明の効果】
本発明によれば、多層基板を用いたパワーアンプモジュールにおいて、増幅用半導体素子を含む半導体チップの下の層に伝送線路、特に最も広い面積を必要とする出力側のインピーダンス整合回路を構成する伝送線路の一部を設ける。これにより多層基板の内層の面積を有効に利用できると共に表層をチップ部品搭載用として有効活用でき、もって小型な高周波パワーアンプモジュールの実現が可能になった。
【図面の簡単な説明】
【図１】本発明の一実施例の高周波パワーアンプモジュールを示す平面図。
【図２】本発明の一実施例の高周波パワーアンプモジュールの断面図。
【図３】３層目誘電体基板上に構成したストリップ線路の平面図。
【図４】３層目誘電体基板上に構成したストリップ線路の平面図。
【図５】高周波パワーアンプモジュールの回路図。
【図６】従来の高周波パワーアンプモジュールの一例を示す断面図。
【符号の説明】
１…多層誘電体基板、２…ＭＭＩＣチップ、３…高周波伝送線路、４…受動チップ部品、５…入力パッド、６…ビア、７…出力パッド、８…ボンディングワイヤ、９…接地導体層１、１０…接地導体層２、１１…グランド層。[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a high-frequency amplifier used in a transmitter of a communication transceiver, and more particularly to a high-frequency power amplifier module suitable for downsizing a device required for a mobile phone or the like.
[0002]
[Prior art]
Mobile phone terminals are required to be small and highly functional from the viewpoint of convenience, and accordingly, miniaturization has become an important issue in high-frequency power amplifiers used in transmission units. As one of the miniaturization methods of this high-frequency power amplifier, a modularization method in which components are mounted on a multilayer dielectric substrate is known, and is described in JP-A-9-283700.
[0003]
FIG. 6 shows a power amplifier module using the multilayer substrate disclosed in Japanese Patent Laid-Open No. 9-283700. In the figure, the amplifying semiconductor elements 2-1 and 2-2 are mounted in recesses formed through two layers of the multilayer substrate 1 having six dielectric layers, and are connected to a circuit pattern on the surface layer by bonding wires 8. Has been. A chip component 6 such as a capacitor, an inductor, or a resistor is mounted on the surface of the substrate 1 and is covered with a cap 9. A ground conductor layer 3 is provided for every two dielectric layers, a line conductor layer 7 is provided between the dielectric layers, and contact is made with a circuit pattern or chip component provided on the surface layer by a line via 5. A plurality of thermal vias 4 are provided under the semiconductor element to release heat to the back surface.
[0004]
[Problems to be solved by the invention]
In general, a power amplifier module using a multi-layer substrate has chip parts such as semiconductor elements, capacitors, inductors, resistors, etc. mounted on the surface, and a part of the transmission line and DC bias application line uses an interlayer conductor layer. In the example shown in the above prior art, the same configuration is adopted.
[0005]
However, in the above conventional example, thermal vias are provided all the way to the lowermost ground conductor in the lower part of the amplifying semiconductor element, and the space that can be used as a transmission line or a DC bias applying line is limited. It will be. Aiming for further miniaturization, the closer the size of the semiconductor chip and module used, the more this space will be lost. In particular, in the case of an MMIC chip in which a semiconductor element and a part of a peripheral circuit are incorporated on a semiconductor substrate, this state becomes remarkable, and there is a problem that it is impossible to take advantage of downsizing using a multilayer substrate.
[0006]
[Means for Solving the Problems]
In order to solve the above-described problems, the present invention uses a thermal via provided below the amplification semiconductor element as far as the ground conductor layer next to the surface on which the semiconductor element is mounted, and transmits it to the layer below it. The structure is such that a track is provided. Further, if a material having a high thermal conductivity such as aluminum nitride is used as the dielectric substrate, there is no particular need for a thermal via provided below the semiconductor element, and only a via for connection to the ground plane is sufficient.
[0007]
In general, the transmission line constituting the impedance matching circuit on the output side requires the widest area from the viewpoint of circuit loss reduction for suppressing the decrease in efficiency, which is generally important as the performance of the transmission power amplifier module. In order to mount more chip components on the substrate surface, it is most effective to form the transmission line constituting the impedance matching circuit on the output side so as to pass under the semiconductor element. As a result, the area of the inner layer of the multilayer substrate can be used effectively, thereby realizing a small high-frequency power amplifier module.
[0008]
DETAILED DESCRIPTION OF THE INVENTION
Examples of the present invention will be described in detail below. FIG. 1 is a top view of a high-frequency power amplifier module according to the present invention, and FIG. 2 is a cross-sectional view taken along line AB of the high-frequency power amplifier module. In this embodiment, the transmission line constituting the impedance matching circuit on the output side has a structure in which a part thereof passes under the MMIC chip in which a part of the amplification semiconductor element and the peripheral circuit is incorporated.
[0009]
1 and 2, MMIC chip 2 and passive chip components 4-1 to 4-6 such as capacitors, inductors, resistors, etc. are disposed on the uppermost dielectric substrate 1-1 of the multilayer substrates 1-1 to 1-4. It is installed. The high-frequency signal passes from the high-frequency signal input terminal 12 provided on the back surface of the module through the via 6-1 and from the surface input terminal 5 through the bonding wire 8-1 to the input pad side of the MMIC, and bonding on the MMIC output side. Via the wire 8-2, the signal is output to the microstrip line 7 that forms the impedance matching circuit on the output side, passes through the via 6-2, and again through the strip line 3 provided between the two layers of the dielectric, the via 6 again. -3 and after passing through the chip capacitor 4-3 provided on the surface layer, it again passes through the via and reaches the output terminal 13 provided on the back surface of the module.
[0010]
In this embodiment, the first ground conductor layer 9 is provided between the first and second layers of the dielectric, and the second ground conductor layer 10 is provided between the third and fourth layers. The ground layer 11 is connected by a large number of vias. In addition, a large number of thermal vias 6-4 are provided between the lower surface of the MMIC chip and the first ground conductor layer to reduce the thermal resistance.
[0011]
FIG. 3 is a diagram showing an output-side impedance matching circuit strip line provided between the second and third layers of the dielectric substrate of the high-frequency power amplifier module shown in FIGS. In the figure, a stripline conductor 3 is provided on a third-layer dielectric substrate 1-3 so as to pass directly under the MMIC chip 2 attached to the surface layer of the substrate. The high frequency signal from the MMIC passes through the via 6-2 from the surface layer, and again appears on the surface layer through the strip line 3 and the via 6-3.
[0012]
A via 6-4 is provided in the middle of the strip line and is connected to a chip capacitor for impedance matching provided on the surface layer of the substrate. Thermal vias 6-5 are provided to avoid the strip line so as to penetrate the third-layer dielectric substrate. Note that if the multilayer dielectric substrate material is aluminum nitride, the thermal resistance of the substrate is reduced, and there is no need to provide thermal vias. However, a via for grounding is necessary, and it is not a good idea to reduce the number so much to reduce the inductance to the ground.
[0013]
FIG. 4 is a view showing another embodiment of the strip line for the output side impedance matching circuit shown in FIG. In the figure, the position of the output side via 6-3 of the strip line 3 is the same and the position of the input side via 6-2 is 90 degrees different. The configuration of FIG. 3 or 4 can be selected depending on the length required by the strip line.
[0014]
FIG. 5 is a circuit configuration diagram of the high-frequency power amplifier module of the present invention. In the figure, the high frequency signal from the high frequency signal input terminal 24 of the module 21 enters the MMIC 22 comprising a two-stage amplifier, enters the strip line 23 constituting the impedance matching circuit on the output side via the transistor 27 of the first stage transistor 26 and the output stage, and enters the module. Are output from the output terminal 25. A DC bias is applied to each transistor from DC bias terminals 28-1 to 28-4. In the figure, a part (shaded part) of the strip line on the output side is a part formed in the inner layer below the MMIC chip.
[0015]
【The invention's effect】
According to the present invention, in a power amplifier module using a multilayer substrate, a transmission line, particularly a transmission line constituting an impedance matching circuit on the output side that requires the widest area, is provided in a layer below a semiconductor chip including an amplifying semiconductor element. Provide a part of the track. As a result, the area of the inner layer of the multilayer board can be used effectively, and the surface layer can be used effectively for mounting chip components, thereby realizing a small high-frequency power amplifier module.
[Brief description of the drawings]
FIG. 1 is a plan view showing a high-frequency power amplifier module according to an embodiment of the present invention.
FIG. 2 is a cross-sectional view of a high frequency power amplifier module according to an embodiment of the present invention.
FIG. 3 is a plan view of a strip line formed on a third-layer dielectric substrate.
FIG. 4 is a plan view of a strip line configured on a third-layer dielectric substrate.
FIG. 5 is a circuit diagram of a high-frequency power amplifier module.
FIG. 6 is a cross-sectional view showing an example of a conventional high-frequency power amplifier module.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Multilayer dielectric substrate, 2 ... MMIC chip, 3 ... High frequency transmission line, 4 ... Passive chip component, 5 ... Input pad, 6 ... Via, 7 ... Output pad, 8 ... Bonding wire, 9 ... Grounding conductor layer 1, 10: Ground conductor layer 2, 11: Ground layer.

Claims (6)

誘電体基板上にトランジスタ等の高周波信号増幅用半導体素子とその周辺にチップコンデンサやチップインダクタ、チップ抵抗および高周波伝送線路等の受動素子からなるインピーダンス整合回路やＤＣバイアス供給回路を搭載した高周波パワーアンプモジュールであって、
前記誘電体基板は多層基板であると共に、第一の面と、前記第一の面の反対側の面である第二の面とを有し、
前記高周波信号増幅用半導体素子は前記誘電体基板の前記第一の面にワイヤボンディング実装され、
前記高周波信号増幅用半導体素子の出力側に設けるインピーダンス整合回路を構成する伝送線路の一部と、前記第一の面と前記第二の面とを接続する少なくとも一つの第一のサーマルビアと、前記第一のサーマルビアよりも長さの短い少なくとも一つの第二のサーマルビアとが、前記高周波信号増幅用半導体素子を搭載した位置の下層を通る様に配置されている
ことを特徴とする高周波パワーアンプモジュール。A high-frequency power amplifier having a high-frequency signal amplification semiconductor element such as a transistor on a dielectric substrate and an impedance matching circuit or a DC bias supply circuit including passive elements such as a chip capacitor, a chip inductor, a chip resistor, and a high-frequency transmission line on its periphery. a module,
The dielectric substrate has a multilayer substrate der Rutotomoni, a first surface and a second surface which is a surface opposite to the first surface,
The high-frequency signal amplification semiconductor element is wire-bonded to the first surface of the dielectric substrate,
A part of a transmission line constituting an impedance matching circuit provided on the output side of the semiconductor element for high-frequency signal amplification, and at least one first thermal via connecting the first surface and the second surface; The at least one second thermal via having a length shorter than that of the first thermal via is disposed so as to pass through a lower layer where the semiconductor element for high frequency signal amplification is mounted. High-frequency power amplifier module. 請求項１に記載の高周波パワーアンプモジュールにおいて、
前記高周波信号増幅用半導体素子の下層を通る様に配置された前記伝送線路は、上下に接地導体層を備えて成るストリップ線路構造を有する
ことを特徴とする高周波パワーアンプモジュール。In the high frequency power amplifier module according to claim 1,
The high frequency signal the transmission line which is arranged so through the lower layer of the amplifying semiconductor element, high-frequency power amplifier module, characterized in that <br/> having a strip line structure formed by including a ground conductor layer vertically. 請求項１に記載の高周波パワーアンプモジュールにおいて、
前記高周波信号増幅用半導体素子は前記誘電体基板の第１層上に搭載され、前記誘電体基板の第２層上に接地導体層を備え、前記高周波信号増幅用半導体素子の下面から前記第２層の接地導体層にサーマルビアを有する
ことを特徴とする高周波パワーアンプモジュール。In the high frequency power amplifier module according to claim 1,
The high frequency signal amplifying semiconductor element is mounted on the first layer of the dielectric substrate, said dielectric comprising a ground conductor layer on the second layer of the substrate, the high-frequency signal from said bottom surface of the amplifying semiconductor element second A high-frequency power amplifier module comprising a thermal via in a ground conductor layer of the layer. 請求項１に記載の高周波パワーアンプモジュールにおいて、
前記高周波信号増幅用半導体素子の下層を通る様に配置された前記伝送線路の一部にビアを備え、該ビアと表層に設けられたチップ部品とが接続されている
ことを特徴とする高周波パワーアンプモジュール。In the high frequency power amplifier module according to claim 1,
Wherein said portion of the high-frequency signal arranged so through the lower layer of the amplifying semiconductor element has been the transmission line includes a via, it <br/> which the chip component provided in the via and the surface layer are connected High frequency power amplifier module. 請求項１に記載の高周波パワーアンプモジュールにおいて、
前記高周波信号増幅用半導体素子単体と、前記インピーダンス整合回路以外のインピーダンス整合回路や前記ＤＣバイアス供給回路の一部とがＭＭＩＣチップに組み込まれている
ことを特徴とする高周波パワーアンプモジュール。In the high frequency power amplifier module according to claim 1,
The high-frequency power amplifier module, wherein the high-frequency signal amplification semiconductor element alone and an impedance matching circuit other than the impedance matching circuit and a part of the DC bias supply circuit are incorporated in an MMIC chip. . 請求項１に記載の高周波パワーアンプモジュールにおいて、
ＭＭＩＣチップや前記受動素子を搭載する前記誘電体基板が窒化アルミニウムで構成されている
ことを特徴とする高周波パワーアンプモジュール。In the high frequency power amplifier module according to claim 1,
RF power amplifier module of the dielectric substrate for mounting the MMIC chip or the passive element is characterized <br/> be composed of aluminum nitride.
JP2001310857A 2001-10-09 2001-10-09 High frequency power amplifier module Expired - Fee Related JP4530322B2 (en)

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