JP4526030B2 - Feedback type pulse width modulation AD converter - Google Patents

Description

  The present invention relates to a feedback PWM (Pulse Width Modulation) type AD converter (hereinafter referred to as a PWM AD converter).

  Conventionally, a PWM AD converter has been used in high performance equipment as an AD converter circuit capable of processing at high speed and high resolution because it can increase the resolution by increasing the time taken for one cycle of the integral output. (For example, see Patent Document 1). Further, there is a detailed explanation regarding the principle and circuit design (for example, see Non-Patent Document 1).

  The configuration and operation of a conventional PWM AD converter will be described using the circuit diagram shown in FIG. 5 and the output waveforms shown in FIGS.

  The conventional PWM AD converter 0 integrates three input signals input from the Ex input terminal 1, the Ec input terminal 2 and the Es input terminal 3 with a common ground potential (hereinafter referred to as Vcom) as a reference voltage. In this configuration, the data is output from the output terminal 6 via the device 4 and the comparator 5 in order and input to a known digital processing unit. However, since the digital processing unit is publicly known, illustration and description thereof are omitted. Here, the power supply used in the PWM AD conversion circuit 0 is a single power supply including + Vdd and ground (hereinafter referred to as GND), and Vcom serving as a reference for the integrator 4 and the comparator 5 is + Vdd / 2. In FIG. 5, the same symbols are used.

  The Ex input terminal 1 inputs a voltage to be measured: Ex (here, Ex ≧ 0) and is connected to the negative input terminal of the integrator 4 via a resistor Rx.

  The Ec input terminal 2 inputs a pulse voltage: Ec (in this case, + Ec = + Vdd and −Ec = GND), and the negative input terminal of the integrator 4 through the resistor Rc. Connected to.

  Further, the Es input terminal 3 is automatically connected to either + Vdd or GND so that the Es input terminal 3 is negatively fed back to the output of the integrator 4 in accordance with the output of the comparator 5. 1 is input as a reference voltage Es, and is connected to the negative input terminal of the integrator 4 via a resistor Rs. Become.

  FIG. 6 shows an integrated output waveform from the integrator 4 with respect to input voltages from the input terminals 1, 2 and 3. FIG. 6A shows a case where the measured voltage Ex is not input. FIG. 6B shows an output waveform when Ex is input.

  The integrated output shown in FIG. 6 (a) fluctuates with a maximum amplitude Va symmetrically up and down with respect to Vcom. One cycle is a waveform of 2t0, and the fluctuation of the integrated output in the period T of the pulse voltage: Ec. The average value of the quantity is zero. Here, 2t0 = period T.

  Further, the integrated output when the low side voltage Ex is input as shown in FIG. 6B fluctuates with the maximum amplitude Vx asymmetrically up and down with respect to Vcom, and one cycle changes to tα + tβ. As in the case of FIG. 6A, tα + tβ = period T, and the average value of the fluctuation amount of the integrated output in the period T of the pulse voltage: Ec is zero.

  FIG. 7 is a diagram showing waveforms with different amplitudes or periods of the integrated output waveform when Ex shown in FIG. 6A is not input. FIG. 7A shows the period of the integrated output periodic form. In the case of t1 (t1 = T), the maximum amplitude Va is assumed, and in FIG. 7B, the period t2 (t2 <t1) is assumed to be the maximum amplitude Vb (Vb <Va), and FIG. ) Is the maximum amplitude Vc (Vc> Va) with the period t3 (t3> t1).

That is, the PWM AD converter 0 can improve the resolution by taking a lot of samplings per period as the time of one period is lengthened. In addition, since the reference voltage is input as negative feedback to the output of the integrator 4 by the comparator 5, it is possible to reduce the influence of the offset and hysteresis of the comparator, thereby enabling high-resolution measurement. .
Japanese Patent Publication No. 44-8130

“Transistor Technology”, CQ Publisher, September 1, 1987, Vol. 24, No. 9, Vol. 276, p. 391-399

  However, as shown in FIG. 6B, when the measured voltage Ex is input from the Ex input terminal, the integrated output waveform is not symmetric with respect to + Vdd side and GND side around Vcom. As indicated by the encircled portion X, the amplitude of the integrated output increases depending on the value of the measured voltage Ex to be input, and exceeds the range of the power supply voltage (in the conventional example, the range from + Vdd to GND). The output of the minute sometimes caused saturation.

  In order to avoid such saturation, a method of reducing the size of the integrated output itself so that the maximum amplitude Va of the integrated output waveform is reduced to Vb shown in FIG. In this case, since the time taken for one period together with the amplitude of the integrated output waveform becomes t2 (t2 <t1), the resolution may be lowered accordingly.

  Further, as shown in FIG. 7C, when the time taken for one period is set to t3 (t3> t1) and the improvement of resolution is aimed at, the integration output is increased with the time taken for one period. Since the amplitude also increases, there is a possibility that the output exceeding the range of the power supply voltage similarly causes saturation.

  That is, since the integrated output can be accurately captured only within the range of the power supply voltage, the cycle of the integrated output waveform has to be set so that the maximum amplitude does not exceed the power supply voltage. Thus, the resolution of PWM AD converter 0 is limited by the power supply and the integrator, and the simplest means to improve this is to change to a better performing integrator or a power supply that can provide a larger output. However, this leads to an increase in cost.

Accordingly, the present invention provides a PWM AD converter that solves the above-described problems and improves the resolution limitation due to circuit components such as a power supply and an integrator.

  In order to solve the above-described problems, the present invention provides an input unit for inputting a voltage to be measured, a pulse voltage, and a reference voltage, an integrator and a comparator having Vcom as a reference potential, and input signals from the three input units. In a PWM AD converter comprising a switch that switches the potential of the reference voltage via the comparator so that negative feedback is obtained with respect to the output signal obtained by adding and integrating the signal by the integrator, Vcom is used as the reference voltage of the voltage to be measured. Therefore, a PWM AD converter comprising an amplifier having a gain greater than 0, provided at the input section of the voltage to be measured, and a common fluctuation circuit that varies Vcom in synchronization with the output signal of the comparator.

  The common variation circuit includes a plurality of resistors having a predetermined resistance ratio, generates a Vcom by dividing a predetermined potential that is a variation range of Vcom by resistance, and sets a variation amount of Vcom from the resistance ratio. To do.

  The common fluctuation circuit includes a common fluctuation resistor connected at one end to the output terminal of the comparator, and another voltage terminal between the other end of the common fluctuation resistance and the two voltage terminals that generate a predetermined potential that is a fluctuation range of the Vcom. , And two common generating resistors connected to each other.

  The comparator is a comparator with hysteresis, and the common variation circuit includes a common variation resistor sharing a resistor provided in the comparator with hysteresis, and one end of the common variation resistor connected to the positive input terminal of the integrator and Vcom. And two common generating resistors connected to each other between two voltage terminals for generating a predetermined potential that falls within the variation range of Vcom.

  The common variation circuit sets a variation amount of Vcom according to a resistance ratio between the common variation resistor and the two common generation resistors.

  The common variation circuit generates Vcom by resistance division according to a resistance ratio of the two common generation resistors.

  The common variation circuit includes the resistance value of the common generation resistor as the same value.

Further, the common variation circuit increases the amount of variation of Vcom by decreasing the resistance value of the common variation resistor or increasing the resistance value of the two common generation resistors.

  The PWM AD converter of the present invention includes an input unit for inputting a voltage to be measured, a pulse voltage, and a reference voltage, an integrator and a comparator using Vcom as a reference potential, and an integrator for an input signal from each of the three input units. In order to use Vcom as a reference voltage of the voltage to be measured, in a PWM AD converter including a switch that switches the potential of the reference voltage via the comparator so as to provide negative feedback with respect to the output signal added and integrated by An amplifier having a gain greater than 0, provided at the input section of the voltage to be measured, and a common fluctuation circuit that fluctuates Vcom in synchronization with the output signal of the comparator; and the common fluctuation circuit includes a predetermined resistance. A plurality of resistors that form a ratio, and a predetermined potential that is a variation range of Vcom is divided by resistance to generate Vcom, and a resistance ratio From setting the amount of variation of Luo Vcom, to allow the lowering of the power supply voltage without compromising the resolution possessed by PWMAD transducer, also makes it possible to further increase the resolution intact the power supply voltage.

  The common fluctuation circuit includes a common fluctuation resistor connected at one end to the output terminal of the comparator, and another voltage terminal between the other end of the common fluctuation resistance and the two voltage terminals that generate a predetermined potential that is a fluctuation range of the Vcom. Each of the two common generating resistors connected to each other, the comparator is a comparator with hysteresis, and the common variation circuit includes a common variation resistor sharing the resistor included in the comparator with hysteresis, and an integrator And two common generating resistors respectively connected between one end of the common variable resistor connected to Vcom and two voltage terminals for generating a predetermined potential that is a variation range of Vcom. Therefore, a high-performance AD converter can be configured at low cost without requiring a complicated circuit.

Further, the common variation circuit sets a variation amount of Vcom according to a resistance ratio between the common variation resistor and the two common generation resistors, and Vcom by resistance division according to a resistance ratio between the two common generation resistors. And the resistance value of the common generation resistor is provided as the same value, and further, the resistance value of the common variable resistor is reduced or the resistance value of the two common generator resistors is increased. Therefore, Vcom can be easily set according to the integral output.

  The PWM AD converter of the present invention includes an input unit for inputting a voltage to be measured, a pulse voltage, and a reference voltage, an integrator and a comparator using Vcom as a reference potential, and an integrator for an input signal from each of the three input units. In order to use Vcom as a reference voltage of the voltage to be measured, in a PWM AD converter including a switch that switches the potential of the reference voltage via the comparator so as to provide negative feedback with respect to the output signal added and integrated by It comprises an amplifier with a gain greater than 0, provided at the input section of the voltage to be measured, and a common variation circuit that varies Vcom in synchronization with the output signal of the comparator.

  The common variation circuit includes a plurality of resistors having a predetermined resistance ratio, generates a Vcom by dividing a predetermined potential that is a variation range of Vcom by resistance, and sets a variation amount of Vcom from the resistance ratio. To do.

  The common fluctuation circuit includes a common fluctuation resistor connected at one end to the output terminal of the comparator, and another voltage terminal between the other end of the common fluctuation resistance and the two voltage terminals that generate a predetermined potential that is a fluctuation range of the Vcom. , And two common generating resistors connected to each other.

  The comparator is a comparator with hysteresis, and the common variation circuit includes a common variation resistor sharing a resistor provided in the comparator with hysteresis, and one end of the common variation resistor connected to the positive input terminal of the integrator and Vcom. And two common generating resistors connected to each other between two voltage terminals for generating a predetermined potential that falls within the variation range of Vcom.

  The common variation circuit sets a variation amount of Vcom by a resistance ratio between the common variation resistor and the two common generation resistors.

  The common variation circuit generates Vcom by resistance division according to the resistance ratio of the two common generation resistors.

  The common variation circuit includes the resistance value of the common generation resistor as the same value.

Furthermore, the common variation circuit increases the variation amount of Vcom by decreasing the resistance value of the common variation resistor or increasing the resistance value of the two common generation resistors.

  The first embodiment of the present invention includes a circuit for varying Vcom in synchronization with the output of the comparator 5 in the PWM AD converter 0 composed of the circuit of FIG. By providing an amplifier for inputting to the integrator as a reference input signal, the integrated output is changed in synchronization with Vcom, and the maximum amplitude of the integrated output can be substantially reduced. Is.

  Embodiment 1 of the present invention will be described below with reference to the drawings. FIG. 1 is a circuit diagram of the PWM AD converter 10 according to the first embodiment. Here, the configuration of the PWM AD converter 10 of the present invention will be described by comparison with the PWM AD converter 0 shown in FIG. 5 as a conventional example. However, the same configuration and operation will be described using the same reference numerals.

  As shown in FIG. 1, the PWM AD converter 10 of the first embodiment includes an Ex input terminal 1 and a resistor Rx, an Ec input terminal 2 and a resistor Rc, an Es input terminal 3 and Rs, an integrator 4, a comparator 5, an output terminal 6, and a switching. The power source comprising the device 7 and having a Vcom variation range, which will be described later, is configured using a single power source having a voltage range from + Vdd to GND. The configuration so far is the same as that of the PWM AD converter 0 of FIG.

  In addition to the above-described configuration, the PWM AD converter 10 of the present invention has a common fluctuation circuit 8 for changing Vcom connected between the comparator 5 and the output terminal 6, and the Ex input terminal 1 and the resistor Rx. A voltage follower 9, which is an amplifier having a gain of 1 with Vcom as a reference potential, is connected between the two.

  The common fluctuation circuit 8 includes a plurality of resistors for generating Vcom by dividing the power supply voltage by resistance and setting a Vcomno fluctuation amount from a resistance ratio. One end of the common variable resistor R1 is connected between the output terminal 6 and the output terminal 6, and the other end is connected to + Vdd and GND via common generating resistors R2 and R3, respectively. Thus, Vcom is varied between + Vdd and GND in synchronization with the output of the comparator 5 by appropriately setting the resistance ratio of the common variable resistor R1 and the common generating resistors R2 and R3.

  Subsequently, the operation of the PWM AD converter 10 according to the first embodiment will be described with reference to FIG. In particular, it will be described in detail what integrated output waveform can be obtained depending on the relationship between the resistors R1, R2 and R3.

  FIG. 2 shows an integrated output waveform output from the integrator 4 when there is no input from the Ex input terminal 1, that is, when the measured voltage Ex = 0. In the common fluctuation circuit 8, When the relationship between the common generation resistors R2 and R3 is R2 = R3 = R, three modes (a), (b), and (c) depending on the difference in resistance value of the common variable resistor R1 according to the integral output are shown. ). Here, since R2 = R3 = R as described above, Vcom is generated by dividing the power source with resistors having the same value, and Vcom = + Vdd / 2.

  FIG. 2A is a diagram showing a waveform when Vcom does not vary by the common variation circuit 8, that is, an integrated output waveform of the PWM AD converter 0 illustrated in FIG. 2 (b) shows a case in which Vcom is varied by the common variation circuit 8 so that the output amplitude of the integrated output waveform can be reduced and the power supply voltage can be lowered as compared with FIG. 2 (a). FIG. 2C is a diagram showing a waveform. Similarly, FIG. 2C shows the maximum when the resolution is increased by increasing the period of the integrated output waveform to increase the accuracy. It is a figure which shows the waveform at the time of changing Vcom by the common fluctuation | variation circuit 8 so that an amplitude may not change.

  As shown in FIG. 2A, the integrated output waveform in the conventional PWM AD converter 0 having no fluctuation of Vcom is obtained as a waveform in which the maximum amplitude of the output voltage is Va and the time of one cycle is t1. Here, the position p indicated by a vertical dotted line so as to divide the integrated output waveform is changed to the timing of switching of the comparator 5, that is, the reference voltage Es is set to + Vdd by the switch 7 so as to be negative feedback with respect to the integrated output. Or the timing of switching to either GND.

  In the PWM AD converter 10 of the first embodiment, first, in FIG. 2B, the common variable resistor R1 and the common generation resistors R2 and R3 of the common variable circuit 8 are set to desired resistance ratios described later. According to the switching timing of the comparator 5, Vcom varies so as to provide negative feedback with respect to the integral output, and the integral output also varies by the same amount. As a result, as shown, an integrated output waveform is formed with reference to Vcom that has fluctuated as VcomA or VcomB. As a result, the maximum amplitude of the integrated output is Vb, and a relationship of Vb <Va is obtained.

  At this time, the power supply voltage need only be such that the maximum amplitude Vb of the integrated output waveform centered on Vcom does not cause saturation, so that it is possible to reduce the power supply by at least (Va−Vb). .

  Here, the relationship between the common variable resistor R1 and the common generating resistors R2 and R3 is shown below. As described above, when R1 is varied with R2 = R3 = R, Vcom varies by the same amount on the + Vdd side or the GND side according to the switching timing of the comparator 5, centering on Vcom = + Vdd / 2. is there.

For example, when the switch 7 is switched as the reference voltage Es = + Vdd with the output of the comparator 5, one end of the common variable resistor R1 connected to the comparator 5 is connected to + Vdd. , Vcom at this time as VcomA,
VcomA = {(R + R1) / (R + 2R1)} × Vdd (Formula 1)
It is represented by

Further, when the switch 7 is switched as the reference voltage Es = GND with the output of the comparator 5, one end of the common variable resistor R1 connected to the comparator 5 is connected to GND. , Vcom at this time as VcomB,
VcomB = {R1 / (R + 2R1)} × Vdd (Formula 2)
It is represented by

  Thus, it can be seen that VcomA> VcomB, as shown in FIG. 2B, and equations (1) and (2). That is, when the output of the comparator 5 is + Vdd, an integrated output waveform is formed with reference to a potential higher than Vcom = + Vdd / 2, and when the output of the comparator 5 is GND, the output is higher than Vcom = + Vdd / 2. An integrated output waveform is formed with reference to a low potential, and the voltage of the power supply can be reduced.

  Subsequently, as shown in FIG. 2 (c), the PWM AD converter 10 increases the resolution by taking a longer time for one cycle of the integrated output waveform with respect to the integrated output of FIG. 2 (a). Even when further improving the resolution, it is possible to increase the resolution while maintaining the maximum amplitude Va, that is, while maintaining the power supply voltage. In the conventional example, as shown in FIG. In the conventional PWM AD converter 0, it is possible to avoid a state that may cause saturation.

  That is, the time of one cycle T of the pulse voltage Ec is set from t1 to t3 (t3> t1) shown in FIG. 2A, and the amplitude of the integrated output wave increases accordingly. By setting the resistance ratio of the common fluctuation circuit 8 so as to maintain the maximum amplitude Va, the fluctuation amount of Vcom, that is, the potential difference between VcomA and VcomB is increased.

Here, when the potential difference between VcomA and VcomB is H, it is expressed as H = VcomA−VcomB.
H = R / (R + 2R1) × Vdd (Formula 3)
It is expressed.

  Therefore, the relationship between the common generation resistor R and the common variation resistor R1 is determined by setting the resistance ratio so that the resistance value of the common variation resistor R1 is reduced or the resistance value of the common generation resistor R is increased. It can be seen that the potential difference H between V and VcomB can be increased. As a result, the variation amount of Vcom from Vcom = + Vdd / 2 increases, and an integrated output waveform is formed in synchronization with VcomC and VcomD as shown in FIG. 2C. High resolution is possible regardless of the power source.

  Next, an example in which the measured voltage Ex is input will be described including FIG. The Vcom variation due to the relationship between the two common generation resistors R2 and R3 will also be described.

  FIG. 3 shows an integrated output in which Vcom is varied so as to avoid the saturation shown in the circled portion X in the integrated output waveform when the measured voltage Ex is inputted as shown in FIG. 6B of the conventional example. FIG. 3A is a diagram showing a waveform, and FIG. 3A is a diagram in the case where VcomA and VcomB are set by the resistance ratio between the common generating resistor R and the common variable resistor R1 in the same manner as described above with reference to FIG. FIG. 3B is a diagram in the case of Vcom variation due to the resistance ratio between the common generation resistors R2 and R3.

  In FIG. 3A, in the same manner as in FIG. 2B, the integration with reference to VcomA and VcomB is determined by the resistance ratio between the common variable resistance R1 and the common generation resistance R set appropriately in the integral output waveform. By forming the output waveform, it is possible to avoid the maximum saturation, and the maximum amplitude is Vy (Vy <Vx), so that a low voltage is possible.

  Although not shown here, it is also possible to increase the resolution while maintaining the power supply voltage by increasing the time taken for one cycle of the integrated output waveform in the same manner as in FIG.

  Further, when the integrated output waveforms on the + Vdd side and the GND side are asymmetric with respect to Vcom = + Vdd / 2, it is also useful to vary Vcom by using resistance division based on the resistance ratio between the common generation resistors R2 and R3. FIG. 3B shows the integrated output waveform when R1 = 0.

In this case, Vcom is set only by resistance division between the common generation resistors R2 and R3, and when Vcom at this time is VcomE,
VcomE = R3 / (R2 + R3) (Formula 4)
It is represented by

  Therefore, when the resistance ratio between the common generation resistors R2 and R3 is set as R3> R2, an integrated output waveform is formed with reference to a potential higher than Vcom = + Vdd / 2, and conversely, R2> R3. In this case, an integrated output waveform is formed with a potential lower than Vcom = + Vdd / 2 as a reference.

Further, although not shown, the PWM AD converter 10 sets VcomA and VcomB according to the resistance ratio of R1, R2, and R3 after changing Vcom from + Vdd / 2 by the resistance ratio of R2 and R3. The potential difference itself between VcomA and VcomB can be reduced. This stabilizes the responsiveness when switching Vcom in synchronization with the output of the comparator 5 and enables more accurate measurement.

  The second embodiment of the present invention shows an example in which a comparator with hysteresis is used instead of the comparator 5 of the PWM AD converter 10 of the first embodiment. FIG. 4 is a circuit diagram of the second embodiment. Hereinafter, description will be made using the difference from FIG.

  The two resistors R1 and R4 provided in the comparator 15 with hysteresis used in the second embodiment are shared as common variable resistors in the common variable circuit 17, and R1 is a positive input of an integrator connected to Vcom. R4 is connected between one terminal connected to the plus-side input terminal of the comparator 15 with hysteresis and the output terminal of the comparator 15 with hysteresis. Connected.

  One end of the R1 integrator connected to the positive input terminal and Vcom is connected to + Vdd and GND through R2 and R3, respectively. That is, the common variable resistance R1 shown in the first embodiment is represented by a combined resistance of R1 and R4 in the second embodiment. When this combined resistance is Rf, the common variable resistance Rf and the common generation resistance The relationship between R2 and R3 is the same as the relationship between the common variable resistor R1 and the common generation resistors R2 and R3 shown in the first embodiment, and by appropriately setting the resistance ratio of each resistor, It is possible to obtain the same effect.

  In the first and second embodiments, the voltage follower 9 having a gain of 1 is used to set the reference potential to Vcom with respect to the input signal from the Ex input terminal 1, but the voltage follower is limited to the voltage follower. As long as the amplifier has a gain larger than 0, it is sufficient.

In addition, the operation in the single power supply circuit in which the predetermined potential difference that is the fluctuation range of the common ground is set from + Vdd to GND is exemplified. For example, the same applies to a power supply circuit including a negative voltage from + Vdd to -Vdd. It works.

It is a circuit diagram of the PWM AD converter of 1st Example. (A) This is an integrated output waveform when R1 = 0 when there is no Ex input. (B) It is a figure which shows the integrated output waveform when Vcom is fluctuated so that the voltage may be lowered when there is no Ex input. (C) It is a figure which shows the integrated output waveform when Vcom is changed so that the resolution in case there is no Ex input may be improved. (A) It is a figure which shows the integrated output waveform when Vcom is fluctuate | varied with the resistance ratio of R and R1 at the time of inputting Ex. (B) It is a figure which shows the integrated output waveform when Vcom is fluctuate | varied with the resistance ratio of R2 and R3 when Ex is input. It is a circuit diagram of the PWM AD converter of 2nd Example. It is a circuit diagram of a conventional PWM AD converter. (A) It is a figure which shows the relationship between the input and integration output of the conventional PWM AD converter when there is no Ex input. (B) It is a figure which shows the relationship between the input and integration output of the conventional PWM AD converter at the time of inputting Ex. (A) An integrated output waveform of a conventional PWM AD converter when there is no Ex input. (B) It is a figure which shows the integrated output waveform when one period is shortened so that it may make the voltage low when there is no Ex input. (C) It is a figure which shows the integrated output waveform when 1 period is lengthened so that the resolution in case there is no Ex input may be improved.

Explanation of symbols

0, 10 PWM AD converter 1 Ex input terminal 2 Ec input terminal 3 Es input terminal 4 Integrator 5 Comparator 6 Output terminal 7 Switch 8 Common fluctuation circuit 9 Voltage follower 15 Comparator with hysteresis 18 Common fluctuation circuit R1, Rf Common fluctuation resistance R2, R3, R Common generation resistance

Claims (8)

Each input unit for inputting the voltage to be measured, pulse voltage, and reference voltage, an integrator and a comparator using the common ground potential as a reference potential, and an output obtained by adding and integrating the input signals from the three input units by the integrator In a feedback type pulse width modulation AD converter comprising a switch that switches a potential of a reference voltage via the comparator so as to be negative feedback with respect to a signal,
In order to use the common ground potential as a reference voltage of the voltage to be measured, an amplifier provided at the input portion of the voltage to be measured and having a gain greater than 0,
A feedback type pulse width modulation AD converter comprising a common fluctuation circuit that fluctuates a common ground potential in synchronization with an output signal of a comparator.   The common variation circuit includes a plurality of resistors having a predetermined resistance ratio, and generates a common ground potential by dividing a predetermined potential, which is a variation range of the common ground potential, by resistance. The feedback type pulse width modulation type AD converter according to claim 1, wherein a fluctuation amount of the potential is set.   The common variation circuit includes a common variable resistor having one end connected to an output terminal of a comparator, and another voltage terminal that generates a predetermined potential that is a variation range of the common ground potential and the other end of the common variable resistor. 3. The feedback pulse width modulation type AD converter according to claim 2, further comprising two common generating resistors connected to each other.   The comparator is a comparator with hysteresis, and the common variation circuit includes a common variation resistor sharing the resistor provided in the comparator with hysteresis, and one end of the common variation resistor connected to the positive input terminal of the integrator and a common ground. 3. The feedback type pulse according to claim 2, further comprising two common generating resistors respectively connected between two voltage terminals that generate a predetermined potential that is a range of fluctuation of the potential of the common ground. Width modulation AD converter.   5. The feedback pulse width modulation system according to claim 3, wherein the common fluctuation circuit sets a fluctuation amount of a common ground potential based on a resistance ratio between the common fluctuation resistance and the two common generation resistances. AD converter.   The feedback pulse according to any one of claims 3 to 5, wherein the common fluctuation circuit generates a common ground potential by resistance division according to a resistance ratio of the two common generation resistors. Width modulation AD converter.   The feedback pulse width modulation type AD converter according to claim 3, wherein the common variation circuit includes a resistance value of the common generation resistor as the same value. 4. The common variation circuit increases a variation amount of a common ground potential by decreasing a resistance value of the common variation resistor or increasing a resistance value of the two common generation resistors. 8. The feedback type pulse width modulation AD converter according to any one of items 7 to 7.

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