JP4510231B2 - Image processing apparatus, image processing apparatus control method, and storage medium - Google Patents

Description

[0001]
The present invention includes an image input means for inputting image data, storage means for storing the image data inputted from the image input unit, a row intends determination processing means for determining process of the image data stored in said storage means The present invention relates to an image processing apparatus having a control method, a control method for the image processing apparatus, and a storage medium.
[0002]
[Prior art]
In a conventional image processing apparatus, when performing pattern matching on an image read from an image input device by software, the image data is transferred from the image input device to a memory in a control device (CPU) in the image processing device in order to increase the speed. Are transferred in parallel with a job for transferring image data (image data transfer job) and a job for pattern matching for image data transferred to the memory (pattern matching job).
[0003]
[Problems to be solved by the invention]
However, in the conventional image processing apparatus, since the image input apparatus, the memory, and the CPU are connected on the same bus in the control unit, the performance of each of the above-described jobs (image data transfer job, pattern matching job) is improved. There is a problem that efficient data transfer processing cannot be performed because the access performance does not exceed the bus access performance.
[0004]
The present invention has been made to solve the above problems, the present onset bright object can be efficiently determining process of the image data without interfering with the image transfer from the images input means, As a result, it is an object to provide a mechanism capable of performing pattern matching processing with software that can be used for preventing counterfeiting, which has been difficult in the past, at high speed and efficiently.
[0005]
[Means for Solving the Problems]
The present invention includes an image input means (reader device 200 shown in FIG. 1) for inputting image data, a storage means (DRAM 116 shown in FIG. 3) for storing image data input from the image input means, and the storage means. Image processing having processing means (a processor core (CPU) 401 (CPU 112 shown in FIG. 3)) shown in FIG. 4 that performs pattern matching processing for determining whether or not there is a certain pattern in the image data stored in In the apparatus, the image input means is connected via a first bus (GBus 404 shown in FIG. 4), and the determination processing means is connected via a second bus (SCBus shown in FIG. 4). For switching the connection between the second bus and the storage means, and from the image input means using the first bus. The first bus or the second bus so that the pattern matching processing of the image data transferred to the storage means can be performed by the determination processing means using the second bus during transmission. And control means (system bus bridge (SBB) 402 shown in FIG. 4 (bus controller 113) shown in FIG. 3)) for switching control (step S1005 in FIG. 7) between the storage means and the storage means, Immediately after it is determined that the certain pattern is present in the stored image data, there is provided an instruction means for instructing to stop the image data input operation by the image input means .
[0008]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 is a diagram showing an overall configuration of an image input / output system to which an image processing apparatus showing an embodiment of the present invention can be applied.
[0009]
In the figure, a reader unit (image input device) 200 optically reads an original image and converts it into image data. The reader unit 200 includes a scanner unit 210 having a function for reading a document and a document feeding unit 250 having a function for transporting a document sheet.
[0010]
A printer unit (image output device) 300 conveys recording paper, prints image data as a visible image thereon, and discharges the recording paper outside the device. The printer unit 300 includes a paper feed unit 310 having a plurality of types of recording paper cassettes, a marking unit 320 having a function of transferring and fixing image data onto the recording paper, and sorting and stapling the printed recording papers. And a paper discharge unit 330 having a function of outputting to A control device 110 is electrically connected to the reader unit 200 and the printer unit 300, and further connected to host computers (PCs) 1401 and 1402 via the network 400. The control device 110 controls the reader unit 200 to read the image data of the original, and controls the printer unit 300 to output the image data to a recording medium such as a recording sheet to provide a copy function. Also, a scanner function that converts image data read from the reader unit 200 into code data and transmits the code data to the host computer via the network 400 (for example, Ethernet), and code data received from the host computer via the network 400 as image data. A printer function or the like that converts the data into a printer unit 300 and outputs it to the printer unit 300 is provided.
[0011]
An operation unit 150 is connected to the control device 110 and is configured by a liquid crystal touch panel, and provides a user I / F for operating the image input / output system.
[0012]
2 is a cross-sectional view showing the configuration of the reader unit 200 and the printer unit 300 shown in FIG. 1, and the same components as those in FIG. 1 are denoted by the same reference numerals.
[0013]
In the reader unit 200, the document feeding unit 250 feeds the documents one by one onto the platen glass 211 in order from the top, and discharges the documents on the platen glass 211 after the document reading operation is completed. When the document is conveyed onto the platen glass 211, the lamp 212 is turned on, and the movement of the optical unit 213 is started to expose and scan the document.
[0014]
Reflected light from the original at this time is guided to a CCD image sensor (hereinafter referred to as CCD) 218 by mirrors 214, 215, and 216 and a lens 217. Thus, the scanned image of the original is read by the CCD 218. The image data output from the CCD 218 is transferred to the control device 110 shown in FIG. 1 after being subjected to predetermined processing.
[0015]
In the printer unit 300, reference numeral 321 denotes a laser driver that drives the laser light emitting unit 322, and causes the laser light emitting unit 322 to emit laser light corresponding to the image data output from the control device 110. The laser beam is irradiated onto the photosensitive drum 323, and a latent image corresponding to the laser beam is formed on the photosensitive drum 323. A developer is attached to the latent image portion of the photosensitive drum 323 by a developing device 324.
[0016]
Then, at the timing synchronized with the start of laser light irradiation, the recording paper is fed from either the cassette 311 or the cassette 312 and conveyed to the transfer unit 325, and the developer attached to the photosensitive drum 323 is transferred to the recording paper. To do. The recording paper on which the developer is placed is conveyed to the fixing unit 326, and the developer is fixed to the recording paper by the heat and pressure of the fixing unit 326. The recording paper that has passed through the fixing unit 326 is ejected by the ejection roller 327, and the paper ejection unit 330 bundles the ejected recording paper to sort the recording paper or staples the sorted recording paper.
[0017]
If double-sided recording is set, the recording paper is conveyed to the discharge roller 327, and then the rotation direction of the discharge roller 327 is reversed and guided to the refeed conveyance path 329 by the flapper 328. The recording sheet guided to the refeed conveyance path 329 is fed to the transfer unit 325 at the timing described above.
[0018]
[Description of control device]
FIG. 3 is a block diagram illustrating a functional configuration of the control device 110 illustrated in FIG. 1.
[0019]
In the figure, reference numeral 111 denotes a main controller, which is mainly composed of a CPU 112, a bus controller 113, and various I / F controller circuits.
[0020]
The CPU 112 and the bus controller 113 control the overall operation of the control device 110, and the CPU 112 operates based on a program read from the ROM 114 via the ROM I / F 115. The program also interprets the PDL (page description language) code data received from the host computers 1401 and 1402 of FIG. 1 and develops it into raster image data, and pattern matching processing described later. Processed by. Note that the pattern matching data used by the CPU 112 in the pattern matching process is stored in the ROM 114 or other storage medium (not shown).
[0021]
The bus controller 113 controls data transfer input / output from each I / F, and performs arbitration at the time of bus contention and control of DMA data transfer.
[0022]
A DRAM 116 is connected to the main controller 111 via a DRAM I / F 117 and is used as a work area for the CPU 112 to operate and an area for storing image data.
[0023]
Reference numeral 121 denotes a network controller, which is connected to the main controller 111 via an I / F 123 and connected to an external network (LAN 400) via a connector 122. The network is generally Ethernet, but may be a token ring or other network.
[0024]
A general-purpose high-speed bus 125 connects an expansion connector 124 for connecting an expansion board and an I / O control unit 126. The general-purpose high-speed bus is generally a PCI bus, but may be an ISA bus or other buses.
[0025]
The I / O control unit 126 is equipped with two channels of an asynchronous serial communication controller 127 for transmitting / receiving control commands to / from the CPUs of the reader unit 200 and the printer unit 300. It is connected to an F circuit (scanner I / F 140, printer I / F 145).
[0026]
Reference numeral 132 denotes a panel I / F, which is connected to the LCD controller 131 and has a key input I / F 130 for inputting on a hardware screen and a touch panel key. It consists of.
[0027]
The operation unit 150 includes a liquid crystal display unit, a touch panel input device attached to the liquid crystal display unit, and a plurality of hard keys. A signal input from the touch panel or hard key is transmitted to the CPU 112 via the panel I / F 132 described above, and the liquid crystal display unit displays image data sent from the panel I / F 132. The liquid crystal display unit displays function display, image data, and the like in the operation of the image processing apparatus.
[0028]
133 is a real-time clock module for updating / saving the date and time managed in the device, and is backed up by a backup battery 134.
[0029]
Reference numeral 161 denotes an E-IDE interface for connecting an external storage device. A hard disk or a CD-ROM drive can be connected via this I / F, and programs and image data can be written and read.
[0030]
Reference numerals 142 and 147 denote connectors, which are connected to the reader unit 200 and the printer unit 300, respectively, and are composed of a synchronous step-synchronous serial I / F (143, 148) and a video I / F (144, 149).
[0031]
The scanner I / F 140 is connected to the reader unit 200 via the connector 142, and is also connected to the main controller 111 via the scanner bus 141, and an image received from the reader unit 200 is processed according to the contents of processing in the subsequent process. And a function for performing an optimal binarization and a scaling process for main scanning and sub-scanning, and a control signal generated based on a video control signal sent from the reader unit 200 Also, it has a function of outputting to the scanner bus 141.
[0032]
Note that data transfer from the scanner bus 141 to the DRAM 116 is controlled by the bus controller 113.
[0033]
The printer I / F 145 is connected to the printer unit 300 via the connector 147, and is connected to the main controller 111 via the printer bus 146. The printer I / F 145 performs smoothing processing on the image data output from the main controller 111, and And a function of outputting a control signal generated based on the video control signal sent from the printer unit 300 to the printer bus 146.
[0034]
The transfer of the raster image data developed on the DRAM 116 to the printer unit is controlled by the bus controller 113 and is DMA-transferred to the printer unit 300 via the printer bus 146 and the video I / F 149.
[0035]
[Description of main controller]
FIG. 4 is a block diagram illustrating the configuration of the main controller 111 shown in FIG.
[0036]
In the figure, a processor core (CPU) 401 (corresponding to the CPU 112 shown in FIG. 3) is connected to a system bus bridge (SBB) 402 (the bus controller 113 shown in FIG. 3) via a 64-bit processor bus (SC bus). Equivalent). The SBB 402 is a 4 × 4 64-bit crossbar switch, and is connected to a memory controller 403 that controls an SDRAM or a ROM including a cache memory in addition to the processor core 401 via a dedicated local bus (MC bus (MCBus)). Furthermore, it is connected to a G bus (GBus) 404 which is a graphic bus and a B bus (BBus) 405 which is an IO bus, and is connected to a total of four buses. The SBB 402 is designed to ensure simultaneous parallel connection between these four modules as much as possible.
[0037]
The SBB 402 is also connected to a data compression / decompression unit (codec) 418 via a codec bus.
[0038]
The G bus 404 is cooperatively controlled by a G bus arbiter (GBA) 406 and is connected to a scanner / printer controller (SPC) 408 for connecting to a scanner (reader apparatus 200) and a printer (printer apparatus 300).
[0039]
The B bus 405 is cooperatively controlled by a B bus arbiter (BBA) 407. In addition to the SPC 408, a power management unit (PMU) 409, an interrupt controller (IC) 410, and a serial interface controller (SIC) 411 using a UART. , USB controller 412, parallel interface controller (PIC) 413 using IEEE 1284, LAN controller (LANC) 414 using Ethernet, LCD panel, key, general purpose input / output controller (PC) 415, PCI bus interface (PCIC) 416 Is also connected.
[0040]
An operation panel 417 including a display panel and a keyboard is connected to the PC 415.
[0041]
[Description of interrupt controller (IC)]
An interrupt controller (IC) 410 is connected to the B bus 405, integrates each functional block in the main controller chip and interrupts from the outside of the chip, and is supported by the CPU core 401. Six-level external interrupts and non-maskable interrupts Redistribute to (NMI). The above functional blocks include the power management unit 409, serial interface controller 411, USB controller 412, parallel interface controller 413, Ethernet LAN controller 414, general purpose IO controller 415, PCI interface controller 416, scanner / printer controller 408, and the like. It is.
[0042]
[Description of Memory Controller (MC)]
A memory controller (MC) 403 is connected to an MC bus, which is a local bus dedicated to the memory controller, and controls a synchronous DRAM (SDRAM), a flash ROM, and a ROM (corresponding to the DRAM 116 and the ROM 114 shown in FIG. 3).
[0043]
[Description of System Bus Bridge (SBB)]
FIG. 5 is a block diagram illustrating a configuration of the system bus bridge (SBB) 402 illustrated in FIG.
[0044]
The SBB 402 is a multi-channel bi-directional bus bridge that provides interconnection between the B bus (input / output bus), G bus (graphic bus), SC bus (processor local bus), and MC bus using a crossbar switch. With the crossbar switch, two systems of connections can be established simultaneously, and high-speed data transfer with high parallelism can be realized.
[0045]
As shown in the figure, the SBB 402 has a B bus interface 2009 for connection to the B bus 405, a G bus interface 2006 for connection to the G bus 404, and a CPU interface slave port 2002 for connection to the processor core 401. A memory interface master port 2001 for connecting to the memory controller 403, a CODEC bus interface 2014 for connecting to the compression / decompression unit 418, an address switch 2003 (including a sequencer 2003a) for connecting an address bus, and data A data switch 2004 for connecting the bus is included. Further, a cache invalidation unit 2005 for invalidating the cache memory of the processor core is provided.
[0046]
The G bus interface 2006 is connected to the address switch 2003 via the G bus interface slave 2008, and is connected to the data switch via the G bus interface data 2007. The CODEC bus interface 2014 is connected to the address switch via the COCEC bus interface slave 2016, and is connected to the data switch via the COCEC bus interface data 2015. The B bus interface 2009 is connected to the address switch 2003 and the cache invalidation unit 2005 via the B bus interface slave 2010, and is connected to the data switch 2004 via the B bus interface data 2012.
[0047]
[Explanation of PCI bus interface (PCIC)]
A PCI bus interface (PCIC) 416 shown in FIG. 4 is a block that interfaces between the B bus, which is a general-purpose IO bus inside the main controller, and the PCI bus, which is an external chip IO bus.
[0048]
[Description of G bus arbiter (GBA), B bus arbiter (BBA)]
The arbitration of the G bus shown in FIG. 4 is a central arbitration method, and each bus master has a dedicated request signal and a grant signal. This arbiter can program the control method.
[0049]
In addition, as a method of giving priority to the bus master, all bus masters have the same priority, the fair arbitration mode that gives the bus right fairly, and the priority that raises the priority of any one bus master and gives priority to using the bus Either arbitration mode can be specified.
[0050]
The B bus arbiter (BBA) 407 shown in FIG. 4 receives a bus use request of the B bus 405 that is an IO general-purpose bus, and after arbitration, gives a use permission to the selected master, and two or more at the same time. The master is prohibited from accessing the bus. The arbitration method has three levels of priorities, and a plurality of masters can be programmably assigned to each priority.
[0051]
[Scanner Controller / Printer Controller (SPC)]
FIG. 6 is a block diagram illustrating the configuration of the scanner / printer controller (SPC) 408 shown in FIG.
[0052]
As shown in the figure, a scanner / printer controller (SPC) 408 is connected to a scanner (reader device 200) and a printer (printer device 300) by a video I / F (Video I / F), and has an internal bus G bus and a B bus. Is a block that interfaces with Broadly divided into the following three blocks.
[0053]
(1) Reference numeral 4302 denotes a scanner controller which is connected to the scanner through a video I / F and performs scanner operation control and data transfer control. The scanner controller 4302 is connected to the G bus / B bus I / F unit (GBI) 4301A via the IF bus, and performs data transfer and register read / write.
[0054]
(2) Reference numeral 4303 denotes a printer controller, which is connected to the printer through a video I / F and performs printer operation control and data transfer control. The printer controller 4303 is connected to the GBI 4301B via an IF bus, and performs data transfer and register read / write.
[0055]
(3) G bus / B bus I / F units (GBI) 4301A and 4301B are units for connecting the scanner controller 4302 and printer controller 4303 to the G bus or B bus. (GBI) 4301A and 4301B are independently connected to the scanner controller 4302 and the printer controller 4303, and are connected to both the G bus and the B bus.
[0056]
The CP bus is a bus for directly connecting the image data of the scanner and the printer and a synchronization signal for horizontal and vertical synchronization.
[0057]
[Description of power management unit]
The main controller 111 is a large-scale ASIC with a built-in CPU. For this reason, if all the internal logics operate simultaneously, a large amount of heat is generated and the chip itself may be destroyed. In order to prevent this, the main controller performs power management for each block, that is, power management, and further monitors the power consumption of the entire chip.
[0058]
Each block performs power management individually. Information on the power consumption of each block is collected as a power management level in a power management unit (PMU) 409 shown in FIG. In the PMU 409, the power consumption of each block is summed, and the power consumption of each block of the main controller is collectively monitored so that the value does not exceed the limit power consumption.
[0059]
As described above, the image forming apparatus of the present invention is a composite image processing apparatus that can efficiently control the image input apparatus and the image output apparatus.
[0060]
Hereinafter, with reference to the flowchart of FIG. 7, a description will be given of a process in which pattern matching is performed during scanning in the image processing apparatus of the present invention, and the scanning operation is stopped when matching with certain image data.
[0061]
FIG. 7 is a flowchart showing an example of a first control processing procedure of the image processing apparatus according to the present invention, which corresponds to processing for performing pattern matching during scanning and stopping the scanning operation when matching with certain image data. To do. This process is executed and controlled by the CPU 112 shown in FIG. 3 based on a program stored in the ROM 114 or other storage medium (not shown). S1001 to S1007 indicate the steps.
[0062]
First, in step S1001, parameters are given to the scanner controller 4302 and GBI 4301A via the BBus 405 to prepare for scanning.
[0063]
Next, the start of scanning is instructed (S1002). Then, it waits for notification of the start of image data transfer via the interrupt controller 410 (S1003). When the transfer is started, it is determined whether there is unprocessed image data (S1004), and there is unprocessed image data. Is determined, the image data is subjected to pattern matching processing for each block (S1005). At this time, the image transfer processing from the scanner unit 210 (using the G bus 404) and the pattern matching processing (using the SC bus) by the CPU 112 (processor core 401) do not share the bus, and the SBB 402 uses the bus. Since the memory (DRAM 116) is accessed at an optimal timing by switching (switching control of the connection to the G bus 404 and SC bus memory), an operation with very high parallelism can be performed. Next, it is determined whether or not there is a matching pattern in the image data (S1006). If it is determined that there is a matching pattern in the image data, the scanning operation is immediately performed on the scanner unit 210. Is instructed to stop (scan stop) (S1007), and the process is terminated.
[0064]
On the other hand, if it is determined in step S1006 that there is no matching pattern in the image data, the process returns to step S1004, and the pattern matching process in step S1005 is repeated until it is determined that there is no unprocessed image data. The determination process of S1006 is performed, and if it is determined in step S1004 that there is no unprocessed image data, the process ends.
[0065]
As described above, by using the SBB 402 provided with an image transfer bus (G bus 404) and a bus used by the CPU (SC bus), software can be used without interrupting the image transfer processing from the scanner unit 210. Pattern matching processing can be performed (image transfer from the scanner and pattern matching processing by the CPU can each be processed efficiently), and as a result, software that can be used for anti-counterfeiting that was difficult in the past Pattern matching processing can be performed at high speed.
[0066]
In this embodiment, the case where the printer unit 300 is an electrophotographic system in FIG. 2 has been described. However, an inkjet system, a thermal transfer system, a sublimation system, or other systems may be used.
[0067]
The configuration of a data processing program that can be read by the image processing apparatus according to the present invention will be described below with reference to the memory map shown in FIG.
[0068]
FIG. 8 is a diagram illustrating a memory map of a storage medium that stores various data processing programs that can be read by the image processing apparatus according to the present invention.
[0069]
Although not particularly illustrated, information for managing a program group stored in the storage medium, for example, version information, creator, etc. is also stored, and information depending on the OS on the program reading side, for example, a program is identified and displayed. Icons may also be stored.
[0070]
Further, data depending on various programs is also managed in the directory. In addition, when a program or data to be installed is compressed, a program to be decompressed may be stored.
[0071]
The functions shown in FIG. 7 in this embodiment may be performed by the host computer by a program installed from the outside. In this case, the present invention is applied even when an information group including a program is supplied to the output device from a storage medium such as a CD-ROM, flash memory, or FD, or from an external storage medium via a network. Is.
[0072]
As described above, a storage medium storing software program codes for realizing the functions of the above-described embodiments is supplied to the system or apparatus, and the computer (or CPU or MPU) of the system or apparatus stores the storage medium in the storage medium. It goes without saying that the object of the present invention can also be achieved by reading and executing the programmed program code.
[0073]
In this case, the program code itself read from the storage medium realizes the novel function of the present invention, and the storage medium storing the program code constitutes the present invention.
[0074]
Examples of the storage medium for supplying the program code include a floppy disk, hard disk, optical disk, magneto-optical disk, CD-ROM, CD-R, DVD-ROM, magnetic tape, nonvolatile memory card, ROM, EEPROM, A silicon disk or the like can be used.
[0075]
Further, by executing the program code read by the computer, not only the functions of the above-described embodiments are realized, but also an OS (operating system) or the like running on the computer based on the instruction of the program code. It goes without saying that a case where the function of the above-described embodiment is realized by performing part or all of the actual processing and the processing is included.
[0076]
Further, after the program code read from the storage medium is written to a memory provided in a function expansion board inserted into the computer or a function expansion unit connected to the computer, the function expansion is performed based on the instruction of the program code. It goes without saying that the case where the CPU or the like provided in the board or the function expansion unit performs part or all of the actual processing and the functions of the above-described embodiments are realized by the processing.
[0077]
Further, the present invention may be applied to a system composed of a plurality of devices or an apparatus composed of a single device. Needless to say, the present invention can be applied to a case where the present invention is achieved by supplying a program to a system or apparatus. In this case, by reading the storage medium storing the program represented by the software for achieving the present invention into the system or apparatus, the system or apparatus can enjoy the effects of the present invention. .
[0078]
Furthermore, by downloading and reading a program represented by software for achieving the present invention from a database on a network by a communication program, the system or apparatus can enjoy the effects of the present invention. .
[0079]
【The invention's effect】
As described above, according to the present invention, it is possible to efficiently perform pattern matching processing of image data without hindering transfer of image data from the image input means, and as a result, forgery prevention, etc., which has been difficult in the past. There is an effect that a pattern matching process can be performed at high speed using usable software.
[Brief description of the drawings]
FIG. 1 is a diagram illustrating an overall configuration of an image input / output system to which an image processing apparatus according to an embodiment of the present invention can be applied.
FIG. 2 is a cross-sectional view illustrating the configuration of a reader unit and a printer unit illustrated in FIG.
FIG. 3 is a block diagram illustrating a functional configuration of the control device illustrated in FIG. 1;
4 is a block diagram illustrating a configuration of a main controller shown in FIG. 3. FIG.
5 is a block diagram illustrating a configuration of a system bus bridge (SBB) illustrated in FIG. 4. FIG.
6 is a block diagram illustrating a configuration of a scanner / printer controller (SPC) shown in FIG. 4; FIG.
FIG. 7 is a flowchart showing an example of a first control processing procedure of the image processing apparatus of the present invention.
FIG. 8 is a diagram illustrating a memory map of a storage medium that stores various data processing programs that can be read by the image processing apparatus according to the present invention.
[Explanation of symbols]
110 Controller 111 Main controller 112 CPU
113 Bus controller 114 ROM
116 DRAM
200 Reader device 300 Printer device 401 Processor core (CPU)
402 System Bus Bridge (SBB)
404 G bus (GBUS)
405 B bus (BBUS)

Claims (3)

Image input means for inputting image data;
Storage means for storing image data input from the image input means;
In an image processing apparatus having processing means for performing pattern matching processing for determining whether or not there is a certain pattern in the image data stored in the storage means, using a program,
Connected to the image input means via a first bus, connected to the processing means via a second bus, and connected to the first bus or between the second bus and the storage means. An image transferred to the storage means by the processing means using the second bus during transfer of image data from the image input means using the first bus. Control means for switching and controlling connection between the first bus or the second bus and the storage means so that the pattern matching processing of data can be performed ;
Immediately after it is determined that there is the certain pattern in the image data stored in the storage means, an instruction means for instructing to stop the image data input operation by the image input means;
An image processing apparatus comprising: An image input unit for inputting image data, a storage unit for storing image data input from the image input unit, and a pattern matching process for determining whether or not there is a pattern in the image data stored in the storage unit Is connected to the image input means via a first bus, is connected to the processing means via a second bus, and is connected to the first bus or the second bus. And a control means for controlling the connection between the storage means and a control means for controlling the image processing apparatus,
During the image transfer from the image input means using the first bus, the processing means can perform the pattern matching process on the image data transferred to the storage means using the second bus. Switching step of switching the connection between the first bus or the second bus and the storage means ,
As soon as it is determined that there is the certain pattern in the image data stored in the storage means, an instruction step for instructing to stop the image data input operation by the image input means;
A control method for an image processing apparatus, comprising: An image input unit for inputting image data, a storage unit for storing image data input from the image input unit, and a pattern matching process for determining whether or not there is a pattern in the image data stored in the storage unit and processing means for using said image input unit and is connected via a first bus, connected via the front Kisho physical means and the second bus, said first bus or the second And an image processing apparatus having control means for switching and controlling the connection between the storage means of the bus and
During the image transfer from the image input means using the first bus, the processing means can perform the pattern matching process on the image data transferred to the storage means using the second bus. Switching step of switching the connection between the first bus or the second bus and the storage means ,
As soon as it is determined that there is the certain pattern in the image data stored in the storage means, an instruction step for instructing to stop the image data input operation by the image input means;
A storage medium in which a computer-readable program is stored.

Images