JP4464974B2 - ダイを冷却するための熱電素子を有するマイクロエレクトロニクスアセンブリ及びその製造方法 - Google Patents
ダイを冷却するための熱電素子を有するマイクロエレクトロニクスアセンブリ及びその製造方法 Download PDFInfo
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- JP4464974B2 JP4464974B2 JP2006553163A JP2006553163A JP4464974B2 JP 4464974 B2 JP4464974 B2 JP 4464974B2 JP 2006553163 A JP2006553163 A JP 2006553163A JP 2006553163 A JP2006553163 A JP 2006553163A JP 4464974 B2 JP4464974 B2 JP 4464974B2
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- 238000004377 microelectronic Methods 0.000 title claims description 34
- 238000004519 manufacturing process Methods 0.000 title claims description 11
- 238000001816 cooling Methods 0.000 title description 2
- 239000002184 metal Substances 0.000 claims description 27
- 229910052751 metal Inorganic materials 0.000 claims description 27
- 239000004065 semiconductor Substances 0.000 claims description 16
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 6
- 229910052802 copper Inorganic materials 0.000 claims description 6
- 239000010949 copper Substances 0.000 claims description 6
- 230000008878 coupling Effects 0.000 claims 1
- 238000010168 coupling process Methods 0.000 claims 1
- 238000005859 coupling reaction Methods 0.000 claims 1
- 239000000758 substrate Substances 0.000 description 45
- 125000006850 spacer group Chemical group 0.000 description 8
- 229920002120 photoresistant polymer Polymers 0.000 description 6
- 239000000956 alloy Substances 0.000 description 4
- 229910045601 alloy Inorganic materials 0.000 description 4
- 230000004888 barrier function Effects 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 4
- 239000012634 fragment Substances 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 230000000712 assembly Effects 0.000 description 2
- 238000000429 assembly Methods 0.000 description 2
- 230000007246 mechanism Effects 0.000 description 2
- 239000000615 nonconductor Substances 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
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- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Description
Claims (11)
- マイクロエレクトロニクスアセンブリの製造方法であって:
表面及びそれと反対側の裏面を有する半導体ダイに対し、該裏面上に直接的に金属層を形成する工程;
前記金属層に開口部を形成する工程;
前記金属層の前記開口部内に熱電モジュールを形成する工程であり、前記金属層が該熱電モジュールと前記ダイの前記裏面との間に存在する、工程;及び
前記熱電モジュールにヒートスプレッダを熱的に結合させる工程;
を有する製造方法。 - 前記金属層がめっきされるところの請求項1に記載の製造方法。
- 前記金属層が銅を含むところの請求項1に記載の製造方法。
- 前記熱電モジュールは、前記ダイの第1領域の上のみに形成され、前記ダイの第2領域に対して該第1領域を選択的に冷却することを可能にさせるところの請求項1に記載の製造方法。
- 前記ダイ上のマイクロエレクトロニクス回路が、動作時に、前記第1領域内に高温点を発生するところの請求項4に記載の製造方法。
- 前記金属層が前記高温点から前記熱電モジュールへの熱を拡散するところの請求項5に記載の製造方法。
- 表面及びそれと反対側の裏面を有する半導体ダイ;
前記ダイの前記裏面上に形成され、開口部を有する金属層;
前記金属層の前記開口部内の熱電モジュールであり、前記金属層が該熱電モジュールの第1の面と前記ダイの前記裏面との間に存在する熱電モジュール;及び
前記熱電モジュールの前記第1の面とは反対側の第2の面上に形成された金属ヒートスプレッダ;
を有するマイクロエレクトロニクスアセンブリ。 - 前記金属層が銅を含むところの請求項7に記載のマイクロエレクトロニクスアセンブリ。
- 前記熱電モジュールは、前記ダイの第1領域の上のみに形成され、前記ダイの第2領域に対して該第1領域を選択的に冷却することを可能にさせるところの請求項7に記載のマイクロエレクトロニクスアセンブリ。
- 前記ダイ上のマイクロエレクトロニクス回路が、動作時に、前記第1領域内に高温点を発生するところの請求項9に記載のマイクロエレクトロニクスアセンブリ。
- 前記金属層が前記高温点から前記熱電モジュールへの熱を拡散するところの請求項10に記載のマイクロエレクトロニクスアセンブリ。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/778,514 US7589417B2 (en) | 2004-02-12 | 2004-02-12 | Microelectronic assembly having thermoelectric elements to cool a die and a method of making the same |
PCT/US2005/003440 WO2005081313A2 (en) | 2004-02-12 | 2005-02-02 | A microelectronic assembly having thermoelectric elements to cool a die and a method of making the same |
Publications (2)
Publication Number | Publication Date |
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JP2007523478A JP2007523478A (ja) | 2007-08-16 |
JP4464974B2 true JP4464974B2 (ja) | 2010-05-19 |
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ID=34838194
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2006553163A Expired - Fee Related JP4464974B2 (ja) | 2004-02-12 | 2005-02-02 | ダイを冷却するための熱電素子を有するマイクロエレクトロニクスアセンブリ及びその製造方法 |
Country Status (5)
Country | Link |
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US (1) | US7589417B2 (ja) |
JP (1) | JP4464974B2 (ja) |
CN (1) | CN1914725B (ja) |
TW (1) | TWI324818B (ja) |
WO (1) | WO2005081313A2 (ja) |
Families Citing this family (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100257871A1 (en) * | 2003-12-11 | 2010-10-14 | Rama Venkatasubramanian | Thin film thermoelectric devices for power conversion and cooling |
US7523617B2 (en) * | 2004-10-22 | 2009-04-28 | Nextreme Thermal Solutions, Inc. | Thin film thermoelectric devices for hot-spot thermal management in microprocessors and other electronics |
US8063298B2 (en) * | 2004-10-22 | 2011-11-22 | Nextreme Thermal Solutions, Inc. | Methods of forming embedded thermoelectric coolers with adjacent thermally conductive fields |
WO2006113607A2 (en) * | 2005-04-18 | 2006-10-26 | Nextreme Thermal Solutions | Thermoelectric generators for solar conversion and related systems and methods |
US20060243315A1 (en) * | 2005-04-29 | 2006-11-02 | Chrysler Gregory M | Gap-filling in electronic assemblies including a TEC structure |
SG139573A1 (en) * | 2006-07-17 | 2008-02-29 | Micron Technology Inc | Microelectronic packages with leadframes, including leadframes configured for stacked die packages, and associated systems and methods |
JP5522943B2 (ja) * | 2008-01-29 | 2014-06-18 | 京セラ株式会社 | 熱電モジュール |
TWI405361B (zh) * | 2008-12-31 | 2013-08-11 | Ind Tech Res Inst | 熱電元件及其製程、晶片堆疊結構及晶片封裝結構 |
US8035218B2 (en) * | 2009-11-03 | 2011-10-11 | Intel Corporation | Microelectronic package and method of manufacturing same |
US20110132000A1 (en) * | 2009-12-09 | 2011-06-09 | Deane Philip A | Thermoelectric Heating/Cooling Structures Including a Plurality of Spaced Apart Thermoelectric Components |
CN102194811B (zh) * | 2010-03-05 | 2012-12-05 | 中芯国际集成电路制造(上海)有限公司 | 热电装置 |
FR2963165A1 (fr) | 2010-07-22 | 2012-01-27 | St Microelectronics Crolles 2 | Procede de generation d'energie electrique dans un dispositif semi-conducteur, et dispositif correspondant |
US8492788B2 (en) * | 2010-10-08 | 2013-07-23 | Guardian Industries Corp. | Insulating glass (IG) or vacuum insulating glass (VIG) unit including light source, and/or methods of making the same |
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-
2004
- 2004-02-12 US US10/778,514 patent/US7589417B2/en not_active Expired - Fee Related
-
2005
- 2005-01-31 TW TW94102919A patent/TWI324818B/zh not_active IP Right Cessation
- 2005-02-02 WO PCT/US2005/003440 patent/WO2005081313A2/en active Application Filing
- 2005-02-02 CN CN2005800039104A patent/CN1914725B/zh not_active Expired - Fee Related
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Also Published As
Publication number | Publication date |
---|---|
TWI324818B (en) | 2010-05-11 |
US20050178423A1 (en) | 2005-08-18 |
WO2005081313A3 (en) | 2005-11-24 |
CN1914725B (zh) | 2011-11-23 |
JP2007523478A (ja) | 2007-08-16 |
CN1914725A (zh) | 2007-02-14 |
TW200529398A (en) | 2005-09-01 |
US7589417B2 (en) | 2009-09-15 |
WO2005081313A2 (en) | 2005-09-01 |
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