JP4453634B2 - Discharge lamp lighting device and lighting fixture - Google Patents

Description

  The present invention relates to a discharge lamp lighting device and a lighting fixture including the discharge lamp lighting device.

  Conventionally, a discharge lamp lighting device as shown in FIG. 20 has been provided. This conventional apparatus controls full-wave rectifier DB for full-wave rectification of AC power supply AC, chopper circuit 1 for converting the pulsating current output of full-wave rectifier DB into a desired DC output (boost), and the operation of chopper circuit 1. The chopper control means 2 for performing the operation, the inverter circuit 3 for converting the DC output of the chopper circuit 1 into a high frequency output, the inverter control means 4 for controlling the operation of the inverter circuit 3, an inductor, a capacitor, and a discharge lamp (all not shown) ), And a load circuit 5 for lighting the discharge lamp at high frequency by a resonance action with the high frequency output of the inverter circuit 3.

  FIG. 21 shows an example of specific configurations of the chopper circuit 1 and the chopper control means 2. A commercial AC power supply AC is connected to the AC input terminal of the full-wave rectifier DB, and a small-capacitance capacitor C11 is connected to the pulsating output terminal of the full-wave rectifier DB. The chopper circuit 1 includes an inductor L11 having one end connected to the positive electrode of the pulsating output terminal of the full-wave rectifier DB, a drain connected to the other end of the inductor L11, and a source connected to the full-wave rectifier DB via the resistor R13. A switching element Q11 made of a power MOSFET connected to the negative electrode (= ground) of the pulsating output terminal, a diode D11 having an anode connected to the drain of the switching element Q11, and a cathode of the diode D11 are connected to the positive electrode. And a smoothing capacitor C12 having a negative electrode connected to the negative electrode at the pulsating output end of the full-wave rectifier DB. Thus, when the switching element Q11 is turned on, current flows from the full-wave rectifier DB through the inductor L11, the switching element Q11, and the resistor R13, and energy is accumulated in the inductor L11. When the switching element Q11 is turned off, the inductor L11 Is superimposed on the pulsating current output of the full-wave rectifier DB to charge the smoothing capacitor C12 through the diode D11, thereby boosting the pulsating output voltage of the full-wave rectifier DB from both ends of the smoothing capacitor C12. DC voltage can be obtained.

  On the other hand, the chopper control means 2 is composed of a general-purpose power factor improvement control IC (for example, MC34261 manufactured by Motorola) 2a, and controls the switching element Q11 of the chopper circuit 1 on / off (switching). The power factor correction control IC 2a includes an error amplifier AP that amplifies a difference between an output detection voltage obtained by dividing the output voltage of the chopper circuit 1 by resistors R14 and R15 and a reference voltage Vref, and an input voltage (full wave) to the chopper circuit 1 Multiplier that obtains an error signal synchronized with the pulsating output voltage (AC voltage of the AC power supply AC) by multiplying the input detection voltage obtained by dividing the pulsating output voltage of the rectifier DB by resistors R11 and R12 with the output of the error amplifier AP The comparator MP that compares the detected voltage obtained by detecting the current flowing through the switching element Q11 with the resistor R13 with the error signal output from the multiplier MP, and the inductor L11 from the secondary winding n2 provided in the inductor L11. A zero current detector ZI that detects when the current flowing through the current becomes zero, and a pulsed drive signal at the gate of the switching element Q11 Control for controlling the drive signal output unit DR based on the output of the drive signal output unit DR, the comparator CP, and the zero current detection unit ZI, and adjusting the on-duty ratio of the drive signal (the ON time of the switching element Q11). Part CT.

  The control unit CT outputs a control signal to the drive signal output unit DR when the zero current is detected by the zero current detection unit ZI, and outputs a drive signal for turning on the switching element Q11, and is detected by the comparator CP. A latch that operates to stop the drive signal by outputting a control signal to the drive signal output unit DR when the voltage exceeds the error signal, and latches the outputs of the zero current detection unit ZI and the comparator CP A circuit (RS flip-flop circuit), a timer circuit, a logic circuit, etc. are comprised. Thus, when the detected voltage of the current (input current) flowing through the switching element Q11 exceeds an error signal that follows the power supply voltage of the AC power supply AC, the control unit CT performs a control operation so as to turn off the switching element Q11. Thus, the power factor can be improved by reducing the phase difference between the input voltage from the AC power supply AC and the input current, and the output voltage of the chopper circuit 1 can be kept substantially constant with respect to the load fluctuation.

  On the other hand, FIG. 22 shows an example of a specific configuration of the inverter circuit 3 and the inverter control means 4. In the inverter circuit 3, a pair of switching elements Q1 and Q2 made of MOSFETs are connected in series to the output ends (both ends of the smoothing capacitor C12) of the chopper circuit 1, and load circuits are connected to both ends (between the drain and source) of the low-side switching element Q2. 5 is a so-called half-bridge type.

  Further, the inverter control means 4 includes an oscillation circuit OS having a variable oscillation frequency, an inverter drive circuit 4a that creates drive signals for the switching elements Q1 and Q2 from a high-frequency pulse signal output from the oscillation circuit OS, and an AC power supply. A timer circuit TM that counts the elapsed time from when AC is turned on and the inverter control means 4 starts operating, and adjusts the oscillation frequency of the oscillation circuit OS according to the elapsed time measured by the timer circuit TM. . Note that the oscillation frequency serving as a reference for the oscillation circuit OS is set by an external resistor R16 and a capacitor C13. The inverter drive circuit 4a includes a dead time setting unit DT for generating two pulse signals having a period (dead time) in which phases are different from each other and are simultaneously at an L level from the pulse signal output from the oscillation circuit OS, and one pulse A level shift circuit LS for level-shifting the signal, an RS flip-flop circuit FF1, FF2 for latching the pulse signal level-shifted by the level shift circuit LS and the other pulse signal output from the dead time setting unit DT, and RS Drive circuits DD1 and DD2 that generate drive signals in accordance with output pulses of the flip-flop circuits FF1 and FF2 are provided. Thus, the inverter control means 4 alternately turns on / off the two switching elements Q1, Q2 at a high frequency to convert the DC voltage of the chopper circuit 1 into a high frequency voltage and supply it to the load circuit 5.

  By the way, in a discharge lamp lighting device for lighting a discharge lamp, in particular, a hot cathode fluorescent lamp, a high voltage is applied after a preliminary preheating period in which a filament is preheated from start-up to lighting. A start period for starting the discharge lamp is provided, and timer control for performing the rated lighting or dimming lighting of the discharge lamp is often performed after the start period has elapsed. For this purpose, the inverter control means 4 is provided with a timer circuit TM. That is, the oscillation frequency of the oscillation circuit OS (the operation frequency of the inverter circuit 3) is changed based on the output of the timer circuit TM. For example, the oscillation frequency is sufficiently higher than the no-load resonance frequency of the load circuit 5 during the preceding preheating period. The frequency applied to the discharge lamp is set to a low voltage, and during the start-up period, the oscillation frequency is set to a frequency close to the no-load resonance frequency, so that a high voltage is applied to the discharge lamp and the start-up period is started. After completion, the frequency is set so that rated lamp power can be supplied to the discharge lamp.

  A large number of control ICs that realize the functions of the inverter control means 4 have been commercialized and are often used in combination with the power factor improvement control IC 2a of the chopper control means 2. Here, a number of parts are conventionally required for the drive circuit that drives the high-side switching element Q1 of the inverter circuit 3 (see, for example, Japanese Patent Laid-Open No. 10-326682). By using the inverter control means 4 as described above, the number of components can be reduced, and the placement and pattern wiring of printed circuit boards can be facilitated, so that the discharge lamp lighting device can be reduced in size and cost.

  Here, in general, in a discharge lamp lighting device, if the operation of the inverter circuit continues without load or at the end of life, excessive resonance current flows and stresses the circuit components. The circuit is protected by detecting the state (abnormal state) and stopping the operation of the inverter circuit or reducing the power supplied to the discharge lamp. Also, if the DC input voltage of the inverter circuit decreases due to an instantaneous power failure (instantaneous power failure) of the AC power supply, the stable lighting of the discharge lamp may not be maintained, and there is a risk that it will go off. Since the above circuit protection function works because the voltage being applied is excessive, the discharge lamp may not light up again after the AC power supply is restored. Is added to the initial mode (immediately after power-on or during pre-heating).

  However, depending on the level at which the power supply voltage of the AC power supply instantaneously drops from the rated voltage (hereinafter referred to as “instantaneous voltage drop level”), the following problems occur.

  That is, the reset function is normally set to operate at about 70% or less of the rated voltage in consideration of a decrease in power supply voltage due to overload when other devices start operation. In consideration of malfunction due to noise, the operation is performed when the drop in the power supply voltage continues for a certain period of time.

  FIG. 23A shows an example of a circuit (reset circuit) that realizes the reset function. FIG. 23B shows the output voltage Vch of the chopper circuit 1, the output voltage Vo of the inverter circuit 3, and the output voltage of the reset circuit. Vrs is shown. This reset circuit divides the pulsating current output of the full-wave rectifier DB for full-wave rectifying the AC power supply AC by the voltage dividing resistors R17 and R18 and outputs the detection voltage Vrs smoothed by the capacitor C14. If the detection voltage Vrs output from is less than or equal to a predetermined threshold value Vth, the inverter control means 4 resets the operation mode of the inverter circuit 3 to the initial mode (the operation state immediately after turning on the power). That is, when it is assumed that the power supply voltage of the AC power supply AC has dropped at time t = t1, if the power supply voltage has dropped to almost zero as in the case of a momentary power failure, a one-dot broken line is shown in FIG. As shown in FIG. 23B, the reset function operates when the detection voltage Vrs of the reset circuit falls below the threshold value (about 70% of the rated voltage) Vth at time t = t2, but when the instantaneous voltage drop level is low, the solid line in FIG. As shown, the time until the detection voltage Vrs of the reset circuit falls below the threshold value Vth (time from time t = t1 to t = t3) becomes extremely long, and the reset is performed within this time (t = t1 to t3). Since the function does not work, the output voltage Vch of the chopper circuit 1 gradually decreases and the power supplied to the discharge lamp also decreases. As a result, the output voltage Vo of the inverter circuit 3 increases and the resonance current increases. , Inn There arises a problem that excessive stress such as a phase advance current flows also to the switching elements Q1 and Q2 of the barter circuit 3.

Patent Documents 1 and 2 disclose a discharge lamp lighting device aimed at solving such problems. In the discharge lamp lighting devices disclosed in these two patent documents, the output voltage Vch of the chopper circuit is monitored as shown in FIG. 24, and when the output voltage Vch falls below the threshold value Vthc, the operation mode of the inverter circuit is set to the initial mode. There is provided a first output reduction means for reducing the output voltage Vo of the inverter circuit by returning to (pre-preheating mode). Note that the higher the threshold value Vthc in the first output lowering means, the greater the effect of avoiding stress, and it is desirable to set it to 80% to 90% of the rated voltage. Further, in Patent Document 2, in order to prevent malfunction when a ripple voltage is generated at the output of the chopper circuit immediately after the operation of the chopper circuit after the power is turned on and immediately after the discharge lamp is turned on, the pre-heating is performed from the power on. The operation of the first output reduction means is prohibited during the period and further until the start period.
JP 2003-217883 A JP 2003-203895 A

  20 to 22, the load of the chopper circuit 1 fluctuates immediately after the oscillation frequency of the inverter circuit 3 is set to a frequency that can supply the rated lamp power to the discharge lamp after the start-up period. As a result, a ripple voltage is generated at the output of the chopper circuit 1, and the ripple voltage may cause a malfunction in the reset function. In particular, when the difference between the oscillation frequency during the starting period and the oscillation frequency during lighting is large and the output change becomes large (for example, in the case of dimming lighting), the risk of malfunctioning increases.

  Furthermore, the second output lowering means having the function of stopping the operation of the inverter circuit by detecting a no-load or end-of-life state (abnormal state) from the lamp voltage or the like, or reducing the power supplied to the discharge lamp. Usually, in order to prevent erroneous detection, the abnormality detection operation is often prohibited from the time the power is turned on until the discharge lamp is started. However, the above-described first output reduction means cancels the operation prohibition and the second output reduction occurs. The following problems occur depending on the timing at which the operation prohibition is canceled.

  FIG. 25A shows the output voltage Vch of the chopper circuit, the output voltage Vo of the inverter circuit, the oscillation frequency f of the inverter circuit, from the power-on to the lighting period Ton through the preceding preheating period Tpf and the starting period Tst. FIG. 6 is a diagram showing the lamp voltage Vla detected by the output lowering means, wherein the oscillation frequency f of the inverter circuit in the preceding preheating period Tpf, the starting period Tst, and the lighting period Ton is set to f1, f2, and f3, and the oscillation in the starting period Tst. When the difference between the frequency (hereinafter referred to as “starting frequency”) f2 and the oscillation frequency (hereinafter referred to as “lighting frequency”) f3 in the lighting period Ton is relatively small (for example, in the case of rated lighting). FIG. In such a case, if the operation inhibition period Tx1 of the first output reduction means is continued at least partway through the start period Tst, the operation inhibition period Tx2 of the second output reduction means and the operation of the first output reduction means are performed. Normal operation can be performed regardless of the timing when the prohibition period Tx1 ends.

  On the other hand, FIG. 25B shows the timing of the end of the operation inhibition period Tx2 of the second output reduction means after the end of the operation inhibition period Tx1 of the first output reduction means, and the load at the end of the life of the discharge lamp. When the discharge lamp at the end of the life is turned on during the start period Tst, the power consumption at the load becomes excessive and the output voltage Vch of the chopper circuit is lowered. At this time, if the output voltage Vch of the chopper circuit is lower than the threshold value Vthc in the first output reduction means, the first output reduction means operates before the second output reduction means operates, and the inverter Since the operation mode of the circuit is reset from the starting mode to the preceding preheating mode, the preceding preheating mode → the starting mode → the reset operation by the first output lowering means → the preceding preheating mode... There arises a problem such as being applied.

  The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a discharge lamp lighting device and a lighting fixture that can prevent the occurrence of problems due to excessive stress application to circuit components and the like.

In order to achieve the above object, the invention of claim 1 includes a rectifier that rectifies an AC power supply, a chopper circuit that includes an inductor, a smoothing capacitor, and a switching element, and converts the output voltage of the rectifier into a desired DC voltage; An inverter circuit that includes one or more switching elements and converts the output of the chopper circuit to high frequency power by switching the switching elements, and a high frequency that is output from the inverter circuit including one or more inductors and capacitors. A starting voltage is applied to the discharge lamp from a pre-heating state in which the filament of the discharge lamp is pre-heated by changing the switching frequency of a switching element provided in the inverter circuit and a load circuit that lights the discharge lamp by resonance with electric power. After the start-up state, enter the lighting state to make the discharge lamp light stably. Inverter control means for sequentially switching the operation state of the barter circuit and the output voltage of the chopper circuit are detected, and when the detected value falls below the first threshold value, the operation state of the inverter circuit is changed from the lighting state to the preceding preheating state or starting A first output lowering means for lowering the output of the inverter circuit by resetting to a state; a second output lowering means for lowering the output of the inverter circuit when an abnormality of a physical quantity representing the state of the discharge lamp is detected; The first masking means for prohibiting the operation of the first output lowering means, the second masking means for prohibiting the operation of the second output lowering means, and the operation state of the inverter circuit is switched from the starting state to the lighting state. And a sweep means for changing the switching frequency of the switching element included in the inverter circuit stepwise or continuously. The screen means prohibits the operation of the first output lowering means during the period from the preceding preheating state until the operation of the sweeping means is almost completed, and the second mask means passes through the starting state from the preceding preheating state to the sweep means. The operation of the second output reduction means is prohibited before the operation of the second output reduction means is prohibited during the period until the operation is completed and the first mask means permits the operation of the first output reduction means. It is characterized by permission.

  According to a second aspect of the present invention, in the first aspect of the invention, the current flowing through at least one switching element included in the inverter circuit is detected, and the inverter control means is configured so that the detected value becomes a desired value. The feedback control means for changing the switching frequency of the switching element provided in the inverter circuit, and the feedback mask means for prohibiting the operation of the feedback control means from the preceding preheating state until the start state is completed, To do.

  The invention of claim 3 is the invention of claim 1 or 2, further comprising a preheating circuit for supplying a preheating current to the filament of the discharge lamp, and a preheating control means for adjusting the preheating current by controlling the preheating circuit, The preheating control means controls the preheating circuit so that the preheating current is supplied from the preceding preheating state to the end of the starting state, and the preheating current is suppressed after the starting state ends. .

According to a fourth aspect of the present invention, in any one of the first to third aspects, the second output reduction means is detected by a discharge lamp abnormality detection unit that detects a voltage across the discharge lamp, and the discharge lamp abnormality detection unit. An output reduction signal generator that outputs an output reduction signal when the detected value exceeds a predetermined threshold, and the inverter control means reduces the output of the inverter circuit when the output reduction signal is received from the output reduction signal generator An output switching unit for causing the output reduction signal generation unit to have a first threshold value and a second threshold value larger than the first threshold value as the threshold value, and the second mask means outputs the second output value. After the operation of the lowering means is permitted, the threshold is set as the second threshold during a period until the operation of the sweep means is completed, and the threshold is set as the first threshold during the other periods.

  According to a fifth aspect of the present invention, in the invention according to any one of the first to fourth aspects, the second output reducing means is a discharge lamp based on a peak value of the voltage across the discharge lamp and a DC component contained in the voltage across the voltage. It is characterized by detecting abnormalities in the above.

  The invention according to claim 6 is the invention according to claim 4 or 5, wherein the second output reduction means includes a first discharge lamp abnormality detecting unit for detecting one physical quantity representing the state of the discharge lamp, and the state of the discharge lamp. A second discharge lamp abnormality detection unit for detecting other physical quantities representing the first and a first output decrease signal when a detection value detected by the first discharge lamp abnormality detection unit exceeds a predetermined threshold A first output decrease signal generator and a second output decrease signal generator that outputs a second output decrease signal when a detection value detected by the second discharge lamp abnormality detection unit exceeds a predetermined threshold value. And an output switching unit for reducing the output of the inverter circuit in the inverter control means when the first or second output reduction signal is received from the first or second output reduction signal generating unit, At least one of the two output reduction signal generators is the threshold value A period between the first threshold value and a second threshold value greater than the first threshold value, and after the second mask means permits the operation of the second output reduction means until the operation of the sweep means is completed The threshold value is the second threshold value, and the threshold value is the first threshold value in other periods.

  The invention according to claim 7 is the invention according to any one of claims 1 to 6, wherein the second mask means prohibits the operation of the second output reduction means during the period from the preceding preheating state to the end of the starting state. It is characterized by that.

  The invention of claim 8 is the invention according to any one of claims 1 to 7, wherein the inverter control means, the first output reduction means, the second output reduction means, the first mask means, and the second mask means are integrated. The inverter control means is a signal corresponding to each period by measuring the preceding preheating period in which the operation state of the inverter circuit is in the preceding preheating state, the starting period in which the starting state is set, and the lighting period in which the lighting state is turned on. And a frequency setting unit for setting the switching frequency of the switching element included in the inverter circuit to a frequency corresponding to each period according to the output signal of the timer circuit, and the sweep means is provided in the integrated circuit. The frequency set by the frequency setting unit is swept in accordance with a change in the voltage between both ends accompanying charging or discharging of an external capacitor.

  The invention of claim 9 is the invention according to any one of claims 1 to 7, wherein the inverter control means, the first output reduction means, the second output reduction means, the first mask means, and the second mask means are integrated. The inverter control means is a signal corresponding to each period of time by counting the preceding preheating period in which the operation state of the inverter circuit is in the preceding preheating state, the starting period in which it is in the starting state, and the lighting period in which it is in the lighting state. And a frequency setting unit for setting the switching frequency of the switching element included in the inverter circuit to a frequency corresponding to each period according to the output signal of the timer circuit. It has a sweep signal generation circuit that outputs a DC voltage that rises or falls immediately after the start of the lighting period according to the output signal, and is set by the frequency setting unit according to the change in the DC voltage. Characterized in that to sweep the frequency to be.

  The invention of claim 10 is the invention according to any one of claims 1 to 7, wherein the inverter control means, the first output reduction means, the second output reduction means, the first mask means, and the second mask means are integrated. The inverter control means is a signal corresponding to each period by measuring the preceding preheating period in which the operation state of the inverter circuit is in the preceding preheating state, the starting period in which the starting state is set, and the lighting period in which the lighting state is turned on. And a frequency setting unit that sets the switching frequency of the switching element included in the inverter circuit to a frequency corresponding to each period in accordance with the output signal of the timer circuit. By charging an externally attached capacitor, the preceding preheating period and the starting period are timed and the capacitor is discharged after the end of the starting period. Characterized in that to sweep the frequency set by the frequency setting unit in accordance with a change in the voltage across that accompanies the discharge of the serial capacitors.

  The invention of claim 11 is the invention according to any one of claims 1 to 7, wherein the inverter control means, the first output reduction means, the second output reduction means, the first mask means, and the second mask means are integrated. The inverter control means is a signal corresponding to each period by measuring the preceding preheating period in which the operation state of the inverter circuit is in the preceding preheating state, the starting period in which the starting state is set, and the lighting period in which the lighting state is turned on. And a frequency setting unit that sets the switching frequency of the switching element included in the inverter circuit to a frequency corresponding to each period in accordance with the output signal of the timer circuit. The preheating period is timed by charging an external capacitor, and the starting period is timed by discharging the capacitor. Characterized in that to sweep the frequency set by the frequency setting unit in accordance with the change of the voltage across the associated discharge of capacitor.

  According to a twelfth aspect of the present invention, in the invention according to any one of the second to eleventh aspects, the inverter control means increases or decreases the high frequency power output from the inverter circuit in a lighting state in accordance with a dimming ratio command given from the outside. The sweep means shortens the sweep period when the inverter control means reduces the high frequency power based on the dimming ratio.

  According to a thirteenth aspect of the present invention, in the twelfth aspect of the present invention, the sweep means outputs a trigger signal for prohibiting and permitting the operation of the first output reduction means to the first mask means, and the second mask means. A trigger signal for prohibiting and permitting the operation of the second output reduction means is output to the mask means.

  In order to achieve the above object, the invention according to claim 14 is to supply the high-frequency power through the instrument main body fixed to the construction surface, the socket provided in the instrument main body to which the discharge lamp is mounted, and the socket. The discharge lamp lighting device according to any one of claims 1 to 13, wherein the discharge lamp is lit by the above.

  According to the present invention, when the operation state of the inverter circuit is switched from the starting state to the lighting state, the switching frequency of the switching element included in the inverter circuit is changed stepwise or continuously by the sweep means, so that a sudden load The fluctuation can be suppressed and the ripple generated in the output voltage of the chopper circuit can be reduced. Further, the first mask means is in the period from the preceding preheating state until the operation of the sweep means is almost completed. Since the operation of the output lowering means is prohibited, it is possible to prevent the first output lowering means from malfunctioning due to the ripple generated in the output voltage of the chopper circuit. The operation of the second output reduction means is prohibited and the first mask means is in a period until the operation of the sweep means is completed after the start state. Since the operation of the second output reduction means is permitted before the operation of the first output reduction means is permitted, the power consumption at the load becomes excessive at the end of the life of the discharge lamp, etc. There is an effect that it is possible to prevent the output voltage of the chopper circuit from being lowered and the operation of the first output lowering means from being repeated, and to prevent the occurrence of problems due to excessive stress application to circuit components and the like.

(Embodiment 1)
FIG. 1 shows a schematic circuit configuration of the discharge lamp lighting device of the present embodiment. The basic configuration of the present embodiment is almost the same as that of the conventional example shown in FIG. 20, and the rectifier DB for full-wave rectification of the AC power supply AC and the pulsating current output of the rectifier DB are converted into a desired DC output (step-up). Chopper circuit 1, chopper control means (not shown) for controlling the operation of chopper circuit 1, inverter circuit 3 for converting the DC output of chopper circuit 1 into a high-frequency output, and inverter control for controlling the operation of inverter circuit 3 And a load circuit 5 which is composed of one or a plurality of inductors and capacitors (none of which are shown) and which illuminates the discharge lamp 6 at a high frequency by a resonance action with a high frequency output of the inverter circuit 3. However, since the chopper circuit 1 and the chopper control means are the same as those in the conventional example, the illustration of the detailed configuration and the explanation of the operation are omitted.

  In the inverter circuit 3, a pair of switching elements Q3 and Q4 made of MOSFETs are connected in series to the output terminal of the chopper circuit 1 as in the conventional example, and the load circuit 5 is connected to both ends (between the drain and source) of the low-side switching element Q4. It is a so-called half-bridge type connected.

  The inverter control means includes an inverter control signal generation circuit 10 whose main component is an oscillation circuit whose oscillation frequency is variable, and a switching element Q3 from a high-frequency pulse signal (inverter control signal) output from the inverter control signal generation circuit 10. , Q4, and the drive circuit 11 for generating the drive signal and the elapsed time after the AC power supply AC is turned on and the inverter control means starts operating to indicate the start of the preceding preheating period, the starting period, and the lighting period A timer circuit 12 that outputs a trigger signal and a current flowing through the switching element Q4 from the voltage across the detection resistor R21 connected to the source of the low-side switching element Q4 are detected, and an inverter is set so that the detected value becomes a desired value. Switching frequency (oscillation frequency) of switching elements Q3 and Q4 with respect to control signal generation circuit 10 ; And a feedback circuit 13 for changing the number), in which according to the elapsed time counted by the timer circuit 12 adjusts the oscillation frequency of the inverter control signal generation circuit 10.

  The inverter control signal generation circuit 10 is composed of an integrated circuit (IC), and a series circuit of resistors R24 and R25 is connected between the terminal Ro and the ground, and a resistor R22 and a capacitor C15 are connected in series between the terminal Rs and the ground. The circuit is connected, and the connection point between the resistors R24 and R25 and the connection point between the resistor R22 and the capacitor C15 are connected via the resistor R23, and the terminal Rp is connected to the connection point. A constant voltage is applied to the terminal Ro, and the inverter control signal generation circuit 10 operates to increase the frequency (= oscillation frequency) of the inverter control signal as the current flowing through the terminal Ro increases. When the trigger signal indicating the start of the preceding preheating period is input from the timer circuit 12, the inverter control signal generation circuit 10 short-circuits the two terminals Rs and Rp to the ground, thereby causing R24 + (R23 × R25) to the terminal Ro. When a current determined by the resistance value Rpf of / (R23 + R25) is supplied and an inverter control signal having a frequency corresponding to the current is output and a trigger signal indicating the start of the start period is input from the timer circuit 12, an inverter control signal is generated. The circuit 10 short-circuits the terminal Rs to the ground and opens the terminal Rp so that a current determined by the resistance value Rst of R24 + {(R22 + R23) × R25} / (R22 + R23 + R25) flows through the terminal Ro, and a frequency corresponding to the current. When the trigger signal indicating the start of the lighting period is input from the timer circuit 12, the inverter control signal is output. No. generating circuit 10 outputs a terminal Rs, the inverter control signal with a frequency corresponding to said current by applying a current determined by the resistance value Ron of R24 + R25 to the terminal Ro by the open Rp. That is, the relationship Ron <Rst <Rpf is established between the resistance values Rpf, Rst, and Ron in each period, and the oscillation frequency is set to a frequency sufficiently higher than the no-load resonance frequency of the load circuit 5 in the preceding preheating period. The applied voltage to the discharge lamp 6 is set to a low voltage, and during the start-up period, the oscillation frequency is lowered to a frequency close to the no-load resonance frequency and a high voltage is applied to the discharge lamp 6 to start, and lighting after the end of the start-up period In the period, the discharge lamp 6 is set to a frequency at which the discharge lamp 6 can be stably lit. Here, when the trigger signal indicating the start of the lighting period is input from the timer circuit 12 and the terminal Rs is opened by the inverter control signal generation circuit 10, the capacitor C15 is charged through the resistors R24 and R23, and therefore the terminal Ro. Current gradually decreases in accordance with the time constant determined by the values of the resistors R24 and R23 and the capacitor C15, and as a result, the frequency of the inverter control signal output from the inverter control signal generation circuit 10 continuously decreases. Will do. Note that a period in which the oscillation frequency of the inverter circuit 3 is continuously reduced in the process of shifting from the starting period to the lighting period is referred to as a “sweep period”.

  The feedback circuit 13 includes an operational amplifier OP1 in which the reference voltage Vref is input to the non-inverting input terminal, and the voltage (detection voltage) across the detection resistor R21 is input to the inverting input terminal via the input resistor R28. A feedback resistor R27 and a capacitor C16 are connected in parallel between the input terminal and the output terminal. The output terminal of the operational amplifier OP1 is connected to the cathode of the diode D12 via the feedback mask circuit 13a having the switch SW. The anode is connected to a connection point of resistors R24 and R25 connected between the terminal Ro and the ground via a resistor R26. That is, by utilizing the fact that the current flowing through the switching elements Q3 and Q4 of the inverter circuit 3 is substantially proportional to the load power, negative feedback is applied to the output voltage of the operational amplifier OP1 when the load increases and the detection voltage of the detection resistor R21 rises. The feedback circuit 13 operates so as to increase the oscillation frequency of the inverter circuit 3 by increasing the current of the terminal Ro through the resistor R26 and the diode D12 and to suppress the power consumption at the load. . However, the feedback control of the feedback circuit 13 is prohibited by turning off the switch SW of the feedback mask circuit 13a until the trigger signal indicating the start of the lighting period is output from the timer circuit 12, that is, in the preceding preheating period and the starting period. (Mask).

  Further, in the present embodiment, the output voltage Vch of the chopper circuit 1 is detected, and when the detected value falls below the first threshold value, the operation state of the inverter circuit 3 is reset from the lighting state to the preceding preheating state or the starting state. A first output reduction means for reducing the output of the inverter circuit 3; a second output reduction means for reducing the output of the inverter circuit 3 when an abnormality of the discharge lamp 6 is detected; and a first output reduction means. There are provided a first mask circuit for prohibiting the operation and a second mask circuit for prohibiting the operation of the second output reduction means.

  The first output reduction means compares the detection value Vx detected by the chopper output voltage detection circuit 21 for detecting the output voltage Vch of the chopper circuit 1 and the chopper output voltage detection circuit 21 with a predetermined threshold value Vthx, and detects the detected value. If Vx is equal to or less than the threshold value Vthx, the output reduction switching circuit 20 that outputs an output reduction signal to the timer circuit 12 is configured. By outputting a trigger signal indicating the start of the period to the inverter control signal generating circuit 10, the operation of the inverter circuit 3 is reset to the preceding preheating state (preceding preheating period). Further, the first mask circuit 22 is from the time when the trigger signal indicating the start of the preceding preheating period is output from the timer circuit 12 to the time when the sweep period ends after the trigger signal indicating the start of the lighting period is output. The output reduction switching circuit 20 is prohibited from outputting an output reduction signal.

  The second output reduction means includes a discharge lamp abnormality detection circuit 30 that detects a peak value of a voltage across the discharge lamp 6 (hereinafter referred to as “lamp voltage”) as a physical quantity representing the state of the discharge lamp 6, and a discharge lamp abnormality. An output reduction signal generation circuit 31 that outputs an output reduction signal when the detection value Va detected by the detection circuit 30 exceeds a predetermined threshold value Vtha, and an inverter when an output reduction signal is received from the output reduction signal generation circuit 31 An output switching circuit 32 that outputs an output switching signal to the control signal generating circuit 10 to reduce the output of the inverter circuit 3. The inverter control signal generating circuit 10 that receives the output switching signal receives the output switching signal from the drive circuit 11. The inverter circuit 3 is stopped by outputting a stop signal for stopping the driving of the switching elements Q3, Q4. Further, the second mask circuit 40 outputs the output decrease signal generation circuit 31 from the time when the trigger signal indicating the start of the preceding preheating period is output from the timer circuit 12 to the time when the trigger signal indicating the start of the lighting period is output. Prohibits the output of the output reduction signal.

  Next, the operation of this embodiment will be described with reference to the waveform diagram of FIG. 2A shows the output voltage detection value Vx of the chopper circuit 1 detected by the chopper output voltage detection circuit 21, FIG. 2B shows the output voltage Vo of the inverter circuit 3, and FIG. 2C shows the oscillation of the inverter circuit 3. The frequencies f and (d) indicate the detection values Va detected by the discharge lamp abnormality detection circuit 30, respectively.

  Assuming that the AC power supply AC is turned on at time t = 0, the timer circuit 12 starts measuring the elapsed time, and an inverter control signal generating circuit generates a trigger signal indicating the start of the preceding preheating period at time t = t1. 10 is output. The inverter control signal generation circuit 10 outputs an inverter control signal having a frequency corresponding to the preceding preheating period to the drive circuit 11, and the drive circuit 11 drives the switching elements Q3 and Q4 to generate an oscillation frequency (which matches the frequency of the inverter control signal). The inverter circuit 3 is operated at the preceding preheating frequency f1 to supply a preheating current to the filament of the discharge lamp 6. At time t = t2, the timer circuit 12 outputs a trigger signal indicating the start of the starting period to the inverter control signal generating circuit 10, and the inverter control signal generating circuit 10 outputs an inverter control signal having a frequency corresponding to the starting period to the drive circuit 11. And the drive circuit 11 drives the switching elements Q3 and Q4 to operate the inverter circuit 3 at an oscillation frequency (starting frequency) f2 that coincides with the frequency of the inverter control signal, so that the discharge lamp 6 has a high voltage (starting voltage). Apply and start. When the discharge lamp 6 is started, the output voltage Vo of the inverter circuit 3 is lower than the preceding preheating period (see FIG. 2B).

  At time t = t3, the timer circuit 12 outputs a trigger signal indicating the start of the lighting period to the inverter control signal generation circuit 10, and the inverter control signal generation circuit 10 drives the inverter control signal having a frequency corresponding to the lighting period. The drive circuit 11 drives the switching elements Q3 and Q4 to operate the inverter circuit 3 at an oscillation frequency (lighting frequency) f3 that matches the frequency of the inverter control signal. In the illustrated example, the discharge lamp 6 is lit at a rated level, and the difference between the starting frequency f2 and the lighting frequency f3 is relatively small (see FIG. 2C). As already described, when a trigger signal indicating the start of the lighting period is input from the timer circuit 12, the current flowing through the terminal Ro of the inverter control signal generation circuit 10 has a time constant determined by the values of the resistors R24 and R23 and the capacitor C15. Accordingly, the frequency of the inverter control signal continuously decreases to gradually decrease, and the oscillation frequency f of the inverter circuit 3 continuously decreases from the starting frequency f2 toward the lighting frequency f3. At time t = t4 when the charging of the capacitor C15 is completed, the sweep period ends, the oscillation frequency f of the inverter circuit 3 becomes the lighting frequency f3, and the discharge lamp 6 is stably lit.

  On the other hand, when the trigger signal indicating the start of the lighting period is output from the timer circuit 12, the second mask circuit 40 permits the output decrease signal generation circuit 31 to output the output decrease signal, and the feedback mask circuit 13a The feedback control operation is permitted to the feedback circuit 13 by turning on the switch SW, and then the output reduction switching circuit 20 outputs the output reduction signal to the first mask circuit 22 at the time when the sweep period ends (time t = t4). Allow output. 2A and 2D, the first mask circuit 22 prohibits the output reduction signal output from the output reduction switching circuit 20 during the periods indicated by arrows (time t = t1 to t4 and t1 to t3). A period during which the second mask circuit 40 prohibits output reduction signal output from the output reduction signal generation circuit 31 (second inhibition period).

  Here, when the oscillation frequency f at the time of lighting is not feedback-controlled by the feedback circuit 13, the power consumption of the discharge lamp 6 when the operation state of the inverter circuit 3 shifts from the starting state to the lighting state is compared according to the lamp voltage. However, when the feedback control by the feedback circuit 13 is performed, when changing from the starting state to the lighting state, the stable value in the lighting state is changed at once. Since the lighting frequency f3 is lower than the starting frequency f2, the current flowing through the discharge lamp 6 increases, and the ripple generated in the output voltage Vch of the chopper circuit 1 tends to increase. However, as described above, the sweep period is provided at the transition from the start period to the lighting period, so that the power consumption of the discharge lamp 6 is prevented from abruptly fluctuating and the ripple generated in the output voltage Vch of the chopper circuit 1 is suppressed. can do.

  Thus, according to the present embodiment, the ripple generated in the output voltage Vch of the chopper circuit 1 can be suppressed as described above, and the first mask circuit 22 can be operated from the preceding preheating state to the completion of the sweep period. Since the operation of the first output reduction means is prohibited, it is possible to prevent the first output reduction means from malfunctioning due to the ripple generated in the output voltage Vch of the chopper circuit 1, and further, the second mask circuit 40 The operation of the second output reduction means is prohibited during the period from the preceding preheating state through the start-up state to the completion of the sweep period, and the first mask circuit 22 permits the operation of the first output reduction means. Since the operation of the second output reduction means is permitted first, the output voltage Vch of the chopper circuit 1 decreases when the power consumption at the load becomes excessive at the end of the life of the discharge lamp 6 or the like. First It is possible to prevent the inverter circuit 3 from being repeated in the preceding preheating state, the starting state, the preceding preheating state,... By the output reduction operation of the force reducing means, and to prevent the occurrence of problems due to excessive stress application to the circuit components. is there.

  In this embodiment, the capacitor C15 is used as the sweep means. However, if the sweep means is configured in the inverter control signal generation circuit 10 constituted by an integrated circuit, the operation timing of the first mask circuit 22 can be more accurately determined. It is possible to set.

(Embodiment 2)
FIG. 3 shows a schematic circuit configuration of the discharge lamp lighting device of the present embodiment. However, since the basic configuration of the present embodiment is the same as that of the first embodiment, common components are denoted by the same reference numerals and description thereof is omitted.

  In the present embodiment, a preheating circuit 50 that supplies a preheating current to the filament of the discharge lamp 6 and a preheating control circuit 51 that controls the preheating circuit 50 to adjust the preheating current are provided, and the preheating control circuit 51 is connected to the inverter circuit 3. The preheating circuit 50 is controlled so that the preheating current is supplied from the preceding preheating state to the end of the starting state, and the preheating current is suppressed after the starting state ends. In the preheating circuit 50, a series circuit of a capacitor C17, a primary winding of the transformer T1, and a switching element Q5 including a MOSFET is connected in parallel with the low-side switching element Q4 and the detection resistor R21, and a pair of secondary circuits provided in the transformer T1. The winding is configured to be connected to each filament of the discharge lamp 6. Further, the preheating control circuit 51 turns on the switching element Q5 of the preheating circuit 50 during the preceding preheating period and the starting period, so that the preheating current is supplied from the preheating circuit 50 until the operation state of the inverter circuit 3 is changed from the preceding preheating state to the end of the starting state. In the lighting period, the primary side current of the transformer T1 is extremely suppressed by turning off the switching element Q5, and the preheating current is suppressed by reducing the power supplied to the secondary side. It is possible to reduce power consumption in the filament during lighting. Here, the timing at which the preheating control circuit 51 turns off the switching element Q5 may be after the discharge lamp 6 has shifted to a sufficient arc discharge, and may be turned off before the feedback circuit 13 starts operating. Since it is desirable, it is set at the end of the starting period. That is, when the feedback circuit 13 operates in a state where the switching element Q5 is on, the current flowing through the switching element Q5 is added to the resonance current of the load circuit 5, and the detection voltage by the detection resistor R21 is increased to increase the feedback circuit 13. This is because feedback control is performed in the direction of decreasing the high-frequency output of the inverter circuit 3, and there is a possibility that a problem such as the discharge lamp 6 going off may occur.

  FIG. 4 is a waveform diagram for explaining the operation of the present embodiment. Like FIG. 2, (a) shows the output voltage detection value Vx of the chopper circuit 1 detected by the chopper output voltage detection circuit 21, (b). Indicates the output voltage Vo of the inverter circuit 3, (c) indicates the oscillation frequency f of the inverter circuit 3, and (d) indicates the detection value Va detected by the discharge lamp abnormality detection circuit 30. However, the basic operation is the same as that of the first embodiment, and the description is omitted.

  This embodiment is different from the first embodiment in that the output decrease signal generation circuit 31 has a first threshold value Vtha1 and a second threshold value Vtha2 larger than the first threshold value Vtha1 as shown in FIG. Then, after the output of the output reduction signal is permitted from the second mask circuit 40, the threshold value is set to the second threshold value Vtha2 only during the period until the sweep period ends, and the threshold value is set to the first threshold value Vtha1 in other periods. It is in the point to.

  That is, since the output reduction switching circuit 20 is prohibited from outputting the output reduction signal by the first mask circuit 22 during the sweep period, an instantaneous power failure or an instantaneous voltage drop occurs in the AC power supply AC, and the chopper circuit Even if the output voltage Vch of 1 decreases, the inverter circuit 3 is not reset to the preceding preheating state by the first output reduction means, and the output of the inverter circuit 3 also increases as the output voltage Vch of the chopper circuit 1 decreases. It decreases and the lamp voltage of the discharge lamp 6 increases. In addition, since the switching element Q5 of the preheating circuit 50 is in the off state during the sweep period, the lamp voltage further increases when the power consumption in the discharge lamp 6 decreases. Therefore, when an instantaneous power failure or an instantaneous voltage drop occurs in the AC power supply AC as described above during the sweep period, the second output reduction means (the discharge lamp abnormality detection circuit 30, the output reduction signal generation circuit 31) is caused by the increase in the lamp voltage. The output switching circuit 32) operates to stop the operation of the inverter circuit 3, and the inverter circuit 3 does not restart and the discharge lamp 6 does not light up again after the AC power supply AC is restored (non-lighting state) ).

  On the other hand, since the oscillation frequency f of the inverter circuit 3 is a relatively high value during the sweep period, even if the threshold value in the output decrease signal generation circuit 31 is made larger than the threshold value in the other period (first threshold value Vtha1), the switching element Since the stress applied to Q3, Q4, etc. is in a relatively small state, the second output is changed by changing the threshold value of the output decrease signal generation circuit 31 to the relatively large second threshold value Vtha2 only during the sweep period. It is possible to avoid the operation stop of the inverter circuit 3 due to the lowering means and to prevent the occurrence of a malfunction (non-lighting of the discharge lamp 6 after the power supply is restored) after the AC power supply AC is restored.

(Embodiment 3)
FIG. 5 shows a schematic circuit configuration of the discharge lamp lighting device of the present embodiment. However, since the basic configuration of the present embodiment is the same as that of the second embodiment, the same components are denoted by the same reference numerals and description thereof is omitted.

  In the present embodiment, the first discharge lamp abnormality detection circuit 30A that detects the peak-to-peak value of the lamp voltage of the discharge lamp 6 and the second discharge lamp abnormality detection circuit that detects the DC component included in the lamp voltage. 30B, a first output reduction signal generation circuit 31A that outputs a first output reduction signal when the detection value Va1 detected by the first discharge lamp abnormality detection circuit 30A exceeds a predetermined threshold value Vtha1, A second output reduction signal generation circuit 31B that outputs a second output reduction signal when the detection value Va2 detected by the second discharge lamp abnormality detection circuit 30B exceeds a predetermined threshold value Vtha2, and a first output reduction OR gate that outputs an output reduction signal to the output switching circuit 32 if the logical sum of the signal and the second output reduction signal is calculated and at least one of the first and second output reduction signals is output. 33 is the second output It is provided on the lower means.

  The first discharge lamp abnormality detection circuit 30A includes voltage dividing resistors R29 and R30 for dividing the lamp voltage, a capacitor C19 having one end connected to a connection point between the voltage dividing resistors R29 and R30, and a cathode connected to the other end of the capacitor C19. And a diode D14 whose anode is connected to the ground, a diode D13 whose anode is connected to the cathode of the diode D12, and a parallel circuit of a resistor R31 and a capacitor C18 inserted between the cathode of the diode D13 and the ground The detection voltage Va1 corresponding to the peak-to-peak value of the lamp voltage is output from both ends of the capacitor C18.

  On the other hand, the second discharge lamp abnormality detection circuit 30B includes an integration circuit of a resistor R33 and a capacitor C20 for integrating the lamp voltage, a diode D15 having an anode connected to one end of the capacitor C20, and a cathode and a ground of the diode D15. A resistor R34 inserted into the diode D15, a Zener diode ZD1 whose anode is connected to the anode of the diode D15 and whose cathode is connected to the base of a pnp bipolar transistor (hereinafter abbreviated as "transistor") Q6, and the collector of the transistor And a resistor R32 inserted between the cathode of the diode D15, a capacitor C21 and a resistor R35 connected in parallel between the emitter and base of the transistor Q6, and a reference voltage Vref2 is applied to the collector of the transistor Q6. ing. A voltage corresponding to the direct current component included in the lamp voltage is generated at both ends of the capacitor C20 of the integrating circuit, and the direct current component is hardly included in the lamp voltage when the normal discharge lamp 6 is lit. The voltage across C20 is approximately 0V. When the emitter of the filament is consumed and half-wave discharge occurs in the discharge lamp 6, if the direct-current component due to the half-wave discharge is positive with respect to the ground, a direct-current voltage corresponding to the direct-current component is applied across the capacitor C20. Is generated, and a detection voltage Va2 obtained by dividing the DC voltage by the resistors R33 and R34 and the diode D15 is output to the second output decrease signal generation circuit 31B. If the DC component due to the half-wave discharge is a negative potential with respect to the ground, the voltage across the capacitor C20 increases and exceeds the difference between the reference voltage Vref2 and the Zener voltage Vzd of the Zener diode ZD1 (= Vref2-Vzd). When the voltage divided by the resistors R33 and R35 becomes equal to or higher than the base-emitter voltage Vbe of the transistor Q6, the transistor Q6 is turned on, and the detection voltage Va2 obtained by dividing the reference voltage Vref2 by the resistors R32 and R34 decreases the second output. The signal is output to the signal generation circuit 31B.

  The first output reduction signal generation circuit 31A compares the detection voltage Va1 output from the first discharge lamp abnormality detection circuit 30A with a predetermined threshold value Vtha, and outputs the first output when the detection voltage Va1 is equal to or higher than the threshold value Vtha. A lowering signal is output to the OR gate 33. The second output decrease signal generation circuit 31B compares the detection voltage Va2 output from the second discharge lamp abnormality detection circuit 30B with the first or second threshold values Vtha1 and Vtha2 (> Vtha1), and detects the detection voltage Va1. Is equal to or higher than the threshold values Vtha1 and Vtha2, the second output reduction signal is output to the OR gate 33. The first and second output decrease signal generation circuits 31A and 31B are both prohibited from outputting an output low signal by the second mask circuit 40 until the start period ends. Further, in the second output decrease signal generation circuit 31B, the threshold is set to the second threshold Vtha2 only during the period after the output of the output decrease signal is permitted from the second mask circuit 40 until the sweep period ends. During this period, the threshold value is the first threshold value Vtha1.

  FIG. 6 is a waveform diagram for explaining the operation of the present embodiment. Like FIG. 2 and FIG. 4, (a) shows the output voltage detection value Vx of the chopper circuit 1 detected by the chopper output voltage detection circuit 21, (B) is the output voltage Vo of the inverter circuit 3, (c) is the oscillation frequency f of the inverter circuit 3, (d) is the detection value Va1 detected by the first discharge lamp abnormality detection circuit 30A, and (e) is the first value. The detection values Va2 detected by the second discharge lamp abnormality detection circuit 30B are shown. However, the basic operation is the same as that of the second embodiment, and the description is omitted.

  Here, the operation when the trigger signal indicating the start of the lighting period is output from the timer circuit 12 will be described. Since the switching element Q5 of the preheating circuit 50 is on during the starting period, a sufficient preheating current is supplied to the filament of the discharge lamp 6, and when the switching element Q5 is turned off after the starting period ends, the preheating current is generated. Suddenly suppressed. At this time, the spot (bright spot) of the filament becomes unstable, and a direct current component may be generated in the lamp voltage until the spot is stabilized, but this direct current component disappears after the spot is stabilized. It is not desirable to detect with the discharge lamp abnormality detection circuit 30B. In the present embodiment, since the threshold value of the second output decrease signal generation circuit 31B is changed to the relatively large second threshold value Vtha2 only during the sweep period, the spot is unstable during the sweep period as described above. It is possible to prevent erroneous detection of the direct current component generated in the above.

  As described above, in the present embodiment, the second discharge lamp abnormality detection circuit 30B and the second discharge lamp abnormality detection circuit 30B that detect the DC component included in the lamp voltage are detected with respect to the second embodiment. A second output reduction signal generation circuit 31B that outputs a second output reduction signal when the detection value Va2 exceeds a predetermined threshold value Vtha2, and a logical sum of the first output reduction signal and the second output reduction signal If at least one of the first and second output reduction signals is output by calculation, an OR gate 33 that outputs an output reduction signal to the output switching circuit 32 is provided in the second output reduction means. Therefore, the end-of-life state of the discharge lamp 6 (filament Emires state) can be reliably detected and the inverter circuit 3 can be stopped, and the safety of the discharge lamp lighting device can be improved.

(Embodiment 4)
FIG. 7 shows a schematic circuit configuration of the discharge lamp lighting device of the present embodiment. However, since the basic configuration of the present embodiment is the same as that of the second embodiment, the same components are denoted by the same reference numerals and description thereof is omitted.

  In the present embodiment, the inverter control signal generation circuit 10, the drive circuit 11, the timer circuit 12, a part of the feedback circuit 13 (a part excluding the resistors R27 and R28 and the capacitor C16), the output reduction switching circuit 20, and the first mask circuit. 22, the output reduction signal generation circuit 31, the output switching circuit 32, the second mask circuit 40, and the preheating control circuit 51 are configured as one integrated circuit IC 1, and three terminals Rp and Rs connected to the inverter control signal generation circuit 10. , Ro are connected to resistors R22 to R25. However, the capacitor C15 connected to the resistors R23 and R25 in the second embodiment is connected between the sweep control terminal Ts provided in the integrated circuit IC1 and the ground.

  FIG. 8A shows a specific circuit configuration diagram of the inverter control signal generation circuit 10. The inverter control signal generation circuit 10 is turned on / off according to the output from the timer circuit 12 and the lighting frequency setting circuit 42 that determines the oscillation frequency f of the inverter circuit 3 according to the outputs of the timer circuit 12 and the sweep circuit 14. Three control switch elements SW11, SW12, and SW13, and a signal conversion circuit 45 that generates an inverter control signal corresponding to the signal from the lighting frequency setting circuit 42 by the on / off operation of the control switch elements SW11, SW12, and SW13; And the external capacitor C15 and the sweep circuit 14 that constitutes the sweep means, and a stable reference power source created by the reference power source circuit 46 included in the integrated circuit IC1 is used as the operating power source for each of the circuits 42, 45, and 14. Have been supplied. In the present embodiment, the lighting frequency setting circuit 42 and the signal conversion circuit 45 constitute a frequency setting unit.

  The lighting frequency setting circuit 42 mainly includes an operational amplifier OP2 and an npn-type bipolar transistor (hereinafter referred to as a transistor) Q7 whose base is connected to the output terminal of the operational amplifier OP2 via a resistor. The emitter of the transistor Q7 Is connected in series to external resistors R24 and R25 via a terminal Ro to form a buffer circuit, and a voltage substantially equal to the output signal of the sweep circuit 14 input to the non-inverting input terminal of the operational amplifier OP2 is applied to the transistor. It occurs on the emitter side of Q7.

  The signal conversion circuit 45 is set by mirror circuits M1, M2, and M3 for converting the output current of the lighting frequency setting circuit 42 (current flowing through the terminal Ro) at a predetermined ratio, the voltage across the external capacitor Cpls, and the transfer gate circuit. A comparator CP1 for comparing the threshold value Vth1 or Vth2 to be turned on, and a control switch element SW1 that is turned on / off according to an output signal of the comparator CP1, and when the control switch element SW1 is off, a mirror is provided. When the capacitor Cpls is discharged with a constant current sunk to the circuit M3 and the control switch element SW1 is ON, the capacitor is obtained by subtracting the constant current sunk to the mirror circuit M3 from the constant current sourced from the mirror circuit M2. Charges Cpls. That is, the signal conversion circuit 45 periodically switches charging / discharging of the capacitor Cpls according to the output of the comparator CP1, and outputs a periodic signal (inverter control signal) equal to the charging / discharging period to the drive circuit 11.

  The control switch element SW11 is connected between the base of the transistor Q7 and the ground, and is turned on / off by the first output signal Vt1 of the timer circuit 12. The control switch element SW12 is connected between the terminal Rs and the ground, and is turned on / off by the second output signal Vt2 of the timer circuit 12. Further, the control switch element SW13 is connected between the terminal Rp and the ground, and is turned on / off by the third output signal Vt3 of the timer circuit 12.

  Next, the operation of the inverter control signal generation circuit 10 will be described. The first output signal Vt1 of the timer circuit 12 is at the H level and the control switch element SW11 is turned on until the preceding preheating period starts after the power is turned on, and no current is supplied to the base of the transistor Q7. Therefore, the output current and output voltage of the lighting frequency setting circuit 42 become substantially zero, the current flowing through the mirror circuits M1, M2, and M3 becomes zero, and the capacitor Cpls is not charged / discharged. As a result, the inverter control signal is not output and the inverter circuit 3 is kept in a stopped state.

  When the preceding preheating period starts, the timer circuit 12 sets the first output signal Vt1 to L level, the second and third output signals Vt2 and Vt3 to H level, and sets the control switch element SW11 of the inverter control signal generation circuit 10 In addition to turning off, both control switch elements SW12 and SW13 are turned on. When the control switch element SW11 is turned off and the control switch elements SW12 and SW13 are turned on, a voltage substantially equal to the DC voltage signal input from the sweep circuit 14 to the lighting frequency setting circuit 42 is set to the lighting frequency setting circuit 42 (emitter of the transistor Q7). ) Is output. At this time, the two terminals Rs and Rp of the integrated circuit IC1 (inverter control signal generation circuit 10) are connected to the ground, and a current determined by the resistance value Rpf of R24 + (R23 × R25) / (R23 + R25) is applied to the terminal Ro. This current becomes the output current of the lighting frequency setting circuit 42. When the starting period starts, the timer circuit 12 sets both the first and third output signals Vt1 and Vt3 to the L level and the second output signal Vt2 to the H level, and the control switch of the inverter control signal generation circuit 10 The elements SW11 and SW13 are turned off and the control switch element SW12 is turned on. When the control switch elements SW11 and SW13 are turned off and the control switch element SW12 is turned on, a voltage substantially equal to the DC voltage signal input from the sweep circuit 14 to the lighting frequency setting circuit 42 is output from the lighting frequency setting circuit 42. At this time, when the terminal Rs of the integrated circuit IC1 is connected to the ground and the terminal Rp is opened, an output current determined by the resistance value Rst of R24 + {(R22 + R23) × R25} / (R22 + R23 + R25) is applied to the terminal Ro. Flowing. Further, when the lighting period starts, the timer circuit 12 sets all the first to third output signals Vt1 to Vt3 to the L level and turns off all the control switch elements SW11 to SW13 of the inverter control signal generation circuit 10. When all the control switch elements SW11 to SW13 are turned off, a voltage substantially equal to the DC voltage signal input from the sweep circuit 14 to the lighting frequency setting circuit 42 is output from the lighting frequency setting circuit 42. At this time, since the terminals Rs and Rp of the integrated circuit IC1 are opened, a current determined by the resistance value Ron of R24 + R25 flows to the terminal Ro. That is, as described in the second embodiment, the relationship of Ron <Rst <Rpf is established between the resistance values Rpf, Rst, and Ron in the preceding preheating period, the starting period, and the lighting period.

  Thus, the output current of the lighting frequency setting circuit 42, that is, the current flowing from the terminal Ro of the integrated circuit IC1 is transmitted to the other mirror circuits M2 and M3 via the mirror circuit M1 of the signal conversion circuit 45, and by this current The external capacitor Cpls is charged / discharged. The voltage across the capacitor Cpls is compared with the threshold value Vth1 or Vth2 set by the transfer gate circuit in the comparator CP1, and the control switch element SW1 is turned on / off according to the output signal of the comparator CP1. If the control switch element SW1 is off, the capacitor Cpls is discharged with a constant current sunk to the mirror circuit M3. If the control switch element SW1 is on, the mirror circuit starts from the constant current sourced from the mirror circuit M2. Capacitor Cpls is charged with a current obtained by subtracting a constant current sinked to M3. That is, the signal conversion circuit 45 periodically switches charging / discharging of the capacitor Cpls according to the output of the comparator CP1, and outputs a periodic signal (inverter control signal) equal to the charging / discharging period to the drive circuit 11. Here, the charging / discharging current of the capacitor Cpls is determined by the output current of the lighting frequency setting circuit 42, and the relationship of output current in the preceding preheating period> output current in the starting period> output current in the lighting period is established. The oscillation frequency f of the inverter circuit 3 is set to a frequency sufficiently higher than the no-load resonance frequency of the load circuit 5, the applied voltage to the discharge lamp 6 is set to a low voltage, and the oscillation frequency f is set to the no-load resonance frequency during the starting period. The oscillation frequency is such that the discharge lamp 6 can be stably lit in the lighting period after the start-up period ends (the frequency lower than the oscillation frequency in the start-up period). Can be set to

  On the other hand, as shown in FIG. 8B, the sweep circuit 14 mainly includes three constant current sources iref1, iref2, iref3, two bipolar transistors (hereinafter abbreviated as transistors) Q8, Q9, a mirror circuit M4, and a comparison circuit. It comprises a CP2, a control switch element SW15, a transfer gate circuit, a voltage dividing circuit 64, and the like. The reference power supply voltage supplied from the reference power supply circuit 46 is divided by the voltage dividing circuit 64 to generate two different threshold voltages VthA and VthB (VthB <VthA), and one threshold voltage VthA. Is input to the base of the pnp-type transistor Q9, and the other threshold voltage VthB is input to the non-inverting input terminal of the comparator CP2. Since the emitter of the transistor Q9 is connected to the base of the npn transistor Q8 and the constant current source iref1 via a resistor, the emitter voltage of the transistor Q8 and the threshold voltage VthA applied to the base of the transistor Q9 are Almost equal. Since the external capacitor C15 is connected to the emitter of the transistor Q8 via the terminal Ts and the inverting input terminal of the comparator CP2 and the mirror circuit M4 are connected, the capacitor C15 is substantially equal to the threshold voltage VthA. Charges up to voltage. The comparator CP2 compares the voltage across the capacitor C15 with the threshold voltage VthB. When the voltage across the capacitor C15 is higher than the threshold voltage VthB, the voltage across the capacitor C15 is the threshold voltage. When it is lower than VthB, an H level signal is output to the transfer gate circuit. A control switch element SW15 that is turned on / off by a signal obtained by inverting the second output signal Vt2 of the timer circuit 12 is connected between the base of the transistor Q8 and the ground. When the control switch element SW15 is off, the external capacitor C15 is charged via the transistor Q8. When the control switch element SW15 is on, the transistor Q8 does not operate, so the external capacitor C15 is not charged. The voltage between both ends is substantially 0 [V].

  FIG. 9 is a waveform diagram for explaining the operation of the sweep circuit 14. As already described, the second output signal Vt2 of the timer circuit 12 is at the H level during the preceding preheating period (t = t1 to t2) and the starting period (t = t2 to t3), and at the L level during the lighting period (t = t3). Level (see FIG. 9 (a)), and since the signal obtained by inverting the second output signal Vt2 is input to the gate of the control switch element SW15, the control switch element SW15 is turned off in the preceding preheating period and the starting period. Thus, the control switch element SW15 is turned on during the lighting period (see FIG. 9B). That is, since the control switch element SW15 is OFF during the preceding preheating period and the starting period, the external capacitor C15 is charged through the transistor Q8, and the voltage across the capacitor C15 becomes higher than the threshold value VthB (FIG. 9 (c)). Accordingly, since the output of the comparator CP2 becomes L level, a constant voltage substantially equal to the voltage across the capacitor C15 is output from the transfer gate circuit to the lighting frequency setting circuit 42 (see FIG. 9D). Then, when the second output signal Vt2 becomes L level at the end of the starting period (t = t3) (see FIG. 9A), the control switch element SW15 is turned on and current is supplied to the base of the transistor Q8. Is not supplied (see FIG. 9B), the charge of the external capacitor C15 is discharged by a constant current determined by the mirror circuit M4, and the voltage at both ends thereof decreases with a substantially constant slope (FIG. 9C). reference). Therefore, the voltage output to the lighting frequency setting circuit 42 also decreases with the same slope as the voltage across the capacitor C15, and when the voltage across the voltage falls below the threshold VthB (t = t4), the output of the comparator CP2 is H. In order to switch to the level, the transfer gate circuit outputs a constant voltage substantially equal to the threshold value VthB to the lighting frequency setting circuit 42 (see FIG. 9D). That is, since the output of the sweep circuit 14 decreases with a certain slope from the time when the lighting period starts (t = t3) to a predetermined period (t = t3 to t4), the inverter control signal generation circuit 10 changes to the drive circuit 11. Similarly, the frequency of the inverter control signal to be output decreases with a constant slope, and the sweep circuit 14 can set a sweep period in which the oscillation frequency of the inverter circuit 3 is continuously decreased.

  Thus, in this embodiment, the sweep circuit 14 having the constant current sources iref1 to iref3 and configured in the integrated circuit IC1 and the external capacitor C15 constitute the sweep means, and therefore the sweep is performed only by the capacitor C15. The operation timing of the first mask circuit 22 can be set more accurately than in the second embodiment which constitutes the means. In this embodiment, the inverter control signal is continuously lowered using the discharge current of the capacitor C15. However, the charging current of the capacitor C15 may be used. Further, since the chopper control means of the chopper circuit 1 can also be constituted by an integrated circuit, it may be included in the integrated circuit IC1 together with the inverter control signal generation circuit 10 and the like.

(Embodiment 5)
FIG. 10 shows a schematic circuit configuration of the discharge lamp lighting device of the present embodiment, and FIG. 11 shows a specific circuit configuration of the inverter control signal generation circuit 10 in the present embodiment. However, since the basic configuration of this embodiment is the same as that of the fourth embodiment, the same components are denoted by the same reference numerals and description thereof is omitted.

  This embodiment is different from the fourth embodiment in that a sweep signal generation circuit 15 is externally attached to the integrated circuit IC1 instead of the capacitor C15. The sweep signal generation circuit 15 is at a constant level higher than the threshold value VthB in the preceding preheating period (t = t1 to t2) and the starting period (t = t2 to t3) as shown in FIG. In the lighting period (t = t3), a voltage signal (sweep signal) whose level decreases with a constant gradient is output. Note that the specific circuit configuration of the sweep signal generation circuit 15 may be any configuration as long as the output signal having the waveform shown in FIG. 12B can be obtained. Thus, it becomes possible to output a highly accurate signal.

  Thus, since the sweep signal output from the sweep signal generation circuit 15 is input to the inverting input terminal of the comparator CP2 of the sweep circuit 14, it is output to the lighting frequency setting circuit 42 as described in the fourth embodiment. When the voltage of the comparator CP2 drops at the same slope as the sweep signal and the voltage at both ends thereof falls below the threshold value VthB (t = t4), the output of the comparator CP2 switches to the H level. A constant voltage substantially equal to VthB is output to the lighting frequency setting circuit 42 (see FIG. 12B). That is, during the predetermined period (t = t3 to t4) from the start of the lighting period (t = t3), the output of the sweep circuit 14 is lowered with a constant slope by the sweep signal, and the inverter control signal generation circuit 10 drives the drive. Similarly, the frequency of the inverter control signal output to the circuit 11 also decreases at a constant slope, so that the sweep period can be set by the sweep signal. In this embodiment, the configuration of the sweep circuit 14 is the same as that of the fourth embodiment. However, any other circuit configuration may be used as long as it can output a signal as shown in FIG. It doesn't matter.

(Embodiment 6)
FIG. 13 shows a schematic circuit configuration of the discharge lamp lighting device of the present embodiment, and FIG. 14 shows a specific circuit configuration of the timer circuit 12 in the present embodiment. However, since the basic configuration of this embodiment is the same as that of the fourth embodiment, the same components are denoted by the same reference numerals and description thereof is omitted.

  In the present embodiment, as in the fourth embodiment, an external capacitor C15 is connected to the terminal Ts of the integrated circuit IC1, and not only the inverter control signal generating circuit 10 but also the timer circuit 12 is connected to the terminal Ts.

  The timer circuit 12 includes a timer cycle setting circuit 411, a timer oscillation circuit 412, and an RS flip-flop circuit FF. The timer cycle setting circuit 411 mainly includes an operational amplifier OP3, an npn-type bipolar transistor (hereinafter referred to as a transistor) whose base is connected to the output terminal of the operational amplifier OP3 via a resistor, and the emitter and ground of the transistor. A buffer circuit having a resistor Rtim connected to the reference voltage is generated, and a voltage substantially equal to a voltage obtained by dividing the output voltage (reference voltage) of the reference power supply circuit 46 by a voltage dividing resistor is generated on the emitter side of the transistor. Is.

  The timer oscillation circuit 412 also includes mirror circuits M4, M5, and M6 that convert the output current of the timer cycle setting circuit 411 (current flowing through the resistor Rtim) at a predetermined ratio, the voltage across the external capacitor C15, and the transfer gate circuit TG1. A comparator CP3 that compares the threshold voltage Vths or Vtho set in step S3, and a comparator CP4 that compares the voltage across the external capacitor C15 with the threshold value Vthp or 0V set in the transfer gate circuit TG2. And a control switch element SW8 which is turned on / off according to the output signal of the comparator CP3. In the comparator CP3, the voltage across the capacitor C15 is input to the inverting input terminal, and the threshold value Vths or Vtho selectively output from one transfer gate circuit TG1 is input to the non-inverting input terminal. If the voltage at both ends is higher than the threshold value Vths or Vtho, an L level signal is output. If the voltage at both ends of the capacitor C15 is lower than the threshold value Vths or Vtho, an H level signal is output. When the output of the comparator CP3 becomes L level and the control switch element SW8 is OFF, the capacitor C15 is discharged with a constant current sunk to the mirror circuit M6, and the output of the comparator CP3 becomes L level for control. When switch element SW8 is on, capacitor C15 is charged with a current obtained by subtracting a constant current sourced from mirror circuit M5 to a constant current sinked to mirror circuit M6. On the other hand, in the comparator CP4, the voltage across the capacitor C15 is input to the inverting input terminal, and the threshold value Vths or Vtho selectively output from the other transfer gate circuit TG2 is input to the non-inverting input terminal. If the voltage at both ends of C15 is higher than the threshold value Vthp or 0, an L level signal is output. If the voltage at both ends of the capacitor C15 is lower than the threshold value Vthp or 0, an H level signal is output.

  As shown in FIG. 15, in the preceding preheating period (t = t1 to t2) and the starting period (t = t2 to t3), the control switch element SW8 is turned on and the mirror is generated from a constant current sourced from the mirror circuit M5. Since charging is performed with a current obtained by reducing the constant current sunk to the circuit M6, the voltage across the capacitor C15 rises with a certain slope (see FIG. 15A) and exceeds the threshold value Vthp of the transfer gate circuit TG2. The output signal of the comparator CP4 is switched from the L level to the H level (see FIG. 15D). At this time, since the voltage across the capacitor C15 is lower than the threshold value Vths of the transfer gate circuit TG1, the output signal of the comparator CP3 is at the H level (see FIG. 15B), and the RS flip-flop circuit FF The output signal becomes L level (see FIG. 15C). When the voltage across the capacitor C15 further rises and exceeds the threshold value Vths of the transfer gate circuit TG1 (t = t3), the output of the comparator CP3 is switched from H level to L level (see FIG. 15B). The threshold value of the transfer gate circuit TG1 is also switched from Vths to Vtho (<Vths). When the output of the comparator CP3 becomes L level, the control switch element SW8 is turned off, so that the charge of the capacitor C15 is discharged, and the voltage at both ends of the capacitor C15 decreases with a constant slope corresponding to the discharge current value determined by the mirror circuit M6. (See FIG. 15 (a)). Since the trigger signal is input to the set terminal by switching the output of the comparator CP3 from the H level to the L level, the output signal of the RS flip-flop circuit FF becomes the H level (see FIG. 15C). Further, when the voltage across the capacitor C15 falls below the threshold value Vtho of the transfer gate circuit TG1 (t = t4), the output of the comparator CP3 switches from the L level to the H level (see FIG. 15B), and the control switch The element SW8 is turned on and the charging of the capacitor C15 is resumed (see FIG. 15A).

  Therefore, if the output signal of the RS flip-flop circuit FF and the output signal of the comparator CP4 are inverted, the second and third output signals Vt2 and Vt3 in the fourth embodiment can be obtained, as described in the fourth embodiment. The inverter control signal generation circuit 10 can output an inverter control signal suitable for the preceding preheating period, the starting period, and the lighting period. Further, the voltage across the capacitor C15 is input to the sweep circuit 14 of the inverter control signal generation circuit 10, which is the same as in the fourth embodiment. In the initial stage of the lighting period (t = t3 to t4), the sweep circuit 14 Since the output decreases with a constant slope like the voltage across the capacitor C15 (see FIG. 15E), the frequency of the inverter control signal output from the inverter control signal generation circuit 10 to the drive circuit 11 is also constant. It is possible to set a sweep period in which the oscillation circuit descends with an inclination and the oscillation frequency of the inverter circuit 3 is continuously lowered by the sweep circuit 14. In addition, in the present embodiment, the charging operation of the capacitor C15 is used for the time measuring operation in the timer circuit 12, so that there is an advantage that the circuit configuration of the integrated circuit IC1 can be simplified.

(Embodiment 7)
FIG. 16 shows a specific circuit configuration of the timer circuit 12 in the present embodiment. However, since the basic configuration of the present embodiment is the same as that of the sixth embodiment, common components are denoted by the same reference numerals, and illustration and description thereof are omitted.

  As shown in FIG. 16, one transfer gate circuit TG1 is connected to the comparator CP4 and the other transfer gate circuit TG2 is connected to the comparator CP3, and a signal obtained by inverting the output signal of the comparator CP3 is obtained. In addition to the first RS flip-flop circuit FF1 input to the set terminal, the logical product of the output signal of the first RS flip-flop circuit FF1 and the output signal of the comparator CP4 is input to the set terminal as a trigger signal. The RS flip-flop circuit FF2 is provided, and the control switch element SW9 that is turned on / off by the output of the first RS flip-flop circuit FF1 is connected between the output terminal of the comparator CP3 and the ground. This is the main difference from the timer circuit 12 in the sixth embodiment.

  As shown in FIG. 17, in the preceding preheating period (t = t1 to t2), the control switch element SW8 is turned on to reduce the constant current sunk to the mirror circuit M6 from the constant current sourced from the mirror circuit M5. Since the voltage at both ends of the capacitor C15 rises with a constant slope (see FIG. 17A) and exceeds the threshold value Vthp of the transfer gate circuits TG1 and TG2, the outputs of the comparators CP3 and CP4 Both signals are switched from the H level to the L level (see FIGS. 17B and 17C). Since the trigger signal is input to the set terminal by switching the output of the comparator CP3 from the H level to the L level, the output signal of the first RS flip-flop circuit FF1 becomes the H level (FIG. 17D). reference). At this time, since the output of the first RS flip-flop circuit FF1 becomes H level, the control switch element SW9 is turned on, and the output of the comparator CP3 is connected to the ground via the control switch element SW9. The control switch element SW8 is turned off, and the charge of the capacitor C15 is discharged, and the voltage at both ends of the capacitor C15 decreases with a constant slope corresponding to the discharge current value determined by the mirror circuit M6 (see FIG. 17A). Further, since the output of the first RS flip-flop circuit FF1 becomes H level and the output of the comparator CP4 becomes L level, the output of the second RS flip-flop circuit FF2 remains L level (FIG. 17 (e) )reference). When the voltage across the capacitor C15 decreases and falls below the threshold Vtho of the transfer gate circuit TG2 (t = t3), the output of the comparator CP4 switches from L level to H level (see FIG. 17C). When the output of the comparator CP4 becomes H level, the trigger signal is input to the set terminal, so that the output signal of the second RS flip-flop circuit FF2 is switched from L level to H level (see FIG. 17E).

  Therefore, if the output signals of the first and second RS flip-flop circuits FF1 and FF2 are inverted, the third and second output signals Vt3 and Vt2 in the fourth embodiment are obtained, as described in the fourth embodiment. The inverter control signal generation circuit 10 can output an inverter control signal suitable for the preceding preheating period, the starting period, and the lighting period. Further, the point that the voltage across the capacitor C15 is input to the sweep circuit 14 of the inverter control signal generation circuit 10 is the same as that of the fourth embodiment, and the sweep circuit 14 has an initial value during the lighting period (t = t3 to t4). Since the output decreases at a constant slope like the voltage across the capacitor C15 (see FIG. 17 (f)), the frequency of the inverter control signal output from the inverter control signal generation circuit 10 to the drive circuit 11 is also constant. It is possible to set a sweep period in which the oscillation circuit descends with an inclination and the oscillation frequency of the inverter circuit 3 is continuously lowered by the sweep circuit 14. In the present embodiment, the charging operation of the capacitor C15 is used for the time measuring operation in the timer circuit 12 as in the sixth embodiment, so that there is an advantage that the circuit configuration of the integrated circuit IC1 can be simplified.

(Embodiment 8)
FIG. 18 shows a schematic circuit configuration of the discharge lamp lighting device of the present embodiment. However, since the basic configuration of the present embodiment is the same as that of the fifth embodiment, the same components are denoted by the same reference numerals and description thereof is omitted.

  The sweep signal generation circuit 15 in the present embodiment is configured by a microcomputer, a non-volatile memory, and the like. As described in the fifth embodiment, the sweep signal generation circuit 15 has a constant level during the preceding preheating period and the start-up period, and is constant during the lighting period. A sweep signal whose level decreases with the inclination of the output is generated and output to the sweep circuit 14 of the inverter control signal generation circuit 10, and the dimming ratio when the discharge lamp 6 is dimmed (the rated lighting is 100%) A dimming signal designating the ratio of the light output at the time). The sweep signal generation circuit 15 generates a dimming signal when a command is given from a dimmer (not shown), for example.

  The dimming signal generated by the sweep signal generation circuit 15 is converted into a DC voltage signal (dimming reference voltage signal) having a voltage level corresponding to the dimming ratio by the reference voltage generation circuit 16 to constitute the feedback circuit 13. It is input to the non-inverting input terminal of the operational amplifier OP1. Therefore, the discharge lamp 6 can be dimmed with the dimming ratio specified by the feedback circuit 13 performing feedback control according to the dimming reference voltage signal.

  By the way, it has already been explained that a ripple voltage is generated at the output of the chopper circuit 1 due to fluctuations in the load of the chopper circuit 1 after the start-up period, and the reset function may malfunction due to the ripple voltage. When the discharge lamp 6 is dimmed, the level of the ripple voltage generated at the output of the chopper circuit 1 because the power consumption of the load is smaller than when the discharge lamp 6 is rated-lit immediately after starting. Becomes relatively small. Therefore, the malfunction of the reset function can be prevented even if the sweep period is shorter than in the case of rated lighting.

  Therefore, in the present embodiment, the sweep signal generation circuit 15 generates a sweep signal such that the level in the preceding preheating period and the start period decreases as the dimming ratio decreases. As a result, in the sweep circuit 14, The sweep period for dimming lighting (period t = t3 to t4 ′ in FIG. 19B) is shorter than the sweep period for rated lighting (period t = t3 to t4 in FIG. 19A). Become. Here, instead of the timer circuit 12, the sweep signal generation circuit 15 gives a trigger signal indicating the start of the preceding preheating period and a trigger signal indicating the end of the sweep period to the first mask circuit 22, and the second A trigger signal indicating the start of the preceding preheating period and a trigger signal indicating the start of the lighting period are given to the mask circuit 40.

  Therefore, the period during which the output reduction switching circuit 20 is prohibited from outputting the output reduction signal by the first mask circuit 22 is shorter in the case of dimming lighting than in the case of rated lighting. While preventing the occurrence of a malfunction due to the generated ripple voltage, it is possible to work a reset function against an instantaneous drop in the AC power supply voltage in a relatively short time after the discharge lamp 6 is started.

  Note that the sweep signal generation circuit 15 may generate a sweep signal that shortens the sweep period in proportion to the dimming ratio, or the sweep period is gradually shortened below a predetermined dimming ratio. A sweep signal may be generated.

  By the way, the discharge lamp lighting device of Embodiment 1-8 is used with the fixture main body fixed to construction surfaces, such as a ceiling, and the socket with which the discharge lamp 6 is mounted | worn with a fixture main body, and comprises a lighting fixture. It is possible. However, since the structure of such a lighting fixture is well known in the art, illustration and description thereof are omitted.

1 is a schematic circuit configuration diagram of Embodiment 1. FIG. It is a wave form diagram for operation explanation same as the above. 6 is a schematic circuit configuration diagram of Embodiment 2. FIG. It is a wave form diagram for operation explanation same as the above. 6 is a schematic circuit configuration diagram of Embodiment 3. FIG. It is a wave form diagram for operation explanation same as the above. FIG. 6 is a schematic circuit configuration diagram of a fourth embodiment. (A) is a circuit block diagram of the inverter control signal generating circuit in the above, and (b) is a circuit block diagram of the sweep circuit in the above. It is a wave form diagram for operation explanation same as the above. 10 is a schematic circuit configuration diagram of Embodiment 5. FIG. It is a circuit block diagram of the inverter control signal generation circuit same as the above. It is a wave form diagram for operation explanation same as the above. 10 is a schematic circuit configuration diagram of Embodiment 6. FIG. It is a circuit block diagram of the timer circuit in the same as the above. It is a wave form diagram for operation explanation same as the above. FIG. 10 is a circuit configuration diagram of a timer circuit in a seventh embodiment. It is a wave form diagram for operation explanation same as the above. FIG. 10 is a schematic circuit configuration diagram of an eighth embodiment. It is a wave form diagram for operation explanation same as the above. It is a block diagram which shows a prior art example. It is a circuit block diagram which shows the chopper circuit and chopper control circuit in the same as the above. It is a circuit block diagram which shows the inverter circuit and inverter control circuit in the same as the above. (A) is a circuit diagram which shows the principal part of another prior art example, (b) is a wave form diagram for operation | movement description. It is a wave form chart for explaining operation of other conventional examples. (A) (b) is a wave form diagram for operation explanation same as the above.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Boost chopper circuit 3 Inverter circuit 5 Load circuit 6 Discharge lamp 10 Inverter control signal generation circuit 11 Drive circuit 12 Timer circuit 20 Output reduction switching circuit 21 Chopper output voltage detection circuit 22 First mask circuit 30 Discharge lamp abnormality detection circuit 31 Output Decrease signal generation circuit 32 Output switching circuit 40 Second mask circuit C15 capacitor (sweep means)

Claims (14)

A rectifier that rectifies an AC power source, an inductor, a smoothing capacitor, and a switching element, a chopper circuit that converts the output voltage of the rectifier into a desired DC voltage, and one or more switching elements that switch the switching element An inverter circuit that converts the output of the chopper circuit into high-frequency power, and a load circuit that includes one or more inductors and capacitors to turn on the discharge lamp by a resonant action of the high-frequency power output from the inverter circuit; By changing the switching frequency of the switching element provided in the inverter circuit, the inverter circuit is changed from a pre-preheating state in which the filament of the discharge lamp is pre-heated to a lighting state in which the discharge lamp is stably lit through a starting state in which a starting voltage is applied to the discharge lamp. Inverter that sequentially switches the operating state of And the inverter circuit by detecting the output voltage of the chopper circuit and resetting the operating state of the inverter circuit from the lighting state to the preceding preheating state or the starting state when the detected value falls below the first threshold value. Operation of the first output lowering means for reducing the output of the inverter circuit, the second output lowering means for lowering the output of the inverter circuit when the abnormality of the physical quantity representing the state of the discharge lamp is detected, and the operation of the first output lowering means A first mask means for prohibiting the operation, a second mask means for prohibiting the operation of the second output reduction means, and a switching element provided in the inverter circuit when the operation state of the inverter circuit is switched from the starting state to the lighting state. Sweeping means for stepwise or continuously changing the switching frequency of the first masking means from the preceding preheating state. In the period until the operation is almost completed, the operation of the first output lowering means is prohibited, and the second mask means is in the period until the operation of the sweeping means is completed from the preceding preheating state through the starting state. Discharging lamp lighting device characterized in that operation of output reduction means is prohibited and operation of second output reduction means is permitted before first mask means permits operation of first output reduction means .   Feedback that detects a current flowing through at least one switching element included in the inverter circuit and changes the switching frequency of the switching element included in the inverter circuit to the inverter control means so that the detected value becomes a desired value. 2. The discharge lamp lighting device according to claim 1, further comprising: a control unit; and a feedback mask unit that prohibits the operation of the feedback control unit from the preceding preheating state to the completion of the starting state.   A preheating circuit for supplying a preheating current to the filament of the discharge lamp; and a preheating control means for controlling the preheating circuit to adjust the preheating current. 3. The discharge lamp lighting device according to claim 1, wherein the preheating current is supplied until the end of the state, and the preheating circuit is controlled so as to suppress the preheating current after the end of the starting state. The second output reduction means outputs a discharge reduction signal when the detected value detected by the discharge lamp abnormality detection unit exceeds a predetermined threshold value, and a discharge lamp abnormality detection unit that detects the voltage across the discharge lamp. An output lowering signal generator, and an output switching unit that lowers the output of the inverter circuit in the inverter control means when receiving the output lowering signal from the output lowering signal generator. A period between the first threshold value and a second threshold value greater than the first threshold value, and after the second mask means permits the operation of the second output reduction means until the operation of the sweep means is completed The discharge lamp lighting device according to any one of claims 1 to 3, wherein the threshold value is a second threshold value, and the threshold value is a first threshold value during other periods.   The second output reduction means detects an abnormality of the discharge lamp based on a peak value of the voltage across the discharge lamp and a DC component contained in the voltage across the voltage. The discharge lamp lighting device described.   The second output lowering means includes a first discharge lamp abnormality detecting unit that detects one physical quantity representing the state of the discharge lamp, and a second discharge lamp abnormality detecting unit that detects another physical quantity representing the state of the discharge lamp. A first output reduction signal generating unit that outputs a first output reduction signal when a detection value detected by the first discharge lamp abnormality detection unit exceeds a predetermined threshold, and a second discharge lamp abnormality A second output reduction signal generator that outputs a second output reduction signal when a detection value detected by the detection unit exceeds a predetermined threshold, and a first one from the first or second output reduction signal generator. Or an output switching unit that reduces the output of the inverter circuit in the inverter control means when receiving the second output reduction signal, and at least one of the first and second output reduction signal generation units is the threshold value As a first threshold and a second threshold greater than the first threshold And the second mask means allows the operation of the second output reduction means, and then sets the threshold as the second threshold during a period until the operation of the sweep means is completed, and sets the threshold as the other threshold during other periods. 6. The discharge lamp lighting device according to claim 4 or 5, wherein the first threshold value is used.   The discharge lamp lighting according to any one of claims 1 to 6, wherein the second mask means prohibits the operation of the second output lowering means in a period from the preceding preheating state to the end of the starting state. apparatus.   The inverter control means, the first output reduction means, the second output reduction means, the first mask means, and the second mask means are composed of one integrated circuit, and the inverter control means precedes the operating state of the inverter circuit. Preliminary preheating period for preheating state, starting period for starting state, timer section for timing lighting period for lighting state and outputting signal corresponding to each period, and inverter circuit according to output signal of timer circuit A frequency setting unit that sets a switching frequency of the switching element to a frequency corresponding to each period, and the sweep means has a frequency according to a change in the voltage across the capacitor accompanying charging or discharging of a capacitor externally attached to the integrated circuit. The discharge lamp lighting device according to any one of claims 1 to 7, wherein the frequency set by the setting unit is swept.   The inverter control means, the first output reduction means, the second output reduction means, the first mask means, and the second mask means are composed of one integrated circuit, and the inverter control means precedes the operating state of the inverter circuit. Preliminary preheating period for preheating state, starting period for starting state, timer section for timing lighting period for lighting state and outputting signal corresponding to each period, and inverter circuit according to output signal of timer circuit And a frequency setting unit that sets the switching frequency of the switching element to a frequency corresponding to each period, and the sweep means outputs a DC voltage that rises or falls immediately after the start of the lighting period according to the output signal of the timer unit 2. A sweep signal generating circuit that sweeps a frequency set by a frequency setting unit in accordance with a change in the DC voltage. The discharge lamp lighting device according to any one of 7.   The inverter control means, the first output reduction means, the second output reduction means, the first mask means, and the second mask means are constituted by one integrated circuit, and the inverter control means precedes the operating state of the inverter circuit. Preliminary preheating period for preheating state, starting period for starting state, timer section for timing lighting period for lighting state and outputting signal corresponding to each period, and inverter circuit according to output signal of timer circuit And a frequency setting unit that sets the switching frequency of the switching element to a frequency corresponding to each period, and the timer unit counts the preceding preheating period and the starting period by charging a capacitor externally attached to the integrated circuit. At the same time, the capacitor is discharged after the start-up period, and the sweep means sets the frequency according to the change in the voltage across the capacitor accompanying the discharge of the capacitor. The discharge lamp lighting device according to any one of claims 1 to 7, characterized in that to sweep the frequency set in parts.   The inverter control means, the first output reduction means, the second output reduction means, the first mask means, and the second mask means are constituted by one integrated circuit, and the inverter control means precedes the operating state of the inverter circuit. Preliminary preheating period for preheating state, starting period for starting state, timer section for timing lighting period for lighting state and outputting signal corresponding to each period, and inverter circuit according to output signal of timer circuit A frequency setting unit that sets the switching frequency of the switching element to a frequency corresponding to each period, and the timer unit counts the preceding preheating period by charging a capacitor externally attached to the integrated circuit, and the capacitor The sweep period is measured by the frequency setting unit according to the change in the voltage across the capacitor accompanying the discharge of the capacitor. The discharge lamp lighting device according to any one of claims 1 to 7, characterized in that sweeping the frequency to be constant.   The inverter control means increases or decreases the high-frequency power output from the inverter circuit in the lighting state in accordance with a dimming ratio command given from the outside, and the sweep means controls the high-frequency power from the inverter control means based on the dimming ratio. The discharge lamp lighting device according to any one of claims 2 to 11, wherein the sweep period is shortened in the case of reducing the sweep period.   The sweep means outputs a trigger signal for prohibiting and permitting the operation of the first output reduction means for the first mask means, and the operation of the second output reduction means for the second mask means. 13. The discharge lamp lighting device according to claim 12, wherein a trigger signal for prohibiting and permitting is output.   The appliance main body fixed to the construction surface, the socket provided in the appliance main body to which the discharge lamp is mounted, and the discharge lamp is turned on by supplying high-frequency power through the socket. A lighting fixture comprising the discharge lamp lighting device described above.

Images