JP2868241B2 - Discharge lamp lighting device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a discharge lamp lighting device for lighting a discharge lamp with high frequency power.

[Prior Art] FIG. 9 shows a conventional discharge lamp dimming lighting device (Japanese Patent Application No. 1-7575).
2) is a block diagram. The lighting device includes a low-pressure mercury discharge lamp 1, a high-frequency power supply 2 for supplying high-frequency power to the discharge lamp 1, a dimming control unit 3 for dimming the discharge lamp 1 from an arc discharge region to a glow discharge region, DC power superimposing means 4 for superimposing DC power at a level capable of maintaining discharge during low light flux dimming on the high frequency power and applying the superimposed DC power to the discharge lamp 1, and is capable of dimming to a low light flux (deep dimming level) It is what it was. Note that in FIG. 9, the control signal from the dimming control unit 3 which controls the discharge lamp 1 dimming high frequency power source 2, the impedance element Z _1, Z _2, has been inputted to the DC power source 5, all of these It is not always necessary to input a control signal.

By the way, in the above-described circuit, a DC current is applied to the discharge lamp 1 even at a dimming level (relative illuminance ratio of 20% or more) at which there is no fear of the discharge lamp 1 going out. Problems arise. Therefore, it is more preferable to detect the relative illuminance ratio of the discharge lamp 1 by some means and to add a circuit for cutting a direct current at a dimming level at which there is no fear of extinguishing. An example of such a circuit is shown in FIG. In this circuit, a lamp current is detected as a means for detecting a relative illuminance ratio. A current transformer is inserted in the lamp current path in series, the lamp current is detected by a lamp current detection circuit 46, and when the lamp current is large, a switching circuit 44 is opened by a switching control circuit 45 to superimpose DC power. Stop.
When the lamp current is small, the switching control circuit 45 closes the switching circuit 44 to superimpose DC power. AC voltage of commercial AC power supply Vs is DC conversion circuit
The DC voltage is converted to a DC voltage by 21, the RF voltage is converted to a high frequency voltage by a high frequency conversion circuit 22,
, And to both filaments of the discharge lamp 1 via the preheating circuit 24. The high-frequency voltage obtained from the high-frequency conversion circuit 22 is a DC conversion circuit.
The voltage is converted into a DC voltage by 41 and when the switching circuit 44 is closed, a DC voltage is applied to both ends of the discharge lamp 1 via the impedance element 42 and the diode 43.

[Problems to be Solved by the Invention] In the conventional example shown in FIG. 10 described above, the switching circuit 44 for direct-current power control is connected in parallel to the discharge lamp 1, so that when the discharge lamp 1 is started, However, a high voltage sufficient for the starting voltage is applied to the switching elements of the switching circuit 44, and there is a problem that a high-voltage switching element is required.

The present invention has been made in view of such a point,
An object of the present invention is to reduce a stress applied to a DC power control switching element when a discharge lamp is started in a discharge lamp lighting device configured to supply high frequency power and DC power to the discharge lamp.

[Means for Solving the Problems] In the present invention, in order to solve the above problems, as shown in FIG. 1, a low-pressure mercury discharge lamp 1 and the discharge lamp 1
A high-frequency power supply 2 for supplying high-frequency power to the power supply, a dimming control unit for controlling the high-frequency power supplied to the discharge lamp 1 by the high-frequency power supply 2, and the discharge of the discharge lamp 1 at the time of low luminous flux dimming can be maintained A DC power superimposing means for superimposing a DC power of a level on the high-frequency power and applying the DC power to the discharge lamp 1, wherein an impedance element Z interposed between the discharge lamp 1 and the high-frequency power supply 2. _1, the discharge lamp 1 and the DC power control switching elements SW ₁ to be interposed between the DC power superposing means, the starting of the DC power control switching elements SW ₁ and parallel connected to the discharge lamp 1 Over-voltage protection switching element
SW ₂ is provided.

It is also possible to share the direct current power control switching element SW ₁ and the over-voltage prevention switching element SW _2.

Moreover, over-voltage prevention switching element SW ₂ may zener diode, or an avalanche diode, or be passive overvoltage protection device such as a surge absorber. The breakdown voltage of the passive overvoltage protection element may be set to be equal to or lower than the lamp starting voltage and equal to or higher than the lamp lighting voltage.

In the [Operation] The present invention, thus, parallel to connect the overvoltage prevention switching element SW ₂ and the DC power control switching element SW _1, the switching element S for this overvoltage protection
Since the W ₂ and so as to conduct during start-up the discharge lamp 1, it is possible to prevent the stress is applied to the DC power control switching element SW _1.

Incidentally, also serves as a DC power control switching element SW ₁ and the over-voltage prevention switching element SW _2, the same effect can be obtained by controlled so as to conduct the DC power control switching element SW ₁ at the time of starting the discharge lamp 1 .

Further, as the over-voltage prevention switching element SW _2, Using passive overvoltage protection device, the control circuit of an overvoltage prevention switching element SW ₂ is not required, the structure is simplified.

Embodiment 1 FIG. 2 is a circuit diagram of a main circuit in a first embodiment of the present invention, and FIG. 3 is a circuit diagram of a control circuit thereof. The commercial AC power supply Vs is connected to an AC input terminal of the diode bridge DB1. Capacitor C ₁ is connected to the DC output ends of the diode bridge DB1. A series circuit of MOS transistors Q ₁ and Q ₂ is connected in parallel to both ends of the capacitor C ₁ . One end of the high-frequency transformer T ₂ is connected to both ends of the MOS transistor Q ₂ via a DC component cutting capacitor C _3.
Secondary winding is connected and inductor with secondary winding
Power-supply-side terminals of the filament lamp 1 through T ₃ are connected. Between the non-power supply side terminal of the discharge lamp 1 filament, resonance and the capacitor C ₄ for preheating current supply are connected in parallel. Secondary winding output of the high-frequency transformer T ₂ are, is rectified by the diode D _1, is smoothed by the capacitor C _6, a DC voltage is obtained. This capacitor C ₆ is connected to one end of the discharge lamp 1 via the inductor L ₁ and
Discharge lamp 1 via diode D ₂ and MOS transistors Q ₃ and Q ₄
Is connected to the other end. The inductor L ₁ is a high frequency blocking, high-frequency voltage applied to the discharge lamp 1 is prevented from leaking to the capacitor C _6. The inductor T _{3 and} the capacitor C _{4 form an} LC series resonance circuit,
It is intended for lighting start the discharge lamp 1 by a resonance voltage generated at both ends of the C _4. Capacitor C ₃ is a DC blocking, sufficiently large capacity than the capacitor C _4, it does not contribute to the resonance. Secondary winding of inductor T ₃ is connected to the AC input terminal of the diode bridge DB3. The DC output ends of the diode bridge DB3, capacitor C ₅ and the resistor R ₁
Is connected, and the voltage Vc according to the resonance current is
Generate h. This voltage Vch is supplied to the control circuit via the terminal “g”.

Commercial AC power source Vs is stepped down through the transformer T ₁ is connected to the AC input terminal of the diode bridge For DB2, the DC output ends of the diode bridge DB2 is connected a parallel circuit of a capacitor C ₂ and the Zener diode ZD ₁ is. Capacitor C ₂
Is supplied to the control circuit via the terminal "f".

MOS transistor to Q ₁ terminal a connected between the gate and source, between b, the first control signal is supplied. Also, M
OS between the transistor and the terminal c connected to the gate Q ₂ 'grounding point, the second control signal is supplied. The first control signal and the second control signal are not simultaneously at the “High” level, and are in the first period in which the first control signal is at the “High” level and the second control signal is at the “Low” level. And the first and second
A second period during which the control signals are simultaneously at the “Low” level;
When the first control signal is “Low” level and the second control signal is “Hi”
The third period in which the "gh" level is set and the fourth period in which the first and second control signals are simultaneously set in the "Low" level are repeated in the same order.

In the first period, MOS transistor Q ₁ is turned on, MOS transistor Q ₂ is turned off, from the positive terminal of the capacitor C _1,
MOS transistor Q ₁ , DC component cut capacitor
C _3, the load circuit including a high-frequency transformer T ₂ and the discharge lamp 1, a current flows in the path through the negative terminal of the capacitor C _1. In the second period, the MOS transistors Q ₁ and Q ₂ are simultaneously turned off, and the oscillating current of the load circuit flows through the built-in anti-parallel diode parasitic between the drain and source of the MOS transistor Q ₂ . In the third period, MOS transistor Q ₁ is turned off, MOS transistor Q ₂ is turned on, so that the capacitor C ₃ for the DC component cutting power supply, MOS transistor Q ₂ from the capacitor C _3, via the load circuit capacitor current flows through a path back to C _3. In the fourth period, the MOS transistors Q ₁ and Q ₂ are simultaneously turned off, and the oscillating current of the load circuit flows through the built-in anti-parallel diode parasitic between the drain and the source of the MOS transistor Q ₁ . Thus, a high-frequency alternating current flows through the load circuit. Note that the switching frequency of the MOS transistors Q ₁ and Q ₂ is generally set slightly higher than the natural oscillation frequency of the load circuit.

Between the MOS transistor Q terminal d and a ground point that is connected to the gate of _3, the third control signal is supplied. This third
MOS transistor Q ₃ by the control signal becomes conductive during a low luminous flux level, so to superimpose a direct current power to the discharge lamp 1, the discharge lamp 1 is less likely to lighting failure. Also, MOS transistor Q
_Between the terminal e connected to the gate of No. 4 and the ground point, the fourth
Are supplied. This fourth control signal allows MO
S transistor Q ₄ are becomes conductive when starting the discharge lamp 1, it is possible to prevent the high voltage for starting is applied at the start of the discharge lamp 1 to the MOS transistor Q _3.

Next, the configuration of a control circuit that supplies the first to fourth control signals to the main circuit (see FIG. 3) will be described.
DC low voltage Vcc obtained in the capacitor C ₂ of the main circuit is supplied as an operation power supply voltage through the terminal f to the control circuit. The timer circuits IC ₁ and IC ₂ and the oscillating circuit IC ₃ operate with the low DC voltage Vcc.

First, the timer circuit IC ₁ is composed of a general-purpose integrated circuit (NE555 made by Signetique) and has a trigger terminal (pin 2)
Is lower than (1/3) Vcc or less, the output terminal (3rd pin) is triggered and the discharge terminal (7th pin) becomes high impedance. When the threshold terminal (Pin 6) becomes (2/3) Vcc, the output terminal (3
Pin becomes “Low” level and discharge terminal (pin 7)
Also at the “Low” level. A DC low voltage Vcc is applied between the power supply terminal (8th pin) and the ground terminal (1st pin). The reset pin (pin 4) is connected to a power supply terminal (8 pin), a frequency control terminal (pin 5) is connected to the ground terminal (pin 1) via a decoupling capacitor C ₁₂ Have been. Timer circuit IC
The series circuit of a resistor R ₁₂ and capacitor C ₁₁ constituting a time constant circuit _1, a low DC voltage Vcc is applied. Resistance R ₁₂
A connecting point of the capacitor C ₁₁ is connected to the threshold terminal of the timer circuit IC ₁ (6 pin), the resistance R ₁₃
It is connected to the discharge terminal (pin 7) through which the timer circuit IC ₁ 'is intended to operate as a monostable multivibrator.

When the commercial AC power supply Vs in the main circuit is turned on, the terminal f
DC undervoltage Vcc rises applied to the resistance by the capacitor C ₁₀ is charged via R _10, flows current instantaneously between the base and emitter of the transistor Q _10, the transistor Q ₁₀ is momentarily It turns on. Therefore, the potential at the connection point of the resistors R ₁₁ and transistor Q ₁₀ is instantaneously reduced, the trigger terminal (pin 2) becomes the "Low" level, the monostable multivibrator is triggered.
Thereafter, the threshold terminal at a time constant of the capacitor C ₁₁ and resistor R ₁₂ (6 pin) reaches a predetermined threshold voltage Vth = (2
/ 3) Until Vcc, the output terminal (3rd pin) keeps “High” level. When the voltage of the capacitor C ₁₁ reaches a threshold voltage Vth, the output terminal (pin 3) becomes "Low" level, the discharge terminal (pin 7) is turned "Low" level, the charge of the capacitor C ₁₁ It is discharged via the resistor R _13. In this embodiment, by setting the time constant of the capacitor C ₁₁ and resistor R _12, for about 1 sec, an output terminal (pin 3) is raised to a "High" level.

When the output terminal of the timer circuit IC ₁ (3 pin) is in the "High" level, the base current flows through the transistor Q ₁₁ via the resistor R _14, R _15, transistor Q ₁₁ is turned on. Also, the base current flows through the transistor Q ₁₄ via the resistor R _14, R _20, transistor Q ₁₄ is turned on. Then, the output terminal (3rd pin) of the timer circuit IC ₁ is set to “Lo”.
When the level becomes “w”, the transistors Q ₁₁ and Q ₁₄ are turned off.

It will now be described timer circuit IC _2. This timer circuit IC _{2 is} also a general-purpose integrated circuit (NE55
5) consisting of a power supply terminal (Pin 8) and a ground terminal (1
The DC low voltage Vcc is applied between the (pins).
The reset terminal (4th pin) is connected to the power supply terminal (8th pin), and the frequency control terminal (5th pin)
It is connected to the ground terminal via decoupling capacitors C ₁₇ (1 pin). The series circuit of a resistor R ₂₃ and capacitor C ₁₆ constituting a time constant circuit of the timer circuit IC _1, a low DC voltage Vcc is applied. Connection point of the resistors R ₂₃ and capacitor C ₁₆ is connected to the threshold terminal of the timer circuit IC ₂ (6 pin) and discharge terminal (pin 7), whereby the timer circuit IC ₂ includes a monostable multivibrator It works as.

The timer operation is finished above the timer circuit IC _1, the output terminal of the timer circuit IC ₁ (3 pin) is changed to "Low" level from "High" level, transistor Q ₁₄ is changed from ON to OFF. This allows the transistor Q ₁₄
Collector potential rises, the capacitor C through the resistor R _{21
By 18} is charged, the current between the base and emitter of the transistor Q ₁₅ flows through momentarily, the transistor Q
₁₅ is momentarily turned on. Therefore, the potential at the connection point of the resistors R ₂₂ and transistor Q ₁₅ is instantaneously reduced, the trigger terminal of the timer circuit IC ₂ (2 pin) becomes the "Low" level, the monostable multivibrator is triggered You.
Thereafter, the threshold time constant of the capacitor C ₁₆ and resistor R ₂₃ terminal (pin 6) is a predetermined threshold voltage Vth = (2
/ 3) Until Vcc, the output terminal (3rd pin) keeps “High” level. When the voltage of the capacitor C ₁₆ reaches a threshold voltage Vth, the output terminal (pin 3) becomes "Low" level, the discharge terminal (pin 7) is turned "Low" level, the charge of the capacitor C ₁₆ Is discharged. In this embodiment, by setting the time constant of the capacitor C ₁₆ and resistor R _23, while hundreds .mu.sec, the output terminal (3 of the timer circuit IC ₂
(Pin No.) becomes “High” level.

When the output terminal (third pin) of the timer circuit IC ₂ is at the “High” level, a current flows between the resistor R ₂₇ and the base and emitter of the transistor Q ₁₆ via the resistors R ₂₄ and R ₂₆ , and the transistor Q ₁₆ is turned on. Turns on. Thus, decreases the potential at the connection point between the resistors R ₂₅ and R _28, transistor Q ₁₇ is turned off. When the output terminal (the third pin) of the timer circuit IC ₂ goes to “Low” level, the transistor Q ₁₆ is turned off, the potential at the connection point between the resistors R ₂₅ and R ₂₈ rises, and the transistor Q ₁₇ is turned on. .

Next, a description will be given oscillating circuit IC _3. This oscillation circuit I
C ₃ consists control IC for switching regulator (NEC manufacturing μPC494C). As is well known, this control IC is used by applying a low DC voltage Vcc between a power supply terminal (Pin 12) and a ground terminal (Pin 7), and a capacitor terminal (Pin 5) and a ground terminal. and the capacitance of the capacitor C ₁₄ connected between a built-in oscillator that oscillates a resistor terminal (6 pin) at a frequency corresponding to a current flowing between the ground terminal. The first oscillation output is obtained by alternating between a short-circuit state and an open state between the first open collector terminal (8th pin) and the first open emitter terminal (9th pin). The second oscillation output is obtained by alternating between a state where the second open collector terminal (the 11th pin) and a second open emitter terminal (the 10th pin) are short-circuited and a state where the second open collector terminal (the 10th pin) is opened. . here,
When the output control terminal (Pin 13) is dropped to the ground level, a single-ended operation for one stone is performed, and the first oscillation output matches the second oscillation output. When the voltage is set to the level of the reference voltage Vref obtained from the voltage output terminal (the 14th pin), push-pull operation for two stones is performed, and the first oscillation output and the second oscillation output pass through a predetermined dead-off time. Take the opposite situation.
This dead-off time depends on the level of the reference voltage Vref.
Divide by R ₃₁ and the variable resistor VR _10, by inputting the dead-off time control terminal (pin 4) can be set. The non-inverting input terminals (pins 1 and 16) and the inverting input terminals (pins 2 and 15) are input terminals of a comparator for pulse width control. Is to pull down the former to the ground level and pull up the latter to the level of the reference voltage Vref. The feedback terminal (3rd pin) is a feedback input terminal for pulse width control, and is left open when not used.

In this embodiment, the output control terminal (the 13th pin) is operated as a push-pull operation with the level of the reference voltage Vref of the reference voltage output terminal (the 14th pin), and the open emitter terminals (the 9th and 10th pins) are operated. ) as well as ground, the open collector terminals (No. 8 inverts and the waveform shaping by the number 11 respectively pull up an oscillation output obtained at pin) resistors R _17, R ₁₈ and NOT circuit IC _4, IC _7, MOS This is a control signal for the transistors Q ₁ and Q ₂ . That is, when the open collector terminal (Pin 8) and the open emitter terminal (Pin 9) are short-circuited, the input of the NOT circuit IC ₄ becomes “Low” level, and the output becomes “High” level. And
Conversely, when it is opened, the input of the NOT circuit IC ₄ becomes "High" level by the pull-up resistor R _17, whose output is intended to be "Low" level. The output of the NOT circuit IC ₄ via the terminal c is supplied to the gate of the MOS transistor Q ₂ as the second control signal in the main circuit.
On the other hand, the output of the NO circuit IC ₇ is a resistor R ₁₉ and a transistor Q ₁₂ ,
The MOS transistor Q _{13 is} insulated by a drive circuit including a coupling capacitor C ₁₅ and a pulse transformer T ₁₀ as a first control signal in the main circuit via terminals a and b.
It is supplied between _one gate and source.

Then, to the inverting input terminal of the comparator IC _8, a direct current and a low voltage Vcc resistor R _29, a reference voltage obtained by dividing by R ₃₀ minutes it is applied to the non-inverting input terminal, which is detected by the main circuit resonance The voltage Vch according to the current is applied via the terminal g. The output of the comparator IC ₈ is inverted by the NOT circuit IC _9, it is supplied to the gate of the MOS transistor Q ₃ as a third control signal in the main circuit via the terminal d. Discharge lamp 1
When the light is dimmed to a low luminous flux state, the voltage Vch decreases and the output of the comparator IC ₈ becomes “Low” level.
The output of the circuit IC ₉ becomes "High" level, MOS transistor Q ₃ is turned on. Further, when the discharge lamp 1 is not a low light flux state, MOS transistor Q ₃ are turned off.

The voltage of the output terminal (third pin) of the timer circuit IC ₂ is shaped by a buffer circuit composed of NOT circuits IC ₅ and IC ₆ , and a MOS transistor is provided as a fourth control signal in the main circuit via a terminal e. It is supplied to the gate of Q _4.

Hereinafter, the operation of this embodiment will be described with reference to the waveform diagram of FIG. FIG. 4 shows operation waveforms of various parts when the discharge lamp is started. In the figure, I _RT is the current flowing to the resistor terminal of the oscillating circuit IC ₃ (6 pin). When turned of the commercial AC power source Vs, between about 1sec by a timer circuit IC _1, the transistor Q ₁₁ is turned on. During this period, the current I _RT is
_{The current} is limited only by ₁₆ and the oscillation frequency f ₁ of the oscillation circuit IC ₃
Will be higher. The oscillation frequency f ₁ at this time is set sufficiently higher than the resonant frequency of the unloaded load circuit, the discharge lamp 1
Is low. For this reason, the discharge lamp 1 does not start, and a preheating current flows through the filament for about 1 second.

Then, the timer operation of the timer circuit IC ₁ is completed, the transistor Q ₁₁ is turned off, then hundreds μsec
Between, the transistor Q ₁₇ is turned off. For this reason,
Current I _RT is flowed limited by the resistor R ₁₆ and a variable resistor VR _11, the oscillation frequency f ₂ of the oscillator circuit IC ₃ is lowered. The capacitor C ₁₃ is connected in parallel with a variable resistor VR ₁₁ in order to perform smoothly the change in the oscillation frequency. The oscillation frequency f _{2 at} this time
Is set slightly higher than the no-load resonance frequency of the load circuit, and the voltage applied to both ends of the discharge lamp 1 becomes extremely high. For this reason, the discharge lamp 1 starts and starts discharging.

Then, the timer operation of the timer circuit IC ₂ is completed, the transistor Q ₁₇ is turned on, the variable resistor VR ₁₁
Are connected to the ground point. Therefore, the current I _RT
The shed limited by a portion of the resistor R ₁₆ and a variable resistor VR _11, the oscillation frequency f ₃ of the oscillating circuit IC ₃ is an arbitrary frequency in a range of _{f 1 <f 3 <f 2} . By operating the slider of the variable resistor VR _11, it can be higher or lower the oscillation frequency f _3. Higher oscillation frequency f _3, the resonance effect becomes weak, the resonance current decreases, the luminous flux of the discharge lamp 1 is low. Thereby, the light of the discharge lamp 1 can be adjusted.

The resonance current I _T3 flowing through the inductor T _{3 of the} main circuit is the voltage V
detected as a channel, and when the detected value falls below a predetermined value,
Output is "Low" level of the comparator IC _8, the output of the NOT circuit IC ₉ becomes "High" level, MOS transistor Q ₃ is turned on. As a result, the DC power is superimposed on the discharge lamp 1, and it is possible to prevent the lamp from going out in a low luminous flux state. Also,
Discharge lamp 1 when it is not the low luminous flux state, MOS transistor Q ₃ are turned off, since DC power is cut off, no problem occurs of deterioration of cataphoresis phenomenon and lamp life.

Number parallel-connected MOS transistor Q ₄ has the MOS transistor Q ₃ of the DC power control, at the start of the discharge lamp 1, that is, the output terminal of the timer circuit IC ₂ (3 pin) is in the "High" level one hundred It stays on for μsec. Therefore, in the period in which a high voltage for starting the discharge lamp 1 is applied, the voltage across the MOS transistor Q ₃ are reduced to zero,
The stress caused by overvoltage can be prevented.

In the embodiment, the resonance current is detected as a means for detecting the luminous flux of the discharge lamp 1, but it goes without saying that the lamp current may be detected or the light output may be directly detected.

Embodiment 2 FIG. 5 is a circuit diagram of a main circuit in a second embodiment of the present invention, and FIG. 6 is a circuit diagram of a control circuit thereof. In the present embodiment, in the first embodiment described above is obtained by sharing the MOS transistor Q ₄ of the MOS transistor Q ₃ and overvoltage protection for the DC power control. That is, the output of the NOT circuit IC _{6 and} the output of the NOT circuit IC ₉ are input to the OR circuit IC ₁₀ , and the OR circuit IC ₁₀
The output of the IC ₁₀ through the terminal d is supplied to the gate of the MOS transistor Q _3, is obtained by omitting the MOS transistors Q _4. Note that the OR circuit IC ₁₀ may be constituted by a diode.
Other configurations are the same as in the first embodiment.

In the present embodiment, the DC power control of the MOS transistor Q ₃ is not only turned on when a low light flux, so it is also turned on at the time of starting the discharge lamp 1, MO for overvoltage protection
There is no need for a separate S transistor Q _4. Instead, O
Although an R circuit IC ₁₀ or a diode is required, the number of switching elements that handle relatively large power is reduced, so that the cost can be reduced as a whole.

The switching element for controlling DC power or preventing overvoltage is not limited to a MOS transistor, but may be a bipolar transistor or a relay.

Embodiment 3 FIG. 7 is a circuit diagram of a main circuit in a third embodiment of the present invention, and FIG. 8 is a circuit diagram of a control circuit thereof. In the present embodiment, in the first embodiment described above, as a switching element for high voltage prevention connected in parallel to MOS transistor Q ₃ of the DC power control, using a Zener diode ZD _2. Zener voltage of the Zener diode ZD ₂ is lower than the voltage applied at the start of the discharge lamp 1, higher than the applied voltage at the time of lighting. Therefore, by conducting the Zener diode ZD ₂ only at the start of the discharge lamp 1, that overvoltage is applied across the MOS transistors Q ₃ can be prevented. In addition, since a passive high-voltage protection element is used, the configuration of the control circuit is simplified, and the cost of the element itself is reduced.
From active devices such as a MOS transistor Q ₄ are an advantage in that less expensive.

The passive high-voltage prevention element is not limited to a Zener diode, but may be a surge absorber such as ZNR or an avalanche diode.

According to the first aspect of the present invention, in a discharge lamp lighting device for supplying high frequency power and DC power to a discharge lamp, a switching element for overvoltage prevention is connected in parallel with a switching element for DC power control. However, since the overvoltage protection switching element is turned on at the time of starting the discharge lamp, it is possible to prevent a high voltage at the time of starting the discharge lamp from being applied to the DC power control switching element. Therefore, there is an effect that a switching element with a high withstand voltage is not required.

According to the second aspect of the present invention, since the switching element for DC power control and the switching element for overvoltage prevention are shared, the number of switching elements used can be reduced.

Furthermore, in the invention according to claim 3, since a passive overvoltage prevention element is used as the overvoltage prevention switching element, a control circuit for the switching element is not required, and the configuration is simplified. There is.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a basic configuration of the present invention, FIGS. 2 and 3 are circuit diagrams of a main circuit and a control circuit in the first embodiment of the present invention, respectively, and FIG. FIGS. 5 and 6 are circuit diagrams of a main circuit and a control circuit in a second embodiment of the present invention, respectively. FIGS. 7 and 8 are circuits of a main circuit and a control circuit in a third embodiment of the present invention, respectively. FIG. 9 is a block diagram of a conventional example, and FIG. 10 is a block diagram of another conventional example. 1 the discharge lamp, 2 a high frequency power source, 5 denotes a DC power source, Z _1, Z ₂ is an impedance element, SW ₁ DC power control switching element, SW ₂ is the switching element for preventing overvoltage.

Claims (3)

(57) [Claims] A low-pressure mercury discharge lamp; a high-frequency power supply for supplying high-frequency power to the discharge lamp; a dimming control unit for controlling high-frequency power supplied to the discharge lamp by the high-frequency power supply; A discharge lamp lighting device comprising: DC power superimposing means for superimposing DC power at a level capable of maintaining discharge during low luminous flux dimming on the high frequency power and applying the DC power to the discharge lamp. An impedance element interposed in the DC power control switching element interposed between the discharge lamp and the DC power superimposing means,
A discharge lamp lighting device, comprising: an overvoltage prevention switching device that is connected in parallel with the DC power control switching device and becomes conductive when the discharge lamp is started. 2. The discharge lamp lighting device according to claim 1, wherein said switching element for DC power control and said switching element for overvoltage prevention are shared. 3. The overvoltage protection switching device according to claim 1, wherein the overvoltage protection switching device is a passive overvoltage protection device.
The discharge lamp lighting device as described in the above.