JP3034935B2 - Discharge lamp lighting device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a discharge lamp lighting device for lighting a discharge lamp with high frequency power.

[Prior Art] FIG. 5 shows a conventional discharge lamp dimming lighting device (Japanese Patent Application No. 1-75).
572). The lighting device includes a low-pressure mercury discharge lamp 1, a high-frequency power supply 2 for supplying high-frequency power to the discharge lamp 1, a dimming control unit 3 for dimming the discharge lamp 1 from an arc discharge region to a glow discharge region, DC power superimposing means 4 for superimposing DC power at a level that can maintain discharge during low luminous flux dimming on the high frequency power and applying it to the discharge lamp 1
And light control is possible up to a low light flux (deep light control level). Note that in Figure 5, the control signal from the dimming control unit 3 which controls the discharge lamp 1 dimming high frequency power source 2, the impedance element Z _1, Z _2, has been inputted to the DC power source 5, all of these It is not always necessary to input a control signal.

By the way, at the dimming level (relative illuminance ratio of 20% or more) at which there is no fear of the discharge lamp 1 going out at the above-mentioned number of times, a DC current flows through the discharge lamp 1, and cataphoresis occurs and the lamp life deteriorates. Problems arise. Therefore, it is more preferable to detect the relative illuminance ratio of the discharge lamp 1 by some means and to add a circuit for cutting a direct current at a dimming level at which there is no fear of extinguishing.

An example of such a circuit is shown in FIG. In this circuit, a lamp current is detected as a means for detecting a relative illuminance ratio. Insert a current transformer in series in the lamp current path,
When the lamp current is detected by the lamp current detection circuit 46 and the lamp current is large, the switching circuit 44 is opened by the switching control circuit 45 to stop the superimposition of DC power. When the lamp current is small, the switching control circuit 45 closes the switching circuit 44 to superimpose DC power. The AC voltage of the commercial AC power supply Vs is converted to a DC voltage by the DC
The voltage is converted into a high-frequency voltage by 22 and applied to both ends of the discharge lamp 1 via the resonance circuit 23, and is also applied to both filaments of the discharge lamp 1 via the preheating circuit 24. The high-frequency voltage obtained from the high-frequency conversion circuit 22 is converted into a DC voltage by the DC conversion circuit 41, and when the switching circuit 44 is closed, the impedance element 42
A direct current voltage is applied to both ends of the discharge lamp 1 via the diode 43.

[Problems to be Solved by the Invention] In the case where the dimming start is performed by the discharge lamp 1, as shown in FIG. 7, a starting pulse voltage of an AC component is applied to the dimming start pulse. In this case, since no DC power is superimposed, dimming cannot be started. Conventionally, a method of performing full lighting for a short time and returning to the dimming mode has been adopted. For this reason, there is a problem of delay of dimming lighting and occurrence of full lighting momentarily.

The present invention has been provided in view of the above points,
An object of the present invention is to provide a discharge lamp lighting device for ensuring the start at the time of dimming.

Means for Solving the Problems The present invention provides a discharge lamp, a high-frequency power supply for supplying high-frequency power to the discharge lamp, a control unit for controlling lighting of the discharge lamp, and a DC for supplying DC power to high-frequency power. A power supply and a switching element for controlling DC power supplied to the discharge lamp, and a control means for generating a start pulse including a DC component and starting and lighting the discharge lamp at the time of dimming. .

[Operation] Thus, the dimming start is enabled by including the DC component in the start pulse.

Embodiment 1 Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
FIG. 1 is a circuit diagram of a main circuit in a first embodiment of the present invention, and FIG. 2 is a circuit diagram of its control means. Commercial AC power source Vs is connected to the AC input terminal of the diode bridge DB _1. The DC output ends of the diode bridge DB ₁ is connected with the capacitor C _1. A series circuit of MOS transistors Q ₁ and Q ₂ is connected in parallel to both ends of the capacitor C ₁ . One end of the high-frequency transformer T ₂ is connected to both ends of the MOS transistor Q ₂ via a DC component cutting capacitor C _3.
Winding and, together with the capacitor C ₇ for direct current power supply cut of the high-frequency transformer T ₂ is connected, the power supply side terminal of the filament of the discharge lamp 1 via the inductor T ₃ with a secondary winding is connected .

Between the non-power supply side terminal of the discharge lamp 1 filament, resonance and the capacitor C ₄ for preheating current supply are connected in parallel. The secondary winding output of the high-frequency transformer T ₂ is a diode D ₁
Is rectified by, is smoothed by the capacitor C _6, a DC voltage is obtained. This capacitor C ₆ is connected to one end of the discharge lamp 1 via an inductor L ₁ and a diode
It is connected to the other end of the discharge lamp 1 via the D ₂ and MOS transistor Q _3.

The inductor L ₁ is a high frequency blocking, high-frequency voltage applied to the discharge lamp 1 is prevented from leaking to the capacitor C _6. Also, the inductor T ₃ is connected to the capacitor C ₄ together with LC
Form a series resonant circuit, in which starting to light the discharge lamp 1 by a resonance voltage generated at both ends of the capacitor C _4.
Capacitor C ₄ are DC blocking, sufficiently large capacity than the capacitor C _4, it does not contribute to the resonance. Secondary winding of inductor T ₃ is connected to the AC input terminal of the diode bridge DB _3. The DC output ends of the diode bridge DB _3, a parallel circuit of a capacitor C ₅ and the resistor R ₁ is connected, generates a voltage Vch corresponding to the resonance current. This voltage Vch is supplied to the control circuit shown in FIG.

Commercial AC power source Vs is connected to the AC input ends of the step-down transformer T ₁ a shows the diode bridge DB _2, the DC output ends of the diode bridge DB _2, a parallel circuit of a capacitor C ₂ and the Zener diode ZD ₁ is connected I have. Capacitor C
_The DC low voltage Vcc obtained at ₂ is supplied to the control circuit via the terminal f.

MOS transistor to Q ₁ terminal a connected between the gate and source, between b, the first control signal is supplied. Also, M
OS between the transistor and the terminal c connected to the gate Q ₂ 'grounding point, the second control signal is supplied. The first control signal and the second control signal are not simultaneously at H level, the first control signal is at H level and the second control signal is at L level.
Level, a second period in which the first and second control signals are simultaneously at L level, and a third period in which the first control signal is at L level and the second control signal is at H level. And the fourth period in which the first and second control signals are simultaneously at the L level are repeated in the same order.

In the first period, MOS transistor Q ₁ is turned on, MOS transistor Q ₂ is turned off, from the positive terminal of the capacitor C _1,
MOS transistor Q ₁ , DC component cut capacitor
C _3, the load circuit including a high-frequency transformer T ₂ and the discharge lamp 1, a current flows in the path through the negative terminal of the capacitor C _1. In the second period, the MOS transistors Q ₁ and Q ₂ are simultaneously turned off, and the oscillating current of the load circuit flows through the built-in anti-parallel diode parasitic between the drain and source of the MOS transistor Q ₂ .

In the third period, MOS transistor Q ₁ is turned off, MOS transistor Q ₂ is turned on, so that the capacitor C ₃ for the DC component cutting power supply, MOS transistor Q ₂ from the capacitor C _3, via the load circuit capacitor current flows through a path back to C _3. In the fourth period, the MOS transistors Q ₁ and Q ₂ are simultaneously turned off, and the oscillating current of the load circuit flows through the built-in anti-parallel diode parasitic between the drain and the source of the MOS transistor Q ₁ . Thus, a high-frequency alternating current flows through the load circuit. Note that MOS transistors Q ₁ ,
The switching frequency of the Q ₂ is, it is common to set a little higher than the natural frequency of the load circuit.

Between the MOS transistor Q connected terminal d to the gates of the ₃ and the ground point, the third control signal is supplied. Since the 3 MOS transistor Q ₃ by the control signal becomes conductive during a low luminous flux level, to superimpose a direct current power to the discharge lamp 1, the discharge lamp 1 is less likely to lighting failure. Further, between the ground and the gate of the MOS transistor Q _3, a fourth control signal is supplied. MOS transistor Q ₃ by the fourth control signal is turned on at the start of the discharge lamp 1.

Next, the configuration of a control circuit for supplying the first to fourth control signals to the main circuit (see FIG. 2) will be described.
DC low voltage Vcc obtained in the capacitor C ₂ of the main circuit is supplied as an operation power supply voltage through the terminal f to the control circuit. The timer circuits IC ₁ and IC ₂ and the oscillating circuit IC ₃ operate with the low DC voltage Vcc.

First, the timer circuit IC ₁ is composed of a general-purpose integrated circuit (NE555 made by Signatures) and has a trigger terminal (pin 2)
Is less than (1/3) Vcc, it is triggered and the output terminal (3
(Pin 7) becomes H level, and the discharge terminal (Pin 7) becomes high impedance. In addition, a threshold terminal (6
Output pin (Pin 3) when (Pin 3) becomes (2/3) Vcc
Is at L level, and the discharge terminal (7th pin) is also at L level. Power supply terminal (Pin 8) and ground terminal (Pin 1)
During this time, a DC low voltage Vcc is applied. The reset pin (pin 4) is connected to a power supply terminal (8 pin), a frequency control terminal (pin 5) is ground terminal via decoupling capacitors C ₁₂ (1 pin)
It is connected to the.

The series circuit of a resistor R ₁₂ and capacitor C ₁₁ constituting a time constant circuit of the timer circuit IC _1, a low DC voltage Vcc is applied. Connection point of the resistors R ₁₂ and capacitor C ₁₁ is connected to the threshold terminal of the timer circuit IC ₁ (6 pin) is connected to the discharge terminal (pin 7) via a resistor R _13, which the timer circuit IC ₁ 'is intended to operate as a monostable multivibrator.

When the commercial AC power supply Vs in the main circuit is turned on, the terminal f
When the DC low voltage Vcc rises to be applied to the resistor by a capacitor C ₁₀ through R ₁₀ is charged, the base-emitter transistor Q ₁₀ current flows instantaneously in the on instant of the transistor Q ₁₀ State. For this reason,
Potential at the connection point between the resistors R ₁₁ and transistor Q ₁₀ is instantaneously reduced, trigger terminal (pin 2) becomes the L level, the monostable multivibrator is triggered. Thereafter, the threshold terminal at a time constant of the capacitor C ₁₁ and resistor R ₁₂ (6
Pin No.) is a predetermined threshold voltage Vth = (2/3) Vcc
Until the output terminal (the 3rd pin) holds the H level. When the voltage of the capacitor C ₁₁ reaches a threshold voltage Vth, the output terminal (pin 3) becomes the L level, the discharge terminal (pin 7) also becomes L level, the charge of the capacitor C ₁₁ is the resistance R ₁₃ Is discharged through. In this embodiment, by setting the time constant of the capacitor C ₁₁ and resistor R _12, for about 1 sec, an output terminal (pin 3) becomes H level.

When the output terminal of the timer circuit IC ₁ (3 pin) is H level, the base current flows through the transistor Q ₁₁ via the resistor R _14, R _15, transistor Q ₁₁ is turned on.
Also, the base current flows through the transistor Q ₁₄ via the resistor R _14, R _20, transistor Q ₁₄ is turned on. And
When the output terminal of the timer circuit IC ₁ (3 pin) is in the L level, the transistor Q _11, Q ₁₄ are turned off.

It will now be described timer circuit IC _2. This timer circuit IC _{2 is} also a general-purpose integrated circuit (NE55
5) consisting of a power supply terminal (Pin 8) and a ground terminal (1
The DC low voltage Vcc is applied between the (pins).
The reset terminal (4th pin) is connected to the power supply terminal (8th pin), and the frequency control terminal (5th pin)
It is connected to the ground terminal via decoupling capacitors C ₁₇ (1 pin). The series circuit of a resistor R ₂₃ and capacitor C ₁₆ constituting a time constant circuit of the timer circuit IC _2, a DC low voltage Vcc is applied. Connection point of the resistors R ₂₃ and capacitor C ₁₆ is connected to the threshold terminal of the timer circuit IC ₂ (6 pin) and discharge terminal (pin 7), whereby the timer circuit IC ₂ includes a monostable multivibrator It works as.

The timer operation is finished above the timer circuit IC _1, an output terminal of the timer circuit IC ₁ (3 pin) of changes from H level to L level, the transistor Q ₁₄ is changed from ON to OFF. Thus, the collector potential of the transistor Q ₁₄ is increased by the capacitor C ₁₈ is charged via the resistor R _21, a current between the base and emitter of the transistor Q ₁₅ flows through momentarily, the transistor Q ₁₅ is It turns on for a moment. Thus, resistor R ₂₂ and transistor Q ₁₅
Decrease in the potentials of the connection point moment, the trigger terminal of the timer circuit IC ₂ (2 pin) is at the L level, the monostable multivibrator is triggered.

Thereafter, the threshold terminal at a time constant of the capacitor C ₁₆ and resistor R ₂₃ (6 pin) reaches a predetermined threshold voltage Vt
Until h = (2/3) Vcc, output terminal (3rd pin) is H
Hold the level. When the voltage of the capacitor C ₁₆ reaches a threshold voltage Vth, the output terminal (pin 3) becomes the L level, the discharge terminal (pin 7) also becomes L level, the charge of the capacitor C ₁₆ is discharged . In this embodiment, by setting the time constant of the capacitor C ₁₆ and resistor R _23, while hundreds .mu.sec, the output terminal of the timer circuit IC ₂ (3 pin) becomes H level.

When the output terminal (the third pin) of the timer circuit IC ₂ is at the H level, a current flows between the resistor R ₂₇ and the base and emitter of the transistor Q ₁₆ via the resistors R ₂₄ and R ₂₆ , and the transistor Q ₁₆ is turned on. Become. Thus, decreases the potential at the connection point between the resistors R ₂₅ and R _28, transistor Q ₁₇ is turned off. When the output terminal (the third pin) of the timer circuit IC ₂ becomes L level, the transistor Q ₁₆ is turned off, and the resistance R ₂₅
Raise the potential at the connection point of R _28, transistor Q ₁₇ is turned on.

Next, a description will be given oscillating circuit IC _3. This oscillation circuit I
C ₃ is made of a control IC for switching regulator (NEC manufacturing μPC494C). This control IC
As is well known, the power supply terminal (pin 12) and the ground terminal (7
Pin No.) is used while DC low voltage Vcc is applied between
And the capacitance of the capacitor C ₁₄ connected capacitor terminal (pin 5) between the ground terminal has a built-in oscillator that oscillates a resistor terminal (6 pin) at a frequency corresponding to a current flowing between the ground terminal. The first oscillation output is obtained by alternating between a short-circuit state and an open state between the first open collector terminal (8th pin) and the first open emitter terminal (9th pin). , The second oscillation output is
The short-circuit state and the open state between the second open collector terminal (the 11th pin) and the second open emitter terminal (the 10th pin) are alternately obtained.

Here, when the output control terminal (the 13th pin) is dropped to the ground level, a single-ended operation for one stone is performed, and the second oscillation output coincides with the second oscillation output. When the terminal is set to the level of the reference voltage Vref obtained from the reference voltage output terminal (pin 14), 2
The push-pull operation for the stone is performed, and the first oscillation output and the second
Oscillation output takes the opposite state after a predetermined dead-off time. The dead-off time, and the level of the reference voltage Vref dividing by resistors R ₃₁ and the variable resistor VR _10, by inputting the dead-off time control terminal (pin 4) can be set. The non-inverting input terminals (pins 1 and 16) and the inverting input terminals (pins 2 and 15) are input terminals of a pulse width control comparator. Is to pull down the former to the ground level and pull up the latter to the level of the reference voltage Vref. The feedback terminal (3rd pin) is a feedback input terminal for pulse width control, and is left open when not used.

In this embodiment, the output control terminal (pin 13) is operated as a push-pull operation with the level of the reference voltage Vref of the reference voltage output terminal (pin 14), and the open emitter terminals (pins 9 and 10) are operated. ) as well as ground, the open collector terminals (No. 8 inverts and the waveform shaping by the number 11 respectively pull up an oscillation output obtained at pin) resistors R _17, R ₁₈ and NOT circuit IC _4, IC _7, MOS This is a control signal for the transistors Q ₁ and Q ₂ .

That is, when the open collector terminal (Pin 8) and the open emitter terminal (Pin 9) are short-circuited, the input of the NOT circuit IC ₄ becomes L level and its output becomes H level. Conversely, when it is opened, the input of the NOT circuit IC ₄ becomes H-level by the pull-up resistor R _17, whose output is made L level. The output of the NOT circuit IC ₄ via the terminal c is supplied to the gate of the MOS transistor Q ₂ as the second control signal in the main circuit. On the other hand, the output of the NOT circuit IC ₇ is a resistor
Insulated by R ₁₉ and transistor Q _12, Q consisting capacitor C ₁₅ and the pulse transformer T ₁₀ for coupling the ₁₃ drive circuits, terminals a, via the b as the first control signal in the main circuit of the MOS transistors Q ₁ Connected between gate and source.

Then, to the inverting input terminal of the comparator IC _8, a direct current and a low voltage Vcc resistor R _29, a reference voltage obtained by dividing by R ₃₀ minutes it is applied to the non-inverting input terminal, which is detected by the main circuit resonance The voltage Vch according to the current is applied via the terminal g. The output of the comparator IC ₈ is inverted by the NOT circuit IC ₃ and supplied to the gate of the MOS transistor Q ₃ as a third control signal in the main circuit via the terminal d. Discharge lamp 1
When the light is dimmed and the luminous flux becomes low, the voltage Vch decreases and the output of the comparator IC ₈ becomes L level.
The output of the IC ₉ becomes H level, MOS transistor Q ₃ is turned on. When the discharge lamp 1 is not in the low luminous flux state, the MO
S transistor Q ₃ is turned off.

The voltage of the output terminal (third pin) of the timer circuit IC ₂ is shaped by a buffer circuit composed of NOT circuits IC ₅ and IC ₆ , and a MOS transistor is provided as a fourth control signal in the main circuit via a terminal e. It is supplied to the gate of Q _3.

Here, when the discharge lamp 1 is started, that is, the timer circuit IC
_{The second} output terminal (the third pin) is in the ON state for several hundred μsec when it is at the H level. In the present embodiment, for DC power control
MOS transistor Q ₃ is turned on when starting the discharge lamp 1 at the time of low light flux, to generate a starting pulse having a DC component as shown in FIG. 3 at the low luminous flux dimming start, also it is superimposed upon dimming become.

Example 2 As Example 2, the inductor of the main circuit shown in FIG.
By the L ₁ using a saturable inductor, it is capable of the direct current component as shown in FIG. 4 to obtain a high starting pulse.

[Effects of the Invention] As described above, the present invention provides a discharge lamp, a high-frequency power supply for supplying high-frequency power to the discharge lamp, a control unit for controlling lighting of the discharge lamp, and a DC for supplying DC power to high-frequency power. A power supply and a switching element for controlling DC power supplied to the discharge lamp, and a control means for generating a start pulse including a DC component and starting and lighting the discharge lamp at the time of dimming. Therefore, by using a pulse having a DC component as the starting pulse of the discharge lamp, there is an effect that guidance in a low luminous flux dimming range where DC superposition is performed can be ensured.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a main circuit according to an embodiment of the present invention, FIG. 2 is a circuit diagram of a control unit of the embodiment, FIG. 3 is an operation waveform diagram of the embodiment, and FIG.
FIG. 5 is an operation waveform diagram of the second embodiment, FIG. 5 is a circuit diagram of a conventional example, FIG. 6 is a circuit diagram of another conventional example, and FIG. 7 is an operation waveform diagram of the same. 1 is a discharge lamp.

Continuation of the front page (56) References JP-A-2-253595 (JP, A) JP-A-3-110209 (JP, A) JP-A-3-1102093 (JP, A) JP-A-3-112095 (JP, A) JP-A-1-211897 (JP, A) JP-A-61-104589 (JP, A) JP-A-61-78099 (JP, A) JP-A-59-60888 (JP, A) (58) Fields surveyed (Int.Cl. ⁷ , DB name) H05B 41/38-41/42 H05B 41/14-41/298

Claims (1)

(57) [Claims] A discharge lamp, a high-frequency power supply for supplying high-frequency power to the discharge lamp, a control unit for controlling lighting of the discharge lamp, a DC power supply for supplying DC power to high-frequency power, A switching element for controlling the DC power of the discharge lamp, and a control means for generating a start pulse including a DC component to start and light the discharge lamp at the time of dimming.