JP2721522B2 - Inverter circuit - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to an inverter circuit used for an electronic ballast of a fluorescent lamp and the like.

[Prior Art] FIG. 4 is a circuit diagram of a conventional inverter circuit. Hereinafter, the circuit configuration will be described. AC voltage AC is connected through the power switch S ₁ to the AC input terminal of the diode bridge DB. A smoothing capacitor _C01 is connected to the DC output terminal of the diode bridge DB. When turning on the power switch S _1, the AC voltage of the commercial AC power source AC is full-wave rectified by the diode bridge DB,
A DC power supply E is obtained at both ends of the capacitor _C01 . A series circuit of transistors Tr ₁ and Tr _{2 and} a series circuit of capacitors C ₁ and C ₂ are connected in parallel to the DC power supply E, and the connection point of the transistors Tr ₁ and Tr _{2 and} the connection of the capacitors C ₁ and C ₂ Between the points,
The load L is connected.

The control circuit A includes NAND gates G ₁ and G ₂ , resistors R ₂ and R ₃ and a capacitor C ₃ , and alternately has a “High” level and a “L” level.
It generates an output signal is inverted to ow "level. The output of this output signal is supplied to the base of the transistor Tr ₃ and Tr ₄ in the driving circuit B. transistors Tr _3, Tr ₄ is
_They are respectively applied between the base and emitter of the transistors Tr ₁ and Tr ₂ via the drive transformers T ₂ and T ₃ and the resistors R ₅ and R ₆ . The capacitors C ₄ and C ₅ and the resistors R ₇ and R ₈ constitute a surge absorbing circuit. The operating power supply voltage V _DD of the control circuit A is obtained by charging the capacitor C ₀₂ from one end of the AC power supply AC (or the positive terminal of the diode bridge DB) via the diode D ₁ and the resistor R ₁ . Operating power supply voltage of drive circuit B
V _CC is one end of AC power supply AC (or diode bridge DB
Of the positive terminal), the diode D _1, obtained by previously charging the capacitor C ₀₃ in advance through a resistor R _9, after the inverter has started oscillation, the oscillation output of inverter developed across the load L from the transformer T _1, resistors R _4, obtained by charging the capacitor C ₀₃ through the diode D _2. Since the control circuit A is composed of IC parts such as NAND gates G ₁ and G ₂ , the power consumption is relatively small, but the driving circuit B must supply the base current of the transistors Tr ₁ and Tr ₂ , Power is relatively large. For this reason,
The smoothing capacitor _C02 constituting the power supply of the drive circuit A may have a smaller capacity than the smoothing capacitor _C03 constituting the power supply of the drive circuit B. Note that discharging resistors R ₁₀ and R ₁₁ are connected in parallel to the capacitors C ₀₂ and C ₀₃ , respectively.

[Problems to be Solved] In the conventional example described above, when turning off the power switch S _1, the capacitor C ₀₂ is a power source of the control circuit A for small capacity, than the capacitor C ₀₃ is a power source of the driving circuit B The voltage drops too soon. Power switch S ₁ is turned off, in the course of the voltage of the capacitor C ₀₂ is gradually decreased from the predetermined value, the operating voltage of the control circuit A is changed, the oscillation output of the control circuit A is changed. On the other hand, the capacitor C ₀₃ is a power source of the driving circuit B, since the capacity is large, even if the power switch S ₁ is turned off, the voltage of the capacitor C ₀₂ to about oscillation output fluctuates in the control circuit A decreases, Capacitor C ₀₃
Does not stop enough to stop the operation of the drive circuit B. Therefore, in the process of power switch S ₁ is turned off, the voltage of the capacitor C ₀₂ is gradually decreased from the predetermined value,
Despite the oscillation output of the control circuit A is changed, the power supply voltage of the drive circuit B there is a time period given enough from the capacitor C _03. Therefore, the transistors Tr ₁ and Tr ₂
Also fluctuates switching state, after the power supply switch S ₁ is turned off, in a period until the voltage of the capacitor C ₀₃ is substantially zero, the oscillation operation of the inverter is varied, or cause abnormal oscillation, variation of the load current And the overcurrent may flow through the transistors Tr ₁ and Tr ₂ . 5 (a) and 5 (b) are waveform diagrams showing the oscillation state of the inverter. In the figure, the voltage waveform of the output signal of the control circuit A (10
V / div) is a current waveform (0.5 A / div) flowing through the transistor Tr ₁ (or Tr ₂ ) of the inverter. When the power supply voltage of the control circuit A decreases, the output signal of the control circuit A fluctuates in the process as shown in FIGS. 3A and 3B, and the oscillation output of the inverter may fall into an abnormal state. . FIG. 5 (a) shows an abnormal state, in which a current continues to flow through the transistor even when a signal to turn off the transistor is given. FIG. 5B shows a normal state, and when a signal for turning off the transistor is given,
No current flows through the transistor.

The present invention has been made in view of such a point,
An object of the present invention is to provide an inverter circuit capable of preventing abnormal oscillation when power is shut off.

[Means for Solving the Problems] In the present invention, in order to solve the above problems, as shown in FIGS. 1 to 3, in an inverter circuit for converting a DC power supply voltage to a high-frequency voltage, A control circuit A for generating a signal for controlling ON / OFF of the switching elements (transistors Tr ₁ and Tr ₂ ) for the inverter, and a _first circuit for dividing the DC power supply voltage and supplying an operating voltage to the control circuit A
, A driving circuit B for driving a switching element for an inverter in accordance with a signal from a control circuit A, and a second circuit for rectifying and smoothing an inverter output to supply an operating voltage to the driving circuit B.
And when the DC power supply voltage is cut off, the first and second power supply voltages are reduced almost simultaneously.

[Operation] In the present invention, since the power supply voltage of the control circuit A and the power supply voltage of the drive circuit B are reduced almost simultaneously at the time of power supply cutoff, the first power supply voltage decreases. At the time when the oscillation output of the control circuit A fluctuates, the second power supply voltage also drops, and the driving energy of the switching element by the driving circuit B has also disappeared. The oscillation state is not lost.

Embodiment 1 FIG. 1 is a circuit diagram of a first embodiment of the present invention. Since the basic configuration of the inverter circuit is the same as that of the conventional example shown in FIG. 4, portions having the same functions are denoted by the same reference numerals, and redundant description will be omitted. In this embodiment, a small-capacity capacitor C constituting a power supply of the control circuit A is used.
₀₂ and a large-capacity capacitor that constitutes the power supply for drive circuit B
Between C _03, are those in which diode D ₃ is also connected with polarity such as current flows from the capacitor C ₀₃ to the capacitor C _02, thereby the voltage of the capacitor C ₀₃ is substantially reduced at the same time as the voltage of the capacitor C ₀₂ It is configured as follows.

Hereinafter, the operation of the present embodiment will be described. When turning off the power switch S _1, the capacitor is a power source of the drive circuit A
For C ₀₂ is the capacitance is small, but sooner voltage than the capacitor C ₀₃ is a power source of the drive circuit B is reduced, the capacitor C ₀₂
When the voltage of the drops, the charge in the capacitor C ₀₃ is a diode D
To be discharged to the capacitor C ₀₂ through _3, capacitor
The voltage of the capacitor C ₀₃ in accordance with the voltage drop of the C ₀₂ is also reduced. Therefore, in the course of the voltage of the capacitor C ₀₂ is gradually decreased from the predetermined value, so also decreases almost simultaneously the voltage of the capacitor C _03, the time the oscillation output of the control circuit A is changed depends on the drive circuit B Transistor
The driving energy of Tr ₁ and Tr ₂ is also reduced, and there is no occurrence of abnormal oscillation as in the conventional example.

The power of the control circuit A, as shown in FIG. 1, a method which can charge the capacitor C ₀₂ through the AC voltage AC of the diode D ₁ from one end, the resistor R _1, a positive diode bridge DB diode D ₁ from the terminal, but via the resistor R ₁ is a scheme that can charge the capacitor C _02, in the latter case, when turning off the power switch S _1, the capacitor from a large capacitor C ₀₁ of relatively capacity Since the charge flows into _C02 , the time until the charge of the capacitor _C02 becomes zero becomes relatively long. On the other hand, in the former case, since the capacitor _C02 is charged directly from the commercial AC power supply AC,
When you turn off the power switch S _1, the time is relatively short to charge the capacitor C ₀₂ is zero. Therefore, when the former method is adopted, oscillation instability at the time of power shutdown is less likely to occur, and the time from when the power is shut down until oscillation stops is shortened.

Embodiment 2 FIG. 2 is a circuit diagram of a second embodiment of the present invention. Hereinafter, the circuit configuration will be described. AC voltage AC is connected through the power switch S ₁ to the AC input terminal of the diode bridge DB. A smoothing capacitor _C01 is connected to the DC output terminal of the diode bridge DB. When turning on the power switch S _1, the AC voltage of the commercial AC power source AC is full-wave rectified by the diode bridge DB,
A DC power supply E is obtained at both ends of the capacitor _C01 . At both ends of the DC power supply E, a transistor as a main switching element
Tr ₁ and Tr ₂ are connected in series, and diodes D ₅ and D ₆ are connected in anti-parallel to the transistors Tr ₁ and Tr ₂ , respectively. At both ends of the transistor Tr ₁ includes a coupling capacitor C ₆ to cut a direct current component, through a current transformer CT ₁ for feeding back the load current, the load circuit is connected. The load circuit includes an LC resonance circuit including an inductor L ₁ , a capacitor C _7, and a discharge lamp L, and the load current is an oscillating current. The oscillating current flows through the primary winding n ₁ of the current transformer CT _1. Thus, the secondary winding n ₂ of the current transformer CT _1, the voltage changes polarity in response to the oscillating current flowing through the load circuit is induced, base of the transistor Tr ₁ and the induced voltage through the resistor R ₅ It is applied between the emitter and on-off control of the transistor Tr _1.

Thus, although one transistor Tr ₁ is turned on and off controlled by feeding back the oscillating current flowing in the load circuit, the other transistor Tr ₂ is turned on and off controlled by the control circuit A. In the control circuit A, by detecting the voltage across the transistor Tr ₂ in the resistor R _15, R _16, by operating the timer circuit tm consisting universal timer IC (e.g. Japanese electrical steel μPD5555), the transistor Tr ₂ it is intended to only oN for a predetermined time from oFF time of the transistor Tr _1. Timer circuit tm sets the time tau ₁ of transistor Tr ₂ is turned on. A NOT circuit N ₁ in the control circuit A, a differentiating circuit including a capacitor C ₁₀ and a resistor R ₁₂ , and
Gate pulse circuit comprising a NOT circuit N ₂ generates a trigger signal at the falling time of the voltage detected by the resistor R _15, R ₁₆ (off time of transistor Tr _1). This trigger signal is input to the trigger input (pin 2) of the timer circuit tm. The output of the timer circuit tm (3 pin) a predetermined time determined by the time constant of the trigger point resistor R ₁₃ and capacitor C ₉ becomes "High" level. On-time tau ₁ transistor Tr ₂ is determined by this time. The output of the timer circuit tm is a low impedance at the driving circuit B consisting of NPN transistor Tr ₅ and emitter follower circuit in which complementary connecting PNP transistor Tr _6, is applied to the base of the transistor Tr ₂ via the resistor R ₆ .

This inverter circuit includes a start circuit ST for starting an oscillating operation when power is turned on. The starting circuit ST is the capacitor C ₁₁ is charged via the resistor R ₁₄ by power-on, when the charge voltage reaches 2 break-over voltage of the terminal thyristor Q ₁ 2-terminal thyristor Q ₁ is turned on, the transistor Tr ₂ 2-terminal thyristor Q _{1 on} base
The first is turned on the transistor Tr ₂ by flowing a base current through, it is to start the inverter circuit.
One end of the starting circuit ST is connected to one end of the commercial AC power source AC through a power switch S _1, the diode bridge DB
There is an advantage that the start-up circuit ST quickly stops operating when the power is cut off, as compared with the case where the positive terminal is connected to the positive terminal.

Since the input circuits of the NOT circuits N ₁ and N ₂ and the timer circuit tm of the control circuit A have high input impedance and low power consumption, the capacitor C ₀₂ is charged from one end of the commercial AC power supply AC via the diode D ₁ and the resistor R _1. To supply power. The driving circuit B of the main transistor Tr ₂ is so large power consumption, and feeding back the oscillation output of the inverter from the secondary winding n ₂ of the inductor L _1, a capacitor C ₀₃ through the diode D _2, the resistor R ₄ Power is supplied by charging. Note that when the inverter startup, the diodes D _1, via a resistor R ₉ to supply power to the driving circuit B by previously charging the capacitor C ₀₃ in advance, after the inverter circuit starts oscillation operation, inductor L from _secondary winding n ₂ to charge the capacitor C _03, and supplies power to the driving circuit B.

In this embodiment, between the small-capacity capacitor C ₀₂ which constitutes the power supply of the control circuit A, the large-capacity capacitor C ₀₃ which constitutes the power source of the driving circuit B for supplying a base current of the main transistor Tr ₂ , Capacitor C ₀₃ to capacitor C ₀₂
To a polar, such as current flows, is connected to diode D _3. Thus, when turning off the power switch S _1, since the capacitor C ₀₂ is a power source of the drive circuit A small capacity, but sooner voltage than the capacitor C ₀₃ is a power source of the drive circuit B is reduced, the voltage of the capacitor C ₀₂ Falls,
Since the charge in the capacitor C ₀₃ is discharged to the capacitor C ₀₂ through the diode D _3, the voltage of the capacitor C ₀₃ is reduced at approximately the same time as the voltage of the capacitor C _02. For this reason,
And power switch S ₁ is turned off, in the course of the voltage of the capacitor C ₀₂ is gradually decreased from the predetermined value, most will be the voltage of the capacitor C ₀₃ drops simultaneously, the control circuit A
During the time when the oscillation output of the
And drops the driving energy of the transistor Tr ₂ by, it will not fall into abnormal oscillation as in the prior art.

Third Embodiment FIG. 3 is a circuit diagram of a third embodiment of the present invention. Since the basic configuration of the inverter circuit is the same as that of the conventional example shown in FIG. 4, portions having the same functions are denoted by the same reference numerals, and redundant description will be omitted. In this embodiment, a small-capacity capacitor C constituting a power supply of the control circuit A is used.
₀₂ and a large-capacity capacitor that constitutes the power supply for drive circuit B
And C _03, is connected to the capacitor C ₀₁ through respective resistors R _1, R _9. The diode D ₁ from one end of the commercial AC power source AC, via a resistor R _17, and charges the capacitor C _12, are applied the charged voltage to the input of the NOT circuit N _3. NOT circuit
The output signal of N ₃ is applied to transistors Tr ₇ and T via resistors R ₁₈ and R _19.
r ₈ are supplied to the base respectively. A transistor T is connected between both ends of a capacitor _C02 which is a power supply of the control circuit A.
The r _7, the transistor Tr ₈ across the capacitor C ₀₃ is a power source of the driving circuit B, are connected in parallel.

Hereinafter, the operation of the present embodiment will be described. When the power switch S ₁ is turned on, is charged capacitor C ₁₂ through the diode D _1, resistors R _17, when the input voltage of the NOT circuit N ₃ exceeds the threshold voltage, the output signal of the NOT circuit N ₃ is "Low"
Level, and the transistors Tr ₇ and Tr ₈ are turned off. As a result, the capacitors C ₀₂ and C ₀₃ are supplied with charge from the capacitor C ₀₁ via the resistors R ₁ and R ₉ , respectively, and the control circuit A and the drive circuit B operate. When the inverter begins oscillating operation, the oscillation output is fed back via the transformer T _1, resistors R _4, since charges the capacitor C ₀₃ through the diode D _2, enough power to the drive circuit B from the capacitor C ₀₃ Can be supplied.

Then, when the power switch S ₁ is turned off, the diode
D _1, the charging current is cut off flow to the capacitor C ₁₂ through the resistor R _17, capacitor C ₁₂ is discharged by the input impedance of the NOT circuit N _3. Voltage of the capacitor C ₁₂ is N
Becomes below OT circuit N ₃ threshold level, NOT circuit N
The output signal of ₃ becomes “High” level. This signal is the resistance R
Since the transistors Tr ₇ and Tr ₈ are supplied to the bases of the transistors Tr ₇ and Tr ₈ via the transistors ₁₈ and R ₁₉ , the transistors Tr ₇ and Tr ₈ are turned on, and the charges of the capacitors C ₀₂ and C ₀₃ are instantaneously discharged. Therefore,
Operation or failure of the control circuit A and the drive circuit B by the discharge time increases the capacitor C _02, C ₀₃ during power-off, it is eliminated abnormal oscillation may occur due to unbalance of the discharge time of the capacitor C _02, C _03.

[Effects of the Invention] As described above, in the present invention, in an inverter circuit for converting a DC power supply voltage to a high-frequency voltage, the DC power supply voltage is divided to supply power to a control circuit, and the oscillation output of the inverter is rectified and smoothed. When the power supply of the drive circuit is supplied and the DC power supply voltage is cut off, the power supply of the control circuit and the power supply of the drive circuit are reduced almost at the same time. When the power supply is in an abnormal state, the power supply voltage of the drive circuit is also reduced, and therefore, the switching element for the inverter is not driven in response to the abnormal signal. There is an effect that can be prevented.

[Brief description of the drawings]

1 is a circuit diagram of a first embodiment of the present invention, FIG. 2 is a circuit diagram of a second embodiment of the present invention, FIG. 3 is a circuit diagram of a third embodiment of the present invention, and FIG. Example circuit diagram, FIG. 5 (a),
(B) is an operation waveform diagram of the above. A is a control circuit, B is a drive circuit, C ₀₂ and C ₀₃ are capacitors, T
r ₁ and Tr ₂ are transistors.

 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-62-241295 (JP, A) JP-A-58-123375 (JP, A) JP-A-63-174575 (JP, A) JP-A 63-174575 98999 (JP, A) Fully open 1988- 8599 (JP, U) Fully open, 64-36999 (JP, U) Fully open 1-140797 (JP, U) Really open, 63-164200 (JP, U)

Claims (1)

(57) [Claims] An inverter circuit for converting a DC power supply voltage to a high-frequency voltage, a control circuit for generating a signal for controlling on / off of a switching element for the inverter, and a control circuit for dividing the DC power supply voltage to operate the control circuit. A first power supply for supplying a voltage, a drive circuit for driving an inverter switching element in accordance with a signal from the control circuit, and a second power supply for rectifying and smoothing the output of the inverter and supplying an operation voltage to the drive circuit. When the DC power supply voltage is cut off,
An inverter circuit characterized in that the first and second power supply voltages are reduced almost simultaneously.