JPH11233279A - Lighting device for illumination and lamp using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a small and cheap device whose operation is stable even in high frequency by connecting a resonance means, a first, and a second voltage drop means to a bridge input/output terminal in series and by applying the voltage of the first and second voltage drop means to control terminals of two power semiconductor devices as antiphase signals. SOLUTION: A pair of switching elements Q1, Q2 connected in series are connected across a positive electrode and a negative electrode of a voltage source 15 and provided with a connecting point N between connecting points O, Q2 and the voltage source 15. Voltage drop means Z1, Z2, a resonance inductor Lr, and a capacitor Cr are connected in series between the connecting points O, N and a discharge tube 16 is provided in series to the capacitor Cr as a load. A gating circuit for the switching elements Q1, Q2 is so switching controlled that the voltage generated by flowing of the current of the resonance load circuit to the voltage drop means Z1, Z2 is applied to the gate. The voltage of the voltage drop means Z1, Z2 is the reversed polarity with the connecting points O, N set to the standards so that the self-excited drive by the resonance frequency is sustained.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a lighting device for a discharge tube.

[0002]

2. Description of the Related Art In recent years, in a discharge tube (for example, a fluorescent lamp),
2. Description of the Related Art A method of converting a DC voltage into a high-frequency AC voltage by a lighting circuit using an inverter and applying the converted DC voltage to a resonance load circuit including a discharge tube is increasing. The resonance load circuit includes a resonance inductor and a resonance capacitor for setting a resonance frequency. Such a lighting circuit is an inverter circuit composed of two power semiconductor switching elements connected in a half-bridge structure between the positive and negative electrodes of a DC power supply, and applies the high-frequency AC voltage to both ends of a resonance load circuit. The waveform of the current flowing through the resonance load circuit (hereinafter referred to as resonance current) resonates with the inductor and the capacitor, and becomes a sine wave.
This resonance current is controlled by changing the operating frequency of the inverter.

As a conventional example for stabilizing the driving frequency of a switching element, there is a stabilizing circuit disclosed in Japanese Patent Application Laid-Open No. 8-45685. This circuit has a half-bridge circuit that supplies an AC voltage to a resonance load circuit including a discharge lamp, shunts a part of the resonance current to a capacitance and a feedback transformer, and performs a half-bridge according to the secondary voltage of the feedback transformer. Control signals are applied to the high-side and low-side switching elements of the circuit. This conventional example describes a lighting device for an electrodeless fluorescent lamp that does not include a filament and generates plasma with magnetic lines of force emitted from an excitation coil, unlike an ordinary fluorescent lamp. Electrodeless lamps supply a high-frequency current of several MHz to a solenoid-shaped excitation coil to emit magnetic field lines, and form ions generated by induction discharge inside the bulb into a closed-loop discharge current (plasma) by electromagnetic coupling from the magnetic field lines. I do. The mercury vapor in the plasma is excited by an induced electric field, emits ultraviolet light, and is applied to a phosphor applied on the inner surface of the tube to be converted into visible light.

[0004]

In the above conventional example, a control signal having the same frequency as the resonance current is supplied to the half bridge circuit by a feedback transformer. In other words, the circuit is a self-excited circuit in which the operation of the half-bridge circuit continues even when no signal is externally supplied, and is particularly suitable for high-frequency operation. However, since the feedback transformer has a self-inductance, a phase difference occurs between the control signal and the resonance current, and the frequency of the control signal may deviate from an appropriate value. If the phase difference and the frequency deviate from appropriate values, a through current may flow through the half-bridge circuit, causing an increase in loss. Therefore, a first problem to be solved by the present invention is to provide lighting circuit means that is stable in high-frequency operation. Further, the electrodeless fluorescent lamp which is controlled in the conventional example is provided with an excitation coil, and if this excitation coil can be used as a resonance inductor, it is effective in reducing parts cost and miniaturizing a circuit. However, the equivalent inductance of the excitation coil is affected by the plasma, and its value varies depending on the light emission state of the lamp. Therefore, a second object of the present invention is to realize a lighting circuit in which an excitation coil of an electrodeless fluorescent lamp can be used as a resonance inductor.

As described above, an object of the present invention is to provide a compact and inexpensive lighting device for a discharge tube lighting device, which operates stably even at a high frequency.

[0006]

In order to solve the above-mentioned problem, an AC voltage is applied to resonance means having an inductor and a capacitor in response to switching of two bridge-connected power semiconductor elements, and the inductor or the inductor is connected. In a lighting device for supplying an alternating current to a discharge tube connected to one of the capacitors, the resonance means and the first and second voltage drop means are connected in series to an input / output terminal of the bridge. This can be achieved by applying the voltages of the first and second voltage drop means as opposite phase signals to the control terminals of the two power semiconductor elements.

Another problem of using an excitation coil of an electrodeless fluorescent lamp as an inductor for resonance is a bridge circuit having two power semiconductor elements, a capacitor between the input / output terminals of the bridge circuit, and the excitation circuit. The coil and the first and second voltage drop means are connected in series, and the voltages of the first and second voltage drop means are passed through the first and second phase shift means as signals of opposite phases. This can be achieved by applying the voltage to the control terminals of the two power semiconductor elements.

[0008]

FIG. 1 shows a lighting circuit for supplying an alternating current to a discharge tube 16. The discharge tube 16 is mainly intended for an electrodeless fluorescent lamp. The voltage source 15 supplies a DC voltage to the lighting circuit of the discharge tube 16. Normally, the voltage source 15 rectifies an AC voltage with a rectifier circuit composed of a diode bridge to generate a DC voltage. A pair of switching elements Q1 and Q2 connected in series are connected between the positive electrode and the negative electrode of the voltage source 15, the connection point between the switches is O, and the connection point between Q2 and the negative electrode of the voltage source 15 is N. And Voltage drop means Z1, Z2, a resonance inductor Lr, and a resonance capacitor Cr are connected in series between points O and N, and a discharge tube (or fluorescent lamp) 16 is provided in parallel with Cr as a load. These constitute a resonance load circuit, and the frequency of the current of the resonance load circuit is determined by each value. The resonant load circuit includes a switching element Q
A bidirectional current is caused to flow by the alternating switching operation of 1 and Q2 to light the discharge tube. Switching elements Q1, Q
Reference numeral 2 denotes, for example, an n-channel MOSFET having a drain terminal for inputting a current, a source terminal for outputting a current, and a gate terminal to which a control voltage is applied or removed, and to which a control voltage is applied or removed to a gate terminal. As a result, the current flowing between the drain and the source flows or is cut off. MO
The SFET has a built-in diode in the direction from the source terminal to the drain terminal. Hereinafter, the diode built in Q1 is referred to as QD1 and the diode built in Q2 is referred to as QD2.
In FIG. 1, the gate circuits of the switching elements Q1 and Q2 are voltage drop means Z1 and Z2, respectively, of the resonance load circuit, and apply a voltage generated by flowing the current of the resonance load circuit to Z1 and Z2 to the gate. The switching operation of Q1 and Q2 is controlled. Since the voltages of the voltage drop means Z1 and Z2 generated by the current of the resonant load circuit have opposite polarities with respect to the points O and N, the switching elements Q1 and Q2 perform alternate switching operations. Thereby, the self-excited driving synchronized with the frequency of the current of the resonance load circuit is maintained.

In the circuit of FIG. 1, switching elements Q1, Q
2 are turned on and off at the voltage drop means Z1 and Z2.
To adjust the brightness of the discharge tube, Z
A method of selecting the values of 1, Z2 is used. Here, the brightness of the discharge tube can be adjusted by changing the magnitude of the resonance current IL. As the switching frequency f of the lighting circuit becomes higher than the resonance frequency fo determined by the resonance inductor and the resonance capacitor, the current IL decreases. Based on this principle, the lighting device performs dimming by controlling the switching frequency f. For example, the current I
In order to reduce L, the conduction period of the switching element may be shortened and the switching frequency may be set higher. As described above, in FIG. 1, the brightness of the discharge tube is adjusted by the voltage drop means. FIG. 2 shows a lighting circuit further provided with the adjustment means. 1 and FIG. 2, the same parts are shown in FIG.
And the description is omitted here. In FIG. 1, the gate circuits of the switching elements Q1 and Q2 are the voltage drop means Z1 and Z2, respectively, of the resonance load circuit. In FIG. 2, however, between the gate terminals of the switching elements Q1 and Q2 and the voltage drop means Z1 and Z2, respectively. Are provided with phase shift means Z3 and Z4, respectively. The phase shift means plays a role of giving a phase delay or advance when applying the voltage of the voltage drop means between the gate and the source of Q1 and Q2. In this way, the on and off timings of Q1 and Q2 can be arbitrarily adjusted, and dimming becomes possible.

In FIG. 2, the voltage drop means Z1, Z2 and the phase shift means Z3, Z4 are, for example, capacitors, inductors, resistors, or a combination thereof.
FIG. 3 shows voltage drop means Z1 and Z2 and phase shift means Z3.
An example of a specific lighting circuit using a passive element for Z4 will be described. In this embodiment, a capacitor C as a voltage drop means is used.
1 is provided between the connection point O and the resonance inductor Lr, and the capacitor C2 is connected to the resonance capacitor Cr and the connection point N.
Are provided between them. Resistors R1 and R2 are connected in parallel to C1 and C2, respectively. A DC component to be superimposed on the voltages of C1 and C2 is determined.
The voltage of the capacitor varies with the same amplitude with respect to zero volts. An inductor L1 and a resistor Rd1 are provided in series between one end of the capacitor C1 and the gate terminal of Q1 as a phase shift means. Similarly, an inductor L2 and a resistor Rd2 are connected in series between one end of the voltage drop means C2 and the gate terminal of Q2. And a phase shift means connected to the power supply. L1 and Rd1 give a phase delay when the voltage of C1 is applied between the gate and source of Q1. Similarly, L2 and Rd2 also give a phase delay when the voltage of C2 is applied between the gate and source of Q2.
Zener diodes ZD5 and ZD6 coupled in series in opposite directions are provided in parallel between the gate and source of Q1. Similarly, Zener diodes ZD7 and ZD8 are provided in parallel between the gate and source of Q2. These function to prevent the destruction of the switching element when an overvoltage is applied between the gate and the source. Some MOSFETs already have a built-in Zener diode for gate overvoltage protection. When such a switching element is selected, the above-mentioned Zener diode may be removed.

In FIG. 3, in order for Q1 and Q2 to perform an alternate switching operation, a circuit for starting the operation is required.
Next, the starting circuit will be described. The starting circuit is a voltage source 1
The resistors Rs1 and Rs2 and the starting capacitor Cs are connected in series between the positive electrode and the negative electrode of No. 5, and the connection point between Rs1 and Rs2 is connected to the connection point O between Q1 and Q2. Capacitor C
s is charged to the starting voltage from the voltage source 15 through the resistors Rs1 and Rs2. As a switch breakover voltage forms between Rs2 and connection points of the Cs and Q2 the gate terminal of, for example, "SIDAC" (S ilicon D iode for A lternating C ur
It includes a bi-directional thyristor 17 called a rent. In these starting circuits, when the voltage of the starting capacitor Cs is equal to or lower than the breakover voltage of SIDAC17, SIDAC17 is off and the resonance capacitor Cr is charged from the voltage source 15 via the resistor Rs1.
When the voltage of the starting capacitor Cs reaches the breakover voltage of SIDAC17, SIDAC17 turns on and Cs
The stored charge of Q2 moves to the gate-source capacitance of Q2 via SIDAC17. As a result, Q2 is turned on, a current flows through the load resonance circuit by the charging voltage of the resonance capacitor Cr, and Q1 and Q2 start switching operations alternately.
Here, in a steady operation state, the voltage of the starting capacitor Cs needs to be lower than the breakover voltage of SIDAC17 in order to suppress the operation of the starting circuit. In the steady operation state, the voltage at the connection point O of Q1 and Q2 alternates between the positive electrode and the negative electrode of the voltage source 15, so that the voltage of Cs becomes SIDAC1.
Resistance Rs2 so as to be equal to or lower than the breakover voltage of
And the time constant of Cs.

Next, the gate circuit will be described in detail.
Here, a high-side gate circuit is used. When the gate circuits are equivalently expressed, they are distinguished by the states of the Zener diodes connected to the respective switching elements. FIG. 4 is an equivalent circuit when the Zener diode is turned on. When the internal resistance of the Zener diode is Rz, the configuration is such that the Zener diode is connected in series with the phase shift means L1 and Rd1. In FIG. 4, Rz and the combined impedance Zg of the phase shift means Rd1 and L1 are inductive. In this case, the current ig flowing through the paths of L1, Rd1, and Rz has a lag phase with respect to the voltage Vc1 of the capacitor C1 based on the connection point O. On the other hand, when the Zener diode is off, the equivalent circuit is as shown in FIG. 5, and when the input capacitance of Q1 is Ciss, the equivalent circuit is Ci.
ss is configured to be connected in series with the phase shift means L1 and Rd1. In FIG. 5, the combined impedance Zg of Ciss, L1 and Rd1 is capacitive or inductive from the relationship between the magnitude and frequency of Ciss and L1, or Ciss and L1.
If the reactances of the two become the same value, only the resistance is obtained. Therefore, the current ig flowing through the impedance Zg composed of Ciss, L1 and Rd1 is advanced or delayed or in phase with respect to the voltage Vc1 of C1 based on the connection point O.

In the lighting circuit shown in FIG. 3, the maximum value of the current flowing through the load resonance circuit differs depending on the lighting state of the discharge tube 16. When the discharge tube is not lit, the current flowing through the circuit is large, so that the capacitor C
1, C2 voltages Vc1 and Vc2 increase. Let the Zener voltage of the Zener diode connected to Q1 be Vz,
When Vc1 exceeds Vz, the Zener diode is turned on, and the gate circuit becomes an equivalent circuit as shown in FIG. After the discharge tube is turned on, the current flowing through the circuit becomes smaller, so that the voltages Vc1 and Vc2 of the capacitors C1 and C2 decrease.
If Vc1 and Vc2 are equal to or lower than Vz, the gate circuit is configured as shown in FIG.
The equivalent circuit is as follows. Here, the voltage of Ciss is the voltage between the gate and the source of Q1, and L1, Rd1, Ciss
The waveform is delayed by π / 2 [rad] from the current flowing through the path. Next, the current flowing through the resonance load circuit is defined as iL, and C1
Is expressed as vc, and the voltage vg between the gate and the source is expressed as follows.

[0014]

(Equation 1)

Here, the combined impedance of FIG.
The impedance consisting of Ciss, L1 and Rd1 in FIG. 5 is represented by Zg, and the phase difference between iL and vc is φz, iL
And vg is represented by φg. φz differs depending on the impedance of the voltage drop means Z1, Z2 and the phase shift means Z3, Z4. As described above, φg also becomes a positive or negative value depending on the characteristic of the impedance Zg including Ciss, L1 and Rd1 of the gate circuit.

Next, the operation of the circuit of FIG. 3 will be described with reference to FIG. FIG. 6 shows waveforms at various points in the embodiment of FIG. The discharge tube 16 is supplied with a high-frequency current by a resonance load circuit using Q1, Q2 and Lr, Cr. If the direction of the current IL flowing out of the point O in FIG. 3 is defined as positive in FIG. 3, Q1 and Q1
2, and four operation modes related to QD1 and QD2. These periods are shown as t1 to t4 in FIG. Hereinafter, each operation mode will be described.

Mode 1 (t1 period): When Q1 is turned on, a current IL flows from the capacitor 15 through the path of Q1, C1, Lr, Cr and C2. The current IL charges the Cr and partially flows to the discharge tube 16. Further, the capacitor C1 is charged by IL, and hereinafter, the voltage of C1 is represented as Vc1. In mode 1, the voltage applied between the gate and the source of Q1 has a voltage waveform indicated by a solid line that gives a phase delay to Vc1. As a result, the time required for the gate voltage of Q1 to fall below the threshold value, that is, the time required for turning off the transistor, becomes longer. When the gate voltage falls below the threshold voltage of the MOSFET, Q1 turns off.

On the other hand, when the capacitor C2 is charged by the IL and the voltage of C2 is expressed as Vc2, the capacitor voltage Vc2 indicated by a broken line based on the point N increases. The voltage applied between the gate and the source of Q2 has a voltage waveform indicated by a solid line that gives a phase delay to Vc2. This gives Q
The time required for the gate voltage of Q2 to fall below the threshold value, that is, the time required for turning off the transistor, becomes longer. The current IL is Lr and Cr
This method turns off Q1 in accordance with the voltage of Vc1, thereby turning off Q1 during a period when the polarity of the current IL is positive. Voltage drop means C1
If the values of Cc and C2 are the same, Vc1 and Vc2 generated by the current IL flowing therethrough have the same magnitude, but have waveforms of opposite polarities with respect to the points O and N, respectively.

Mode 2 (t2 period): When Q1 is turned off, the current IL has a positive polarity and a value, and this current continues to flow through the paths of Lr, Cr, C2, QD2, and C1. A part of the current IL flows to the discharge tube 16 by shunting.

The current IL acts to charge C2,
Vc2 increases with reference to point N, and the gate voltage of Q2 also increases. When the gate voltage exceeds the threshold voltage of the MOSFET, Q2 turns on. Further, the current polarity during the mode 2 period is opposite to Q2, and the current continues to flow through QD2 even if the gate voltage is charged as long as the polarity of the current does not change as shown in FIG. Mode 2 is a period until the polarity of the current IL changes to negative, and during this period, the voltage Vc1 of C1 further decreases. As a result, the Vc1 voltage is applied as a reverse bias between the source and gate of the gate voltage of Q1, so that Q1 does not momentarily turn on again due to noise or the like, and a stable off state can be secured.

Mode 3 (t3 period): When the polarity of the current IL changes from positive to negative, IL flows into Q2 charged with the gate voltage in mode 2. That is, IL flows as a discharge current of Cr through a path of Q2, C2, Cr, Lr, C1, and C2.
Is charged by IL. When Vc2 decreases due to IL and the gate voltage falls below the threshold voltage of the MOSFET,
Q2 turns off. In mode 3, as in mode 1, Q2 turns off during the period in which the polarity of current IL is negative. On the other hand, the voltage of C1 increases based on the point O.

Mode 4 (t4 period): When Q2 is turned off, the current IL has a negative polarity and has a value, and the current IL is changed to Lr, C by electromagnetic energy accumulated in Lr.
1, Q1, the voltage source 15, C2, Cr, and Lr continue to flow. A part of the current IL flows to the discharge tube 16 by shunting.

The current IL charges C1, and as Vc1 increases, the gate voltage of Q1 increases. Gate voltage is MO
When the voltage exceeds the threshold voltage of the SFET, Q1 turns on. However, the current polarity during the mode 4 is opposite to that of Q1, and the current continues to flow through QD1 even if the gate voltage is charged, as long as the polarity of the current does not change. Mode 4 is a period until the polarity of the current IL changes to positive, and during this period, the voltage Vc2 of C2 decreases.

As described above, the operations from mode 1 to mode 4 are performed during one cycle of the current IL, and thereafter, this operation is repeated.

In FIG. 3, the values of the gate inductors L1 and L2 as phase shift means are used as parameters, the phase difference between the resonance load current IL and the gate-source voltage of Q1 and Q2 is φg, and the operating frequency of the lighting circuit is fs. Then, the characteristics are as shown in FIG. Explaining with reference to FIG.
s, Rd1, L1 in a series circuit
When the reactance of iss is larger than the reactance of L1, that is, when the capacitance is capacitive, the impedance of the series circuit approaches inductive by increasing L1. This results in a delay in the current flowing in the series circuit, and a delay in the gate voltage, which is the voltage of Ciss. Accordingly, the phase difference φg of the gate voltage with respect to the resonance load current becomes smaller, and the conduction period of the switching element becomes longer, so that the switching frequency becomes lower. As described above, by providing the phase shift means, Q1,
The operating frequency can be changed by arbitrarily adjusting the on / off timing of Q2.

The embodiments described above have a circuit configuration in which the voltage of the voltage drop means is applied to the switching element to perform an alternate switching operation. On the other hand, FIG. 8 shows a lighting circuit in which the voltage drop unit is used as a resonance current detecting unit. The configuration of the resonance load circuit is the same as that of FIG. Referring to FIG. 8, first, the high-side drive circuit 11 for driving Q1 will be described. The power supply of 11 is Q1, Q2
The capacitor 13 based on the connection point O is turned on, and Q2 is turned on to charge via the diode D1 from the voltage of the capacitor C14 based on the point N. This method is called a bootstrap method and is described in U.S. Pat. No. 4,316,243. A CMOS inverter including elements 1 and 2 is provided between the positive electrode and the negative electrode of the capacitor 13, and the output is connected to the gate of Q1. When the element 1 is turned on (in this case, 2 is off), the CMOS inverter supplies a current for applying a voltage to the gate terminal of Q1. Apply current to discharge. A signal is supplied from the NAND circuit 5 to the control terminal of the CMOS inverter composed of 1 and 2. The voltage of the capacitor C1 is compared by the comparator 6 with a reference voltage Vref1 based on the connection point O, and the output of the comparator 6 is input to the NAND circuit 5. A positive power supply is supplied from 15 to the comparator 6. Further, between both terminals of the capacitor 13, there is provided a start / stop means in which a resistor R3 and a switch S1 are connected in series, and a NAND circuit 5 is connected from the connection point between R3 and S1.
Connect to the input of. In FIG. 8, when S1 is turned off, it is started, and when S1 is turned on, it is stopped.

Next, the drive circuit 12 on the low side will be described. The drive circuit 12 has the same configuration as the drive circuit 11 on the high side. The power supply of the drive circuit 12 is a capacitor 14 with reference to the point N, and the elements 3 and 4 are connected between the positive electrode and the negative electrode of the capacitor 14. And the output thereof is connected to the gate of Q2. A signal is supplied from the NAND circuit 7 to the control terminal of the CMOS inverter composed of 3 and 4. The voltage of the capacitor C2 is compared with the reference voltage Vref2 based on the point N by the comparator 8, and the output of the comparator 8 is input to the NAND circuit 7. It is desirable that the high-side reference voltage Vref1 and the low-side reference voltage Vref2 have the same voltage value. A resistor R is connected between both terminals of the capacitor 14.
4 and a switch S2 connected in series.
The connection point between R4 and S2 is connected to the input of the NAND circuit 7. If S2 is turned off in the same manner as S1, activation is started, and S2
Turn on to stop.

Next, the operation of the lighting circuit will be described with reference to FIG. FIG. 9 shows waveforms at various points in the embodiment of FIG. Hereinafter, each operation mode will be described with reference to FIG.

Mode 1 (t1 period): When Q1 is turned on, a current IL flows from the voltage source 15 through the paths of Q1, C1, Lr, Cr, and C2. The capacitor C1 is charged by IL, and Vc1 decreases with reference to the point O. Vc1 is the comparator 6
Is compared with the reference voltage Vref1 (VHL). Vc
When 1 falls below Vref1, the output of the comparator 6 changes from High to Low.
Changes to This output is received by the NAND circuit 5, and the CM
The element 2 of the OS inverter is turned on to discharge the gate voltage of Q1, and Q1 is turned off.

The operation up to this point is mode 1, in which the capacitor C2 is charged by the IL and Vc2 increases, but Q2 is kept off since it does not reach the reference voltage Vref2 (VLH).

Mode 2 (t2 period): When Q1 is turned off, the current IL has a positive polarity and a value, and this current continues to flow through the paths of Lr, Cr, C2, QD2, and C1. A part of the current IL flows to the discharge tube 16 by shunting.

The current IL charges C2, and the current IL
c2 increases. When Vc2 reaches Vref2 (VLH), the output of the comparator 8 changes from Low to High. The output is received by the NAND circuit 7, and the element 3 of the CMOS inverter is turned on to charge the gate voltage of Q2. Further, the current polarity during the mode 2 period is opposite to Q2, and the current continues to flow through QD2 as long as the polarity of the current does not change even if the gate voltage is charged as shown in FIG. Current IL
Is a mode 2 until the polarity of C2 changes to negative. During this period, the voltage Vc2 of C2 keeps increasing,
Voltage Vc1 further decreases.

Mode 3 (t3 period): When the polarity of the current IL changes from positive to negative, IL flows through Q2 charged with the gate voltage in mode 2. That is, IL flows as a discharge current of Cr through a path of Q2, C2, Cr, Lr, and C1, and IL
As a result, Vc2 decreases. Vc2 is calculated by the comparator 8.
This is compared with Vref2 (VHL). When Vc2 becomes equal to or lower than Vref2, the output of the comparator 8 changes from High to Low. The output is received by the NAND circuit 7, the element 4 of the CMOS inverter is turned on to discharge the gate voltage of Q2, and Q2 is turned off. I do.

The operation up to this point is mode 3, in which the capacitor C1 is charged by IL and Vc1 increases, but Q1 is kept off since it does not reach the reference voltage Vref1 (VLH).

Mode 4 (t4 period): When Q2 is turned off, the current IL has a negative polarity and has a value, and the current IL is changed to Lr, C by the electromagnetic energy accumulated in Lr.
1, QD1, voltage source 15, C2, Cr, and Lr. A part of the current IL flows to the discharge tube 16 by shunting.

When the current IL charges C1 and Vc1 increases and exceeds the value of Vref1 (VLH), the output of the comparator 6 changes from low to high. The element 1 of the inverter turns on and charges the gate voltage of Q1. However, the current polarity during the mode 4 is opposite to that of Q1, and the current continues to flow through QD1 even if the gate voltage is charged, as long as the polarity of the current does not change. Mode 4 is a period until the polarity of the current IL changes to positive. During this period, the voltage Vc1 of C1 continues to increase, and the voltage Vc2 of C2 further decreases.

The operations from mode 1 to mode 4 are performed during one cycle of the current IL, and thereafter, this operation is repeated.

Next, a method for adjusting the brightness of the discharge tube will be described. For example, to reduce the current IL,
What is necessary is just to shorten the conduction period of the switching elements Q1 and Q2. According to the present invention, the reference voltage is controlled so that the time until the voltage of the capacitor C1 or C2 falls below the reference voltage Vref (VHL) is shortened. In FIG. 8, the voltage of the capacitor C2 is changed by the low-side drive circuit to the reference voltage Vref2.
And outputs a signal to the NAND circuit 7 in comparison with the comparator 8. The dimming signal for giving the reference voltage Vref2 (VHL) of the comparator 8 at an arbitrary timing causes the VHL at the time of normal lighting to be performed.
By making it higher, the conduction period of Q2 can be shortened. In this way, the low-side reference voltage
By changing Vref2, dimming becomes possible.

The load resonance circuit of the lighting circuit described above is a current resonance type having a resonance inductor Lr and a capacitor Cr. If the discharge tube 16 is an electrodeless lamp, the excitation coil
Since the high-frequency current of MHz is supplied, the inductor Lr used in the high-frequency circuit of MHz becomes an expensive component. The excitation coil has a structure in which a magnetic material has a solenoid-shaped winding, and is equivalently an inductor. FIG. 10 shows a lighting circuit having a configuration that also serves as an excitation coil and a resonance inductor of an electrodeless lamp. The discharge tube 16 is an electrodeless lamp provided with a winding on a magnetic material, and Lc in the figure indicates an equivalent inductor of the winding. The electrodeless lamp is IEEE TRANSACTIONS ON POWER
ELECTRONICS VOL.12, NO.3, pp.507-516,19
As described in 97, the windings of the excitation coil and the plasma generated in the discharge tube can be replaced by a transformer as shown in FIG. In FIG. 11, the primary winding of the transformer is a winding of an excitation coil, and the plasma corresponds to a secondary winding having an equivalent inductor of La and an equivalent resistance of Ra.

Thus, the equivalent circuit of the transformer-coupled electrodeless lamp differs before and after lighting. FIG. 12 shows an equivalent circuit before lighting, and since no plasma is generated in the discharge tube, the inductor Lc in the figure is a pure inductor of a coil wound around a magnetic material. On the other hand, after lighting, since the equivalent inductance and resistance of the plasma exist, FIG.
Is an equivalent circuit in which the inductor Ls and the resistor Rs are connected in series. The value of the inductor Ls differs from that of the inductor Lc in FIG. 12 depending on the equivalent inductor La of the plasma. Therefore, the resonance frequency of the resonance load circuit differs before and after lighting. FIG. 14 shows a resonance curve of the resonance load circuit. From the figure, since the equivalent inductance of the excitation coil after lighting is smaller than that before lighting, the resonance frequency fr2 after lighting is higher than the resonance frequency fr1 before lighting.

In the lighting circuit having the configuration in which the excitation coil of the electrode lamp also functions as the resonance inductor, the equivalent inductance of the excitation coil changes depending on the lighting state of the lamp as described above. ,
The change in the resonance frequency of the resonance load circuit increases. Therefore, the lighting circuit must maintain the self-excited drive in synchronization with the load fluctuation.

FIG. 15 shows a lighting circuit having a configuration which also serves as an excitation coil and a resonance inductor of an electrodeless lamp. FIG.
, The voltage drop means C1 and C
2, a resonance capacitor Cr and an excitation coil / resonance inductor Lc of the discharge tube 16 are connected in series. The gate circuits of the switching elements Q1 and Q2 have the same configuration as the circuit of FIG. 3 described above, and the equivalent circuit is the same as that of FIG. Next, self-excited driving synchronized with a change in load will be described. FIG.
Reference numeral 6 denotes a phase difference φg between the resonance current and the gate voltage when the resonance frequency of the load resonance circuit changes. From the figure,
As the resonance frequency increases, the phase difference φg decreases. This is because when the impedance Zg of the series circuit composed of Ciss, Rd1, and L1 in FIG. 5 is capacitive, Zg approaches inductive with an increase in frequency.
As a result, the current flowing through the series circuit is delayed, and the gate voltage, which is the voltage of Ciss, is also delayed. Therefore, the phase difference φg of the gate voltage with respect to the resonance load current becomes small. In this way, the gate circuit automatically adjusts the phase difference between the resonance current and the gate voltage in response to the change in the resonance frequency due to the load change,
Works to maintain self-excited drive. That is, by providing the phase shift means in the gate circuit, 1) the on / off timing of Q1 and Q2 can be arbitrarily adjusted to change the operating frequency.

2) Even if the resonance conditions are different due to the fluctuation of the load, the driving can be followed.

In this system, the switching elements Q1,
When the gate voltage of Q2 becomes close to the threshold voltages of Q1 and Q2, there is a possibility that upper and lower short circuits may be caused. Also, Q
When the gate voltage is turned on before the voltage between the drain and source of Q1 and Q2 is completely reduced to zero potential when Q1 and Q2 are turned on, Q1 and Q2 may generate heat. FIG. 17 shows the latter phenomenon using the waveforms of the drain-source voltage Vds, gate voltage Vg, and resonance current IL of the high-side gate circuit. As shown in the figure, when the gate voltage Vg has a waveform shown by a broken line, the element generates heat as described above. On the other hand, when the ON of the gate voltage Vg is delayed to have a waveform as shown by a solid line, heat generation can be prevented. As described above, when Q1 and Q2 are turned on, it is possible to suppress the upper and lower short circuit and heat generation by giving the delay time to the gate voltage waveform.

FIG. 18 shows a high-side gate circuit in which a delay period is provided for the gate voltage. Since the low-side gate circuit has the same configuration, the illustration is omitted. FIG.
, The voltage drop means is a capacitor, and the phase shift means connects an inductor and a resistor in series. The configuration so far is the same as that of FIG. 15, except that a capacitor Cd1 is provided between the gate terminal and the drain terminal of Q1. Next, the operation will be described.

When Q2 turns off, the built-in diode Q of Q1
The resonance current circulates through D1, and the voltage Vds between the drain and source of Q1 decreases. If a current for charging the capacitance between the gate and the source flows during this time, the gate current flows bypassing the capacitor Cd1, so that an increase in the gate voltage is suppressed and a delay period is provided.

FIG. 19 shows a high-side gate circuit in which a delay period is provided in the gate voltage as in FIG. In FIG. 19, the voltage drop means and the phase shift means are the same as those in FIG.
1 in parallel. The direction of Dg1 is such that the anode terminal is connected to the gate terminal of Q1, and the cathode terminal is connected to the connection point between the resistors Rd1 and L1. The diode Dg1 is L
1 may be connected in parallel. In this case, Dg1
The direction of the anode terminal is the connection point of the resistance Rd1 and L1,
The cathode terminal is connected to a connection point between L1 and C1. FIG.
9, when the gate-source capacitance is charged,
The gate current flows through the path of the phase shift means L1, Rd1. On the other hand, when the electric charge of the capacitance between the gate and the source is discharged, a current flows through the path of the diodes Dg1 and L1. As described above, the current paths for charging and discharging the capacitance between the gate and the source are different from each other, that is, by switching the impedance of the gate circuit, a delay can be provided when the polarity of the gate voltage is reversed.

The lighting circuit of FIG. 20 includes zener diodes ZD2 and ZD3 at the gate terminals of Q1 and Q2 and one end of capacitors C1 and C2, and provides a dead time period when the upper and lower switching elements are turned on and off. In the case of such a gate circuit, the phase difference between the resonance current and the gate voltage becomes a fixed value.
It is desirable that the resonance frequency is not changed even when the load changes. In FIG. 20, the voltage applied between the gate and the source of Q1 is the difference voltage between the voltage Vc1 of the capacitor C1 and the zener voltage of ZD2. Similarly, the voltage applied between the gate and the source of Q2 is the voltage of Vc2 and ZD
3 is the difference voltage of the zener voltage. Thereby, Q1, Q
2 is on, the gate voltage of the switching element that is off is reduced by the Zener voltage of the Zener diode connected to the other gate terminal, and Q1 and Q2 are dead on and off. Insert time.

In the above-described embodiments, the voltage drop means Z1,
Although Z2 is the capacitors C1 and C2, an inductor, a resistor, or a combination thereof may be used. FIG. 21 shows a lighting circuit using resistors R7 and R8 as voltage drop means Z1 and Z2. Here, when a resistor is connected in series to the resonance load circuit, the maximum value of the current flowing through the circuit becomes small. Therefore, it is desirable to set the resistance to a small value. The phase shift means L1 and Rd1 have the same configuration as in FIG.
, L1 and Rd1 have different combined impedances.

Next, the operation of the circuit of FIG. 21 will be described with reference to FIG. FIG. 22 shows waveforms at various parts of the high-side gate circuit in the embodiment of FIG. In FIG. 22, a voltage Vr7 having a phase opposite to that of the resistor R7 with respect to the point O is generated in the resistor R7 by the current IL flowing through the resonance load circuit. The current Ig1 flowing through the phase shift means L1 and Rd1 is equal to Cis of Q1.
When the combined impedance of s, L1, and Rd1 is made inductive, the waveform has a phase delayed from Vr7. The voltage applied between the gate and source of Q1 is π / 2 less than Ig1.
[Rad] The waveform is delayed in phase. On the other hand, for the low-side gate circuit, the voltage of the resistor R8 is equal to the resonance current I
Since the phase becomes the same as L, the operation opposite to that on the high side is performed.

FIG. 23 shows a lighting circuit using inductors L3 and L4 as voltage drop means Z1 and Z2. here,
When an inductor is connected in series to the resonance load circuit, the resonance frequency of the load circuit is determined by the combined inductance including the voltage drop means L3 and L4. Phase shift means L
1 and Rd1 are the same as in FIG.
The combined impedances of L1 and Rd1 are different.

Next, the operation of the circuit of FIG. 23 will be described with reference to FIG. FIG. 24 shows the waveform of each part of the high-side gate circuit in the embodiment of FIG. In FIG. 24, when the current IL flows through the resonance load circuit, the voltage VL3 of the inductor L3 generated based on the point O has a waveform with a delay phase with respect to IL. The current Ig1 flowing through the phase shift means L1 and Rd1 is VL when the combined impedance of the gate circuit composed of Ciss, L1 and Rd1 of Q1 is made inductive.
It becomes a waveform with a phase lag behind 3. The voltage applied between the gate and the source of Q1 has a waveform delayed by π / 2 [rad] from Ig1. On the other hand, with respect to the gate circuit on the low side, since the voltage of the resistor R8 has the same phase as the resonance current IL, the operation opposite to that on the high side is performed.

FIG. 25 shows an embodiment in which the present invention is applied to a conventional lighting circuit as disclosed in JP-A-8-45685. In FIG. 25, a pair of switching elements Q1 and Q2 connected in series are connected between a positive electrode and a negative electrode of the voltage source 15. Connection points O and Q2 of those switches
The resonance inductor Lr, the resonance capacitor Cr, and the winding T3 are connected in series between the power supply 15 and the connection point N of the negative electrode of the voltage source 15.

The discharge tube 1 is used as a load in parallel with Cr and T3.
6 is provided. Windings T1 and T2 are connected between the gates and sources of Q1 and Q2 via phase shift means Z3 and Z4, respectively, and zener diodes connected in series in opposite directions are provided in parallel. Windings T1 and T2
Have opposite polarities and are magnetically coupled to the winding T3. The winding T3 detects a current flowing through the resonance load circuit, feeds it back to the windings T1 and T2, and performs a switching operation of Q1 and Q2. Here, the phase shift means Z3 and Z4 connected to the gate terminals are, for example, capacitors, inductors, resistors, or impedances obtained by combining them.
2 is arbitrarily adjusted to turn on and off, and the operating frequency is changed. In order to provide a dead time between ON and OFF of the upper and lower switching elements, it is desirable to use a gate circuit as shown in FIG. 18, FIG. 19 or FIG.

FIG. 26 shows an embodiment in which the present invention is applied to a lighting circuit having a configuration which also serves as an excitation coil and a resonance inductor of an electrodeless lamp. In FIG. 26, a resonance capacitor Cr and an excitation coil / resonance inductor Lc of the discharge tube 16 are connected in series between the connection points O and N. A capacitor Ct and a winding T3 connected in series are connected to both ends of Cr. FIG. 2 shows the gate circuits of Q1 and Q2.
5, and the description is omitted. In the resonance load circuit as shown in FIG. 26, since the equivalent inductance of the excitation coil changes depending on the lighting state of the lamp as described above, the change in the resonance frequency of the resonance load circuit becomes larger than when the resonance inductor Lr is provided. . When the resonance conditions due to the load fluctuation are different as described above, the phase shift means Z3 and Z4 connected to the gate terminal work to change the impedance and maintain the self-excited driving.

FIG. 27 shows an embodiment in which an N-channel switching element is used on the high side and a P-channel switching element is used on the low side in a lighting circuit configured to also serve as an excitation coil and a resonance inductor of an electrodeless lamp. Between the connection points O and N, there is a voltage drop means Z1, a resonance capacitor Cr, an excitation coil and a resonance inductor Lc of the discharge tube 16.
Are connected in series. One end of the voltage drop means Z1 and Q
Phase shift means Z3, Z4 between the gate terminals of Q1 and Q2.
Are connected, and the voltage of Z1 is changed through Z3 and Z4.
It is applied to the gate terminals of Q1 and Q2. If an overvoltage is applied between the gate and the source of Q1 and Q2, a Zener diode coupled in series in the opposite direction may be provided to prevent the switching element from being destroyed. As described above, by using the P-channel switching element on the low side and a complementary lighting circuit, the voltage drop means connected to the resonance load circuit can be commonly used as the gate circuit of the upper and lower switching elements. is there.
Since the number of components is reduced as compared with the N-channel switching element on the low side, there is an effect of cost reduction. Further, when there are two voltage drop means Z1 and Z2 in the resonance load circuit, it is conceivable that the balance of the upper and lower switching operations may be lost due to variations in these components. Can solve problems. Although the resonance load circuit of FIG. 27 is illustrated as having a configuration in which both the excitation coil of the electrodeless lamp and the resonance inductor are used, a configuration having a resonance inductor may be used.

In the embodiments described above, a lighting circuit for supplying an alternating current to a current resonance type load circuit having a resonance inductor Lr and a capacitor Cr by an alternate switching operation of a pair of switching elements Q1 and Q2 connected in series. Met. In contrast, FIG. 28 shows a lighting circuit that supplies power to the resonance load circuit with one switching element. The lighting circuit of FIG. 28 is configured to also serve as an excitation coil and a resonance inductor of an electrodeless lamp, and includes an inductor Lr and a capacitor Cp connected in series between a positive electrode and a negative electrode of the voltage source 15. The switching element Q1 is connected to both ends. Here, assuming that the connection point between Lr and Cp is O and the connection point between Q1 and the negative electrode of the voltage source 15 is N,
Voltage drop means Z1, resonance capacitor Cr, excitation coil of discharge tube 16 and resonance inductor L are provided between points O and N.
c are connected in series. In FIG. 28, a phase shift means Z3 is provided between the gate terminal of the switching element Q1 and the voltage drop means Z1. This phase shift means plays a role of giving a phase delay or advance when applying the voltage of the voltage drop means between the gate and the source of Q1.
The on / off timing of Q1 is arbitrarily adjusted. Q1
In order to prevent an overvoltage from being applied between the gate and the source of the switching element and destroying the switching element, a zener diode coupled in series in the opposite direction may be provided. In FIG. 28, the voltage drop means Z1 and the phase shift means Z3 have a configuration of, for example, a capacitor, an inductor, a resistor, or a combination thereof. When a resonance inductor is used in the resonance load circuit of FIG. 28, a voltage drop means Z1, a resonance inductor Lr, and a resonance capacitor Cr are connected in series between points O and N, and a discharge tube is connected in parallel with Cr. 16 is provided.

FIG. 28 shows a lighting circuit using one N-channel switching element. FIG. 29 shows a lighting circuit using a P-channel switching element. FIG.
, A capacitor Cp and a switching element Q1 connected in series between a positive electrode and a negative electrode of the voltage source 15 are provided, and a voltage drop means Z1, a resonance capacitor Cr, and an excitation coil of the discharge tube 16 are provided at both ends of Cp. Resonance inductor L
c are connected in series. Phase shift means Z3 is provided between the gate terminal of the switching element Q1 and the voltage drop means Z1. A Zener diode connected in series in the opposite direction between the gate and the source of Q1 may be provided. When a resonance inductor is used in the resonance load circuit shown in FIG. 29, a voltage drop means Z1, a resonance inductor Lr, and a resonance capacitor Cr are connected in series to both ends of Cp.
A discharge tube 16 is provided in parallel with r.

In the above embodiments, the voltage drop means is connected in series on the load resonance circuit, and the switching element is driven according to the voltage generated by the resonance current. In contrast,
An embodiment in which driving is performed using a voltage generated by a resonance current only during a period in which the upper and lower switching elements and the built-in diode are turned on will be described below.

In the embodiment shown in FIG. 30, the voltage source 15 rectifies an AC power supply AC through an AC filter including inductors Lf and Cf by a rectifier circuit composed of a diode bridge DB to generate a DC voltage. The drain terminal of Q1 is connected to the positive electrode of voltage source 15, and the source terminal of Q1 is connected to Q1.
A capacitor C1 is connected between the two drain terminals as voltage drop means, and a connection point between C1 and Q2 is O. A resistor R1 is connected in parallel with the capacitor C1. A capacitor C is connected between the source terminal of Q2 and the negative electrode of voltage source 15.
2 is connected, and the connection point between Q2 and the negative electrode of the voltage source 15 is N. A resistor R
2 is connected. A resonance inductor Lr and a resonance capacitor Cr are connected in series between the connection points O and N, and a discharge tube 16 is provided in parallel with Cr. When the discharge tube is an electrodeless lamp, Lr in FIG. 30 may be configured to serve both as an excitation coil and a resonance inductor.

A capacitor C3 is connected in parallel between the drain terminal and the source terminal of Q1, and a gate resistor R5 and a capacitor 13 are connected in series between the gate terminal and the output O. Similarly to Q1, a capacitor C4 is connected in parallel between the drain terminal and the source terminal of Q2, and a gate resistor R6 and a capacitor 14 are connected in series between the gate terminal and N. A Zener diode ZD1 is connected to the capacitor 14 in parallel. Further, a resistor Rs3 is connected between a connection point of the inductors Lf and Cf connected in series with the cathode of the diode ZD1. Here, the capacitor 14
Is the power supply for driving Q2, and maintains the zener voltage of diode ZD1 regardless of the magnitude of the AC voltage. The power supply for driving Q1 is the voltage of the capacitor 13, and when Q2 is turned on, the capacitor C1
4 through the diode D1.

Next, the operation of this circuit will be described with reference to FIG. FIG. 31 shows waveforms at various points in the embodiment of FIG. If the direction of the current IL flowing out of the point O in FIG. 30 is defined as positive in FIG. 30, there are four operation modes related to Q1 and Q2 and QD1 and QD2 during one cycle of the current IL. FIG. 31 shows the values as t1 to t4. Hereinafter, each operation mode will be described.

Mode 1 (t1 period): When Q1 turns on, the current I flows through the path of Q1, C1, Lr and Cr from the voltage source 15.
L flows. The current IL charges the Cr and partially flows to the discharge tube 16. The capacitor C1 is charged by IL. In mode 1, the voltage applied between the gate and the source of Q1 is the difference voltage between the voltage of capacitor 13 and Vc1, and the gate voltage of Q1 decreases as Vc1 increases. When the gate voltage falls below the threshold voltage of the MOSFET, Q1 turns off.

During this period, the capacitor C2 is discharged by the resistor R2. The voltage Vc2 of C2 gradually decreases as shown in FIG.

When Q1 is turned off, C3 and C4 provided in parallel with Q1 and Q2 cause the current IL / 2 to become C
3, the voltage rise dV / dt between the drain and source of Q1 is limited by IL / 2C3. At the same time, a current IL / 2 for discharging C4 flows, and dV when the voltage of Q2 falls
/ Dt is also limited by IL / 2C4 like Q1. Although dV / dt at the time of switching causes conduction noise and radiation noise, such a problem can be reduced by performing soft switching for suppressing dV / dt as in the present embodiment. Although a circle is shown in the current waveform of Q1 at the end of the t1 period, the voltage of Q1 is almost zero at this time, indicating that there is no switching loss in which the current and the voltage of Q1 overlap. Thus, soft switching is effective in reducing switching loss.

In the above operation, the charging current of C3 charges C1 and the gate voltage of Q1 further decreases, so that stable OFF can be ensured. On the other hand, the discharge current of the capacitor C4 is C2
, And Vc2 further decreases.

Mode 2 (t2 period): When Q1 is turned off, the current IL has a positive polarity and a value, and this current continues to flow through the paths of Lr, Cr, C2, and QD2. still,
Part of the current IL flows to the discharge tube 16 by shunting.

The current IL acts to reverse-charge C2, and Vc2 decreases. The voltage applied between the gate and source of Q2 is equal to the voltage of capacitor 14 and Vc as in Q1.
2, the gate voltage of Q2 increases as Vc2 decreases. When the gate voltage exceeds the threshold voltage of the MOSFET, Q2 turns on. In addition, the current polarity during the mode 2 period is opposite to Q2, and the current continues to flow through QD2 as long as the polarity of the current does not change even if the gate voltage is charged as shown in FIG. The period until the polarity of the current IL changes to the negative is Mode 2, and during this period,
Reverse charging of C2 continues and Vc2 decreases.

The capacitor C1 is discharged by the resistor R1 during the period of the mode 2, and Vc1 gradually decreases.

Mode 3 (t3 period): When the polarity of the current IL changes from positive to negative, IL flows through Q2 charged with the gate voltage in mode 2. That is, IL flows as a discharge current of Cr through a path of Q2, C2, Cr, Lr, and C2 is IL.
Will be charged by. When Vc2 increases due to IL and the gate voltage falls below the threshold voltage of the MOSFET, Q2 turns off. In mode 3, as in mode 1, Q2 turns off during the period in which the polarity of current IL is negative.

The capacitor C1 is discharged by the resistor R1 during the mode 3, and Vc1 gradually decreases.

When Q2 is turned off, as in the case where Q1 is turned off, C3 and C4 provided in parallel with Q1 and Q2 provide
The current IL / 2 flows through C4, and the voltage rise dV / dt between the drain and source of Q2 is limited by IL / 2C4. At the same time, a current IL / 2 for discharging C3 flows, and dV / dt when the voltage of Q1 falls is also limited by IL / 2C3 like Q2. A circle is shown on the current waveform of Q2 at the end of the t3 period. At this time, the voltage of Q2 is almost zero,
2 shows that there is no switching loss in which the current and the voltage overlap.

In the above operation, the charging current of C4 charges C2, and the gate voltage of Q2 further decreases, so that stable OFF can be ensured. The discharge current of C3 reverse charges C1 and Vc
1 decreases.

Mode 4 (t4 period): When Q2 is turned off, the current IL has a negative polarity and has a value, and the current IL is changed to Lr, C by the electromagnetic energy accumulated in Lr.
1, QD1, voltage source 15, Cr, Lr. A part of the current IL flows to the discharge tube 16 by shunting.

The current IL acts to reverse-charge C1, causing Vc1 to decrease and increasing the gate voltage of Q1. When the gate voltage exceeds the threshold voltage of the MOSFET, Q1 turns on. However, the current polarity during the mode 4 is opposite to that of Q1, and the current continues to flow through QD1 even if the gate voltage is charged, as long as the polarity of the current does not change. Mode 4 is a period until the polarity of the current IL changes to positive, and during this period, reverse charging of C1 continues and Vc1 decreases. Further, during the period of the mode 4, the capacitor C2 has the resistance R
2, and Vc2 gradually decreases.

Here, the resistors R1 and R2 connected in parallel to the capacitors C1 and C2 apply a bias voltage to the voltage of the capacitors. This serves to lower the gate voltage of the MOSFET and provide a dead time period for turning on and off the upper and lower switches. Further, the on-period of the up / down switch is adjusted by decreasing the voltage of the capacitor during the period in which the switch is off.

As described above, the operations from mode 1 to mode 4 are performed during one cycle of the current IL, and thereafter, this operation is repeated.

In this method, the capacitor voltages Vc1, Vc2
Q1 and Q2 are turned off according to the voltage of Q1, Q2
However, there is a disadvantage that the current capability decreases as the gate voltage of the transistor decreases and approaches zero. This means an increase in the on-resistance, especially when the driving frequency is about several tens of kHz and the steady-state loss is larger than the switching loss in Q1 and Q2. It is desirable to apply a sufficient gate voltage so as not to cause this. Therefore, an embodiment for solving such a problem is shown in FIG.

Since the configuration of the load resonance circuit in the embodiment of FIG. 32 is the same as that of FIG. 30, the description is omitted. From FIG. 32,
The gate terminal of Q1 is connected to the drain terminal of MOSFET S3, and a resistor R is connected between the source terminal of Q1 and the gate terminal of S3.
7 is connected. The source terminal of S3 is connected to point O.
The driving circuit of Q2 has the same configuration as that of Q1. The gate terminal of Q2 is connected to the drain terminal of MOSFET S4, and the resistor R8 is connected between the source terminal of Q2 and the gate terminal of S4. The source terminal of S4 is connected to point N.

Next, the operation of the embodiment of FIG. 32 will be described with reference to FIG. FIG. 33 shows waveforms at various points in FIG.

First, when Q1 is turned on, a current IL flows from the voltage source 15 through the path of Q1, C1, Lr, and Cr. IL
The capacitor C1 is charged by Vc1
When the voltage exceeds the threshold voltage of S3, S3 turns on. As a result, the gate voltage of Q1 is discharged through the path of S3 and C1, and Vc1 is applied as a reverse bias between the source and the gate, so that Q1 does not turn on again instantaneously due to noise or the like, and is stable. Off can be secured.

Next, when Q1 turns off, FIGS.
The same operation as in mode 2 described above is started. This description is as described above, and the description is omitted here.

When the polarity of the current IL changes from positive to negative, Q
IL flows through 2. That is, IL flows as a discharge current of Cr through a path of Q2, C2, Cr, Lr, and C2 is charged by IL. Vc2 increases due to IL, MOSFET
When the voltage exceeds the threshold voltage of S4, S4 turns on. As a result, the gate voltage of Q2 is discharged through the path of S4 and C2, the voltage of Vc2 is applied as a reverse bias between the source and gate of Q2, and Q2 is turned off. This period is Mode 3.

When Q2 is turned off, the same operation as in mode 4 described with reference to FIGS. 30 and 31 starts. The description of the operation during this period is as described above and will not be repeated.

The above operation is performed during one cycle of the current IL, and thereafter, this operation is repeated.

Next, a voltage resonance type lighting circuit using one switching element is shown in FIG. As shown in FIG.
Is connected between the positive electrode and the drain terminal of the switching element Q2. Also, the capacitor C
At both ends of p, a resonance inductor Lr and a resonance capacitor Cr are connected in series, and Cr has a discharge tube 16 as a load in parallel. The resonance load circuit is not limited to the configuration shown in FIG. 34, and Lr may be a configuration that also serves as an excitation coil of an electrodeless lamp and a resonance inductor. A capacitor C2 is connected between the source terminal of Q2 and the negative electrode of voltage source 15,
2, a resistor R2 is connected in parallel. A capacitor C4 is connected between the drain and source terminals of Q2. Assuming that the negative electrode of the voltage source 15 is at point N, a gate resistor R6 and a capacitor 14 are connected in series between the gate terminal and point N,
A Zener diode ZD1 is connected to the capacitor 14 in parallel. A resistor Rf is connected between the connection points of the inductors Lf and Cf connected in series with the cathode of the diode ZD1.
Connect s3.

Next, the operation of FIG. 34 will be described. First, Q
2 turns on, the voltage source 15 outputs Lr, Cr, Q2, C
When the current IL flows through the path C2, the capacitor C
2 is charged. During this period, the voltage applied between the gate and the source of Q2 is the difference voltage between the voltage of capacitor 14 and Vc2, and the gate voltage of Q2 decreases as Vc2 increases. When the gate voltage falls below the threshold voltage of the MOSFET, Q2 turns off. During this period, the voltage of the capacitor Cp becomes the voltage of the voltage source 15.

When Q2 is turned off, C provided in parallel with Q2
Assuming that the current IL is divided into Cp and C4 and the current of C4 is Ic4, the voltage rise dV / dt between the drain and source of Q2 is limited by Ic4 × C4. Further, the charging current of C4 charges C2, and the gate voltage of Q2 further decreases, so that stable OFF can be ensured. Here, even when the capacitor C4 is removed, as the drain voltage of Q2 increases, the voltage of the capacitor C2 also increases.
The gate voltage of the transistor decreases. Thus, after Q2 turns off, Q2 does not turn on again. At the time when Q2 is turned off, the current IL flows through the resonance path of Lr, Cr, and Cp, so that the voltage of the capacitor Cp gradually decreases.
Further, the voltage between the drain and source of Q2 is almost zero, indicating that there is no switching loss where the current and voltage of Q2 overlap.

Next, when Q2 is turned off, the current IL continues to flow through the paths of Lr, Cr and Cp. During this period, L
Since the current IL flows due to the electromagnetic energy stored in r, the current continues to flow through Cp unless the polarity changes,
Cp is reversely charged. On the other hand, the capacitor C2 has the resistance R
2 and the voltage gradually decreases. This operation continues until the polarity of the current IL changes to negative.

When the polarity of the current IL changes, the current IL flows through the path of Cp, Cr, and Lr as the discharge current of Cp, and continues to flow until the voltage of Cp reaches the voltage of the voltage source 15. On the other hand, the voltage between the drain and the source of Q2 gradually decreases as the voltage of the capacitor Cp increases.

When the voltage of the capacitor Cp reaches the voltage of the voltage source 15, the current IL flows to C4 provided in parallel with Q2. The current in C4 reverse charges C2, increasing the gate voltage of Q2. Subsequently, the current IL continues to flow through the path of Lr, the voltage source 15, C2, QD2, and Cr by the electromagnetic energy stored in Lr. Unless the polarity of the current changes,
C2 is reverse-charged, and when the gate voltage exceeds the threshold voltage of the MOSFET, Q2 turns on.

The above operation is performed during one cycle of the current IL, and thereafter, this operation is repeated.

In the embodiment of FIG. 34, the driving circuit of Q2 is configured as shown in FIG.
It is possible to solve the problem that the gate voltage of Q2 is reduced and the current capability is reduced as the voltage of 2 is increased.

When the lighting circuit is built in the base of the incandescent lamp, the temperature inside the base is 100 ° C. due to heat generated from the discharge tube.
Since the temperature becomes high in the vicinity, the lighting circuit must maintain normal operation even in a high temperature environment. In the present invention, the phase shift means connected to the gate terminal of the switching element can change the impedance value at a high temperature and can be used as an impedance for temperature compensation. Since the operation can be stabilized even at a high temperature as described above, it is suitable for a bulb-type fluorescent lamp in which a lighting circuit is incorporated in a bulb base.

[0095]

According to the present invention, in the lighting device for lighting, the resonance frequency and current of the load are maintained even when the resonance condition changes due to the fluctuation of the resonance load composed of the discharge tube, the resonance inductor and the resonance capacitor. A stable resonance operation synchronized with the above can be guaranteed. Further, since the lighting circuit can be constituted by inexpensive components, it is economically effective.

[Brief description of the drawings]

FIG. 1 is a first schematic diagram showing a lighting circuit according to the present invention.

FIG. 2 is a second schematic diagram showing a lighting circuit according to the present invention.

FIG. 3 shows a first embodiment of a lighting circuit according to the present invention.

FIG. 4 is a first equivalent circuit of the gate circuit of FIG. 3;

FIG. 5 is a second equivalent circuit of the gate circuit of FIG. 3;

FIG. 6 is an operation explanatory diagram of the embodiment in FIG. 3;

FIG. 7 shows a relationship between a phase difference between a resonance current and a gate voltage for a gate inductor and an operation frequency.

FIG. 8 shows a second embodiment of the lighting circuit according to the present invention.

FIG. 9 is an operation explanatory diagram of the embodiment of FIG. 8;

FIG. 10 is a third schematic diagram showing a lighting circuit according to the present invention.

FIG. 11 is an equivalent circuit of an electrodeless lamp.

FIG. 12 is an equivalent circuit before lighting of the electrodeless lamp.

FIG. 13 is an equivalent circuit after lighting of the electrodeless lamp.

FIG. 14 shows a relationship between frequency and resonance current.

FIG. 15 shows a third embodiment of the lighting circuit according to the present invention.

FIG. 16 shows a relationship between a resonance current and a phase difference between a gate voltage and a load resonance frequency.

FIG. 17 shows waveforms of a drain voltage Vds, a gate voltage Vg, and a resonance current IL of the gate circuit.

FIG. 18 shows a first embodiment of a gate circuit.

FIG. 19 shows a second embodiment of the gate circuit.

FIG. 20 shows a fourth embodiment of the lighting circuit according to the present invention.

FIG. 21 shows a fifth embodiment of the lighting circuit according to the present invention.

FIG. 22 is an operation explanatory diagram of the embodiment in FIG. 21;

FIG. 23 shows a sixth embodiment of the lighting circuit according to the present invention.

FIG. 24 is an operation explanatory view of the embodiment in FIG. 22;

FIG. 25 shows a seventh embodiment of the lighting circuit according to the present invention.

FIG. 26 shows an eighth embodiment of the lighting circuit according to the present invention.

FIG. 27 is a fourth schematic diagram showing a lighting circuit according to the present invention.

FIG. 28 is a fifth schematic diagram showing a lighting circuit according to the present invention.

FIG. 29 is a sixth schematic diagram showing a lighting circuit according to the present invention.

FIG. 30 shows a ninth embodiment of the lighting circuit according to the present invention.

FIG. 31 is an operation explanatory view of the embodiment in FIG. 30;

FIG. 32 is a tenth embodiment of the lighting circuit according to the present invention.

FIG. 33 is an operation explanatory view of the embodiment in FIG. 32;

FIG. 34 shows an eleventh embodiment of the lighting circuit according to the present invention.

[Explanation of symbols]

Q1, Q2: Power MOSFET, D1, QD1, QD2, D
g1: diode, Z1, Z2: voltage drop means, Z3
Z4: phase shift means, ZD1 to ZD8: Zener diode, Zg: impedance, AC: AC power supply, DB
... Rectifier circuit, C1-C4, Cs, Ct, Cf, Cr, C
d, Ciss, Cp, Cd1, 13 to 14: Capacitor, L1 to L4, La, Ls, Lc, Lf, Lr: Inductor, R1 to R8, Ra, Rs, Rd1, Rd2, R
z, Rs1 to Rs3: resistor, S1, S2, 17: switch, T1 to T3: winding, 1-4, S3, S4: semiconductor switch element, 5, 7: NAND circuit, 6, 8: voltage comparator, 11, 12 drive circuit, 15 voltage source, 16 discharge tube.

Continued on the front page (51) Int.Cl. ⁶ Identification code FI H02M 7/5383 H02M 7/5383

Claims (20)

[Claims] An illumination lighting device for applying an AC voltage to a resonance means and supplying an AC current to a discharge tube connected to the resonance means in accordance with switching of two bridge-connected power semiconductor elements. The resonance means and the first and second voltage drop means are connected in series to input / output terminals of a bridge made of the power semiconductor element, and the voltages of the first and second voltage drop means are inverted. A lighting device for lighting, wherein a phase signal is applied to control terminals of the two power semiconductor elements. 2. The lighting device for lighting according to claim 1, wherein
A lighting device for lighting, wherein the voltages of the first and second voltage drop means are applied to control terminals of the two power semiconductor elements via first and second phase shift means. 3. The lighting device for lighting according to claim 2, wherein
A lighting device for lighting, wherein each of the first and second voltage drop means is a capacitor means, and a resistance means is connected to each of the capacitor means in parallel. 4. The lighting device for lighting according to claim 3, wherein
Starting circuit means for applying a voltage to one of the control terminals of the two power semiconductor elements when the voltage between the positive electrode and the negative electrode of the two bridge-connected power semiconductor elements becomes a predetermined value or more. Characteristic lighting device for lighting. 5. The lighting device for lighting according to claim 4, wherein
Each of the first and second phase shift means has a configuration in which a resistance and an inductance are connected in series, and limits the voltage of a control terminal of each of the two bridge-connected power semiconductor elements to an allowable value or less. A lighting device for lighting, comprising a clamp means. 6. An illumination lighting device for applying an AC voltage to a resonance means having a capacitor in accordance with switching of two bridge-connected power semiconductor elements, and supplying an AC current to a discharge tube connected to the lighting means. Wherein the first and second voltage drop means are connected in series to the input / output terminal of the bridge comprising the power semiconductor element together with the resonance means, and the voltage of the first and second voltage drop means is An illumination lighting device comprising: a voltage detecting means for detecting; and a driving circuit means for supplying a control signal to the two power semiconductor elements in accordance with an output of the voltage detecting means. 7. A lighting device for an electrodeless fluorescent lamp, wherein plasma is generated by a magnetic field generated by a high-frequency alternating current flowing through an excitation coil, and ultraviolet light emitted by the plasma is converted into visible light by a fluorescent material. A bridge circuit, a capacitor, the excitation coil, and first and second voltage drop means connected in series between an input / output terminal of the bridge circuit and the first and second voltage drop means. Voltage of the first,
A lighting device for lighting, wherein a signal having an opposite phase is applied to control terminals of the two power semiconductor elements through a second phase shift means. 8. The lighting device according to claim 7, wherein:
A lighting device for lighting, wherein each of the first and second voltage drop means is a capacitor means, and a resistance means is connected to each of the capacitor means in parallel. 9. The lighting device for lighting according to claim 8, wherein
Starting circuit means for applying a voltage to one of the control terminals of the two power semiconductor elements when the voltage between the positive electrode and the negative electrode of the two bridge-connected power semiconductor elements becomes a predetermined value or more. Characteristic lighting device for lighting. 10. The lighting device according to claim 9, wherein each of said first and second phase shift means has a configuration in which a resistance and an inductance are connected in series.
A lighting device for lighting, characterized in that each of the two bridge-connected power semiconductor elements is provided with a clamp means for limiting a voltage of a control terminal to an allowable value or less. 11. The lighting device for illumination according to claim 2, wherein a value of said first and second phase shift means is changed in accordance with a polarity of a current supplied to a control terminal of said power semiconductor element. A lighting device for lighting characterized by the above-mentioned. 12. The lighting device for lighting according to claim 2, further comprising a second capacitor between an input or output terminal of the power semiconductor element and a control terminal, wherein the second capacitor is provided in accordance with a voltage of the power semiconductor element. A lighting device for lighting, characterized in that a current flowing through first and second phase shift means is supplied to the second capacitor and a control terminal of the power semiconductor element. 13. A resonance means, two power semiconductor elements provided with a control signal corresponding to a current of said resonance means via a feedback transformer, and said resonance means connected to said resonance means from a bridge of said power semiconductor elements. A lighting device for supplying an alternating current to a discharge tube, wherein a secondary output of the feedback transformer is connected in series to a control terminal of the power semiconductor element via first and second phase shift means. A lighting device for lighting. 14. The lighting device according to claim 13, wherein the first and second phases are set according to the polarity of a current supplied from a secondary output of the feedback transformer to a control terminal of the power semiconductor element. A lighting device for lighting, wherein a value of a shift means is changed. 15. A lighting device for lighting according to claim 13, further comprising a capacitor between an input or output terminal of said power semiconductor element and a control terminal, and a secondary of said feedback transformer according to a voltage of said power semiconductor element. A lighting device for lighting, wherein a current supplied from a side output is supplied to control terminals of the capacitor and the power semiconductor element. 16. An illumination lighting device for applying an AC voltage to a resonance means and supplying an AC current to a discharge tube connected to the resonance means, comprising: an N-channel power semiconductor element on a high side; A bridge circuit provided with a P-channel power semiconductor element, resonance means connected to the discharge lamp between input and output terminals of the bridge circuit, and first voltage drop means connected in series, Wherein the voltage of the voltage drop means is applied to control terminals of the N-channel power semiconductor element and the P-channel power semiconductor element via second and third phase shift means. 17. A lighting device for an electrodeless fluorescent lamp, wherein plasma is generated by a magnetic field generated by a high-frequency alternating current flowing through an excitation coil and ultraviolet light emitted by the plasma is converted into visible light by a fluorescent material, wherein an N-channel is provided on the high side. A power semiconductor device, a bridge circuit including a P-channel power semiconductor device on the low side, and a capacitor, the excitation coil, and first voltage drop means connected in series between input / output terminals of the bridge circuit. At the same time, the voltage of the first voltage drop means is applied to control terminals of the N-channel power semiconductor element and the P-channel power semiconductor element via second and third phase shift means. Lighting device for lighting. 18. A lighting device for an electrodeless fluorescent lamp in which plasma is generated by a magnetic field generated by a high-frequency alternating current flowing through an excitation coil and ultraviolet light emitted by the plasma is converted into visible light by a fluorescent material, wherein a capacitor and a P are used as a voltage source. The power semiconductor elements of the channels are connected in series, a second capacitor, the excitation coil,
And a resonance means having a first voltage drop means is connected in parallel to the capacitor, and the voltage of the first voltage drop means is connected to the P-channel power semiconductor element via a second phase shift means. A lighting device for lighting, which is applied to a control terminal. 19. An illumination lighting device comprising an inductor and an N-channel power semiconductor element connected in series to a voltage source, and a load means having a capacitor and a discharge tube connected in parallel to said N-channel power semiconductor element. Connecting a first voltage drop means in series to the load means, and applying a voltage of the first voltage drop means to a control terminal of the N-channel power semiconductor element via a second phase shift means; A lighting device for lighting. 20. An electrodeless fluorescent lamp comprising an excitation coil inside a bulb, generating plasma with a magnetic field generated by a high-frequency alternating current flowing through the coil, and converting ultraviolet light emitted by the plasma into visible light with a fluorescent material, 19. An electrodeless fluorescent lamp, comprising any one of the lighting devices according to claims 7, 13, 17, and 18 provided inside a base of the electrodeless fluorescent lamp.