JP4453301B2 - Wiring board manufacturing method - Google Patents

Description

  The present invention relates to a method of manufacturing a wiring board of various electronic devices, and more particularly to a method of manufacturing a wiring board that improves the film thickness accuracy of a built-in capacitor and is compatible with all kinds of dielectric materials. It is. In the present application, an interposer is also included in the wiring board.

  A conventional method for manufacturing a wiring board will be described below.

  Conventionally, as a method for manufacturing a wiring board in which a capacitor is built, as shown in FIGS. Is formed (FIG. 6A). Next, a capacitor lower electrode such as a Cu metal, for example, a metal 16 serving as a so-called conductor layer is formed (FIG. 6B).

  Next, a dielectric material 2 in which ceramic powder or the like is dispersed in, for example, an epoxy resin or the like is formed on the metal 16 serving as a conductor layer (FIG. 6C), and further, for example, a capacitor upper electrode such as Cu metal Then, a metal 16 ′ serving as a so-called conductor layer is formed (FIG. 6D). Next, a photoresist is formed on the surface of the metal 16 'serving as the capacitor upper electrode, and a photoresist pattern is formed by exposure and development. The metal is exposed to obtain a desired pattern serving as the capacitor upper electrode, and cupric chloride or the like is used. The capacitor upper electrode is formed by an etching method, and the dielectric material surface is exposed.

  Next, using the capacitor upper electrode as a barrier, a dedicated alkaline etchant is used to etch the dielectric material 2 in the same shape as the capacitor upper electrode, and the surface of the metal 16 that becomes the capacitor lower electrode is exposed. Next, using the photoresist on the capacitor upper electrode as a barrier, the metal 16 serving as the capacitor lower electrode is etched to form the capacitor lower electrode, and the capacitor is fabricated by stripping the photoresist with a dedicated stripping solution. Was the way.

  Currently, in the production of a wiring board, a copper-clad double-sided board in which Cu foil is pasted on both sides of an organic resin sheet having a glass cloth is often used as a core, and the surface is roughened by about 2 μm. . Further, as shown in FIG. 7, the substrate incorporating a passive element such as a capacitor is formed by the build-up method, that is, the wiring 10 or the like is formed in the core, the insulating resin 12 is formed, and the wiring 10 is further formed on the insulating resin 12. Since the process of forming 'is repeated, the surface of the surface is also roughened by about 2 to 5 μm due to the thickness of the wiring 10 (generally 10 μm to 20 μm).

In the method for manufacturing a wiring board as described above, since the surface of the substrate on which the metal to be the capacitor lower electrode is formed is rough, the variation in the film thickness of the formed dielectric material becomes large, and the accuracy of the obtained capacitor capacity is poor. There was a problem.
In addition, since the dielectric material is directly formed on the organic substrate, the firing temperature of the dielectric material is usually 200 ° C. or lower, and even a high heat resistant substrate needs to be processed at about 250 ° C. or lower from the viewpoint of heat resistance of the organic substrate. Therefore, the dielectric constant of the usable dielectric material is about several tens, and there is a problem that a large capacity cannot be obtained with a small area.
Japanese Patent Application No. 2000-592842

  The present invention has been made in view of the above-mentioned problems, and the object of the present invention is to reduce the variation in the thickness of the dielectric material in the method for manufacturing a wiring board with a built-in capacitor, thereby increasing the accuracy of the capacitor capacity. It is an object of the present invention to provide a method for manufacturing a printed wiring board which is improved and enables a dielectric material to have a high dielectric constant.

The present invention relates to a method for manufacturing a wiring board with a built-in capacitor,
1) Regarding the formation of a member having metal foil on both sides of the dielectric material, the dielectric material is a member subjected to a heat treatment of high-temperature firing at 900 to 1000 ° C.
2) A step of adhering the member to the wiring in the process of laminating the wiring board via a semi-curable insulating resin sheet,
3) A step of providing a photoresist on the surface of the metal foil, performing exposure and development, and forming a photoresist pattern of a portion to be a capacitor upper electrode;
4) etching the exposed metal foil, peeling the photoresist pattern, and forming the capacitor upper electrode;
5) removing the exposed dielectric material to form a dielectric material pattern;
6) A step of providing a photoresist on the exposed surface of the metal foil and the capacitor upper electrode, performing exposure and development, and forming a photoresist pattern of a portion serving as the capacitor lower electrode and wiring;
7) etching the exposed metal foil, peeling off the photoresist pattern, and forming a capacitor lower electrode and wiring;
A method for manufacturing a wiring board, comprising:

The wiring board manufacturing method according to claim 2, wherein the dielectric material is formed by dispersing ceramic powder in an organic insulating resin. It is a manufacturing method.

The wiring board according to claim 1, wherein the dielectric material is a dielectric thin film formed on a metal foil by sputtering, CVD, or the like. A method for manufacturing a substrate.

Further, according to the present invention, in the method for manufacturing a wiring board according to the above invention, the member is a multilayer member in which metal foils and dielectric materials are alternately formed. It is a manufacturing method of the wiring board of description.

In the wiring board manufacturing method according to the present invention, the member is a member in which a resistance metal serving as a resistor is formed on one side of a member having a metal foil on both sides of a dielectric material. A method for manufacturing a wiring board according to any one of claims 1 to 4.

  Further, the present invention provides the method for manufacturing a wiring board according to the above invention, wherein the member is formed as a member having a metal foil laminated on both sides of a dielectric material and a metal foil laminated on both sides of the dielectric material. It is a manufacturing method of the wiring board in any one of 1 thru | or 5.

According to the method for manufacturing a wiring board according to the present invention, a dielectric material having a uniform film thickness is laminated on a smooth metal foil in advance, or a dielectric material is sputtered on a smooth metal surface. Since it is formed, the thickness of the dielectric material becomes uniform within the substrate surface even after being bonded onto the substrate, and an accurate capacitor capacity can be obtained.
In addition, since the dielectric material is not heat-treated on the organic substrate, high-temperature firing can be performed to obtain a desired dielectric constant of the dielectric material.

  Hereinafter, embodiments of the present invention will be described in detail.

1A to 1H are process explanatory views of an embodiment of a method for manufacturing a wiring board according to the present invention. In the method for manufacturing a wiring board according to the present invention, first, members 3 having metal foils 1 are formed on both surfaces of a dielectric material 2 (FIG. 1A).
For example, the member 3 is formed by laminating a metal foil 1, for example, a Cu foil, on both surfaces of a dielectric material sheet such as a resin sheet or a green sheet in which a ceramic powder is dispersed in an organic insulating resin, and performing a desired heat treatment. A dielectric thin film is provided on a Cu foil by a method, a high-concentration sol-gel method, a sputtering method, a CVD method, or the like, a desired heat treatment is performed if necessary, a Cu thin film is formed, and a Cu thin film is formed if necessary. It forms by the method of plating Cu and thickening it.

  At this time, it is easily conceivable to make the metal multi-layered from various metals in response to problems caused by the type of dielectric material 2 and the like.

  Further, if necessary, it is manufactured by a method such as electrolytic plating of a resistor 11 such as a nickel-phosphorus metal on one side of the obtained member.

Next, as shown in FIG. 1B, the member 3 is bonded to the wiring in the process of laminating the wiring board via the semi-curable insulating resin sheet 5, and necessary heat treatment is performed.
Next, a photoresist is provided on the exposed surface of the metal foil 1, and exposure and development are performed to form a desired photoresist pattern 6 to be the capacitor upper electrode 7, and etching of the exposed metal foil is performed (FIG. 1 ( c)), the capacitor upper electrode 7 is formed by peeling the photoresist pattern 6.

Next, the exposed dielectric material 2 is mechanically and physically removed by, for example, a chemical method such as etching using a dedicated etchant, or a router or a sandblast method to form a desired dielectric material pattern 2a (FIG. 1). (D)).
The photoresist pattern 6 can also be peeled off after the dielectric material 2 is removed.

  Next, as shown in FIG. 1E, a photoresist 8 is formed on the exposed surface of the metal foil 1 and the capacitor upper electrode 7, and is exposed and developed to obtain a desired capacitor lower electrode 9 and wiring 10. A photoresist pattern 8 ′ is formed, the exposed metal foil 1 is etched (FIG. 1 (f)), and the capacitor lower electrode 9 and the wiring 10 are formed by peeling the photoresist pattern 8 ′ (FIG. 1 ( g)).

When the resistor 11 is provided on one side of the member 3, as shown in FIG. 1 (h), subsequently, a photoresist is formed, exposed and developed, and a part of the wiring is formed with a dedicated etching solution. After etching and exposing the resistor 11 having a desired shape, the photoresist is peeled off.
Next, the manufacturing method is such that a series of remaining wiring board steps are performed. A spiral inductor or the like may be formed simultaneously with the wiring 10.

According to the method for manufacturing a wiring board according to the present invention, a dielectric material having a uniform film thickness is laminated on a smooth metal foil in advance, or a dielectric material is sputtered on a smooth metal surface. Since it is formed, the thickness of the dielectric material becomes uniform within the substrate surface even after being bonded onto the substrate, and an accurate capacitor capacity can be obtained.
In addition, since the dielectric material is not heat-treated on the organic substrate, high-temperature firing can be performed to obtain a desired dielectric constant of the dielectric material.

  Hereinafter, the present invention will be described specifically by way of examples.

  Example 1 will be described with reference to FIGS.

  Epoxy resin as insulating resin 12 in the middle of a predetermined build-up process using a copper-clad resin substrate (not shown) impregnated with a nonwoven glass epoxy resin having a predetermined circuit pattern formed on both sides A Cu thin film was formed by performing electroless Cu plating using a dedicated processing solution.

Next, a dry film photoresist having a thickness of 12 μm was laminated on the surface of the Cu thin film, exposed and developed, and the surface of the Cu thin film to be the desired wiring 10 was exposed.
Next, electrolytic Cu plating was performed on the exposed Cu thin film surface to deposit about 12 μm of Cu.
Next, a dry film resist having a thickness of 40 μm was laminated, and holes serving as bumps for electrical connection between layers were formed using a UVYAG laser.

Next, electrolytic Cu plating was performed to deposit about 40 μm of Cu in the holes to be bumps.
Next, the surface was polished by about 1 μm, the bumps 13 were made to have the same height, and the gold 13 having a thickness of about 1 μm was formed by performing electrolytic gold plating on the tips of the bumps 13.
Next, the dry film photoresist and the dry film resist were stripped with a dedicated stripping solution, and the Cu thin film was soft-etched with an aqueous ammonium persulfate solution or the like, thereby forming the wiring 10 and fabricating a desired substrate (FIG. 2 ( a)).

Next, barium titanate or the like is mixed into the epoxy resin used as the dielectric material 2 between two 12 μm thick Cu foils 1 a and 1 a ′ whose surface has been roughened by a dedicated etching solution by about 0.5 μm. The member was prepared by performing heat and pressure lamination under the conditions of 130 ° C. and 30 N / cm ² so that the 20 μm-thick semi-curable resin sheet was positioned, and further performing heat treatment at 200 ° C. for 1 hour. .

Next, a nickel-phosphorous metal 15 to be the resistor 11 was electrolytically plated on one side of the member to a thickness of about 1 μm.
Next, 50 μm-thick epoxy-based semi-curable insulating resin sheet 5 is heat-press laminated on the surface of the member where nickel-phosphorous metal 15 is present under the conditions of 130 ° C. and 30 N / cm ² , Curing of the epoxy-based semi-curable insulating resin sheet 5 is performed on the insulating resin 12 of the substrate by heating and pressing under conditions of 130 ° C. and 50 N / cm ² and further heat treatment at 200 ° C. for 1 hour. And the electrical connection between the layers was performed (FIG. 2B).

  Next, a 15 μm-thick urethane resin dry film photoresist was laminated on the surface of the Cu foil 1a, exposed and developed, and the surface of the Cu foil other than the desired capacitor upper electrode 7 was exposed. Here, the reason why the urethane resin system is used is that it has excellent impact absorbability at the time of sandblasting performed in a subsequent process.

Next, the Cu foil 1a was etched with a cupric chloride solution or the like to produce a capacitor upper electrode 7.
Next, fine abrasive grains having a diameter of several μm to several tens of μm are ejected from the nozzle, and the dielectric material 2 is removed by using a sandblasting method in which the surface of the object is shaved to form the dielectric material pattern 2a, and the capacitor lower electrode 9 And the surface of the Cu foil 1a ′ to be the wiring 10 was exposed.

Next, the dry film photoresist was stripped with a dedicated stripper.
Next, a liquid photoresist was applied to the substrate surface, exposure and development were performed, and a photoresist pattern of desired wiring 10 and capacitor lower electrode 9 was formed.
Next, the Cu foil 1a ′ and the nickel-phosphorus metal were etched with a ferric chloride solution or the like, and the photoresist pattern was stripped with a dedicated stripping solution to produce the desired wiring 10 and capacitor lower electrode 9.

Next, a liquid photoresist was applied to the surface of the substrate, and exposure and development were performed. A photoresist pattern was formed so that a desired resistor 11 was obtained.
Next, the desired resistor 11 was produced by etching the wiring 10 with a thiourea aqueous solution or the like.

  Next, the photoresist was stripped with a dedicated stripping solution (FIG. 2C).

  Next, a 50 μm-thick epoxy-based semi-curable resin sheet was laminated by heating and pressing, and the manufacturing process of the remaining series of wiring substrates was completed to prepare a wiring substrate by the manufacturing method of the present invention.

  Epoxy resin as insulating resin 12 in the middle of a predetermined build-up process using a copper-clad resin substrate (not shown) impregnated with a non-woven glass epoxy resin having a predetermined circuit pattern formed on both sides A Cu thin film was formed by performing electroless Cu plating using a dedicated processing solution.

Next, a dry film photoresist having a thickness of 12 μm was laminated on the surface of the Cu thin film, exposed and developed, and the surface of the Cu thin film to be the desired wiring 10 was exposed.
Next, electrolytic Cu plating was performed on the exposed Cu thin film surface to deposit about 12 μm of Cu.
Next, a dry film resist having a thickness of 40 μm was laminated, and holes serving as bumps for electrical connection between layers were formed using a UVYAG laser.

Next, electrolytic Cu plating was performed to deposit about 40 μm of Cu in the holes to be bumps.
Next, the surface was polished by about 1 μm, the bumps 13 were made to have the same height, and the gold 13 having a thickness of about 1 μm was formed by performing electrolytic gold plating on the tips of the bumps 13.
Next, the dry film photoresist and the dry film resist were stripped with a dedicated stripping solution, and the Cu thin film was soft-etched with an aqueous ammonium persulfate solution or the like, thereby forming the wiring 10 and fabricating a desired substrate (FIG. 2 ( a)).

  Next, a PMMA, PVB or other high solvent such as barium titanate ceramic powder is dispersed between two 12 μm thick Cu foils whose surface is roughened by about 0.5 μm with a dedicated etchant. A member was prepared by kneading the material to which the molecular binder was added, laminating it so that a 20 μm thick green sheet in a sheet shape is located, and further performing a heat treatment at a final temperature of about 900 ° C.

Next, a 50 μm-thick epoxy-based semi-curing resin sheet and the member were laminated under heat and pressure under the conditions of 130 ° C. and 30 N / cm ² , and then this was applied onto the substrate at 130 ° C. and 50 N / cm ^2. By heat and pressure laminating under the following conditions, and further heat treatment at 200 ° C. for 1 hour,
The epoxy-based semi-curable insulating resin sheet was cured and the electrical connection between the layers was performed.

  Next, a urethane resin-based dry film photoresist having a thickness of 15 μm was laminated on the surface of the Cu foil, exposed and developed, and the surface of the Cu foil other than the desired capacitor upper electrode was exposed. Here, the reason why the urethane resin system is used is that it has excellent impact absorbability at the time of sandblasting performed in a subsequent process.

  Next, the Cu foil was etched with a cupric chloride solution or the like to produce a capacitor upper electrode. Next, a fine abrasive grain having a diameter of several μm to several tens of μm is ejected from the nozzle, and the dielectric material is removed by using a sandblasting method in which the surface of the object is shaved. The resulting Cu foil surface was exposed.

Next, the dry film photoresist was stripped with a dedicated stripper.
Next, a liquid photoresist was applied to the surface of the Cu foil, exposure and development were performed, and a desired wiring and a photoresist pattern of the capacitor lower electrode were formed.
Next, the Cu foil was etched with a cupric chloride solution or the like, and the photoresist pattern was stripped with a dedicated stripping solution to produce desired wirings and capacitor lower electrodes.
Next, a 50 μm-thick epoxy-based semi-curable resin sheet was laminated by heating and pressing, and the manufacturing process of the remaining series of wiring substrates was completed to prepare a wiring substrate by the manufacturing method of the present invention.

  Epoxy resin as insulating resin 12 in the middle of a predetermined build-up process using a copper-clad resin substrate (not shown) impregnated with a non-woven glass epoxy resin having a predetermined circuit pattern formed on both sides A Cu thin film was formed by performing electroless Cu plating using a dedicated processing solution.

Next, a dry film photoresist having a thickness of 12 μm was laminated on the surface of the Cu thin film, exposed and developed, and the surface of the Cu thin film to be the desired wiring 10 was exposed.
Next, electrolytic Cu plating was performed on the exposed Cu thin film surface to deposit about 12 μm of Cu.
Next, a dry film resist having a thickness of 40 μm was laminated, and holes serving as bumps for electrical connection between layers were formed using a UVYAG laser.

Next, electrolytic Cu plating was performed to deposit about 40 μm of Cu in the holes to be bumps.
Next, the surface was polished by about 1 μm, the bumps 13 were made to have the same height, and the gold 13 having a thickness of about 1 μm was formed by performing electrolytic gold plating on the tips of the bumps 13.
Next, the dry film photoresist and the dry film resist were stripped with a dedicated stripping solution, and the Cu thin film was soft-etched with an aqueous ammonium persulfate solution or the like, thereby forming the wiring 10 and fabricating a desired substrate (FIG. 2 ( a)).

Next, a ceramic thin film of barium strontium titanate or the like was sputtered to a smooth surface of a 12 μm-thick Cu foil to a thickness of about 0.2 μm, heat-treated at about 1000 ° C., and a Cu thin film was sputtered on the ceramic thin film.
Next, electrolytic Cu plating was performed, and a member having a thickness of 5 μm was prepared.

Next, a 50 μm-thick epoxy-based semi-curing resin sheet and a 12 μm-thick Cu foil side of the member were laminated under heat and pressure under the conditions of 130 ° C. and 30 N / cm ^2. Lamination was performed under the conditions of 50 ° C. and 50 N / cm ² , followed by heat treatment at 200 ° C. for 1 hour to cure the epoxy semi-curable insulating resin sheet and to electrically connect the layers.

  Next, a urethane resin-based dry film photoresist having a thickness of 15 μm was laminated on the surface of the Cu foil, exposed and developed, and the surface of the Cu foil other than the desired capacitor upper electrode was exposed. Here, the reason why the urethane resin system is used is that it is excellent in shock absorption during sandblasting performed in a subsequent process.

  Next, the Cu foil was etched with a cupric chloride solution or the like to produce a capacitor upper electrode. Next, a fine abrasive grain having a diameter of several μm to several tens of μm is ejected from the nozzle, and the dielectric material is removed by using a sandblasting method in which the surface of the object is shaved, and a capacitor lower electrode and wiring are formed. The resulting Cu foil surface was exposed.

Next, the dry film photoresist was stripped with a dedicated stripper.
Next, a liquid photoresist was applied to the surface of the Cu foil, exposure and development were performed, and a desired wiring and a photoresist pattern of the capacitor lower electrode were formed.
Next, the Cu foil was etched with a cupric chloride solution or the like, and the photoresist was stripped with a dedicated stripping solution to produce desired wirings and capacitor lower electrodes.

  Next, a 50 μm-thick epoxy-based semi-curable resin sheet was laminated by heating and pressing, and the manufacturing process of the remaining series of wiring substrates was completed to prepare a wiring substrate by the manufacturing method of the present invention.

  Epoxy resin as insulating resin 12 in the middle of a predetermined build-up process using a copper-clad resin substrate (not shown) impregnated with a non-woven glass epoxy resin having a predetermined circuit pattern formed on both sides A Cu thin film was formed by performing electroless Cu plating using a dedicated processing solution.

Next, a dry film photoresist having a thickness of 12 μm was laminated on the surface of the Cu thin film, exposed and developed, and the surface of the Cu thin film to be the desired wiring 10 was exposed.
Next, electrolytic Cu plating was performed on the exposed Cu thin film surface to deposit about 12 μm of Cu.
Next, a dry film resist having a thickness of 40 μm was laminated, and holes serving as bumps for electrical connection between layers were formed using a UVYAG laser.

Next, electrolytic Cu plating was performed to deposit about 40 μm of Cu in the holes to be bumps.
Next, the surface was polished by about 1 μm, the bumps 13 were made to have the same height, and the gold 13 having a thickness of about 1 μm was formed by performing electrolytic gold plating on the tips of the bumps 13.
Next, the dry film photoresist and the dry film resist were stripped with a dedicated stripping solution, and the Cu thin film was soft-etched with an aqueous ammonium persulfate solution or the like, thereby forming the wiring 10 and fabricating a desired substrate (FIG. 2 ( a)).

Next, as shown in FIG. 3, between the three 12 μm thick Cu foils 1a, 1a ′, 1a ″ whose surface is roughened by about 0.5 μm with a dedicated etching solution, the dielectric materials 2, 2 ′ Heat-press laminate under conditions of 130 ° C. and 30 N / cm ² so that two 20 μm-thick semi-cured resin sheets processed by mixing barium titanate and the like into the epoxy resin to be used are alternately positioned. Then, a member was manufactured by performing heat treatment at 200 ° C. for 1 hour.

Next, an epoxy-based semi-curing insulating resin sheet 5 having a thickness of 50 μm is laminated on the above member by heating and pressing under the conditions of 130 ° C. and 3 ON / cm ^2.
The epoxy-type semi-curable insulating resin sheet 5 was cured and the layers were electrically connected by performing heat and pressure lamination under the condition of 0 N / cm ² and further performing heat treatment at 200 ° C. for 1 hour.

Next, a 15 μm-thick urethane resin dry film photoresist was laminated on the surface of the Cu foil 1a, exposed and developed, and the surface of the Cu foil other than the desired capacitor upper electrode 7 was exposed. Here, the reason why the urethane resin system is used is that it has excellent impact absorbability at the time of sandblasting performed in a subsequent process.
Next, the Cu foil was etched with a cupric chloride solution or the like to produce the capacitor upper electrode 7.

Next, fine abrasive grains having a diameter of several μm to several tens of μm are ejected from the nozzle, and the dielectric material 2 is removed by using a sandblasting method in which the surface of the object is shaved to form the dielectric material pattern 2a. The surface of the Cu foil 1a ′ was exposed.
Next, the Cu foil 1a ′ was etched with a cupric chloride solution or the like to produce a capacitor middle electrode 17.

  Next, a fine abrasive grain having a diameter of several μm to several tens of μm is ejected from the nozzle, and the dielectric material 2 ′ is removed by using a sand blasting method in which the surface of the object is cut to form a dielectric material pattern 2a ′. The surface of the Cu foil 1a ″ that becomes the electrode 9 and the wiring was exposed.

Next, the dry film photoresist was stripped with a dedicated stripper.
Next, a liquid photoresist was applied to the surface of the Cu foil, exposure and development were performed, and a desired wiring and a photoresist pattern of the capacitor lower electrode were formed.
Next, the Cu foil was etched with a cupric chloride solution or the like, and the photoresist pattern was stripped with a dedicated stripping solution to produce the desired wiring 10 and capacitor lower electrode 9.

  Next, a 50 μm-thick epoxy-based semi-curable resin sheet was laminated by heating and pressing, and the manufacturing process of the remaining series of wiring substrates was completed to prepare a wiring substrate by the manufacturing method of the present invention. In addition, after forming the capacitor upper electrode, the dry film photoresist may be peeled off, and the capacitor middle electrode may be formed again. 4 and 5 show examples of capacitor electrical connection.

(A)-(h) is process explanatory drawing of one Example of the manufacturing method of the wiring board by this invention. (A) is a part of process explanatory drawing of Examples 1-4.

(B), (c) is process explanatory drawing of Example 1. FIG.
FIG. 10 is a process explanatory diagram of Example 4. FIG. 10 is a process explanatory diagram of Example 4. FIG. 10 is a process explanatory diagram of Example 4. (A)-(d) is explanatory drawing of the conventional manufacturing method of the wiring board in which a capacitor is incorporated. It is explanatory drawing of the roughness of the surface of a wiring board.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Metal foil 1a, 1a ', 1a''... Cu foil 2, 2' ... Dielectric material 2a, 2a '... Dielectric material pattern 3 ... Member 4 ... Substrate 5 ..Semi-curable insulating resin sheet 6 ... photoresist pattern 7 ... capacitor upper electrode 8 ... photoresist 8 '... photoresist pattern 9 ... capacitor lower electrode 10, 10' ... Wiring 11 ... resistor 12 ... insulating resin 13 ... bump 14 ... gold 15 ... nickel-phosphorous metal 16, 16 '... metal 17 ... capacitor middle electrode 18 ...・ Beer

Claims (6)

In a method for manufacturing a wiring board with a built-in capacitor,
1) Regarding the formation of a member having metal foil on both sides of the dielectric material, the dielectric material is a member subjected to a heat treatment of high-temperature firing at 900 to 1000 ° C.
2) A step of adhering the member to the wiring in the process of laminating the wiring board via a semi-curable insulating resin sheet,
3) A step of providing a photoresist on the surface of the metal foil, performing exposure and development, and forming a photoresist pattern of a portion to be a capacitor upper electrode;
4) etching the exposed metal foil, peeling the photoresist pattern, and forming the capacitor upper electrode;
5) removing the exposed dielectric material to form a dielectric material pattern;
6) A step of providing a photoresist on the exposed surface of the metal foil and the capacitor upper electrode, performing exposure and development, and forming a photoresist pattern of a portion serving as the capacitor lower electrode and wiring;
7) etching the exposed metal foil, peeling off the photoresist pattern, and forming a capacitor lower electrode and wiring;
A method for manufacturing a wiring board, comprising: 3. The method of manufacturing a wiring board according to claim 2, wherein the dielectric material is obtained by dispersing ceramic powder in an organic insulating resin. 2. The method of manufacturing a wiring board according to claim 1, wherein the dielectric material is a dielectric thin film formed on a metal foil by sputtering, CVD, or the like. 4. The method for manufacturing a wiring board according to claim 1, wherein the member is a multilayer member in which metal foils and dielectric materials are alternately formed. Said member, the wiring board according to any one of claims 1 to 4, characterized in that a member-resistance metal as the one side to the resistor member having a metal foil on both surfaces of the dielectric material is formed Production method. Said member, by laminating a metal foil and a dielectric sheet, method of manufacturing a wiring board according to any one of claims 1 to 5, characterized in that formed as a member having a metal foil on both surfaces of the dielectric material.

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