JP4439432B2 - Ceramic circuit board manufacturing method - Google Patents

Ceramic circuit board manufacturing method Download PDF

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JP4439432B2
JP4439432B2 JP2005157913A JP2005157913A JP4439432B2 JP 4439432 B2 JP4439432 B2 JP 4439432B2 JP 2005157913 A JP2005157913 A JP 2005157913A JP 2005157913 A JP2005157913 A JP 2005157913A JP 4439432 B2 JP4439432 B2 JP 4439432B2
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solder
circuit board
resist layer
thickness
ceramic
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JP2005268824A (en
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裕 小森田
憲隆 中山
靖 五代儀
隆之 那波
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Toshiba Corp
Toshiba Materials Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/27011—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature
    • H01L2224/27013—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature for holding or confining the layer connector, e.g. solder flow barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

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Description

本発明は、パワートランジスタモジュール用基板等に好適なセラミックス回路基板を製造する方法に係り、特にセラミックス基板上に金属回路板を接合し、この金属回路板上に半導体ペレットをハンダにより実装する場合に、ハンダの流動による不都合を防止するセラミックス回路基板製造方法に関する。 The present invention relates to a method of manufacturing a ceramic circuit board suitable for a power transistor module substrate or the like, and in particular, when a metal circuit board is bonded on a ceramic board and a semiconductor pellet is mounted on the metal circuit board by soldering. The present invention relates to a method for manufacturing a ceramic circuit board which prevents inconvenience due to solder flow.

近年、パワートランジスタモジュール用基板などの回路基板として、セラミックス基板上に銅板やアルミニウム板、クラッド材等の金属板を接合させたものが用いられている。   In recent years, as a circuit board such as a power transistor module substrate, a ceramic substrate bonded with a metal plate such as a copper plate, an aluminum plate, or a clad material has been used.

このようなセラミックス基板の製造には種々の方法が知られており、例えばＤＢＣ法（ダイレクト・ボンディング・カッパー法）、ＤＢＡ法（ダイレクト・ボンド・アルミニウム法）、活性金属法等がある。ＤＢＣ法は、所定形状に打ち抜いた銅回路基板をセラミックス基板上に接触配置させて加熱し、接合界面にＣｕ−Ｏ共晶液層を生成させ、この液層によりセラミックス基板を濡らし、次いで冷却固化させてセラミックス基板と銅回路基板とを直接接合させる方法である。   Various methods are known for producing such a ceramic substrate, for example, DBC method (direct bonding copper method), DBA method (direct bond aluminum method), active metal method and the like. In the DBC method, a copper circuit board punched into a predetermined shape is placed in contact with a ceramic substrate and heated, a Cu-O eutectic liquid layer is generated at the bonding interface, the ceramic substrate is wetted by this liquid layer, and then cooled and solidified. In this method, the ceramic substrate and the copper circuit substrate are directly joined.

また、ＤＢＡ法は、アルミニウム板をＤＢＣ法と同様に加熱し、接合界面にＡｌ−Ｓｉ共晶液層を生成させ、この液層によりセラミックス基板を濡らし、次いで冷却固化させて、セラミックス基板とアルミニウム板とを直接接合させ、あるいはアルミニウム溶湯をセラミックス基板と接触させ、凝固させて直接接合させる方法である。   In the DBA method, an aluminum plate is heated in the same manner as the DBC method, an Al-Si eutectic liquid layer is formed at the bonding interface, the ceramic substrate is wetted by this liquid layer, and then cooled and solidified, so that the ceramic substrate and the aluminum In this method, the plate is directly joined, or the molten aluminum is brought into contact with the ceramic substrate and solidified to be directly joined.

さらに活性金属法は、例えば銅回路基板とセラミックス基板とをロー材であるＣｕ，Ａｇおよび活性な金属であるＴｉ，Ｈｆ，Ｚｒの寄与により接合させる方法である。   Furthermore, the active metal method is a method in which, for example, a copper circuit board and a ceramic substrate are joined by the contribution of Cu, Ag, which is a brazing material, and Ti, Hf, Zr, which are active metals.

なお、セラミックス基板の材質としては、窒化珪素、アルミナ、窒化アルミニウム（ＡｌＮ）等が適用される。   As a material for the ceramic substrate, silicon nitride, alumina, aluminum nitride (AlN) or the like is applied.

図２は、このような方法によって構成されるセラミックス回路基板の構成を例示したものである。   FIG. 2 exemplifies a configuration of a ceramic circuit board configured by such a method.

この図２の例では、セラミックス基板１の両面に前記の方法を用いて金属回路板２ａ，２ｂが接合されており、一方の金属回路板２ａには半導体ペレット３がハンダ４により接合されている。また、他方の金属回路板２ｂには例えば銅等からなるヒートシンク５がハンダ６により接合されている。   In the example of FIG. 2, the metal circuit boards 2 a and 2 b are bonded to both surfaces of the ceramic substrate 1 using the above-described method, and the semiconductor pellet 3 is bonded to one metal circuit board 2 a by solder 4. . Further, a heat sink 5 made of, for example, copper or the like is joined to the other metal circuit board 2b by solder 6.

このようなセラミックス回路基板は、セラミックス基板１と金属回路基板２ａ，２ｂとの接合が強固であり、かつ単純な構造となるため小型、高実装化が可能であり、また作業工程も短縮できる等の利点が得られている。   Such a ceramic circuit board has a strong bonding between the ceramic substrate 1 and the metal circuit boards 2a and 2b and has a simple structure, so that it can be miniaturized and highly mounted, and the work process can be shortened. The benefits are obtained.

ところが、上述したセラミックス回路基板においては、実際にモジュールに組込むためにＳｉペレット等の半導体ペレット３を金属回路板２ａ上にハンダ付けする際、その金属回路板２ａ上をハンダ４が流れ、半導体ペレット３が位置ずれを起こしたり、図２に示すように、ハンダブリッジ４ａが生じて耐圧不良となる等の問題がある。   However, in the above-described ceramic circuit board, when the semiconductor pellet 3 such as Si pellet is soldered on the metal circuit board 2a in order to be actually incorporated into the module, the solder 4 flows on the metal circuit board 2a, and the semiconductor pellet There is a problem that the position 3 is displaced or, as shown in FIG. 2, a solder bridge 4a is generated, resulting in a breakdown voltage failure.

本発明はこのような事情に鑑みてなされたもので、半導体ペレットのハンダ付け時にハンダが流れて同ペレットが位置ずれしたり、ハンダブリッジによる耐圧不良が生じることを抑制することができ、良好なハンダ接合の実施、ひいては製造効率向上および高品質化等が図れるセラミックス回路基板製造方法を提供することを目的とする。   The present invention has been made in view of such circumstances, and it is possible to suppress the solder from flowing when the semiconductor pellet is soldered and the pellet from being displaced, and the occurrence of a breakdown voltage failure due to the solder bridge. It is an object of the present invention to provide a method for manufacturing a ceramic circuit board capable of performing solder bonding, and consequently improving manufacturing efficiency and quality.

前記の目的を達成するために、本発明では金属回路板上に、半導体ペレット接合用ハンダの流動を抑制するための簡易かつ効果的な工程を採用するものである。   In order to achieve the above object, the present invention employs a simple and effective process for suppressing the flow of semiconductor pellet bonding solder on a metal circuit board.

すなわち、本発明では、セラミックス基板上に金属回路板を接合し、前記金属回路板に半導体ペレットをハンダ付けしてセラミックス回路基板を製造するセラミックス回路基板製造方法において、前記金属回路板の半導体ペレット搭載面のうちハンダが塗布されない部位に、ハンダ塗布面を囲む配置で、かつＵＶ硬化性樹脂、熱硬化性樹脂または耐熱性樹脂を用いてソルダーレジスト層を形成し、ハンダ層の厚さが前記レジスト層の厚さより大きい場合、前記ソルダーレジスト層の幅を０．５〜２ｍｍ、厚さを５〜１００μｍとし、ハンダ層の厚さを１０〜１２０μｍとすることを特徴とするセラミックス回路基板製造方法を提供する。 That is, according to the present invention, in a ceramic circuit board manufacturing method for manufacturing a ceramic circuit board by joining a metal circuit board on a ceramic board and soldering a semiconductor pellet to the metal circuit board, mounting the semiconductor pellet on the metal circuit board A solder resist layer is formed using a UV curable resin, a thermosetting resin, or a heat resistant resin in an arrangement surrounding the solder application surface in a portion of the surface where the solder is not applied, and the thickness of the solder layer is the resist When the thickness is larger than the layer thickness, the solder resist layer has a width of 0.5 to 2 mm, a thickness of 5 to 100 μm, and a solder layer thickness of 10 to 120 μm. I will provide a.

このような方法によると、半導体接合のためのハンダが金属回路板上に塗布された場合、そのハンダが余分な位置に流動しようとしてもソルダーレジスト部位で阻止される。したがって、ハンダが金属回路板の表面の一定範囲内に常時保持され、それにより半導体ペレットの移動も阻止されるため、同ペレットが位置ずれしたり、ハンダブリッジによる耐圧不良が生じることが抑制され、良好なハンダ接合の実施、ひいては製造効率の向上および高品質化等が図れるようになる。   According to such a method, when solder for semiconductor bonding is applied on the metal circuit board, even if the solder tries to flow to an excessive position, it is blocked at the solder resist portion. Therefore, since the solder is always held within a certain range of the surface of the metal circuit board, thereby preventing the movement of the semiconductor pellet, it is suppressed that the pellet is misaligned or a breakdown voltage failure due to the solder bridge occurs. It is possible to perform good solder bonding, and thus improve manufacturing efficiency and quality.

本発明において、ソルダーレジスト層の厚さは、５〜１００μｍとすることが望ましい。ハンダの厚みは５μｍないし同厚みを若干超える量であり、ソルダーレジスト層の厚さが５μｍ未満ではハンダの流動阻止機能が十分に得られない。ソルダーレジスト層の厚さが５μｍであると、ハンダがソルダーレジスト上に乗り上げる可能性があるが、すぐに硬化して乗り越えるに至らない。ソルダーレジスト層の厚さが１００μｍを超えると余分となり、構成が不必要に大型してコンパクト化の要請に反する結果となる。このような観点からすると、ソルダーレジストの厚さ（高さ）はハンダ層の厚さと同じかそれ以上であることが好ましいと言える。仮に、ハンダ層の厚さがソルダーレジスト層の厚さより大きい場合は後述するソルダーレジスト層の幅を０．５ｍｍ以上にすることが好ましい。このようにしておけば、ハンダが流出したとしてもソルダーレジスト層上で硬化してしまうため、ハンダブリッジを形成しないで済む。特に、ハンダ層の厚みがソルダーレジスト層の厚みの２倍以上のときはソルダーレジスト層の幅が０．５ｍｍ以上あった方がよい。なお、ソルダーレジスト層は平面視で枠状に設けることが望ましく、その場合の層の幅は０．１ｍｍ以上、２ｍｍ以下が望ましい。０．１ｍｍ未満では上記厚さとの関係でハンダの流動を十分に阻止できない場合がある。２ｍｍを超えると、回路構成が不要に大型化する。なお、最も望ましい幅の範囲は、０．５ｍｍ以上、２ｍｍ以下である。   In the present invention, the thickness of the solder resist layer is preferably 5 to 100 μm. The solder thickness is 5 μm or slightly larger than the same thickness. If the solder resist layer thickness is less than 5 μm, the solder flow preventing function cannot be sufficiently obtained. When the thickness of the solder resist layer is 5 μm, there is a possibility that the solder will run on the solder resist, but it will not be cured and overcome immediately. When the thickness of the solder resist layer exceeds 100 μm, the solder resist layer becomes excessive, and the configuration becomes unnecessarily large, which is contrary to the demand for compactness. From such a viewpoint, it can be said that the thickness (height) of the solder resist is preferably equal to or greater than the thickness of the solder layer. If the thickness of the solder layer is larger than the thickness of the solder resist layer, the width of the solder resist layer described later is preferably 0.5 mm or more. In this way, even if the solder flows out, it hardens on the solder resist layer, so that it is not necessary to form a solder bridge. In particular, when the thickness of the solder layer is twice or more the thickness of the solder resist layer, the width of the solder resist layer is preferably 0.5 mm or more. The solder resist layer is preferably provided in a frame shape in plan view, and the width of the layer in that case is preferably 0.1 mm or more and 2 mm or less. If the thickness is less than 0.1 mm, the solder flow may not be sufficiently prevented due to the above thickness. If it exceeds 2 mm, the circuit configuration becomes unnecessarily large. The most desirable width range is 0.5 mm or more and 2 mm or less.

また、本発明においては、ソルダーレジスト層として、ＵＶ硬化性樹脂、熱硬化性樹脂または耐熱性樹脂等が種々適用できる。この場合、耐熱性は２５０℃程度で十分である。   In the present invention, various types of UV curable resin, thermosetting resin or heat resistant resin can be applied as the solder resist layer. In this case, a heat resistance of about 250 ° C. is sufficient.

さらに本発明では、ソルダーレジスト層を、ハンダ塗布面を囲む配置で形成することが望ましい。これによりハンダの流動をあらゆる方向から防止することが可能となる。   Furthermore, in the present invention, it is desirable to form the solder resist layer in an arrangement surrounding the solder application surface. This makes it possible to prevent solder flow from all directions.

以上のように、本発明によれば、セラミックス基板上に金属回路板を接合し、前記金属回路板に半導体ペレットをハンダ付けしてセラミックス回路基板を製造するセラミックス回路基板製造方法において、前記金属回路板の半導体ペレット搭載面のうちハンダが塗布されない部位に、ハンダ層の厚さと同じかそれ以上の厚さでソルダーレジスト層を形成し、かつ前記ソルダーレジストの厚さを５〜１００μｍとすることにより、半導体ペレットのハンダ付け時にハンダが流れて同ペレットが位置ずれしたり、ハンダブリッジによる耐圧不良が生じることを抑制することができ、良好なハンダ接合の実施、ひいては製造効率向上および高品質化等が図れるという効果が奏される。   As described above, according to the present invention, in the ceramic circuit board manufacturing method for manufacturing a ceramic circuit board by bonding a metal circuit board on a ceramic board and soldering a semiconductor pellet to the metal circuit board, the metal circuit By forming a solder resist layer with a thickness equal to or greater than the thickness of the solder layer on a portion of the surface of the board where the solder pellets are not applied, and by setting the thickness of the solder resist to 5 to 100 μm , It is possible to prevent solder from flowing during soldering of semiconductor pellets, and to prevent the pellets from shifting in position or causing a breakdown voltage failure due to solder bridges. Good solder bonding, and consequently improved manufacturing efficiency and higher quality, etc. The effect that can be achieved.

以下、本発明に係るセラミックス回路基板製造方法の実施形態について、図２を参照して説明する。   Hereinafter, an embodiment of a ceramic circuit board manufacturing method according to the present invention will be described with reference to FIG.

図２は、本実施形態の方法によって製造されるセラミックス回路基板の構成を示す図である。なお、説明を容易にするため、全体構成については図２に示した従来のものと同様のものを適用する。したがって、従来の構成部分と同一部分については、図１に図２と同符号を用いて説明する。   FIG. 2 is a diagram showing a configuration of a ceramic circuit board manufactured by the method of the present embodiment. For ease of explanation, the same configuration as the conventional one shown in FIG. Therefore, the same parts as the conventional constituent parts will be described with reference to FIG.

このセラミックス回路基板製造方法では、セラミックス基板１の両面に金属回路板２ａ，２ｂを接合する。セラミックス基板１としては、例えば窒化アルミニウム、窒化珪素、アルミナ、ジルコニア等を適用する。金属回路板２ａ，２ｂとしては、銅、アルミニウム、クラッド材等を適用する。これらは、上述したＤＢＣ法、ＤＢＡ法、活性金属法等によって接合される。   In this ceramic circuit board manufacturing method, the metal circuit boards 2 a and 2 b are bonded to both surfaces of the ceramic board 1. As the ceramic substrate 1, for example, aluminum nitride, silicon nitride, alumina, zirconia, or the like is applied. As the metal circuit boards 2a and 2b, copper, aluminum, a clad material or the like is applied. These are joined by the above-described DBC method, DBA method, active metal method, or the like.

そして、一方の金属回路板２ａには例えばＳｉペレット等の半導体ペレット３をハンダ４により接合する。また、他方の金属回路板２ｂには例えば銅等からなるヒートシンク５をハンダ６により接合する。   Then, a semiconductor pellet 3 such as a Si pellet is joined to one metal circuit board 2 a by solder 4. Further, a heat sink 5 made of, for example, copper or the like is joined to the other metal circuit board 2 b by solder 6.

このようなセラミックス回路基板製造方法において、本実施形態では、一方の金属回路板２ａの半導体ペレット搭載面のうちハンダ６が塗布されない部位に、ソルダーレジスト層７をハンダ塗布面を囲む配置で形成する。   In such a ceramic circuit board manufacturing method, in this embodiment, the solder resist layer 7 is formed so as to surround the solder coating surface on a portion of the semiconductor pellet mounting surface of one metal circuit board 2a where the solder 6 is not coated. .

このソルダーレジスト層７は、例えばＵＶ硬化性樹脂、熱硬化性樹脂または耐熱性樹脂により枠状に形成しており、耐熱性は２５０℃程度のものとする。また、ソルダーレジスト層７の厚さは、５〜１００μｍの範囲に設定し、ソルダーレジスト層７の幅は０．１ｍｍ〜２ｍｍとする。   The solder resist layer 7 is formed in a frame shape with, for example, a UV curable resin, a thermosetting resin, or a heat resistant resin, and the heat resistance is about 250 ° C. Moreover, the thickness of the soldering resist layer 7 is set to the range of 5-100 micrometers, and the width | variety of the soldering resist layer 7 shall be 0.1 mm-2 mm.

このような方法によると、半導体接合のためのハンダ４が金属回路板２ａ上に塗布された場合、そのハンダ４が金属回路板２ａの表面の一定範囲内に常時保持された。したがって、図１に示すように、半導体ペレット３は定位置に安定して保持され、位置ずれが生じることがなく、また図２に示したようなハンダブリッジが生じることもなかった。   According to such a method, when the solder 4 for semiconductor bonding is applied onto the metal circuit board 2a, the solder 4 is always held within a certain range on the surface of the metal circuit board 2a. Therefore, as shown in FIG. 1, the semiconductor pellet 3 was stably held at a fixed position, no displacement occurred, and no solder bridge as shown in FIG. 2 occurred.

なお、ソルダーレジスト層７の形成方法は特に限定されるものではないが、例えば下記のような方法がある。金属回路板の所定の位置にレジストインク（レジスト含有溶液）を塗布できるようマスク材を配置しスクリーン印刷等の方法により印刷する。この後、例えば、レジスト材がＵＶ硬化型インクであれば印刷直後にＵＶ乾燥によりインクを乾燥させてソルダーレジスト層を形成する。また、熱硬化型インクであれば、同様の方法でインクを塗布した後、熱処理により乾燥させる方法などが挙げられる。   In addition, although the formation method of the soldering resist layer 7 is not specifically limited, For example, there exists the following method. A mask material is arranged at a predetermined position on the metal circuit board so that a resist ink (resist-containing solution) can be applied, and printing is performed by a method such as screen printing. Thereafter, for example, if the resist material is a UV curable ink, the ink is dried by UV drying immediately after printing to form a solder resist layer. In the case of a thermosetting ink, a method of applying the ink by the same method and then drying by heat treatment may be used.

また、ソルダーレジスト層７の厚さおよび幅と、ハンダ４の塗布厚さとの関係を示すと、下記の表１に示すとおりであった。ソルダーレジスト層の形成形態としては、いずれも金属回路板上の半導体ペレット搭載面においてハンダが塗布されない部位に形成した。この表１に示すように、本実施形態においては、上述した従来のセラミックス回路基板における問題、すなわち金属回路板２ａ上をハンダ４が流れたり、半導体ペレット３が位置ずれを起こしたり、ハンダブリッジ４ａが生じて耐圧不良となる等の問題が解消できることが確認された。参考例として示したようにハンダ層の厚みがソルダーレジスト層の２倍ある場合、ソルダーレジスト層の幅が０．５ｍｍ未満であるとハンダ層の流出がおきることが確認された。なお、ハンダ層の厚さがソルダーレジスト層の厚さに対して３倍以上ある場合はソルダーレジスト層の幅を１．０ｍｍ以上にすることにより対応可能であるが、できれば２倍以下になるようにソルダーレジスト層の厚さを制御した方がよい。さらに比較例１に示したようにソルダーレジスト層の厚さが５μｍ未満であると、半導体ペレットの移動がおきてしまうことが分かった。これは半導体ペレットをハンダ接合するためのハンダ量が多量に流出してしまうためにこのような現象がおきてしまったものと推測される。

Figure 0004439432
The relationship between the thickness and width of the solder resist layer 7 and the coating thickness of the solder 4 was as shown in Table 1 below. As a formation form of the solder resist layer, all were formed in the site | part to which a solder | pewter is not apply | coated in the semiconductor pellet mounting surface on a metal circuit board. As shown in Table 1, in this embodiment, in the above-described conventional ceramic circuit board, that is, the solder 4 flows on the metal circuit board 2a, the semiconductor pellet 3 is displaced, the solder bridge 4a It has been confirmed that problems such as the occurrence of a withstand voltage failure can be solved. As shown as a reference example, when the thickness of the solder resist layer was twice that of the solder resist layer, it was confirmed that the solder layer flowed out when the width of the solder resist layer was less than 0.5 mm. In addition, when the thickness of the solder layer is 3 times or more than the thickness of the solder resist layer, it can be dealt with by making the width of the solder resist layer 1.0 mm or more. It is better to control the thickness of the solder resist layer. Furthermore, as shown in Comparative Example 1, it was found that the semiconductor pellet moved when the thickness of the solder resist layer was less than 5 μm. This is presumed that such a phenomenon has occurred because a large amount of solder for soldering the semiconductor pellets flows out.
Figure 0004439432

本発明に係るセラミックス基板製造方法の実施形態により製造された基板を示す図。The figure which shows the board | substrate manufactured by embodiment of the ceramic substrate manufacturing method which concerns on this invention. 従来方法により製造される基板を示す図。The figure which shows the board | substrate manufactured by the conventional method.

符号の説明Explanation of symbols

１ セラミックス基板
２ａ，２ｂ 金属回路板
３ 半導体ペレット
４，６ ハンダ
５ ヒートシンク
７ ハンダレジスト層 DESCRIPTION OF SYMBOLS 1 Ceramic substrate 2a, 2b Metal circuit board 3 Semiconductor pellet 4,6 Solder 5 Heat sink 7 Solder resist layer

Claims (3)

セラミックス基板上に金属回路板を接合し、前記金属回路板に半導体ペレットをハンダ付けしてセラミックス回路基板を製造するセラミックス回路基板製造方法において、前記金属回路板の半導体ペレット搭載面のうちハンダが塗布されない部位に、ハンダ塗布面を囲む配置で、かつＵＶ硬化性樹脂、熱硬化性樹脂または耐熱性樹脂を用いてソルダーレジスト層を形成し、ハンダ層の厚さが前記レジスト層の厚さより大きい場合、前記ソルダーレジスト層の幅を０．５〜２ｍｍ、厚さを５〜１００μｍとし、ハンダ層の厚さを１０〜１２０μｍとすることを特徴とするセラミックス回路基板製造方法。 In a ceramic circuit board manufacturing method for manufacturing a ceramic circuit board by joining a metal circuit board on a ceramic board and soldering semiconductor pellets to the metal circuit board, solder is applied to the semiconductor pellet mounting surface of the metal circuit board. When the solder resist layer is formed using a UV curable resin, thermosetting resin or heat resistant resin in an arrangement that surrounds the solder application surface in a part that is not to be processed, and the thickness of the solder layer is larger than the thickness of the resist layer A method for producing a ceramic circuit board, wherein the solder resist layer has a width of 0.5 to 2 mm, a thickness of 5 to 100 μm, and a solder layer of 10 to 120 μm. 請求項１記載のセラミックス回路基板製造方法において、ソルダーレジスト層には、ＵＶ硬化性樹脂、熱硬化性樹脂または耐熱性樹脂を用いることを特徴とするセラミックス回路基板製造方法。 2. The method of manufacturing a ceramic circuit board according to claim 1 , wherein a UV curable resin, a thermosetting resin, or a heat resistant resin is used for the solder resist layer. 請求項１または２記載のセラミックス回路基板製造方法において、ソルダーレジスト層は、ハンダ塗布面を囲む配置で形成することを特徴とするセラミックス回路基板製造方法。 3. The method of manufacturing a ceramic circuit board according to claim 1, wherein the solder resist layer is formed so as to surround the solder coating surface.
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