JP4413697B2 - Waveform generator - Google Patents

Description

  The present invention relates to a waveform generation apparatus that generates and outputs a waveform desired by a user, and can output a desired waveform while changing the amplitude ratio in real time while maintaining the phase difference and continuity of a plurality of waves. The present invention relates to a waveform generator.

  For example, when evaluating a radio-related amplifier as an electronic device, a desired waveform (signal wave) or a signal wave on which an interference wave is superimposed is generated by a waveform generator, and the generated various waveforms are input to the amplifier. From the reception status, it is determined whether or not a predetermined performance is satisfied.

  By the way, the waveform generation device used when evaluating the performance of this type of electronic device generates a waveform according to the communication system for the electronic device. However, the user actually uses the electronic device. It is also necessary to generate a waveform according to the conditions.

  Here, as prior arts related to this type of waveform generation apparatus, those disclosed in Patent Document 1 and Patent Document 2 below are known. FIG. 6 is a block diagram of an arbitrary waveform generator disclosed in Patent Document 1, and FIG. 7 is a circuit diagram of an output amplitude adjusting circuit disclosed in Patent Document 2.

  The arbitrary waveform generator disclosed in Patent Document 1 has a plurality of packets having different waveform data amplitude information in the memory for the purpose of reducing the amount of waveform data memory usage and performing amplitude control of an output waveform with high accuracy. Therefore, the desired waveform data and the amplitude information are multiplied by switching the address of the packet. More specifically, in the arbitrary waveform generator of Patent Document 1, as shown in FIG. 6, the amplitude information Cn is also stored in the packet memory 51, and the waveform data memory 52 is a digital in which the amplitude of the output waveform is normalized. Data is stored and output by multiplying the waveform data output by the amplitude information Cn output 55 by the digital multiplier 54 provided between the waveform data memory 52 and the D / A converter 53. Further, the amplitude is controlled by switching the waveform data output and the amplitude information Cn output by the control data stored for each waveform packet in the packet memory 51.

As shown in FIG. 7, the output amplitude adjustment circuit disclosed in Patent Document 2 has a first digital signal 61 equal to the input signal, for the purpose of performing output amplitude adjustment of DA with high speed and high accuracy. A second digital signal 63 having a value obtained by dividing the input signal prepared by the dedicated high-speed arithmetic circuit 62 by a power of 2 is selectively added to the plurality of DA converters 64A to 64F, and the output is added. . Further, the analog output amplitude is adjusted by changing the selection ratio between the first digital signal 61 and the second digital signal 63.
JP-A-7-273555 JP 2000-138585 A

  However, in the arbitrary waveform generator disclosed in Patent Document 1 described above, the waveform and the amplitude information are in a one-to-one relationship, and when the amplitude information is switched, the waveform is read out. There is a problem that the output waveforms cannot be kept in continuity because they are switched together and measurement cannot be performed in synchronization. For example, the base station and mobile terminal tests must be synchronized.

  Further, in the output amplitude adjustment circuit disclosed in Patent Document 2 described above, since the amplitude is varied in an analog manner, for example, the amplitude value changes depending on the surrounding environment such as temperature and humidity, and the error factor increases. there were. Further, since the data after DA conversion by the plurality of DA converters 64A to 64F is analog-added, the variable accuracy of the amplitude is limited, and fine variable control such as 0.01 dB / step cannot be performed. There was a problem that sufficient variable accuracy could not be obtained during measurement. Furthermore, since the data after DA conversion is analog-added, the number of DA converters increases, and there is a problem that the circuit scale increases.

  As described above, since the conventional waveform generation apparatus does not have the concept of multicarrier, a desired waveform is calculated with respect to fixed waveform data. In addition, until now, in order to reduce the burden on the control side (CPU side), waveforms having different amplitude ratios are held in a storage medium in advance, and by adding them, waveforms having different amplitude ratios can be added, A method of adding waveforms shifted by the set phase difference by advancing the address for reading the waveform by the phase difference by the counter has been adopted.

  However, in recent years, flexibility has been required by users to add desired multiple waveforms (for example, different signal waves or signal waves and interference waves) and control the amplitude ratio and phase difference in real time.

  Accordingly, the present invention has been made in view of the above problems, and a waveform generation device capable of outputting a desired waveform while changing the amplitude ratio in real time while maintaining the phase difference and continuity of a plurality of waves. The purpose is to provide.

In order to achieve the above object, the waveform generating apparatus according to claim 1 described in the present invention includes a plurality of waveform information storage means 3 storing waveform information, and waveform information readout control from each of the plurality of waveform information storage means. Output from the waveform calculation means, a plurality of waveform calculation means 6 for calculating the waveform information from the plurality of waveform information storage means read by the control of the waveform control means, respectively. In the waveform generation apparatus provided with the synthesis calculation means 7 for synthesizing a plurality of waveform information,
A plurality of amplitude control means 5 for storing amplitude information for outputting the amplitudes of the respective waveform information output from the plurality of waveform calculation means at respective desired levels and having the amplitude information output to the respective waveform calculation means are provided. And
The waveform control means is configured to be able to generate a trigger signal, and controls the waveform information to be read from the waveform information storage means, and the amplitude information stored in the plurality of amplitude control means Control is performed such that the plurality of waveform calculation means are simultaneously output by the trigger signal.

The waveform generation device according to claim 2 is the waveform generation device according to claim 1,
The waveform control means 4 is a control section 4a for calculating an address value for reading waveform information stored in the plurality of waveform information storage means 3,
A plurality of address generation units 4b that respectively indicate arbitrary addresses of the plurality of waveform information storage means 3;
The address generation unit can store the address value calculated by the control unit, and simultaneously instructs the addresses of the stored address value to the plurality of waveform information storage units based on the trigger signal. It is characterized by doing.

The waveform generation device according to claim 3 is the waveform generation device according to claim 2,
The waveform control unit 4 receives information indicating an amplitude change for causing the waveform calculation unit 6 to output the amplitude information stored in the amplitude control unit 5 and the address of the address value stored in the address generation unit 4b. Both the information indicating the phase change for indicating and the information included in the trigger signal are generated.

The waveform generation device according to claim 4 is the waveform generation device according to any one of claims 1 to 3,
The plurality of waveform calculation means 6 receive and calculate amplitude information from the plurality of amplitude control means 5 respectively corresponding to the waveform information from the plurality of waveform information storage means 3 respectively corresponding thereto,
The waveform control means 4 controls the timing of outputting each waveform information calculated from the plurality of waveform calculation means to the synthesis calculation means 7.

The waveform generation device according to claim 5 is the waveform generation device according to any one of claims 1 to 4,
The waveform control unit 4 includes a plurality of phase control units 4c that respectively adjust the arrival timing of the waveform information from the plurality of waveform information storage units 3 to the waveform calculation unit 6.

The waveform generation device according to claim 6 is the waveform generation device according to claim 5,
The phase control unit 4c is characterized by matching the output timing to the plurality of waveform calculating means 6, respectively in accordance with the ratio of the sampling rate of the waveform information stored in the plurality of waveform information storage means 3.

The waveform generation device according to claim 7 is the waveform generation device according to claim 5 or 6 ,
The plurality of phase control units 4c include interpolators that perform interpolation processing on the waveform information from each of the plurality of waveform information storage means according to the sampling rate ratio of the waveform information stored in the plurality of waveform information storage means 3. It is characterized by having .

According to the waveform generation device of the present invention, the amplitude information stored in the plurality of amplitude control means is output to the plurality of waveform calculation means all at once by the trigger signal, and the control unit calculates and stores it in the address generation unit. With the configuration in which the addresses of the address values are instructed simultaneously to a plurality of waveform information storage means based on the trigger signal, the set values can be reflected at the same time even in individually arranged circuits. Real-time control of the waveform seen from the user is possible. Further, the waveform control means has information indicating amplitude change for causing the waveform calculation means to output the amplitude information stored in the amplitude control means, and a phase change for instructing the address of the address value stored in the address generator. With the configuration in which both the information indicating the information and the information indicating that are generated in the trigger signal, the amplitude change and the phase change can be set simultaneously.
The waveform can be generated and output in real time while changing the amplitude ratio while maintaining the phase difference between the waveforms and the continuity of each waveform controlled independently. Further, it has a plurality of waveform information storage means, and the waveform output of a plurality of carriers can be performed by changing and calculating the amplitude ratio of each waveform. Further, by performing digital calculation, it is possible to generate a waveform with high accuracy and reproducibility with a desired level ratio of the plurality of waves to be calculated. If D / A conversion is performed after digital calculation (addition processing) of a plurality of waveforms, the circuit scale can be reduced by the amount of D / A converters less than when analog addition is performed.
In addition, a plurality of waveforms can be generated and output while maintaining a desired phase difference. In addition, since the phases of a plurality of waveform information can be controlled independently, it is possible to output a waveform generated while shifting the phase between the waveforms.
Further, the plurality of waveform calculation means receive the waveform information from the corresponding plurality of waveform information storage means and the amplitude information from the plurality of corresponding amplitude control means, respectively, and the waveform control means performs the plurality of waveform calculations. By controlling the timing at which each waveform information calculated from the means is output to the synthesis calculating means 7, it is possible to cope with changes in the reading speed of the waveform information from the plurality of waveform information storage means.
In addition, if the configuration is provided with a plurality of phase control units that adjust the arrival timing of the waveform information from the plurality of waveform information storage means to the waveform calculation means, the waveform information read from the plurality of waveform information storage means is synthesized. The output timing can be matched when the output speed to the computing means is matched or when the sampling rates of the waveform information in the plurality of waveform information storage means are different.
Furthermore, even if the sampling rates of the plurality of waveform information storage means are different, the output timing to the waveform calculation means 6 can be adjusted according to the ratio.

  Hereinafter, embodiments of the present invention will be specifically described with reference to the drawings. FIG. 1 is a block diagram showing a schematic configuration of a waveform generating apparatus according to the present invention, FIG. 2 is a block diagram showing a first form of the waveform generating apparatus according to the present invention, and FIG. 3 is a second diagram of the waveform generating apparatus according to the present invention. FIG. 4 and FIG. 5 are diagrams showing display examples of the waveform generation apparatus according to the present invention.

  The waveform generator of this example generates and outputs a waveform desired by the user in particular, and does not only perform conventional phase control and amplitude control, but can set the amplitude ratio and phase difference individually or simultaneously, Amplitude control is possible continuously while maintaining the set phase difference.

  First, a first embodiment of the waveform generation apparatus of this example will be described with reference to FIGS. As shown in FIG. 1, the waveform generation apparatus 1 of this example includes a setting input unit 2, a waveform information storage unit 3, a waveform control unit 4, an amplitude control unit 5, a waveform calculation unit 6, a synthesis calculation unit 7, and a display unit 8. It is comprised roughly with. In the waveform generator 1A (1) according to the first embodiment, the waveform controller 4 includes a controller 4a and an address generator 4b. In addition, in the waveform generation apparatus of each form demonstrated below, the structure is demonstrated taking the case of adding and producing | generating two waveforms as an example.

  The setting input means 2 shown in FIG. 1 and FIG. 2 is composed of a part of an external terminal device such as a panel of the apparatus main body or a personal computer, for example, and is generated and output based on the waveform information stored in the two waveform storage means 3. Various setting information regarding the waveform is input to the waveform control means 4. Specifically, when generating and outputting a waveform in which the signal waveform A and the interference waveform (noise) B as shown in FIG. 4 are superimposed on the basis of the waveform information stored in the two waveform storage means 3, the frequency band The absolute value level and S / N of both signals are input to the waveform control means 4 as setting input information. In addition, when different signal waveforms A and B as shown in FIG. 5 are generated and output with a predetermined frequency interval fa based on the waveform information stored in the two waveform storage means 3, The absolute value level and frequency interval are input to the waveform control means 4 as setting input information.

  Two waveform information storage means 3 (3A, 3B) shown in FIGS. 1 and 2 store waveform information desired by the user (waveform data based on digital signals). This waveform information can be stored in advance in each waveform information storage means 3A, 3B before waveform generation, or can be taken in from an external terminal device such as a personal computer via an external interface.

  The waveform control means 4 shown in FIGS. 1 and 2 controls each part such as waveform information reading control from the waveform information storage means 3A and 3B, amplitude control means 5 control, and waveform control means 6 calculation control. Yes. As shown in FIG. 2, the waveform control means 4 includes a control unit 4a and two address generation units 4b.

  Based on the setting information from the setting input means 2, the control unit 4 a calculates a multiplication coefficient as an address value of waveform data or amplitude information. The address value calculated by the control unit 4a is output as setting information (setting signal) to the corresponding address generation unit 4b. Further, the multiplication coefficient as the amplitude information calculated by the control unit 4a is output as setting information (setting signal) to the corresponding amplitude control means 5. Further, the control unit 4a outputs a trigger signal to the address generation units 4bA and 4bB and the amplitude control means 5A and 5B when the user executes the setting. This trigger signal includes information indicating whether only the amplitude ratio is changed, only the phase is changed, or both the amplitude ratio and the phase are changed.

  The two address generators 4bA and 4bB shown in FIG. 2 indicate arbitrary addresses of the waveform information storage means 3A and 3B that correspond to each other. Each address generation unit 4bA, 4bB includes two registers, a pre-stage register 11 and a post-stage register 12, and adopts a double buffer structure. The pre-stage register 11 stores the address value used this time, and the post-stage register 12 stores the address value used next time. The post-stage register 12 stores an address value calculated by the control unit 4 a based on the setting information from the setting input unit 2. When a trigger signal including information indicating a phase change is input from the control unit 4a, the address value in the rear stage register 12 is transferred to the front stage register 11.

  The two amplitude control means 5A and 5B shown in FIG. 2 output amplitude information (multiplication coefficients) so that the amplitude of the waveform information output from the corresponding waveform calculation means 6A and 6B can be output at their desired levels. The waveform is output to the waveform calculation means 6A and 6B. Each of the amplitude control means 5A and 5B is provided with two registers, a pre-stage register 13 and a post-stage register 14, similarly to the address generation unit 4b, and adopts a double buffer structure. The previous stage register 13 stores the numerical value of the amplitude ratio used this time, and the rear stage register 14 stores the numerical value of the amplitude ratio used next time. The post-stage register 14 stores amplitude information (multiplication coefficient) calculated by the control unit 4a based on the setting information from the setting input means 2. Then, when a trigger signal including information indicating an amplitude change is input from the control unit 4a, the amplitude information (multiplication coefficient) in the subsequent stage register 14 is transferred to the previous stage register 13.

  The two waveform calculation means 6A and 6B shown in FIG. 2 calculate the waveform information from the corresponding waveform information storage means 3A and 3B. Each of the waveform calculation means 6A and 6B is constituted by a multiplier, for example, and multiplies the waveform information from the corresponding waveform information storage means 3A and 3B by the amplitude information (multiplication coefficient) from the amplitude control means 5A and 5B, The output timing of each waveform information is matched and input to the synthesis calculation means 7. The two waveform calculation means 6A and 6B output the waveform information from the waveform information storage means 3A and 3B as they are when there is no input of the amplitude information (multiplication coefficient) from the corresponding amplitude control means 5A and 5B. The signal is input to the composition calculation means 7 in a state where the timing is correct.

  The synthesis calculation means 7 synthesizes the waveform information from the waveform calculation means 6A and 6B. The synthesis calculation means 7 is composed of, for example, an adder, and adds the waveform information from each waveform calculation means 6A, 6B and outputs it. The digital waveform information output from the synthesizing means 7 is converted into an analog signal by the D / A converter 15 and then converted into a low-pass filter (LPF) 16 and a quadrature modulator 17 at the subsequent stage. The frequency-converted analog signal is input to a measurement target such as an amplifier.

As shown in FIGS. 4 and 5, the display unit 8 displays information on the waveform that is actually generated under the control of the waveform control unit 4 based on the setting information from the setting input unit 2. FIG. 4 shows the display state of the waveform output by superimposing the signal waveform A and the interference waveform (noise) B and the display state of various setting information. FIG. 5 shows a display state of waveforms in which the signal waveform A and the signal waveform B are output with a predetermined frequency interval fa and a display state of various setting information. The display unit 8 may display the waveform information output from the synthesis calculation unit 7 and the actual waveform output from the quadrature modulator 17.

  Next, a second form of the waveform generation apparatus of this example will be described with reference to FIG. In addition, the same number is attached | subjected to the component same as the 1st form mentioned above, and the description is abbreviate | omitted.

  In the waveform generator 1B (1) of the second embodiment, the waveform controller 4 includes a phase controller 4c (4cA, 4cB) in addition to the controller 4a and the address generator 4b (4bA, 4bB). As shown in FIG. 3, the two phase controllers 4cA and 4cB are provided between the corresponding waveform information storage means 3A and 3B and the waveform calculation means 6A and 6B. Other configurations are the same as those in the first embodiment.

Each of the phase control units 4cA and 4cB adjusts the arrival timing of the waveform information from the two waveform information storage units 3A and 3B to the waveform calculation units 6A and 6B, so that the FIFO 21 (21A and 21B) and the interpolator 22 ( 22A 22B).

  The FIFOs 21A and 21B add the waveform information of different systems when the waveform information storage means 3A and 3B have different readout rates or different burst read timings, and the timing of the waveform information input to the interpolator 22 Is adjusted.

  The interpolators 22A and 22B sample the two waveform information storage means 3A and 3B so that the sampling rates of the two waves coincide when the waveform information from the two waveform information storage means 3A and 3B enters the synthesis operation means 7. The output timing is adjusted by adding interpolation processing to the waveform information from the waveform information storage means 3A, 3B to the corresponding waveform calculation means 6A, 6B in accordance with the rate ratio.

  Next, common operations of the waveform generation apparatuses 1A and 1B having the above-described configurations will be described. Here, the waveform calculation means 6A and 6B will be described as a configuration including a multiplier, and the synthesis calculation means 7 is configured as an adder. Further, it is assumed that waveform data (waveform information) created by the user is stored in advance from the external terminal device in the waveform information storage means 3A, 3B.

  First, the operation when the user changes only the amplitude ratio of the waveform by the setting from the setting input means 2 will be described. In this case, the control unit 4a of the waveform control unit 4 calculates the multiplication coefficient based on the user set value from the setting input unit 2, and calculates the multiplication coefficient in the subsequent stage in the amplitude control units 5A and 5B. Stored in the register 14 as amplitude information. At this time, since the set values of the address generation units 4bA and 4bB are not changed, nothing is written in the subsequent stage register 12 of the address generation units 4bA and 4bB. When the user executes the setting, the control unit 4 a generates a trigger signal including amplitude change information, and the multiplication coefficient in the subsequent stage register 14 is reflected in the previous stage register 13. At this time, since only the amplitude ratio is changed in the trigger signal, only the amplitude control means 5A and 5B are changed. As a result, it is possible to change only the amplitude value without stopping or re-reading the waveform information.

  Next, the operation when the user changes only the phase of the waveform by the setting from the setting input means 2 will be described. In this case, the control unit 4a of the waveform control unit 4 calculates the address value of the waveform information based on the user setting value from the setting input unit 2, and the calculated address value is used as the address generation units 4bA and 4bB. It stores in the latter stage register 12 in the inside. At this time, since the set values of the amplitude control means 5A and 5B do not change, nothing is written in the subsequent register 14 of the amplitude control means 5A and 5B. When the user executes the setting, the control unit 4a generates a trigger signal including phase change information, and the address in the rear stage register 12 is reflected in the front stage register 11. At this time, since the trigger signal has information that only the phase is changed, only the address generators 4bA and 4bB are changed.

  Next, an operation when the user changes both the amplitude ratio and the phase of the waveform by setting from the setting input unit 2 will be described. In this case, the address generation unit 4bA has a front-stage register 11 and a rear-stage register 12, and the amplitude control means 5A and 5B have a double buffer structure that similarly has a front-stage register 13 and a rear-stage register 14. Then, preset values (address values, multiplication coefficients) are stored in the post-stage registers 12 and 14 in advance, and the address values in the post-stage registers 12 are simultaneously obtained with a trigger signal including amplitude change and phase change information from the control unit 4a. The product is transferred to the pre-stage register 11 and the multiplication coefficient in the post-stage register 14 is transferred to the pre-stage register 13. As a result, the set values can be reflected at the same time even in individually arranged circuits (address generation units 4bA, 4bB, amplitude control means 5A, 5B). As a result, real-time control of the waveform seen from the user is possible.

  By the way, when the waveform information is read from the two waveform information storage units 3A and 3B collectively in units of words using burst waves, the speed of reading the waveform information of the two waves is different. Therefore, in this example, the waveform generator 1B of the second form is adopted to solve this problem. In the waveform generator 1B according to the second embodiment, it is possible to keep the phase of the two waves at the set value by absorbing the difference in speed when the waveform information is read out by the FIFO 21 (21A, 21B).

  For example, when the waveform information writing speed to the FIFO 21A is fast and the waveform information writing speed to the FIFO 21B is slow, reading of the waveform information from the FIFO 21A is stopped when the waveform information in the FIFO 21B becomes empty. When the waveform information enters the FIFO 21B, the readout of the waveform information starts simultaneously with the FIFOs 21A and 21B.

  In the interpolators 22A and 22B, the values of the interpolators 22A and 22B are set so that the sampling rate is the least common multiple of the sampling rate of the waveform information stored in the waveform information storage unit 3A and the sampling rate of the waveform information stored in the waveform information storage unit 3B. Is done. An example will be described with reference to FIG. 3. Assume that the sampling rate of the waveform information storage unit 3A is 100 MHz and the sampling rate of the waveform information storage unit 3B is 50 MHz. In this case, the value of the interpolator 22A is set to 1 and the value of the interpolator 22B is set to 2 so that the sampling rate of the least common multiple of the two waveform information is 100 MHz.

  Thereby, the waveform information of the waveform information storage means 3A is transmitted to the FIFO 21A at 100 MHz. Thereafter, the data is transmitted from the FIFO 21A to the interpolator 22A at 100 MHz. Further, the signal is transmitted from the interpolator 22A to the waveform calculation means 6A at 100 MHz. On the other hand, the waveform information stored in the waveform information storage unit 3B is transmitted to the FIFO 21B at 100 MHz. Thereafter, the waveform information of the FIFO 21B is transmitted to the interpolator 22B at 50 MHz. Here, since the sampling rate of the waveform information stored in the waveform information storage unit 3A is twice that of the waveform information stored in the waveform information storage unit 3B, the interpolator 22B performs interpolation processing so that the sampling rate is doubled. As a result, the signal is transmitted at 100 MHz from the interpolator 22B to the waveform calculating means 6B. Further, the signal is transmitted from the interpolator 22B to the waveform calculating means 6B at 100 MHz. Then, the sampling rates of the two waveform information coincide at the time of entering the synthesis calculation means 7 from each waveform calculation means 6A, 6B, and the two waveform information are added at 100 MHz.

  Thus, according to the waveform generation apparatus of this example, each block (address generation unit 4b, amplitude control means 5, waveform calculation means 6) is controlled by the trigger signal including information indicating amplitude change and / or phase change. It is possible to reflect the setting in real time by making the address generation unit 4b and the amplitude control means 5 into a double buffer structure.

  Since the trigger signal output from the control unit 4a is set to the address generation unit 4b, the amplitude control means 5 is set, or both are set, the three types of data are provided. It becomes possible to control the production | generation part 4b and the amplitude control means 5 separately. As a result, even if the amplitude ratio is changed from the amplitude control means 5, it is not necessary to reset the address of the waveform information, and the continuity of the waveform can be maintained.

  According to the configuration in which control is performed to stop the other FIFO 21 (for example, 21B) when the data in the FIFO 21 (for example, 21A) becomes empty, multiplication is performed even for waveform information of two waves read at different timings. It is possible to always match the correlation and timing of the waveform information entering the waveform calculation means 6 comprising a device. As a result, the phase difference between the two waves can always be kept constant.

  According to the configuration having a plurality of waveform information storage means 3 (two in this example) and changing the amplitude ratio of each waveform information, it is possible to output waveforms of a plurality of carriers.

  Since the composition calculation means 7 performs digital calculation, there are few error factors due to changes in the surrounding environment such as temperature and humidity, and the level ratio of the two waves to be calculated is accurately set to a desired ratio and a reproducible waveform generation is possible. It can be carried out. Specifically, the amplitude ratio can be continuously varied with a variable accuracy of 0.01 dB / step. In addition, since the D / A converter 15 performs the D / A conversion after the digital calculation by the synthesis calculation means 7, the circuit scale is also reduced by the amount of the D / A converter compared with the case of the analog addition. Can be small.

  Since the FIFO 31 at the subsequent stage of the synthesizing calculation means 7 maintains the phase difference between the two waves, the discontinuity of the waveform output caused when the FIFO 21 stops reading the waveform information is prevented.

  Since the generated waveform is displayed on the display means 8 based on the setting data, the generated waveform can be monitored in parallel with the setting.

  By the way, in each form mentioned above, although the case where the waveform information storage means 3 was two was demonstrated as an example, it can also be set as the structure provided with the 3 or more waveform information storage means 3. FIG. In this case, in the configuration provided with the phase control unit 4c, the value of the interpolator 22 is set so that the sampling rate of the common multiple is the same by multiplying each sampling rate of the plurality of waveform information storage means 3 by a power of 2. Is set.

  Further, when the waveform information read addresses of the plurality of waveform information storage means 3 are the same, it is possible to control the reading of the waveform information by setting an address value in one address generation unit 4b. Further, when the amplitude ratios of the waveform information in the plurality of waveform information storage means 3 are the same, the waveform can be generated by setting the amplitude information (multiplication coefficient) in one amplitude control means 5.

  Further, in the waveform generating apparatus of the present example provided with the phase control unit 4c, when the sampling rates of the plurality of waveform information storage means 3 are the same and the sampling rates at the time of entering the synthesizing calculation means 7 match, the phase control The interpolator 22 of the unit 4c can be omitted. Further, when the waveform information from the plurality of waveform information storage means 3 is read in units of samples, the FIFO 21 of the phase control unit 4c can be omitted.

It is a block diagram which shows schematic structure of the waveform generation apparatus which concerns on this invention. It is a block diagram which shows the 1st form of the waveform generation apparatus which concerns on this invention. It is a block diagram which shows the 2nd form of the waveform generation apparatus which concerns on this invention. It is a figure which shows the example of a display of the waveform generation apparatus which concerns on this invention. It is a figure which shows the example of a display of the waveform generation apparatus which concerns on this invention. It is a block diagram of the arbitrary waveform generator disclosed by patent document 1. FIG. 10 is a circuit diagram of an output amplitude adjustment circuit disclosed in Patent Document 2. FIG.

Explanation of symbols

1 (1A, 1B) Waveform generator 2 Setting input means 3 (3A, 3B) Waveform information storage means 4 Waveform control means 4a Control section 4b (4bA, 4bB) Address generation section 4c (4cA, 4cB) Phase control section 5 ( 5A, 5B) Amplitude control means 6 (6A, 6B) Waveform calculation means 7 Composite calculation means 8 Display means 11, 13 Pre-stage register 12, 14 Sub-stage register 15 D / A converter 16 LPF
17 Quadrature modulator 21 (21A, 21B) FIFO
22 (22A, 22B) Interpolator 31 FIFO

Claims (7)

A plurality of waveform information storage means (3) storing waveform information, a waveform control means (4) for controlling the readout of waveform information from each of the plurality of waveform information storage means, and read by the control of the waveform control means. A plurality of waveform calculation means (6) for calculating the waveform information from the plurality of waveform information storage means, and a synthesis calculation means (7) for combining the plurality of waveform information output from the waveform calculation means. In the waveform generator provided,
A plurality of amplitude control means (5) capable of storing amplitude information for outputting the amplitude of each waveform information output from the plurality of waveform calculation means at respective desired levels and outputting the amplitude information to the respective waveform calculation means Have
The waveform control means is configured to be able to generate a trigger signal, and controls the waveform information to be read from the waveform information storage means, and the amplitude information stored in the plurality of amplitude control means A waveform generation apparatus that controls to output the plurality of waveform calculation means simultaneously by the trigger signal. The waveform control means (4) includes a control section (4a) for calculating an address value for reading the waveform information stored in the plurality of waveform information storage means (3),
A plurality of address generation units (4b) that respectively indicate arbitrary addresses of the plurality of waveform information storage means (3);
The address generation unit can store the address value calculated by the control unit, and simultaneously instructs the addresses of the stored address value to the plurality of waveform information storage units based on the trigger signal. The waveform generating apparatus according to claim 1, wherein: The waveform control means (4) includes information indicating amplitude change for causing the waveform calculation means (6) to output the amplitude information stored in the amplitude control means (5), and the address generation section (4b). 3. The waveform generating apparatus according to claim 2, wherein the trigger signal is generated by including both information indicating a phase change for indicating an address of the stored address value. The plurality of waveform calculation means (6) receive and calculate the waveform information from the corresponding plurality of waveform information storage means (3) and the amplitude information from the plurality of amplitude control means (5) respectively corresponding to the waveform information. ,
The said waveform control means (4) controls the timing which outputs each waveform information calculated from the said several waveform calculating means to the said synthetic | combination calculating means (7). The waveform generation device according to claim 1. The waveform control means (4) includes a plurality of phase control sections (4c) for adjusting the arrival timing of the waveform information from the plurality of waveform information storage means (3) to the waveform calculation means (6). The waveform generation device according to claim 1, wherein the waveform generation device is a waveform generator. The phase control unit (4c) adjusts the output timing to each of the plurality of waveform calculation means (6) according to the sampling rate ratio of the waveform information stored in the plurality of waveform information storage means (3). The waveform generating apparatus according to claim 5. The plurality of phase control sections (4c) interpolate the waveform information from each of the plurality of waveform information storage means according to the sampling rate ratio of the waveform information stored in the plurality of waveform information storage means (3). 7. The waveform generator according to claim 5, further comprising an interpolator for adding

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