JP4405048B2 - 位置合せ用治具 - Google Patents

位置合せ用治具 Download PDF

Info

Publication number
JP4405048B2
JP4405048B2 JP2000209929A JP2000209929A JP4405048B2 JP 4405048 B2 JP4405048 B2 JP 4405048B2 JP 2000209929 A JP2000209929 A JP 2000209929A JP 2000209929 A JP2000209929 A JP 2000209929A JP 4405048 B2 JP4405048 B2 JP 4405048B2
Authority
JP
Japan
Prior art keywords
wafer
electrode
stage
recess
alignment jig
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2000209929A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002025989A (ja
JP2002025989A5 (enExample
Inventor
隆 私市
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lapis Semiconductor Co Ltd
Original Assignee
Oki Semiconductor Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Semiconductor Co Ltd filed Critical Oki Semiconductor Co Ltd
Priority to JP2000209929A priority Critical patent/JP4405048B2/ja
Priority to US09/899,192 priority patent/US6921457B2/en
Publication of JP2002025989A publication Critical patent/JP2002025989A/ja
Publication of JP2002025989A5 publication Critical patent/JP2002025989A5/ja
Application granted granted Critical
Publication of JP4405048B2 publication Critical patent/JP4405048B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68721—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by edge clamping, e.g. clamping ring
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T279/00—Chucks or sockets
    • Y10T279/23—Chucks or sockets with magnetic or electrostatic means

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Drying Of Semiconductors (AREA)
JP2000209929A 2000-07-11 2000-07-11 位置合せ用治具 Expired - Fee Related JP4405048B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2000209929A JP4405048B2 (ja) 2000-07-11 2000-07-11 位置合せ用治具
US09/899,192 US6921457B2 (en) 2000-07-11 2001-07-06 Semiconductor manufacturing apparatus, and positioning jig used for same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000209929A JP4405048B2 (ja) 2000-07-11 2000-07-11 位置合せ用治具

Publications (3)

Publication Number Publication Date
JP2002025989A JP2002025989A (ja) 2002-01-25
JP2002025989A5 JP2002025989A5 (enExample) 2007-04-26
JP4405048B2 true JP4405048B2 (ja) 2010-01-27

Family

ID=18706272

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000209929A Expired - Fee Related JP4405048B2 (ja) 2000-07-11 2000-07-11 位置合せ用治具

Country Status (2)

Country Link
US (1) US6921457B2 (enExample)
JP (1) JP4405048B2 (enExample)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050133166A1 (en) * 2003-12-19 2005-06-23 Applied Materials, Inc. Tuned potential pedestal for mask etch processing apparatus
US7703823B2 (en) * 2004-07-12 2010-04-27 Rudolph Technologies, Inc. Wafer holding mechanism
JP2009013435A (ja) * 2007-06-29 2009-01-22 Fujifilm Corp 基板ホルダ及び真空成膜装置
JP4839294B2 (ja) * 2007-10-04 2011-12-21 株式会社アルバック 半導体ウエハ保持装置
JP5378902B2 (ja) * 2009-08-04 2013-12-25 株式会社アルバック プラズマ処理装置のプラズマ処理方法及びプラズマ処理装置
US9502278B2 (en) 2013-04-22 2016-11-22 International Business Machines Corporation Substrate holder assembly for controlled layer transfer
CN104862660B (zh) * 2014-02-24 2017-10-13 北京北方华创微电子装备有限公司 承载装置及等离子体加工设备
FR3052869B1 (fr) * 2016-06-17 2018-06-22 Unity Semiconductor Dispositif de positionnement d'une plaquette de circuit integre, et appareil d'inspection d'une plaquette de circuit integre comprenant un tel dispositif de positionnement
US10083852B1 (en) * 2017-05-12 2018-09-25 Kla-Tencor Corporation Floating wafer chuck
US20190244787A1 (en) * 2018-02-02 2019-08-08 Wei-Chuan Chou Plasma etching reaction chamber
CN108962813B (zh) * 2018-09-06 2023-07-18 重庆科技学院 一种可调式芯片卡具
CN112642657A (zh) * 2021-01-15 2021-04-13 成都市新都区德莲盟科技有限公司 一种智能定位的无缝粘合设备
JP7725213B2 (ja) * 2021-03-18 2025-08-19 東レエンジニアリング株式会社 基板保持装置
DE202022100514U1 (de) 2022-01-31 2022-02-17 Siegenia-Aubi Kg Verlagerungsvorrichtung zur zwangsweisen Verlagerung eines Flügels, insbesondere eines Schiebeflügels, eines Fensters oder einer Tür

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05136252A (ja) * 1991-11-08 1993-06-01 Seiko Epson Corp 半導体製造装置
US6073576A (en) * 1997-11-25 2000-06-13 Cvc Products, Inc. Substrate edge seal and clamp for low-pressure processing equipment
US6165276A (en) * 1999-09-17 2000-12-26 United Microelectronics Corp. Apparatus for preventing plasma etching of a wafer clamp in semiconductor fabrication processes

Also Published As

Publication number Publication date
US6921457B2 (en) 2005-07-26
JP2002025989A (ja) 2002-01-25
US20020005166A1 (en) 2002-01-17

Similar Documents

Publication Publication Date Title
JP4405048B2 (ja) 位置合せ用治具
US4563640A (en) Fixed probe board
JP6231625B2 (ja) 基板のボンディング装置及び方法
US8698048B2 (en) High temperature vacuum chuck assembly
JPH09181153A (ja) 半導体ウェーハ固定装置
KR102762660B1 (ko) 디가스 챔버 리프트후프
JP2012163410A (ja) プローブカードの配線基板調整治具及び配線基板修正方法並びに配線基板調整治具を用いて調整されたプローブカードを用いた検査方法及び検査システム
US6767170B2 (en) Wafer handling system and wafer handling method
KR20140124948A (ko) 평탄도 유지와 치핑방지에 용이한 반도체 제조설비용 진공 척
JPH11163102A (ja) 半導体製造装置用サセプタ
JPH1015815A (ja) 基板矯正装置および方法
JP2001326267A (ja) 半導体加工装置
JP2757664B2 (ja) ダイピックアップ方法及びコレット
JP2024012159A (ja) フォーカスリング、これを含む基板処理装置、及びこれを利用する半導体素子の製造方法
JP3287222B2 (ja) ドライエッチング方法及びドライエッチング装置
KR200374866Y1 (ko) 웨이퍼 지지용 플래튼 조립체
CN221681196U (zh) 下电极组件、薄膜沉积反应腔和薄膜沉积设备
JP2007311814A (ja) 基板支持装置
JP3333458B2 (ja) 半導体装置の製造方法
JPH1187588A (ja) 半導体装置の製造方法
CN120356842A (zh) 半导体工艺设备
JP2025012274A (ja) 保持テーブル、保持方法、及び、エッジトリミング方法
JP3117825B2 (ja) バンプ配列用基板
JP2007234939A (ja) ウエハ処理装置
KR200184163Y1 (ko) 반도체 웨이퍼 식각장치

Legal Events

Date Code Title Description
A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20061018

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20061018

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20080909

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20080924

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20081120

A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A712

Effective date: 20081218

RD03 Notification of appointment of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7423

Effective date: 20090130

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20091013

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20091104

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20121113

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20121113

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20131113

Year of fee payment: 4

S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

S533 Written request for registration of change of name

Free format text: JAPANESE INTERMEDIATE CODE: R313533

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

LAPS Cancellation because of no payment of annual fees