JP4403729B2 - Display device - Google Patents

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JP4403729B2
JP4403729B2 JP2003167257A JP2003167257A JP4403729B2 JP 4403729 B2 JP4403729 B2 JP 4403729B2 JP 2003167257 A JP2003167257 A JP 2003167257A JP 2003167257 A JP2003167257 A JP 2003167257A JP 4403729 B2 JP4403729 B2 JP 4403729B2
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voltage
capacitor
power supply
recovery
switch
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JP2005003931A (en
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清司 綿貫
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Hitachi Ltd
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Hitachi Ltd
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Description

【0001】
【発明の属する技術分野】
本発明は、表示装置に用いられる電力回収回路に関する。
【0002】
【従来の技術】
AC型プラズマディスプレイパネル(以下PDPと省略する)を構成する共通電極(維持電極ともいう),走査電極,アドレス電極(これらの電極は電気的には容量性負荷と見なされる)を駆動する駆動回路である共通電極駆動回路,走査電極駆動回路,アドレス電極駆動回路等には、一般に、駆動電力を有効に利用するため、電力回収回路が備えられており、この電力回収回路としては、例えば下記特許文献1の図5で開示されている。
【0003】
その図5において、駆動回路に備えられた電力回収回路は回収コイルLと、回収コイルLに接続されたダイオードD1,D2と、ダイオードD1の回収コイルL側とは逆側に接続されたスイッチS1およびダイオードD2の回収コイルL側とは逆側に接続されたスイッチS2と、スイッチS1のもう一方の端子とS2のもう一方の端子を結んだ交点とグラウンド(以下GNDと省略する)間に接続された回収コンデンサCssとからなる。
【0004】
そして、駆動回路に備えられた電力回収回路では、パネルキャパシタンスを示すコンデンサCpの充電と放電に回収コイルLを用い、回収コイルLとコンデンサCpとの共振により、コンデンサCpで失われるエネルギーの大部分を回収コイルLを介して回収コンデンサCssに回収している。
【0005】
回収コンデンサCssの電圧Vssは電源電圧Vccの1/2であり、コンデンサCpにかかる電圧Vpは、スイッチの開閉動作によって、下記特許文献1の図6に示されるように、理論的にはLC共振により電源電圧VccとGND電位の間で周期的に変化する。
【0006】
しかし、下記特許文献1の図6の▲1▼の区間で、電力回収回路内の抵抗成分により、特に回収コイルL,ダイオードD1,スイッチS1の抵抗成分により損失が生じ、電圧VpはVccまで上がりきらずに、▲1▼と▲2▼の区間の境界で飛躍(立ち上りエッジ)が生じる。また、同様の理由で、▲3▼の区間でGND電位まで下がりきれずに、▲3▼と▲4▼の区間の境界で飛躍(立ち下がりエッジ)が生じる。これにともない、コンデンサCpに高調波を含んだ電流が流れ、不要な電磁波を輻射することが、下記特許文献2の段落番号〔0009〕乃至段落番号〔0011〕で指摘されている。
【0007】
そこで、下記特許文献2では、その図3,図5,図7等で開示されているように、上記した飛躍(エッジ)をなくすために、電力回収回路に、抵抗成分で生じる損失を補正する1/2Vsus(Vsusは下記特許文献1の電源電圧Vccに対応する電源電圧)より高い電位に回収コンデンサの電圧を保持する電圧クランプ部CL1または1/2Vsusより低い電位に回収コンデンサの電圧を保持する電圧クランプ部CL2もしくは両方の電圧クランプ部CL1,CL2を電力回収回路に備えるようにしている。
【0008】
このようにして、下記特許文献2では、上記した飛躍(エッジ)を無くし、不要な電磁波輻射を低減している。
【0009】
【特許文献1】
特公平7−109542号公報
【特許文献2】
特開2001−27888号公報
【0010】
【発明が解決しようとする課題】
上記特許文献2では、上記したように、抵抗成分による損失を補正する電圧クランプ部を電力回収回路に備えて、上記した飛躍(エッジ)を無くし、不要な電磁波輻射を低減している。
【0011】
しかし、このために、新たに、1/2Vsusより数十V(ボルト)低い電圧V3(70〜90V)を有する電源や1/2Vsusより数十V高いV2(110〜130V)を有する電源が必要となり、電源回路の規模増大やコストの増大等の問題があった。
【0012】
本発明は、上記した課題を鑑みて成されたもので、その目的は、電源回路の規模増大やコストの増大を低減できるプラズマディスプレイパネルの電力回収回路を提供することにある。
【0013】
【課題を解決するための手段】
本発明は、交番性維持電圧が印加され放電が行われる電極と、前記電極対の少なくとも一方の電極一端が接続されたインダクタと、前記インダクタの他端にその一端が接続されたコンデンサと、前記コンデンサの他端に並行に接続された第一のスイッチ部、及び第二のスイッチ部と、前記第一のスイッチ部の前記コンデンサが接続された側とは異なる側に接続された負電源電圧部と、前記第二のスイッチ部の前記コンデンサが接続された側とは異なる側に接続された正電源電圧部と、を有し、前記電極からの電荷回収期間において、前記第一のスイッチをオンして前記コンデンサの他端に前記負電源電圧部による負電圧を印加し、前記電極への電荷放出期間において、前記第二のスイッチをオンして前記コンデンサの他端に前記正電源電圧部による正電圧を印加し、前記負電源電圧部と前記正電源電圧部が供給する電圧の絶対値は、前記交番性維持電圧の絶対値の5〜15%という構成とする。
【0014】
【発明の実施の形態】
以下、AC型プラズマディスプレイパネルを駆動する駆動回路である共通電極駆動回路,走査電極駆動回路,アドレス電極駆動回路等に用いられる電力回収回路に関するの実施形態について図を参照しながら詳細に説明する。なお、全図において、共通な機能を有する部分には同一符号を付して示し、一度説明したものについては、煩雑さを避けるために繰り返した説明を省略する。
【0015】
図1は本発明の第1の実施形態である共通電極駆動回路を示す図、図4は図1の共通電極駆動回路の放電維持期間の動作を説明するタイミング図である。
【0016】
まず、図1を用いて共通電極駆動回路の構成を述べる。図1において、コンデンサ9は共通電極とGND間の容量であるパネルセル容量を示し、符号bで共通電極を示す。共通電極bには電力回収回路100が接続されており、また、電圧Vsを有する電源(以下電源Vsと称する)とGNDとの間にスイッチ7とスイッチ8が接続されている。
【0017】
電力回収回路100は、共通電極bに接続された回収コイル(インダクタンス)1と、回収コイルに直列に接続された回収コンデンサ2と、回収コンデンサ2に接続されたスイッチ3および5と、スイッチ3のもう一方の端子側に接続された一方向導通素子であるダイオード4と、ダイオード4の他方の端子に接続された+電源である電圧V2を有する電源(以下電源V2と称する)と、スイッチ5のもう一方の端子側に接続されたダイオード4とは逆特性の一方向導通素子であるダイオード6と、ダイオード6の他方の端子に接続された−電源である電圧−V1を有する電源(以下電源−V1と称する)とからなる。
【0018】
ここで、回収コンデンサ2のスイッチ3,5側が接地(GNDに接続)されている場合は、共通電極駆動回路の構成は上記特許文献1の図5と同じである。この時、電力回収回路の抵抗成分による損失がなければ、コンデンサ9の共通電極bの電圧(以下b電圧と称する)は、充電時および放電時、回収コイル1とコンデンサ9のLC共振により、電源Vsまで立ち上り、そしてGNDまで立ち下がるが、損失がある場合には従来技術の項で述べたようにそこまで到らず、飛躍が生じる。そこで、損失によるその飛躍値ΔVの約1/2に相当する電圧値(回収コンデンサ側に換算する場合はLC共振作用によりほぼΔVの1/2となる)を有する少なくとも正電圧または負電圧の電源(電源V2または電源−V1)を、コンデンサ9の充電期間または放電期間に合わせて(即ち、回収コンデンサの電力放出または電力回収に合わせて)回収コンデンサ2に直列に接続して、電源電圧を重畳させ、飛躍が生じないようにしたことに本発明の特徴がある。
【0019】
もし、極性などにより充電時と放電時の飛躍値が異なる場合には、回収コンデンサ2に重畳する電源の電圧値(絶対値)を変えるようにすることはいうまでもない。
【0020】
次に、図4を参照しながら、共通電極駆動回路の動作を説明する。図4において、まず、区間T1では、始めにスイッチ8が開放されて、スイッチ3が閉じ、スイッチ5,7は継続して開放のままである。この時、回収コンデンサ2には略1/2Vsの電圧が保持されている。従って、回収コイル1とコンデンサ9の直列LC共振回路には(1/2Vs+V2)の電圧が印加される。なお、回収コンデンサ2に略1/2Vsの電圧が保持されていることに関しては、上記特許文献1の10頁右欄40行目から11頁左欄5行目にかけて詳述されている。
【0021】
図5にコンデンサ9の充電時の等価回路を示す。図5において、101は上記した飛躍値ΔVに対応した電力回収回路の等価損失抵抗を示し、VLは回収コイル1の出力電圧を示す。
【0022】
電力回収回路の抵抗成分による電圧降下の損失分(上記した飛躍値ΔVに等しい)は重畳電圧V2(=約ΔV/2)で補正されるので、区間T1の充電期間の最後には、LC共振作用によりVLは数1の通りとなる。
VL=(1/2Vs+V2)×2=Vs+2V2=Vs+ΔV…(数1)
従って、b電圧即ちコンデンサ9にかかる電圧Vbはほぼ電源Vsまで立ち上がる。
【0023】
区間T2では、スイッチ3が開放され、スイッチ7が閉じて、b電圧は電源Vsにプルアップされが、区間T1とT2の境界でb電圧に飛躍がないので、不要な電磁波輻射を生じない。
【0024】
区間T3では、スイッチ7が開放され、スイッチ5が閉じて、コンデンサ9は回収コイル1,回収コンデンサ2,スイッチ5,ダイオード6,電源−V1のルートで放電を始める。この時、回収コンデンサ2には電源−V1が接続されるので、充電時と同様に、電力回収回路の抵抗成分による電圧降下の損失は重畳電圧−V1で補正されて、区間T3の放電期間の最後には、b電圧はほぼ電GND電位まで立ち下がる。この時GND電位との間に飛躍がないので、不要な電磁波輻射を生じない。そして、回収コンデンサ2は回収コイル1を介したコンデンサ9との間の電力(エネルギー)の授受により電源Vsの1/2である約1/2Vsまで充電され、コンデンサ9に蓄えられていたエネルギーの大部分が回収コンデンサ2に回収される。
【0025】
区間T4では、スイッチ5が開放され、スイッチ8が閉じて、他のスイッチは継続して開放のままとなり、共通電極は接地されて、接地電位に固定され、コンデンサ9の電荷は放電されるが、区間T3とT4の境界でb電圧に飛躍がないので、不要な電磁波輻射を生じない。
【0026】
以上のT1〜T3の区間が共通電極bの駆動区間である。そして、この期間に続くT4の区間は図示しない走査電極の駆動期間である。走査電極(図示せず)にも同じ構成の電力回収回路(図示せず)が接続されており、この期間で走査電極とGND間で形成されるコンデンサ(図示せず)の充放電で走査電極電圧(図示せず。以下d電圧と称する)に飛躍が生じないようにしていることはいうまでもない。走査電極(図示せず)の駆動期間の動作は共通電極bの動作に同じであり、説明を省略する。
【0027】
区間T4が終了すると、再び、区間T1〜T3の間の動作が繰り返えされる。このようにして、共通電極と走査電極(図示せず)との間に交番性維持電圧が印加されて、連続的に放電が維持される。この時、立ち上がりや立ち下がりで飛躍のない周期的な共通電極駆動パルスを共通電極に印加できるとともに、区間T1で回収コンデンサ2に蓄積された電力を放出し、区間T3において電力を回収することができる。即ち、不要な電磁波輻射を抑えるながら、電力を回収することができる。
【0028】
電源Vsが約200V程度の場合、上記特許文献2にも記述されているように、その図3のクランプ電圧Vbは110〜130V、その図5のクランプ電圧Vaは70〜90V程度で、飛躍を補正する電圧(上記した飛躍値ΔVに対応)は10〜30V程度となり、上記した本実施形態の電力回収回路の電源V2と電源−V1の絶対値は、10〜30V程度となる。
【0029】
従って、電源V2と電源−V1に、PDP回路内で使用されている低電源電圧を用いることが可能となり、従来に比べて、コストアップを抑えることができる。また、所望の電圧値を有する電源がPDP回路内になくても、所望の電圧値に近い低電圧電源を用いることにより、飛躍値を小さくできるので、不要な電磁波輻射を抑えながら、コストアップも抑えることができる。
【0030】
また、所望の電圧値を有する電源がPDP回路内になく、新たに設ける場合でも、従来の約100V前後の高電圧電源を使用しないので、電源の消費電力や耐電圧を小さくでき、電源回路の規模増大やコストを抑えることができる。
【0031】
図2は第2の実施形態である共通電極駆動回路に用いられる電力回収回路200を示す図である。図2は図1において、電源V2を電源V2'に変え、ダイオード6のカソード側を電源−V1ではなく、GNDに接続したものである。従って、本実施形態では加算重畳する電源−V1がないので、図1と異なり、図4の区間T3と区間T4の境界で飛躍が生じる。
【0032】
図6は図2の共通電極駆動回路の放電維持期間の動作を説明するタイミング図である。図6において、まず、区間T1では、始めにスイッチ8が開放されて、スイッチ3が閉じ、スイッチ5,7は継続して開放のままである。この時、回収コンデンサには1/2Vsの電圧より幾分低い電圧であるほぼ(1/2Vs−1/2ΔV)が保持されている(詳細は後述)。従って、回収コイル1とコンデンサ9の直列LC共振回路には(1/2Vs−1/2ΔV+V2')の電圧が印加される。
【0033】
ここで、電源V2'は電力回収回路200の抵抗成分による損失分ΔVを補正する重畳電源であるが、本実施形態では、数2の通り
V2'=1/2ΔV+1/2ΔV … (数2)
抵抗成分による損失分ΔVを補正する電圧1/2ΔVに加えて、回収コンデンサ2の電圧が1/2Vsより低下している分(ほぼ1/2ΔVに等しい)も補正するようにしている。従って、直列LC共振回路には(1/2Vs+1/2ΔV)が印加されるので、区間T1の充電期間の最後には、LC共振作用によりb電圧即ちコンデンサ9にかかる電圧Vbはほぼ電源Vsまで立ち上がる。
【0034】
区間T2では、スイッチ3が開放され、スイッチ7が閉じて、b電圧は電源Vsにプルアップされが、区間T1とT2の境界でb電圧に飛躍がないので、不要な電磁波輻射を生じない。
【0035】
区間T3では、スイッチ7が開放され、スイッチ5が閉じて、コンデンサ9は回収コイル1,回収コンデンサ2,スイッチ5,ダイオード6,GNDのルートで放電を始める。しかし、図4の場合とは異なり、放電時、電力回収回路200の抵抗成分による損失を補正しないので、区間T3の放電期間の最後には、b電圧はGND電位まで立ち下がらない。また、回収コンデンサ2にはコンデンサ9に蓄えられていたエネルギーの大部分が回収されるが、電力回収回路内の抵抗成分による損失ΔVにより1/2Vsより幾分低い電圧であるほぼ(Vs−ΔV)/2までしか充電されない。
【0036】
区間T4では、スイッチ5が開放され、スイッチ8が閉じて、他のスイッチは継続して開放のままとなり、共通電極は接地されて、接地電位に固定され、コンデンサ9の電荷は放電されるが、区間T3とT4の境界でb電圧に飛躍ΔVが生じるので、不要な電磁波輻射を生じる。しかし、区間T1と区間T2の境界では飛躍がないので、全体として不要な電磁波輻射は低減される。
【0037】
以上述べたように、本実施形態では、図1と異なり、コンデンサ9の放電時飛躍が生じるが、充電時は飛躍がないので、不要な電磁波輻射を幾分抑える効果を有する。また、重畳電源V2'は第1の実施形態と同様に低電圧電源でよいので、コストアップも抑えることができる。
【0038】
図3は第3の実施形態である共通電極駆動回路に用いられる電力回収回路300を示す図である。図3は図1において、ダイオード4のアノード側を電源V2ではなく、GNDに接続したものである。従って、本実施形態では加算重畳する電源V2がないので、図1と異なり、図4の区間T1と区間T2の境界で飛躍が生じるが、区間T3と区間T4の境界では重畳電源−V1があるので、飛躍は生じなく、全体として不要な電磁波輻射は低減される。なお、回収コンデンサ2での電力回収時回収コンデンサ2の両端間電圧は略1/2Vsとなる。また、その他の動作は図1に同じであり、詳細な説明を省略する。
【0039】
以上述べたように、本実施形態では、図1と異なり、コンデンサ9の充電時飛躍が生じるが、放電時は飛躍がないので、不要な電磁波輻射を幾分抑える効果を有する。また、重畳電源−V1は第1の実施形態と同じであり、低電圧電源でよいので、コストアップも抑えることができる。
【0040】
以上述べたように、本発明によれば、共通電極駆動や走査電極駆動やアドレス電極駆動時に生じる電力回収回路内の回収コンデンサの電力放出時または電力回収時の抵抗成分による損失を、回収コンデンサに、回収コンデンサの電力放出または電力回収に合わせて、少なくとも該損失を補正する電圧を有する正電圧または負電圧の電源を直列に接続して重畳し、補正するので、不要な電磁波輻射を抑えることができ、かつ、該電源を低電圧とすることができるので、電源回路の規模増大やコストの増大を低減できるプラズマディスプレイパネルの電力回収回路を提供することができる。
【0041】
【発明の効果】
本発明によれば、信頼性の高い表示装置を提供できる。
【図面の簡単な説明】
【図1】本発明の第1の実施形態である共通電極駆動回路を示す図。
【図2】第2の実施形態である共通電極駆動回路に用いられる電力回収回路を示す図。
【図3】第3の実施形態である共通電極駆動回路に用いられる電力回収回路を示す図。
【図4】図1の共通電極駆動回路の放電維持期間の動作を説明するタイミング図。
【図5】コンデンサ9の充電時の等価回路。
【図6】図2の共通電極駆動回路の放電維持期間の動作を説明するタイミング図。
【符号の説明】
1…回収コイル、2…回収コンデンサ、3…スイッチ、4…ダイオード、
5…スイッチ、6…ダイオード、7…スイッチ、8…スイッチ、
9…コンデンサ、
100,200,300…電力回収回路、101…損失抵抗
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a power recovery circuit used in a display device.
[0002]
[Prior art]
Driving circuit for driving common electrodes (also referred to as sustain electrodes), scan electrodes, and address electrodes (these electrodes are electrically regarded as capacitive loads) constituting an AC type plasma display panel (hereinafter abbreviated as PDP) The common electrode driving circuit, scan electrode driving circuit, address electrode driving circuit, and the like are generally provided with a power recovery circuit in order to effectively use the driving power. It is disclosed in FIG.
[0003]
In FIG. 5, the power recovery circuit provided in the drive circuit includes a recovery coil L, diodes D1 and D2 connected to the recovery coil L, and a switch S1 connected to the reverse side of the recovery coil L side of the diode D1. And a switch S2 connected to the opposite side of the recovery coil L side of the diode D2, and an intersection between the other terminal of the switch S1 and the other terminal of S2, and a ground (hereinafter abbreviated as GND). And the recovered capacitor Css.
[0004]
In the power recovery circuit provided in the drive circuit, the recovery coil L is used for charging and discharging the capacitor Cp indicating the panel capacitance, and most of the energy lost in the capacitor Cp due to resonance between the recovery coil L and the capacitor Cp. Is recovered in the recovery capacitor Css through the recovery coil L.
[0005]
The voltage Vss of the recovery capacitor Css is ½ of the power supply voltage Vcc, and the voltage Vp applied to the capacitor Cp is theoretically LC resonance as shown in FIG. Due to this, it periodically changes between the power supply voltage Vcc and the GND potential.
[0006]
However, in the section (1) in FIG. 6 of Patent Document 1 below, a loss occurs due to the resistance component in the power recovery circuit, particularly the resistance component of the recovery coil L, diode D1, and switch S1, and the voltage Vp rises to Vcc. Instead, a jump (rising edge) occurs at the boundary between the sections (1) and (2). For the same reason, a jump (falling edge) occurs at the boundary between the sections {circle around (3)} and {circle around (4)} without being fully lowered to the GND potential in the section {circle around (3)}. Along with this, it is pointed out in paragraph No. [0009] to paragraph No. [0011] of Patent Document 2 below that current including harmonics flows in the capacitor Cp and radiates unnecessary electromagnetic waves.
[0007]
Therefore, in Patent Document 2 below, as disclosed in FIGS. 3, 5, 7, etc., in order to eliminate the above-described jump (edge), the power recovery circuit corrects the loss caused by the resistance component. The voltage of the recovery capacitor is held at a potential lower than the voltage clamp unit CL1 or 1/2 Vsus which holds the voltage of the recovery capacitor at a potential higher than 1/2 Vsus (Vsus is a power supply voltage corresponding to the power supply voltage Vcc of Patent Document 1 below). The power recovery circuit includes the voltage clamp part CL2 or both voltage clamp parts CL1 and CL2.
[0008]
Thus, in the following Patent Document 2, the above-described jump (edge) is eliminated, and unnecessary electromagnetic radiation is reduced.
[0009]
[Patent Document 1]
Japanese Patent Publication No. 7-109542 [Patent Document 2]
Japanese Patent Laid-Open No. 2001-27888
[Problems to be solved by the invention]
In the above-mentioned Patent Document 2, as described above, the voltage recovery unit that corrects the loss due to the resistance component is provided in the power recovery circuit to eliminate the above-described jump (edge) and reduce unnecessary electromagnetic radiation.
[0011]
However, for this purpose, a power supply having a voltage V3 (70 to 90V) lower by several tens of V (volt) than ½ Vsus or a power supply having V2 (110 to 130V) higher by several tens of V than ½ Vsus is required. Thus, there are problems such as an increase in the scale of the power supply circuit and an increase in cost.
[0012]
The present invention has been made in view of the above-described problems, and an object of the present invention is to provide a power recovery circuit for a plasma display panel that can reduce an increase in scale and cost of a power supply circuit.
[0013]
[Means for Solving the Problems]
The present invention relates to an electrode pair in which discharge is performed by applying an alternating sustaining voltage, an inductor having one end connected to at least one electrode of the electrode pair, and a capacitor having one end connected to the other end of the inductor, A first switch unit connected in parallel to the other end of the capacitor, a second switch unit, and a negative power source connected to a side of the first switch unit different from the side to which the capacitor is connected A positive power supply voltage unit connected to a side different from a side to which the capacitor of the second switch unit is connected, and in the charge recovery period from the electrode, the first switch Is turned on to apply a negative voltage from the negative power supply voltage unit to the other end of the capacitor, and during the charge discharge period to the electrode, the second switch is turned on and the other end of the capacitor is turned on to the positive power supply voltage. A positive voltage is applied by the parts, the absolute value of the negative power supply voltage section and the positive power supply voltage section is the voltage supplied has a structure that 5-15% of the absolute value of the alternating of sustain voltage.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments relating to a power recovery circuit used in a common electrode driving circuit, a scan electrode driving circuit, an address electrode driving circuit, and the like, which are driving circuits for driving an AC plasma display panel, will be described in detail with reference to the drawings. In all the drawings, parts having common functions are denoted by the same reference numerals, and once described, repeated description is omitted to avoid complexity.
[0015]
FIG. 1 is a diagram showing a common electrode driving circuit according to a first embodiment of the present invention, and FIG. 4 is a timing diagram for explaining the operation of the common electrode driving circuit of FIG.
[0016]
First, the configuration of the common electrode driving circuit will be described with reference to FIG. In FIG. 1, a capacitor 9 indicates a panel cell capacitance which is a capacitance between the common electrode and GND, and a common electrode is indicated by a symbol b. A power recovery circuit 100 is connected to the common electrode b, and a switch 7 and a switch 8 are connected between a power supply having a voltage Vs (hereinafter referred to as a power supply Vs) and GND.
[0017]
The power recovery circuit 100 includes a recovery coil (inductance) 1 connected to the common electrode b, a recovery capacitor 2 connected in series to the recovery coil, switches 3 and 5 connected to the recovery capacitor 2, A diode 4 which is a one-way conducting element connected to the other terminal side, a power supply (hereinafter referred to as a power supply V2) having a voltage V2 which is a + power supply connected to the other terminal of the diode 4, A diode 6 which is a unidirectional conducting element having a characteristic opposite to that of the diode 4 connected to the other terminal side, and a power supply (hereinafter referred to as a power supply) connected to the other terminal of the diode 6 and having a voltage −V1 which is a power supply V1).
[0018]
Here, when the switches 3 and 5 of the recovery capacitor 2 are grounded (connected to GND), the configuration of the common electrode drive circuit is the same as that of FIG. At this time, if there is no loss due to the resistance component of the power recovery circuit, the voltage of the common electrode b of the capacitor 9 (hereinafter referred to as b voltage) is the power supply due to LC resonance between the recovery coil 1 and the capacitor 9 during charging and discharging. It rises to Vs and then falls to GND, but if there is a loss, it will not reach that point as described in the section of the prior art, and a leap will occur. Therefore, at least a positive voltage or negative voltage power supply having a voltage value corresponding to about ½ of the jump value ΔV due to loss (when converted to the recovery capacitor side, it becomes about ½ of ΔV due to LC resonance action). (Power supply V2 or power supply-V1) is connected in series to the recovery capacitor 2 in accordance with the charging period or discharging period of the capacitor 9 (that is, in accordance with the discharge or recovery of power of the recovery capacitor), and the power supply voltage is superimposed. The feature of the present invention resides in that no leap occurs.
[0019]
Needless to say, if the leap value at the time of charging and discharging differs depending on the polarity or the like, the voltage value (absolute value) of the power supply superimposed on the recovery capacitor 2 is changed.
[0020]
Next, the operation of the common electrode driving circuit will be described with reference to FIG. In FIG. 4, first, in the section T1, the switch 8 is first opened, the switch 3 is closed, and the switches 5 and 7 are continuously opened. At this time, a voltage of about ½ Vs is held in the recovery capacitor 2. Therefore, a voltage of (1/2 Vs + V2) is applied to the series LC resonance circuit of the recovery coil 1 and the capacitor 9. Note that the fact that the voltage of about 1/2 Vs is held in the recovery capacitor 2 is described in detail from page 10 right column 40th line to page 11 left column 5th line of Patent Document 1.
[0021]
FIG. 5 shows an equivalent circuit when the capacitor 9 is charged. In FIG. 5, 101 indicates an equivalent loss resistance of the power recovery circuit corresponding to the jump value ΔV, and VL indicates the output voltage of the recovery coil 1.
[0022]
Since the voltage drop loss due to the resistance component of the power recovery circuit (equal to the jump value ΔV described above) is corrected by the superimposed voltage V2 (= approximately ΔV / 2), at the end of the charging period of the section T1, the LC resonance Due to the action, VL becomes as shown in Equation 1.
VL = (1 / 2Vs + V2) × 2 = Vs + 2V2 = Vs + ΔV (Equation 1)
Therefore, the voltage b, that is, the voltage Vb applied to the capacitor 9 rises to almost the power source Vs.
[0023]
In the section T2, the switch 3 is opened, the switch 7 is closed, and the b voltage is pulled up to the power source Vs. However, since the b voltage does not jump at the boundary between the sections T1 and T2, unnecessary electromagnetic radiation is not generated.
[0024]
In the section T3, the switch 7 is opened, the switch 5 is closed, and the capacitor 9 starts discharging along the route of the recovery coil 1, the recovery capacitor 2, the switch 5, the diode 6, and the power source -V1. At this time, since the power supply -V1 is connected to the recovery capacitor 2, the loss of the voltage drop due to the resistance component of the power recovery circuit is corrected by the superimposed voltage -V1 as in the case of charging, and the discharge period of the section T3 is corrected. Finally, the b voltage falls almost to the electric GND potential. At this time, since there is no jump between the GND potential and unnecessary electromagnetic wave radiation does not occur. The recovery capacitor 2 is charged to about ½ Vs, which is ½ of the power source Vs, by transferring power (energy) to and from the capacitor 9 via the recovery coil 1, and the energy stored in the capacitor 9 is stored. Most of the energy is recovered by the recovery capacitor 2.
[0025]
In the section T4, the switch 5 is opened, the switch 8 is closed, the other switches remain open, the common electrode is grounded and fixed at the ground potential, and the charge of the capacitor 9 is discharged. Since the b voltage does not jump at the boundary between the sections T3 and T4, unnecessary electromagnetic radiation does not occur.
[0026]
The section from T1 to T3 described above is the driving section of the common electrode b. A period T4 following this period is a scanning electrode driving period (not shown). A power recovery circuit (not shown) having the same configuration is also connected to the scan electrode (not shown). During this period, the scan electrode is charged and discharged by a capacitor (not shown) formed between the scan electrode and GND. Needless to say, no jump occurs in the voltage (not shown; hereinafter referred to as the “d voltage”). The operation of the scanning electrode (not shown) during the driving period is the same as the operation of the common electrode b, and the description thereof is omitted.
[0027]
When the section T4 ends, the operation between the sections T1 to T3 is repeated again. In this way, an alternating sustaining voltage is applied between the common electrode and the scanning electrode (not shown), and the discharge is continuously maintained. At this time, it is possible to apply a periodic common electrode drive pulse without a jump at the rise or fall to the common electrode, discharge the power accumulated in the recovery capacitor 2 in the section T1, and recover the power in the section T3. it can. That is, electric power can be recovered while suppressing unnecessary electromagnetic radiation.
[0028]
When the power supply Vs is about 200 V, as described in the above-mentioned Patent Document 2, the clamp voltage Vb in FIG. 3 is 110 to 130 V, and the clamp voltage Va in FIG. The voltage to be corrected (corresponding to the above-described jump value ΔV) is about 10 to 30 V, and the absolute values of the power source V2 and the power source −V1 of the power recovery circuit of the present embodiment are about 10 to 30 V.
[0029]
Therefore, it is possible to use the low power supply voltage used in the PDP circuit for the power supply V2 and the power supply -V1, and it is possible to suppress an increase in cost compared to the conventional case. In addition, even if there is no power supply having a desired voltage value in the PDP circuit, the leap value can be reduced by using a low-voltage power supply that is close to the desired voltage value, so that unnecessary electromagnetic radiation is suppressed and the cost is increased. Can be suppressed.
[0030]
Further, even when a power supply having a desired voltage value is not in the PDP circuit and is newly provided, a conventional high voltage power supply of about 100 V is not used, so that power consumption and withstand voltage of the power supply can be reduced, and the power supply circuit Increase in scale and cost can be suppressed.
[0031]
FIG. 2 is a diagram showing a power recovery circuit 200 used in the common electrode driving circuit according to the second embodiment. In FIG. 2, the power source V2 is changed to the power source V2 ′ in FIG. 1, and the cathode side of the diode 6 is connected to the GND instead of the power source −V1. Therefore, in the present embodiment, since there is no power supply -V1 to be superimposed and superimposed, unlike FIG. 1, a leap occurs at the boundary between the section T3 and the section T4 in FIG.
[0032]
FIG. 6 is a timing chart for explaining the operation of the common electrode driving circuit of FIG. 2 during the discharge sustain period. In FIG. 6, first, in the section T1, the switch 8 is first opened, the switch 3 is closed, and the switches 5 and 7 are continuously opened. At this time, the recovery capacitor holds approximately (1 / 2Vs−1 / 2ΔV), which is a voltage somewhat lower than the voltage of 1 / 2Vs (details will be described later). Accordingly, a voltage of (1 / 2Vs−1 / 2ΔV + V2 ′) is applied to the series LC resonance circuit of the recovery coil 1 and the capacitor 9.
[0033]
Here, the power source V2 ′ is a superimposed power source that corrects the loss ΔV due to the resistance component of the power recovery circuit 200. In this embodiment, V2 ′ = 1 / 2ΔV + 1 / 2ΔV (Equation 2)
In addition to the voltage ½ΔV for correcting the loss ΔV due to the resistance component, the amount by which the voltage of the recovery capacitor 2 is lower than ½Vs (approximately equal to ½ΔV) is also corrected. Therefore, since (1 / 2Vs + 1 / 2ΔV) is applied to the series LC resonance circuit, at the end of the charging period of the section T1, the b voltage, that is, the voltage Vb applied to the capacitor 9 rises to almost the power supply Vs by the LC resonance action. .
[0034]
In the section T2, the switch 3 is opened, the switch 7 is closed, and the b voltage is pulled up to the power source Vs. However, since the b voltage does not jump at the boundary between the sections T1 and T2, unnecessary electromagnetic radiation is not generated.
[0035]
In the section T3, the switch 7 is opened, the switch 5 is closed, and the capacitor 9 starts discharging along the route of the recovery coil 1, the recovery capacitor 2, the switch 5, the diode 6, and the GND. However, unlike the case of FIG. 4, since the loss due to the resistance component of the power recovery circuit 200 is not corrected during discharge, the b voltage does not fall to the GND potential at the end of the discharge period of the section T3. Further, most of the energy stored in the capacitor 9 is recovered in the recovery capacitor 2, but the voltage is slightly lower than 1 / 2Vs due to the loss ΔV due to the resistance component in the power recovery circuit (Vs−ΔV). ) / 2 only charged.
[0036]
In the section T4, the switch 5 is opened, the switch 8 is closed, the other switches remain open, the common electrode is grounded and fixed at the ground potential, and the charge of the capacitor 9 is discharged. Since the jump ΔV occurs in the b voltage at the boundary between the sections T3 and T4, unnecessary electromagnetic radiation is generated. However, since there is no jump at the boundary between the section T1 and the section T2, unnecessary electromagnetic radiation is reduced as a whole.
[0037]
As described above, in the present embodiment, unlike FIG. 1, a jump occurs when the capacitor 9 is discharged, but since there is no jump when charging, it has an effect of suppressing unnecessary electromagnetic radiation somewhat. Further, since the superimposed power supply V2 ′ may be a low voltage power supply as in the first embodiment, an increase in cost can be suppressed.
[0038]
FIG. 3 is a diagram showing a power recovery circuit 300 used in the common electrode driving circuit according to the third embodiment. FIG. 3 shows that the anode side of the diode 4 in FIG. 1 is connected to GND instead of the power source V2. Accordingly, in the present embodiment, since there is no power supply V2 to be superimposed and superimposed, unlike FIG. 1, a jump occurs at the boundary between the section T1 and the section T2 in FIG. 4, but there is a superimposed power supply −V1 at the boundary between the section T3 and the section T4. Therefore, no leap occurs, and unnecessary electromagnetic radiation is reduced as a whole. Note that the voltage across the recovery capacitor 2 at the time of power recovery at the recovery capacitor 2 is approximately ½ Vs. Other operations are the same as those in FIG. 1, and detailed description thereof is omitted.
[0039]
As described above, in the present embodiment, unlike FIG. 1, a jump occurs when the capacitor 9 is charged. However, since there is no jump when discharging, there is an effect of suppressing unnecessary electromagnetic radiation somewhat. Further, since the superimposed power source -V1 is the same as that of the first embodiment and may be a low voltage power source, an increase in cost can be suppressed.
[0040]
As described above, according to the present invention, the loss due to the resistance component at the time of power discharge or power recovery of the recovery capacitor in the power recovery circuit that occurs during the common electrode drive, the scan electrode drive, and the address electrode drive is caused to the recovery capacitor. In accordance with the power release or power recovery of the recovery capacitor, at least a positive voltage or negative voltage power supply having a voltage for correcting the loss is connected in series and superimposed, and correction is performed, so that unnecessary electromagnetic radiation can be suppressed. In addition, since the power supply can be set to a low voltage, it is possible to provide a power recovery circuit for a plasma display panel that can reduce an increase in scale and cost of a power supply circuit.
[0041]
【The invention's effect】
According to the present invention, a highly reliable display device can be provided.
[Brief description of the drawings]
FIG. 1 is a diagram showing a common electrode driving circuit according to a first embodiment of the present invention.
FIG. 2 is a diagram showing a power recovery circuit used in a common electrode drive circuit according to a second embodiment.
FIG. 3 is a diagram showing a power recovery circuit used in a common electrode drive circuit according to a third embodiment.
4 is a timing chart for explaining the operation in the discharge sustain period of the common electrode driving circuit of FIG. 1; FIG.
FIG. 5 is an equivalent circuit when the capacitor 9 is charged.
6 is a timing chart for explaining the operation in the discharge sustain period of the common electrode driving circuit of FIG. 2;
[Explanation of symbols]
1 ... recovery coil, 2 ... recovery capacitor, 3 ... switch, 4 ... diode,
5 ... switch, 6 ... diode, 7 ... switch, 8 ... switch,
9: Capacitor,
100, 200, 300 ... power recovery circuit, 101 ... loss resistance

Claims (1)

交番性維持電圧が印加され放電が行われる電極と、
前記電極対の少なくとも一方の電極一端が接続されたインダクタと、
前記インダクタの他端に、その一端が接続されたコンデンサと、
前記コンデンサの他端に並行に接続された第一のスイッチ部、及び第二のスイッチ部と、
前記第一のスイッチ部の前記コンデンサが接続された側とは異なる側に接続された負電源電圧部と、
前記第二のスイッチ部の前記コンデンサが接続された側とは異なる側に接続された正電源電圧部と、を有し、
前記電極からの電荷回収期間において、
前記第一のスイッチをオンして前記コンデンサの他端に前記負電源電圧部による負電圧を印加し、
前記電極への電荷放出期間において、
前記第二のスイッチをオンして前記コンデンサの他端に前記正電源電圧部による正電圧を印加し、
前記負電源電圧部と前記正電源電圧部が供給する電圧の絶対値は、前記交番性維持電圧の絶対値の5〜15%であることを特徴とする表示装置。
An electrode pair to which an alternating sustaining voltage is applied and discharge is performed;
An inductor having one end connected to at least one electrode of the electrode pair ;
A capacitor having one end connected to the other end of the inductor ;
A first switch unit and a second switch unit connected in parallel to the other end of the capacitor;
A negative power supply voltage unit connected to a side different from the side to which the capacitor of the first switch unit is connected;
A positive power supply voltage unit connected to a side different from the side to which the capacitor of the second switch unit is connected,
In the charge recovery period from the electrode,
Turn on the first switch and apply a negative voltage by the negative power supply voltage unit to the other end of the capacitor,
In the charge discharge period to the electrode,
Turn on the second switch and apply a positive voltage from the positive power supply voltage unit to the other end of the capacitor;
The absolute value of the voltage which the said negative power supply voltage part and the said positive power supply voltage part supply is 5 to 15% of the absolute value of the said alternating maintenance voltage, The display apparatus characterized by the above-mentioned.
JP2003167257A 2003-06-12 2003-06-12 Display device Expired - Fee Related JP4403729B2 (en)

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