KR100646195B1 - Device for Driving Plasma Display Panel - Google Patents

Abstract

The present invention relates to a driving device of a plasma display panel, and more particularly, by connecting a capacitor of several tens to hundreds of kW in series at the front end of the plasma display panel, thereby reducing capacitance value during resonance, thereby increasing resonance efficiency. The present invention relates to a plasma display panel drive device. As described above, the present invention provides a driving apparatus for a plasma display panel including an energy recovery circuit for supplying and recovering energy to a plasma display panel, wherein the auxiliary capacitor is connected in series with the plasma display panel.

Plasma Display Panels, Drive Units, Panel Capacitors

Description

Device for driving plasma display panel {Device for Driving Plasma Display Panel}

1 is a configuration diagram illustrating a driving apparatus of a conventional plasma display panel.

2 is a circuit diagram of a conventional energy recovery circuit.

3 is a simplified equivalent circuit diagram of a conventional energy recovery circuit.

4 is a circuit diagram of an energy recovery circuit according to an embodiment of the present invention.

5 is a timing diagram of an energy recovery circuit according to an embodiment of the present invention.

***** Explanation of symbols for the main parts of the drawing *****

110: signal processing unit

120: data sorting unit

130: X electrode drive unit

140: Y electrode driving unit

150: Z electrode driving unit

160: controller

170: high voltage drive circuit

141, 241: first energy recovery circuit

151, 251: second energy recovery circuit

The present invention relates to a driving device of a plasma display panel, and more particularly, by connecting a capacitor of several tens to hundreds of kW in series at the front end of the plasma display panel, thereby reducing capacitance value during resonance, thereby increasing resonance efficiency. The present invention relates to a plasma display panel drive device.

1 is a configuration diagram illustrating a driving apparatus of a conventional plasma display panel.

As shown in FIG. 1, a driving apparatus of a conventional plasma display panel includes a signal processor 110, a data alignment unit 120, an X electrode driver 130, a Y electrode driver 140, a Z electrode driver 150, The controller unit 160 and the high voltage driving circuit unit 170 are configured.

The signal processor 110 converts an external image signal input from the outside into image data suitable for driving the plasma display panel, and the data aligner 120 converts the image data converted by the signal processor 110 into a subfield. Reorder by.

The X electrode driver 130 and the Y electrode driver 140 apply an address pulse and a scan pulse to the X electrode and the Y electrode to form a wall voltage in the discharge cell of the plasma display panel, respectively. The Z electrode driver 150 alternately applies a sustain pulse to sustain the discharge of the discharge cell in which the wall voltage is formed, to the Y electrode and the Z electrode, respectively.

The controller 160 controls the rearranged image data to be sequentially read in the data alignment unit 120 according to an external image signal, and supplies the scan line amount to the X electrode driver 130, and supplies a logic control pulse to the high voltage driving circuit unit. To (170).

The high voltage driving circuit unit 170 drives the X electrode driving unit 130, the Y electrode driving unit 140, and the Z electrode driving unit 150 according to a logic control pulse applied from the controller unit 160.

The driving apparatus of the conventional plasma display panel includes a sustain driving circuit which alternately applies a sustain pulse to the Y electrode and the Z electrode to maintain the discharge of the selected cell. Such a sustain driving circuit includes the Y electrode driving unit 140 and the Z electrode. It is included in the electrode driver 150, respectively. As the sustain drive circuit, an energy recovery circuit configured to increase energy use efficiency by recovering energy supplied to the plasma display panel and supplying the recovered energy back to the plasma display panel is used.

FIG. 2 is a circuit diagram of a conventional energy recovery circuit, which is based on Weber's proposed "Energy recovery sustain for AC plasma display" (US 4866349), and may be replaced with another circuit at the convenience of the implementer. .

As shown, the first energy recovery circuit 141 is connected to the scan electrode lines Y which is one electrode of the panel capacitor Cp, and the second energy recovery circuit 151 is connected to the other of the panel capacitor Cp. It is connected to the sustain electrode lines Z which are the side electrodes. Here, the panel capacitor Cp equivalently represents the capacitance of the plasma display panel.

Specifically, the first energy recovery circuit 141 includes an inductor L1 connected in series between the source capacitor C1 and the panel capacitor Cp, and a parallel connection between the source capacitor C1 and the inductor L1. And first and third D-MOS switching elements Q1 and Q3, and second and fourth D-MOS switching elements Q2 and Q4 connected in parallel between the inductor L1 and the panel capacitor Cp. . Here, the second D-MOS switching element Q2 is connected to the sustain power supply for supplying the sustain voltage Vs, and the fourth D-MOS switching element Q4 is connected to the ground power supply GND.

The second energy recovery circuit 151 includes an inductor L2 connected between the source capacitor C2 and the panel capacitor Cp symmetrically with the first energy recovery circuit 141, and the first to fourth D-MOSs. Switching elements Q5 to Q8. Here, the second D-MOS switching element Q6 is connected with the sustain power supply for supplying the sustain voltage Vs, and the fourth D-MOS switching element Q8 is connected with the ground power supply GND.

The source capacitors C1 and C2 recover the voltage discharged from the panel capacitor Cp in the sustain period, and reduce the power consumption by discharging the recovered voltage back to the panel capacitor Cp. The source capacitors C1 and C2 charge and discharge 1/2 sustain voltage Vs / 2. The inductors L1 and L2 together with the panel capacitor Cp form a series resonant circuit. The first to fourth D-MOS switching elements Q1 to Q4 and Q5 to Q8 alternately supply sustain pulses to the panel capacitor Cp by being turned on and off under the control of the controller unit 160 of FIG. 1. .

The sustain pulse applied to the scan electrode line (Y) and the sustain electrode line (Z) is a resonance having a predetermined slope in the energy recovery time (ER time) corresponding to the charge and discharge time of the panel capacitor Cp. You will have a waveform. At this time, the energy recovery time is determined by the data stored in advance, and maintains the initially set energy recovery time irrespective of the number of sustain pulses.

However, as the area of the plasma display panel used recently increases, the capacitance of the panel capacitor Cp increases, and the inductor L1, which forms a resonance circuit together with the panel capacitor Cp, in order to use a predetermined energy recovery time, The inductance of L2) is reduced. Increasing capacitance and decreasing inductance are important factors to reduce energy recovery rate, and the reduction of energy recovery rate is a major cause of reducing overall efficiency of the driving device of the plasma display panel.

Referring to FIG. 3, the effect of the capacitance of the panel capacitor Cp on the resonance efficiency will be described. 3 is a simplified equivalent circuit diagram of a conventional energy recovery circuit. Here, it is assumed that the source capacitors C1 and C2 are constant power sources because their capacitance is much larger than that of the panel capacitor Cp.

The current I flowing through the inductor L is calculated as in Equation 1.

However, in an actual circuit, there is a parasitic resistance component, and the loss power generated by the parasitic resistance component is calculated as shown in Equation (2).

In other words, the loss power increases as the Cp value of the panel capacitor Cp and the R value of the parasitic resistance component become larger, and the smaller L value of the inductor L becomes larger. For example, assuming that there are 40 ″ and 80 ″ plasma display panels, since 80 ″ has a Cp value that is four times larger than 40 ″ in proportion to the area, 80 ″ is used to equally use the energy recovery time. Should use an inductor (L) with an L value that is 4 times smaller than 40 ". As a result, the lost power is increased 16 times in total and the energy recovery rate is greatly reduced.

Accordingly, in order to solve the above problem, the present invention allows the capacitors of several tens to hundreds of kHz to be connected in series to the front end of the plasma display panel, thereby reducing the capacitance value during resonance, thereby increasing the resonance efficiency. An object of the present invention is to provide a driving device for a display panel.

In order to solve the above technical problem, a plasma display panel driving apparatus includes an energy recovery circuit for supplying and recovering energy to a plasma display panel, wherein the plasma display panel includes: It characterized in that it comprises an auxiliary capacitor connected in series.

Preferably, at least one auxiliary capacitor connected in series with the plasma display panel of the present invention.

The auxiliary capacitor connected in series with the plasma display panel of the present invention may be included in the energy recovery circuit.

Hereinafter, with reference to the accompanying drawings will be described in detail a preferred embodiment of the present invention.

4 is a circuit diagram of an energy recovery circuit according to an embodiment of the present invention.

The first energy recovery circuit 241 and the second energy recovery circuit 251 perform an energy recovery operation to reduce power consumption in a sustain period requiring a high voltage of several hundred volts or more. The sustain period is a period in which sustain pulses are alternately supplied to the scan electrode lines Y and the sustain electrode lines Z to maintain the state of the discharge cell determined by the address pulse and the scan pulse.

As shown, the first energy recovery circuit 241 is connected to the scan electrode lines Y which is one side electrode of the panel capacitor Cp ', and the second energy recovery circuit 251 is connected to the panel capacitor Cp'. It is connected to the sustain electrode lines Z which are the other electrodes of. Here, the panel capacitor Cp 'has a capacitance calculated for the capacitor Cp equivalently representing the actual capacitance of the plasma display panel and one or more auxiliary capacitors Ca connected in series with the front end of the plasma display panel. In addition, the capacitance Cp 'of the panel capacitor of the present invention is reduced than that of the conventional capacitance Cp.

The first energy recovery circuit 241 includes an inductor L1 connected in series between the source capacitor C1 and the panel capacitor Cp ', and a first and parallel connection between the source capacitor C1 and the inductor L1. Third D-MOS switching elements Q1 and Q3 and second and fourth D-MOS switching elements Q2 and Q4 connected in parallel between the inductor L1 and the panel capacitor Cp '. Here, the second D-MOS switching element Q2 is connected to the sustain power supplying the sustain voltage Vs, and the fourth D-MOS switching element Q4 is connected to the ground power source GND.

The second energy recovery circuit 251 includes an inductor L2 connected between the source capacitor C2 and the panel capacitor Cp 'symmetrically with the first energy recovery circuit 241, and the first through fourth D−. MOS switching elements Q5 to Q8 are provided. Here, the second D-MOS switching element Q6 is connected with the sustain power supply for supplying the sustain voltage Vs, and the fourth D-MOS switching element Q8 is connected with the ground power supply GND.

The source capacitors C1 and C2 recover the voltage discharged from the panel capacitor Cp 'in the sustain period, and reduce the power consumption by discharging the recovered voltage back to the panel capacitor Cp'. The source capacitors C1 and C2 charge and discharge 1/2 sustain voltage Vs / 2. The inductors L1 and L2 together with the panel capacitor Cp 'constitute a series resonant circuit. The first to fourth D-MOS switching elements Q1 to Q4 and Q5 to Q8 alternately supply sustain pulses to the panel capacitor Cp 'by being turned on and off under the control of the controller unit.

5 is a timing diagram of an energy recovery circuit according to an embodiment of the present invention.

A detailed operation of the first energy recovery circuit 241 and the second energy recovery circuit 251 having the configuration as shown in FIG. 4 will now be described with reference to FIG. 5.

First, in the first step, the first D-MOS switching element Q1 of the first energy recovery circuit 241 and the fourth D-MOS switching element Q8 of the second energy recovery circuit 251 are turned on. do. Accordingly, the 1/2 sustain voltage Vs / 2 is discharged from the source capacitor C1 of the first energy recovery circuit 241 so that the first D-MOS switching element Q1 of the first energy recovery circuit 241 is discharged. And the panel capacitor Cp 'via the inductor L1 and the scan electrode lines Y. At this time, since the inductor L1 of the first energy recovery circuit 241 forms a series resonant circuit together with the panel capacitor Cp ', the voltage Vs / 2 discharged from the source capacitor C1 to the panel capacitor Cp'. The sustain voltage Vs, which is twice as large as), is charged. In other words, in the first step, the first energy recovery circuit 241 supplies the sustain voltage Vs to the scan electrode lines Y using the voltage Vs / 2 charged to the source capacitor C1. [Rising edge portion of sustain pulse supplied to scan electrode lines Y].

Next, in the second step, the second D-MOS switching element Q2 of the first energy recovery circuit 241 is turned on, and the fourth D-MOS switching element Q8 of the second energy recovery circuit 251 is turned on. ) Is turned on, and the first D-MOS switching element Q1 of the first energy recovery circuit 241 is turned off. Accordingly, the sustain voltage Vs from the sustain power supply is supplied to the panel capacitor Cp 'via the turned-on second D-MOS switching element Q2 and the scan electrode lines Y. As a result, the normal sustain discharge occurs while the panel capacitor Cp 'maintains the charging voltage Vs through the scan electrode lines Y maintaining the sustain voltage Vs.

Next, in the third step, the second D-MOS switching element Q2 of the first energy recovery circuit 241 is turned off and the third D-MOS switching element Q3 is turned on, and the second energy is turned on. The fourth D-MOS switching element Q8 of the recovery circuit 251 remains in the turn-on state. Accordingly, the sustain voltage Vs is discharged from the panel capacitor Cp 'to the scan electrode lines Y to induct the L1 and the third D-MOS switching element Q3 of the first energy recovery circuit 241. Is recovered to the source capacitor C1 via.

At this time, the sustain voltage Vs discharged from the panel capacitor Cp 'is reduced while passing through the inductor L1, and the source capacitor C1 is charged with the 1/2 sustain voltage Vs / 2. In other words, in the third step, the first energy recovery circuit 241 recovers the sustain voltage Vs discharged from the panel capacitor Cp 'to the scan electrode lines Y, so that the first capacitor recovers the voltage to the source capacitor C1. 2 sustain voltage Vs / 2 is charged (falling edge portion of the sustain pulse supplied to the scan electrode lines Y). The voltage Vs / 2 recovered in the source capacitor C1 is used to supply the next sustain pulse to the scan electrode lines Y connected to the first energy recovery circuit 241.

In addition, the second energy recovery circuit 251 supplies a sustain pulse to the sustain electrode lines Z in the same operation as the first energy recovery circuit 241.

As described above, in the present invention, one or a plurality of auxiliary capacitors having capacitances of tens to hundreds of kHz at the front end of the plasma display panel, specifically, the scan electrode (Y electrode) or the sustain electrode (Z electrode) of the plasma display panel ( Connect Ca) in series. As a result, the panel capacitor Cp 'equivalently representing the capacitance of the plasma display panel is reduced, resulting in an increase in resonance efficiency.

In other words, the larger the capacitance and parasitic resistance of the panel capacitor Cp 'and the smaller the inductance, the greater the loss power. By lowering the overall capacitance of the panel capacitor (Cp '), the loss power is minimized and the resonance efficiency is increased.

In FIG. 4, the auxiliary capacitor is separately configured from the first energy recovery circuit 241 and the second energy recovery circuit 251. However, the auxiliary capacitor may be formed in a range connected in series with the front end of the plasma display panel. It may be included in the first energy recovery circuit 241 or the second energy recovery circuit 251.

As described above, those skilled in the art will understand that the present invention can be implemented in other specific forms without changing the technical spirit or essential features.

Therefore, the above-described embodiments are to be understood as illustrative and not restrictive in all respects, and the scope of the present invention is indicated by the appended claims rather than the detailed description, and the meaning and scope of the claims and All changes or modifications derived from the equivalent concept should be interpreted as being included in the scope of the present invention.

As described above, the driving apparatus of the plasma display panel according to the present invention allows capacitors of several tens to hundreds of kW to be connected in series to the front end of the plasma display panel, thereby reducing capacitance value during resonance, thereby increasing resonance efficiency. It works.

Claims (3)

A plasma display panel driving apparatus for supplying and recovering energy to a plasma display panel, An inductor forming a resonance upon supply and recovery of the energy; And And an auxiliary capacitor connected in series to the plasma display panel, the auxiliary capacitor configured to form resonance when the energy is supplied and recovered together with the inductor and the plasma display panel. The method of claim 1, And at least one auxiliary capacitor connected in series with the plasma display panel. The method of claim 1, And the auxiliary capacitor connected in series with the plasma display panel is included in the energy recovery circuit.

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