CN101013555B - Apparatus for and method of driving a plasma display panel - Google Patents
Apparatus for and method of driving a plasma display panel Download PDFInfo
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- CN101013555B CN101013555B CN2007100877899A CN200710087789A CN101013555B CN 101013555 B CN101013555 B CN 101013555B CN 2007100877899 A CN2007100877899 A CN 2007100877899A CN 200710087789 A CN200710087789 A CN 200710087789A CN 101013555 B CN101013555 B CN 101013555B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/296—Driving circuits for producing the waveforms applied to the driving electrodes
- G09G3/2965—Driving circuits for producing the waveforms applied to the driving electrodes using inductors for energy recovery
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
- G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
- G09G3/291—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
- G09G3/294—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for lighting or sustain discharge
Abstract
A plasma display panel sustain-discharge circuit. First and second signal lines for supplying first and second voltages and at least one inductor coupled between one end of the panel capacitor and a third voltage are formed. Energy is stored in the inductor through a path formed between the third voltage and the first signal line in a state where a voltage of one end of the panel capacitor is substantially fixed to the first voltage. The voltage of one end of the panel capacitor substantially decreases to the second voltage using resonance current generated between the inductor and the panel capacitor and the stored energy. Energy is stored in the inductor through a path formed between the third voltage and the second line in a state where a voltage of one end of the panel capacitor is substantially fixed to the second voltage. The voltage of one end of the panel capacitor substantially increases to the first voltage using the resonance current generated between the inductor and the panel capacitor and the stored energy.
Description
The application is that on 08 06th, 2002 that submit to, application number is 02127656.0, denomination of invention is divided an application for the application case of " being used to drive the apparatus and method of plasma display panel ".
The cross reference of related application
The application requires application number in the 2001.8.6 application to be the korean patent application of 2001-0047311 and to be the right of priority and the interests of the korean patent application of 2002-0013573 at the application number of 2002.3.13 application.
Technical field
The present invention relates to a kind of be used to drive plasma display panel (PDP) especially PDP keep discharge (sustain-discharge)) circuit.
Background technology
In general, plasma display panel (PDP) is a kind of flat-panel monitor, is used to utilize Plasma Display character or the image that is produced by gas discharge.According to the size of PDP, be arranged with hundreds thousand of with matrix form to millions of pixels.According to the structure of the waveform shape and the discharge cell (cell) of the driving voltage that applies, PDP is divided into direct current (DC) PDP and exchanges (AC) PDP.
When voltage put on the DC PDP, electric current directly flowed in discharge space, and this is in discharge space because of electrodes exposed.Therefore, in DC PDP outside, must be used to limit the resistance of electric current.On the other hand, under the situation of AC PDP, electric current is restricted by be covered with the electric capacity that electrode forms naturally because of dielectric layer.Because the protected bump that is caused by ion at interdischarge interval that exempts from of the electrode of AC PDP is so its life-span is greater than the life-span of DC PDP.Memory character is the key character of AC PDP, and this feature is because the electric capacity of the dielectric layer of coated electrode causes.
In general, the method that is used to drive AC PDP comprises: the reset cycle, addressing period is kept the cycle, and erase cycle.
Reset cycle is used for the state of each unit of initialization, so that reposefully the unit is carried out addressing operation.Addressing period is used to select the unit of conducting and not conducting, and goes up accumulation wall electric charge in the unit of conducting (selected cell).The cycle of keeping is used to discharge, so as on selected cell display image practically.Erase cycle is used to reduce the wall electric charge of unit, and is used for stopping keeping discharge.
In AC PDP because scan electrode and being used to keep discharge keep electrode as capacitive load work, so exist for scan electrode and keep the electric capacity of electrode.Remove outside the power that is used to discharge, also need reactive power, so that be provided for keeping the waveform of discharge.Be used for reclaiming (recovering) and utilize energy recovery (power recovering) circuit of reactive power to be called the discharge circuit of keeping of PDP again.That propose by L.F.Weber and in United States Patent (USP) 4866349 and 5081400 disclosed keep discharge circuit be AC PDP keep discharge circuit or energy recovering circuit.
But, the conventional discharge circuit of keeping has only when energy recovering circuit is charged to half voltage corresponding to the voltage of external power source and could realize operating, so that utilize the resonance of inductor and capacitive load (panel capacitor (panel capacitor)) to utilize energy again.In order to keep the current potential of energy recovery capacitor equably, the necessary ratio panels capacitor of the electric capacity of external capacitor is many greatly.Thereby, make the complex structure of driving circuit, and must use a large amount of elements to make driving circuit.
Summary of the invention
According to the present invention, provide a kind of and can recover energy the PDP driving circuit of (recovering power).
In a first aspect of the present invention, a kind of PDP driving circuit comprises: first and second signal wires are used to provide first and second voltages; And at least one is connected an end of panel capacitor and the inductor between the tertiary voltage.
Basically maintained at an end of panel capacitor under the state of first voltage and formed first current path.Described first current path connects inductor with described first signal wire, makes the electric current of first direction be provided for inductor, and stores first energy.Form second current path, it produces resonance between inductor and panel capacitor, and utilizes the electric current that is caused by the described resonance and first energy, and the voltage of panel capacitor one end is reduced to second voltage basically.Basically maintained at an end of panel capacitor under the state of second voltage and formed the 3rd current path.Described the 3rd current path is connected to described inductor with the secondary signal line, makes the electric current of the second direction opposite with first direction be provided for inductor, and can store second energy.Form the 4th current path, it produces resonance between inductor and panel capacitor, and utilizes the electric current that is caused by described resonance and described second energy, and the voltage of panel capacitor one end is increased to first voltage basically.
When the voltage of an end of panel capacitor is changed when being first and second voltages, energy can be retained in the inductor.When the voltage of panel capacitor one end is changed when being first and second voltages, preferably also form the 5th and the 6th current path, be used for reclaiming the energy that is retained in inductor.
The electric current of first and second directions can pass through same inductor.Described inductor can comprise: first inductor, the wherein electric current by first direction; With second inductor, the electric current by second direction wherein.
Described first and second signal wires preferably link to each other with an end of panel capacitor, make the voltage of an end of panel capacitor be maintained at first and second voltages.
Described PDP driving circuit preferably also comprises: first and second on-off elements, they are formed on first and second signal wires, and by operation make win and the 3rd current path formed respectively; And third and fourth on-off element, their parallel with one another being connected between inductor and the tertiary voltage, and make by operation and to form first and second current paths and third and fourth current path.Described first and second on-off elements preferably include body diode (body diode).
Described tertiary voltage preferably corresponding to first and second voltages and half.
First and second voltages preferably have mutual amplitude identical but opposite current potential, and tertiary voltage ground voltage preferably.
The PDP driving circuit preferably also comprises a capacitor, and the one end selectively links to each other with first power supply that first voltage is provided and ground.First signal wire links to each other with first power supply that first voltage is provided.The secondary signal line links to each other with the other end by the capacitor of first voltage charging by first power supply.
In a second aspect of the present invention, a kind of PDP driving circuit comprises: first and second signal wires, be used to provide opposite second voltage and at least one inductor of level of first voltage and its level and described first voltage, it is connected between the end and ground of described panel capacitor.
Between end of the panel capacitor that is fixed on first voltage by first signal wire basically and ground, form first current path.Described first current path produces resonance between inductor and panel capacitor, and by resonance current the voltage of panel capacitor one end is reduced to second voltage basically.Between end of the panel capacitor that is fixed on second voltage by the secondary signal line basically and ground, form second current path.Described second current path produces resonance between inductor and panel capacitor, and utilizes resonance current that the voltage of panel capacitor one end is increased to first voltage basically.
Described PDP driving circuit preferably also comprises: first and second on-off elements, they are parallel with one another be connected and inductor between, and make by operation and to form first and second current paths; And third and fourth on-off element, they are formed on first and second signal wires, and make the voltage of an end of panel capacitor be fixed on first and second voltages by operation.Described third and fourth on-off element of stating preferably includes body diode (body diode).
In a third aspect of the present invention, a kind of PDP driving circuit comprises: first and second on-off elements, they are connected between first signal wire and the secondary signal line mutually, described signal wire is respectively applied for second voltage that first voltage is provided and has opposite levels, and the contact of described on-off element is connected an end of panel capacitor; The inductor that one end of at least one and panel capacitor links to each other; And parallel with one another be connected and described inductor between third and fourth on-off element.
In a fourth aspect of the present invention, a kind of PDP driving circuit comprises: first and second on-off elements, they are connected between first signal wire and the secondary signal line mutually, described signal wire is respectively applied for second voltage that first voltage is provided and has opposite levels, and the contact of described on-off element is connected an end of panel capacitor; The inductor that one end of at least one and panel capacitor links to each other; And third and fourth on-off element, they are parallel with one another to be connected between the tertiary voltage and described inductor of middle threshold voltage of first and second voltages.First and second energy are stored in the inductor by first and second current paths that formed by the tertiary voltage and first and second signal wires, and described panel capacitor is utilized described first and second energy to charge and discharged.
In aspect of the present invention third and fourth, a kind of PDP driving circuit preferably also comprises a capacitor, and the one end selectively links to each other with first power supply that first voltage is provided and ground.First signal wire links to each other with first power supply.The secondary signal line links to each other with the other end by the capacitor of first voltage charging by power supply.
According to a kind of method that is used for driving PDP of the present invention, voltage at an end of panel capacitor is fixed under the state of first voltage basically, by the path that between the tertiary voltage and first signal wire, forms, energy is stored in the inductor, and described tertiary voltage is the voltage between described first and second voltages.The resonance current that utilization produces between inductor and panel capacitor and the energy of being stored are reduced to second voltage basically with the voltage of an end of panel capacitor.Voltage at an end of panel capacitor is fixed under the state of second voltage basically, and the path by forming between tertiary voltage and secondary signal line is stored in energy in the inductor.The resonance current that utilization produces between inductor and panel capacitor and the energy of storage are increased to first voltage basically with the voltage of an end of panel capacitor.
Be retained in voltage that energy in the inductor is preferably in an end of panel capacitor changed to respectively second and voltage voltage after be recovered.
The invention provides a kind of plasma display panel, comprising: a plurality of electrodes; The first transistor has the first transistor second terminal that is coupled to the 5th transistorized the first transistor the first terminal and is coupled to a plurality of electrodes; Transistor seconds has transistor seconds the first terminal and transistor seconds second terminal, and described transistor seconds the first terminal is coupled to a plurality of electrodes; First inductor has the first inductor the first terminal and first inductor, second terminal, and described first inductor, second terminal is coupled to a plurality of electrodes; Second inductor has the second inductor the first terminal and second inductor, second terminal, and described second inductor, second terminal is coupled to a plurality of electrodes; The 3rd transistor has the 3rd transistor the first terminal that is coupled to the ground terminal and the 3rd transistor second terminal that is coupled to the described first inductor the first terminal; The 4th transistor has the 4th transistor the first terminal that is coupled to the described second inductor the first terminal and the 4th transistor second terminal that is coupled to the ground terminal; Wherein the 3rd transistorized the first terminal and the 4th transistorized second terminal all are dc terminals, and the 5th transistor has the 5th transistor the first terminal and the 5th transistor second terminal, and described the 5th transistor the first terminal is coupled to power supply; The 6th transistor has the 6th transistor the first terminal that is coupled to described the 5th transistor second terminal and the 6th transistor second terminal that is coupled to described ground terminal; And capacitor, second capacitor terminal that has first capacitor terminal that is coupled to described the 5th transistor second terminal and the 6th transistor the first terminal and be coupled to described transistor seconds second terminal and described ground terminal.
The present invention also provides a kind of plasma display panel, comprising: a plurality of electrodes; The first transistor has the first transistor second terminal that is coupled to the 5th transistorized the first transistor the first terminal and is coupled to a plurality of electrodes; Transistor seconds has transistor seconds the first terminal and transistor seconds second terminal, and described transistor seconds the first terminal is coupled to a plurality of electrodes; The first element group comprises first inductor, the 3rd transistor and first diode that are connected in series with random order, and first end of the wherein said first element group is coupled to a plurality of electrodes, and second end of the described first element group is arrived the ground terminal by DC coupling; The second element group, comprise second inductor, the 4th transistor and second diode that are connected in series with random order, first end of the wherein said second element group is coupled to a plurality of electrodes, and second end of the described second element group is arrived described ground terminal by DC coupling; The 5th transistor has the 5th transistor the first terminal and the 5th transistor second terminal, and described the 5th transistor the first terminal is coupled to power supply; The 6th transistor, the 6th transistor second terminal that has the 6th transistor the first terminal that is coupled to described the 5th transistor second terminal and be coupled to described ground terminal; And capacitor, second capacitor terminal that has first capacitor terminal that is coupled to described the 5th transistor second terminal and the 6th transistor the first terminal and be coupled to described transistor seconds second terminal and described ground terminal.
The present invention also provides a kind of plasma display panel, comprising: a plurality of electrodes; The first transistor has the first transistor second terminal that is coupled to the 5th transistorized the first transistor the first terminal and is coupled to a plurality of electrodes; Transistor seconds has transistor seconds the first terminal and transistor seconds second terminal, and described transistor seconds the first terminal is coupled to a plurality of electrodes; The first element group comprises the inductor, the 3rd transistor and first diode that are connected in series with random order, and first end of the wherein said first element group is coupled to a plurality of electrodes, and second end of the described first element group is arrived the ground terminal by DC coupling; The second element group comprises the inductor, the 4th transistor and second diode that are connected in series with random order, wherein first end of the second element group be coupled to a plurality of electrodes and the second element group second end by DC coupling to described ground terminal; The 5th transistor has the 5th transistor the first terminal and the 5th transistor second terminal, and described the 5th transistor the first terminal is coupled to power supply; The 6th transistor has the 6th transistor the first terminal that is coupled to described the 5th transistor second terminal and the 6th transistor second terminal that is coupled to described ground terminal; And capacitor, second capacitor terminal that has first capacitor terminal that is coupled to described the 5th transistor second terminal and described the 6th transistor the first terminal and be coupled to described transistor seconds second terminal and described ground terminal.
Description of drawings
Fig. 1 is the PDP that can implement according to embodiments of the invention;
Fig. 2 and Fig. 4 are the circuit diagrams of keeping discharge circuit according to the PDP of first and second embodiment of the present invention;
Fig. 3,5,9 and 11 is the driving of discharge circuit is kept in expression according to PDP of the present invention time relationship synoptic diagram;
Fig. 6 keeps the circuit that discharge circuit obtains by revising according to PDP of the present invention;
Fig. 7 and Fig. 8 keep the circuit that discharge circuit obtains by the PDP that revises according to first and second embodiment of the present invention;
Figure 10 A-10H is illustrated in the current path of each pattern in the discharge circuit of keeping according to the PDP of the third embodiment of the present invention;
Figure 12 A-12H is illustrated in the current path of each pattern in the discharge circuit of keeping according to the PDP of the fourth embodiment of the present invention; And
Figure 13-29 expression is kept discharge circuit according to the PDP of additional embodiments of the present invention.
Embodiment
Describe plasma display panel (PDP) with reference to the accompanying drawings in detail and be used to drive the method for described PDP according to embodiments of the invention.
Fig. 1 represents to implement the PDP of each embodiment of the present invention.
As shown in Figure 1, can implement PDP of the present invention and comprise: plasma panel 100, address driver element 200 scans and keeps driver element 300, and controller 400.
Describe in detail below with reference to Fig. 2 and Fig. 3 and to keep discharge circuit 320 according to the first embodiment of the present invention.
Fig. 2 is the circuit diagram of keeping discharge circuit of expression according to the PDP of the first embodiment of the present invention.Fig. 3 is that expression is used for the time relationship synoptic diagram according to the driving of keeping discharge circuit of the PDP of the first embodiment of the present invention.
4 comprise and keep discharge cell 322 and energy recovery unit 324 according to the discharge circuit 320 of keeping of the first embodiment of the present invention as shown in Figure 2.Keep discharge cell 322 and comprise on-off element S1 and the S2 that is connected in series in mutually between power supply Vs and the power supply-Vs.The electrode (being assumed to the Y electrode) of the contact of on-off element S1 and S2 and plasma display panel (panel capacitor Cp is because plasma panel is as capacitive load work) links to each other.Power supply Vs and-Vs provide corresponding to Vs and-voltage of Vs.Another another electrode of keeping discharge circuit and panel capacitor Cp links to each other.
Be included in keep in the discharge cell 322 and energy recovery unit 324 in on-off element S1, S2, S3 and S4 are MOSFET as shown in Figure 2.But, described on-off element is not limited to MOSFET, if the on-off element of other type can be finished same or analogous function, also can utilize the on-off element of other type.Described on-off element preferably includes body diode.
Below with reference to the operation of keeping discharge circuit of Fig. 3 explanation according to the first embodiment of the present invention.
Because on-off element S2 conducting before carrying out according to the operation of first embodiment, so the Y electrode voltage Vy of panel capacitor Cp is maintained-Vs basically.
As shown in Figure 3, because at pattern 1 (M1) on-off element S2, S3 and S4 end, and on-off element S3 conducting, so in the path of ground, on-off element S3, diode D1, inductor L and panel capacitor Cp, produce LC resonance.Flow through the resonance current I of inductor L by LC resonance
LForm sinusoidal wave half period.At this moment, Y electrode voltage Vy is increased to Vs from-Vs.
At pattern 2 (M2), when Y electrode voltage Vy is increased to Vs, on-off element S1 conducting.Thereby by means of power supply Vs, Y electrode voltage Vy is maintained at Vs.At this moment or at mode 3 (M3), on-off element S3 can be cut off.
At mode 3 (M3), on-off element S4 conducting.Thereby, in the path on panel capacitor Cp, inductor L, diode D2, on-off element S4 and ground, produce LC resonance.Flow through the resonance current I of inductor L by LC resonance
LForm sinusoidal wave half period.At this moment, Y electrode voltage Vy is reduced to-Vs from Vs.
At pattern 4 (M4), when Y electrode voltage Vy be reduced to-during Vs, on-off element S2 conducting.Thereby Y electrode voltage Vy is maintained to-Vs by power supply-Vs.At this moment or in the pattern 1 (MI) that repeats, on-off element S4 can be ended.
By repeat pattern 1 to pattern 4, can make Vs and-Vs alternately offers the Y electrode of panel capacitor.When opposite polarity Vs that is used to provide the polarity and first embodiment and-Vs keep discharge circuit and other electrode (X electrode) when linking to each other, the voltage on panel capacitor Cp two ends becomes keeps the required voltage 2Vs of discharge.Thereby, can in plate, keep discharge.
According to the first embodiment of the present invention, utilize the voltage of counter plate capacitor Cp charging, can change the voltage of panel capacitor Cp.That is, need not provide because be used for the electric current of counter plate capacitor charge or discharge, so do not use unnecessary power supply by external power source.
Describe an embodiment below with reference to Fig. 4 in detail to Fig. 6, wherein added according to the first embodiment of the present invention be used for to keep discharge circuit provide power supply Vs and-power supply unit 326 of Vs.
Fig. 4 is the circuit diagram of keeping discharge circuit according to the PDP of the second embodiment of the present invention.Fig. 5 is the time relationship synoptic diagram of expression according to the driving of keeping discharge circuit of the second embodiment of the present invention.Fig. 6 represents by revising the circuit that discharge circuit obtains of keeping according to the second embodiment of the present invention.
As shown in Figure 4, the discharge circuit 320 of keeping according to the second embodiment of the present invention also comprises power supply unit 326.Power supply unit 326 comprises on-off element S5, S6.On-off element S5, S6 are connected between power supply Vs and the ground mutually.Capacitor Cs is connected between the contact of the on-off element S5 that keeps in the discharge cell 322 and S6 and on-off element S2.The contact of on-off element S5 and S6 links to each other with on-off element S1.Diode Ds is connected between capacitor Cs and the ground.Thereby, can utilize voltage counter plate capacitor Cp that voltage-Vs is provided, and not use power supply-Vs capacitor Cs charging.
Below with reference to Fig. 5 according to the operation of keeping discharge circuit of the additional symbols between first embodiment and second embodiment according to the second embodiment of the present invention.
As shown in Figure 5, remove by on-off element S5, the operation handlebar voltage Vs of S6 and-Vs offers outside the Y electrode of panel capacitor Cp, identical according to the driving time relation of the second embodiment of the present invention and first embodiment.
More particularly, at pattern 1 (M1) and mode 3 (M3), promptly in the stage of the voltage that changes panel capacitor Cp, on-off element S5 and S6 end.At pattern 2 (M2), the Y electrode voltage Vy of panel capacitor Cp is maintained at voltage Vs by making on-off element S5 conducting under the state that ends at on-off element S6.By the path on power supply Vs, on-off element S5, capacitor Cs, diode Ds and ground, voltage Vs charges to capacitor Cs.In pattern 4 (M4), under the state that on-off element S5 ends, form the path of ground, on-off element S6, capacitor Cs, on-off element S2 and panel capacitor Cp by making on-off element S6 conducting.By means of the voltage Vs that capacitor Cs is charged through described path, voltage-Vs offers the Y electrode of panel capacitor Cp.The Y electrode voltage Vy of panel capacitor Cp can keep voltage-Vs.
According to the second embodiment of the present invention, can provide voltage-Vs by counter plate capacitor Cp, and not use power supply Vs that voltage-Vs is provided.
In the second embodiment of the present invention, utilize diode Ds to be used to form the path with voltage Vs charging to capacitor Cs.But, as shown in Figure 6, can utilize on-off element S7 to replace diode Ds, as shown in Figure 6.That is make on-off element S7 conducting form a path when, capacitor Cs being charged by voltage Vs in pattern 2 (M2).In other cases, by making on-off element S7 by described path is cut off.
On-off element S5, the S6 and the S7 that are used by power supply unit 326 are expressed as MOSFET in Fig. 4 and Fig. 6.But, also can functions of use and same or analogous other any on-off element of MOSFET.Described on-off element preferably includes body diode.
In first and second embodiment of the present invention, use inductor L.Can use two inductor L1 and L2, as shown in Figure 7 and Figure 8.Promptly can in the path that forms to panel capacitor by ground, use inductor L1, in the path that forms to ground by panel capacitor Cp, use inductor L2.
Illustrate that to Figure 12 the discharge circuit of keeping according to first embodiment and second embodiment is concerned an embodiment who drives by another kind of driving time below with reference to Fig. 9.
Fig. 9 and Figure 11 are the time relationship synoptic diagram of expression according to the driving of keeping discharge circuit of third and fourth embodiment of the present invention.Figure 10 A-10H is illustrated in the current path of keeping each pattern in the discharge circuit according to the third embodiment of the present invention.Figure 12 A-12H represents the current path according to each pattern of keeping discharge circuit of the 4th embodiment.
The discharge circuit of keeping according to the third embodiment of the present invention has the circuit identical with first embodiment.Before the operation of carrying out according to the third embodiment of the present invention, because on-off element S2 conducting and the Y electrode voltage Vy of panel capacitor Cp is set to-Vs.
Referring to Fig. 9 and Figure 10 A, in pattern 1 (M1), since on-off element S3 conducting under the state of on-off element S2 conducting, the current path of formation on-off element S3, diode D1, inductor L, on-off element S2 and power supply-Vs.Because utilize the electric current I of described current path by inductor L
LIncrease linearly, thereby energy is accumulated among the inductor L.
In pattern 2 (M2), under the state of on-off element S3 conducting, on-off element S2 ends.When on-off element S2 ends, shown in Figure 10 B,, flow to the electric current I of power supply-Vs from inductor L because current path is cut off
LFlow by panel capacitor Cp.Thereby, produce LC resonance by inductor L and panel capacitor Cp.Because at the energy that resonance current gathers in inductor, the Y electrode voltage Vy of panel capacitor Cp is increased to voltage Vs from voltage-Vs.
In mode 3 (M3), the Y electrode voltage Vy of panel capacitor Cp reaches Vs, the body diode conducting of on-off element S1.Thereby, shown in Figure 10 C, form on-off element S3, diode D1, inductor L, the body diode of on-off element S1 and the current path of power supply Vs.Flow to the electric current I of panel capacitor Cp from inductor L
LBe recycled to power supply Vs, and be reduced to 0A linearly.
In addition, the Y electrode Vy of panel capacitor Cp is maintained voltage Vs by turn-on switch component S1.At this moment, because on-off element S1 is conducting under 0 the state at the voltage between drain electrode and the source electrode, so on-off element S1 can carry out zero voltage switching.Thereby, the actuating switch loss of on-off element S1 does not take place.In the 3rd embodiment, because utilize the energy accumulate among the inductor L, so, even when in keeping discharge circuit, having spurious portion, also can be increased to Vs to the Y electrode voltage.That is,, also can realize zero voltage switching even when in circuit, having spurious portion.
Shown in Figure 10 D, in pattern 4 (M4), on-off element S1 continues conducting.Thereby the Y electrode voltage Vy of panel capacitor Cp continues to maintain Vs, and when the electric current I L that flows through inductor L was reduced to 0A, on-off element S3 ended.
In pattern 5 (M5), on-off element S4 conducting under the state of on-off element S1 conducting.Thereby, shown in Figure 10 E, form the path on power supply Vs, on-off element S1, inductor L, diode D2, on-off element S4 and ground.Flow through the electric current I of inductor L
LIncrease linearly in opposite direction.Thereby energy is accumulated among the inductor L.
In pattern 6 (M6), on-off element S1 ends.Thereby, shown in Figure 10 F, form LC resonance path from panel capacitor Cp to inductor L.Therefore, by at resonance current I
LWith the energy that gathers among the inductor L, the Y electrode voltage Vy of panel capacitor Cp is reduced to-Vs from voltage Vs.
In mode 7 (M7), Y electrode voltage Vy reaches-Vs, the body diode conducting of on-off element S2.Thereby, shown in Figure 10 G, form the current path on body diode, inductor L, diode D2, on-off element S4 and the ground of on-off element S2.Therefore, flow through the electric current I of inductor L
LReclaimed through ground, and be reduced to 0A linearly.
In addition, on-off element S2 conducting under the state of body diode conducting, thereby the Y electrode voltage Vy of panel capacitor Cp is maintained at-Vs.At this moment, because on-off element S2 is conducting under 0 the state at the voltage between drain electrode and the source electrode, that is, on-off element S2 carries out zero voltage switching, so the conduction loss of on-off element S2 does not take place.
Shown in Figure 10 H, in pattern 8 (M8), continue conducting by making on-off element S2, make Y electrode voltage Vy be continued to remain on-Vs, and when the electric current I that flows through inductor
LWhen being reduced to 0A, on-off element S4 ends.
By repeat pattern 1-pattern 8, Y electrode that can the counter plate capacitor alternately provide Vs and-Vs.When be used to provide have with the Vs of the opposite polarity polarity of first embodiment and-during the keeping discharge circuit and be connected to other electrode (X electrode) and go up of Vs, the voltage that is added on the two ends of panel capacitor Cp becomes and is used to keep the required voltage 2Vs of discharge.Thereby, in plate, can keep discharge.
As mentioned above, in the third embodiment of the present invention, in pattern 1 in pattern 5, in order in inductor, to gather strength and consumed power.In mode 7, described energy is recovered at mode 3.Therefore, because in the ideal case, the power of consumption equals charge power, so the general power that consumes equals 0W.Thereby, can just can change voltage on the panel capacitor without consumed power.Because when the terminal voltage of panel capacitor changes, utilize the energy that in inductor, gathers, can realize zero voltage switching so in circuit, exist under the situation of spurious portion.
Below with reference to Figure 11 and 12A-12H explanation by to according to the second embodiment of the present invention keep discharge circuit additional one provide power supply Vs and-power supply unit 326 of Vs obtain keep discharge circuit.
According to the fourth embodiment of the present invention keep discharge circuit 320 have with second embodiment keep the identical circuit of discharge circuit.Before the operation of carrying out according to the 4th embodiment, because capacitor Cs is charged by Vs,, the voltage Vs that utilizes capacitor Cs to charge maintains-Vs so being provided with the Y electrode voltage Vy of panel capacitor Cp, thereby on-off element S2 and S6 conducting.Because remove use on-off element S5 and S6, capacitor Cs and diode Ds provide voltage Vs and-Vs outside, the operation in the 4th embodiment is identical with the operation of the 3rd embodiment, so the operation of priority declaration's on-off element S5 and S6.
Referring to Figure 11 and 12A, in pattern 1 (M1), on-off element S3 conducting under the state of on-off element S5 and S6 conducting.Thereby, the current path of formation on-off element S3, diode D1, inductor L, on-off element S2, capacitor Cs and on-off element S6.According to the electric current I of described current path by inductor L
LReduce linearly.Thereby energy is accumulated among the inductor L.
In pattern 2 (M2), on-off element S2 and S6 end under the state of on-off element S3 conducting.As described in the pattern 2 of the 3rd embodiment, utilize the energy that in resonance current and inductor L, gathers, the Y electrode voltage Vy of panel capacitor Cp is increased to voltage Vs from voltage-Vs, shown in Figure 12 B.
In mode 3 (M3), shown in Figure 12 C, form on-off element S3, diode D1, inductor L, on-off element S1 and the body diode of S5 and the current path of power supply Vs.Thereby, by the electric current I of inductor L
LBe recycled to power supply Vs.In addition, under the state of body diode conducting, by making on-off element S1 and S5 conducting, Y electrode voltage Vy is maintained at Vs.As described in the 3rd embodiment, because on-off element S1, S5 carries out zero voltage switching, so do not produce the actuating switch loss.By the path on power supply Vs, on-off element S5, capacitor C1, diode Ds and ground, Vs voltage continues the charging to capacitor Cs, and this is identical with situation in the pattern 5 with the described pattern 4 in back.
Shown in Figure 12 D, in pattern 4 (M4), make the Y electrode voltage continue to maintain Vs by making on-off element S1 and on-off element S5 continue conducting.Flowing through the electric current I of inductor
LBe reduced to after the 0A, on-off element S3 ends.
In pattern 5 (M5), on-off element S4 is on-off element S4 conducting under the state of on-off element S1 and S5 conducting.Thereby, shown in Figure 12 E, form the path on power supply Vs, on-off element S5 and S1, inductor L, diode D2, on-off element S4 and ground.Along the electric current I of passing through inductor L in the other direction
LIncrease linearly.Thereby energy is accumulated among the inductor L.
In pattern 6 (M6), on-off element S1 and S5 end under the state of on-off element S4 conducting.By resonance current and the energy that gathers in inductor L, the Y electrode voltage Vy of panel capacitor Cp is reduced to-Vs by voltage Vs, shown in Figure 12 F, as described in the pattern 6 of the 3rd embodiment.
In mode 7 (M7), form the path on body diode, inductor L, diode D2, on-off element S4 and the ground of on-off element S6, capacitor Cs, on-off element S2, shown in Figure 12 G.Flow through the electric current I of inductor L
LFlow through capacitor Cs.Thereby described electric current charges to capacitor Cs, and is reduced to 0A linearly.
Because on-off element S2 and S6 conducting under the state of body diode conducting, Y electrode voltage Vy is maintained at-Vs.Because on-off element S2 and S6 carry out zero voltage switching, described in the 3rd embodiment, so do not produce the actuating switch loss.
In pattern 8 (M8), shown in Figure 12 H, when the electric current I that flows through inductor
LWhen being reduced to 0A, making on-off element S2 and S6 conducting and on-off element S4 is ended by continuing, make Y electrode voltage Vy continue to maintain-Vs.
As mentioned above, in the fourth embodiment of the present invention, in pattern 1 and pattern 5, in order in inductor, to gather strength and consumed power.But, in mode 3 and mode 7, described power is to power supply Vs and capacitor Cs charging.Therefore, because described in the ideal case consumed power equals charge power, the power of total consumption equals 0W.Thereby consumed power does not change the voltage on the panel capacitor.
In the fourth embodiment of the present invention, can utilize on-off element S7 to replace diode Ds.In this case, on-off element S7 conducting when on-off element S5 conducting, thus capacitor Cs is charged to voltage Vs continuously.
In third and fourth embodiment of the present invention, can with first and second embodiment in utilize two inductor L1 and L2 (referring to Fig. 7,8) like that.That is, the path that forms from ground to panel capacitor Cp, utilize inductor L1.The path that the end from panel capacitor Cp forms to ground, utilize inductor L2.When the inductor of both direction not simultaneously, increase time and reduction time of Y electrode voltage Vy that panel capacitor Cp can be set is different.
Below with reference to Figure 13 to 29 explanation other embodiment that keeps discharge circuit according to first to the 4th embodiment of the present invention.
Figure 13 represents the discharge circuit of keeping according to embodiments of the invention to Figure 29.The discharge circuit of keeping shown in Figure 13 to 24 is to obtain by the discharge circuit of revising according to the of the present invention first or the 3rd embodiment of keeping.The discharge circuit of keeping shown in Figure 25 to 29 is to obtain by the discharge circuit of revising according to the of the present invention second or the 4th embodiment of keeping.
Referring to Figure 13, remove outside the position of inductor L, keep the identical of discharge circuit and the first or the 3rd embodiment according to an alternative embodiment of the invention.Inductor L is connected between the contact and ground of on-off element S3 and S4.
Referring to Figure 14, remove outside the position of diode D1 and D2, keep the identical of discharge circuit and embodiment shown in Figure 13 according to an alternative embodiment of the invention.That is, diode D1 and D2 are interconnected between on-off element S3 and S4 and the inductor L.
, remove outside two power source voltage amplitude VH and VL and the energy recovery capacitor Cs to Figure 17 referring to Figure 15, keep identical with the embodiment shown in 14 of discharge circuit and Fig. 2,13 according to of the present invention.More particularly, keeping in the discharge circuit shown in Figure 15 to 17, first keeps power supply and second, and to keep the power source voltage amplitude different.When two power source voltage amplitudes are different, there is energy recovery capacitor C c.Must charge to capacitor Cc with the voltage that equals (VH+VL)/2.
Referring to Figure 18 to 20, be by comprising in the discharge circuit that keeping shown in Figure 14,15 and 17 two inductor L1 and L2 obtain according to the discharge circuit of keeping of other embodiments of the invention.
Referring to Figure 21 to 24, be by inductor L1 according to the discharge circuit of keeping of other embodiments of the invention, the position change of L2 obtains with regard to the position of D2 for the diode D1 shown in Fig. 7, Figure 18,19 and 20.
Referring to Figure 25 and 26, remove outside the position of inductor L, shown in Figure 25 according to an alternative embodiment of the invention keep discharge circuit and shown in Figure 4 to keep discharge circuit identical.Remove outside the position of diode D1 and D2, shown in Figure 26 keep discharge circuit with shown in Figure 25 identical according to an alternative embodiment of the invention.
Referring to Figure 27 to 29, the discharge circuit of keeping according to an alternative embodiment of the invention shown in Figure 27 is by comprising in the discharge circuit that in shown in Figure 26 keeping two inductor L1 and L2 obtain.The discharge circuit of keeping according to other embodiments of the invention shown in Figure 28 and 29 is by the inductor L1 in the discharge circuit of keeping according to the embodiment shown in Fig. 8 of the present invention and 27, and the position change of L2 is that the position of diode D1 and D2 obtains.
By referring to explanation, can be readily seen that the method for keeping discharge circuit that is used to drive according to other embodiments of the invention according to first to the 4th embodiment.Therefore, will omit its explanation.
The voltage that is applied to the Y electrode in an embodiment of the present invention has been described.But, as mentioned above, the circuit that is applied to the Y electrode also is applied to the X electrode.In addition, when voltage that change applies, described circuit can be applied to address electrode.
As mentioned above, according to the keeping discharge circuit and can recover energy of PDP of the present invention, wherein do not use and keeping the jumbo energy recovery capacitor of discharge circuit outside.In addition, because can carry out zero voltage switching when in circuit, having spurious portion, so can reduce the conduction loss of on-off element.
Though be combined in current most realistic the describing the present invention that be considered to illustrated embodiments, but be to be understood that, the invention is not restricted to the disclosed embodiments, just the opposite, the present invention should cover the design of claims and each remodeling and the equivalent that comprise in the scope.
Claims (16)
1. plasma display panel comprises:
A plurality of electrodes;
The first transistor has the first transistor second terminal that is coupled to the 5th transistorized the first transistor the first terminal and is coupled to a plurality of electrodes;
Transistor seconds has transistor seconds the first terminal and transistor seconds second terminal, and described transistor seconds the first terminal is coupled to a plurality of electrodes;
First inductor has the first inductor the first terminal and first inductor, second terminal, and described first inductor, second terminal is coupled to a plurality of electrodes;
Second inductor has the second inductor the first terminal and second inductor, second terminal, and described second inductor, second terminal is coupled to a plurality of electrodes;
The 3rd transistor has the 3rd transistor the first terminal that is coupled to the ground terminal and the 3rd transistor second terminal that is coupled to the described first inductor the first terminal;
The 4th transistor has the 4th transistor the first terminal that is coupled to the described second inductor the first terminal and the 4th transistor second terminal that is coupled to the ground terminal;
Wherein the 3rd transistorized the first terminal and the 4th transistorized second terminal all are dc terminals,
The 5th transistor has the 5th transistor the first terminal and the 5th transistor second terminal, and described the 5th transistor the first terminal is coupled to power supply;
The 6th transistor has the 6th transistor the first terminal that is coupled to described the 5th transistor second terminal and the 6th transistor second terminal that is coupled to described ground terminal; With
Capacitor, second capacitor terminal that has first capacitor terminal that is coupled to described the 5th transistor second terminal and the 6th transistor the first terminal and be coupled to described transistor seconds second terminal and described ground terminal.
2. plasma display panel as claimed in claim 1, wherein:
When described the first transistor is switched on, be applied to a plurality of electrodes from the described the 5th transistorized first voltage; And
When described transistor seconds and the 6th transistor are switched on, are applied to described first capacitor terminal and are applied to a plurality of electrodes from second voltage of described second capacitor terminal from the ground voltage of ground terminal.
3. plasma display panel as claimed in claim 2, wherein: described first voltage is positive voltage, and described second voltage is negative voltage.
4. plasma display panel as claimed in claim 1 also comprises: diode has anode that is coupled to described second capacitor terminal and the negative electrode that is coupled to described ground terminal.
5. plasma display panel as claimed in claim 1 also comprises: the 7th transistor has the 7th transistor the first terminal that is coupled to described second capacitor terminal and the 7th transistor second terminal that is coupled to described ground terminal.
6. plasma display panel as claimed in claim 1 also comprises:
First diode has first diode anode that is coupled to described the 3rd transistor second terminal and first diode cathode that is coupled to the described first inductor the first terminal; And
Second diode has second diode anode that is coupled to the described second inductor the first terminal and second diode cathode that is coupled to described the 4th transistor the first terminal.
7. plasma display panel comprises:
A plurality of electrodes;
The first transistor has the first transistor second terminal that is coupled to the 5th transistorized the first transistor the first terminal and is coupled to a plurality of electrodes;
Transistor seconds has transistor seconds the first terminal and transistor seconds second terminal, and described transistor seconds the first terminal is coupled to a plurality of electrodes;
The first element group comprises first inductor, the 3rd transistor and first diode that are connected in series with random order, and first end of the wherein said first element group is coupled to a plurality of electrodes, and second end of the described first element group is arrived the ground terminal by DC coupling;
The second element group, comprise second inductor, the 4th transistor and second diode that are connected in series with random order, first end of the wherein said second element group is coupled to a plurality of electrodes, and second end of the described second element group is arrived described ground terminal by DC coupling;
The 5th transistor has the 5th transistor the first terminal and the 5th transistor second terminal, and described the 5th transistor the first terminal is coupled to power supply;
The 6th transistor, the 6th transistor second terminal that has the 6th transistor the first terminal that is coupled to described the 5th transistor second terminal and be coupled to described ground terminal; With
Capacitor, second capacitor terminal that has first capacitor terminal that is coupled to described the 5th transistor second terminal and the 6th transistor the first terminal and be coupled to described transistor seconds second terminal and described ground terminal,
Wherein first inductor is different from second inductor.
8. plasma display panel as claimed in claim 7, wherein:
When described the first transistor is switched on, be applied to a plurality of electrodes from the described the 5th transistorized first voltage; And
When described transistor seconds and the 6th transistor are switched on, are applied to described first capacitor terminal from the ground voltage of described ground terminal, and are applied to a plurality of electrodes from second voltage of described second capacitor terminal.
9. plasma display panel as claimed in claim 8, wherein: described first voltage is positive voltage, and described second voltage is negative voltage.
10. plasma display panel as claimed in claim 7 also comprises: the 3rd diode has the anode that is coupled to described second capacitor terminal and is coupled to the negative electrode of described ground terminal.
11. plasma display panel as claimed in claim 7 also comprises: the 7th transistor has the 7th transistor the first terminal that is coupled to described second capacitor terminal and is coupled to the 7th transistor second terminal of described ground terminal.
12. a plasma display panel comprises:
A plurality of electrodes;
The first transistor has the first transistor second terminal that is coupled to the 5th transistorized the first transistor the first terminal and is coupled to a plurality of electrodes;
Transistor seconds has transistor seconds the first terminal and transistor seconds second terminal, and described transistor seconds the first terminal is coupled to a plurality of electrodes;
The first element group comprises the inductor, the 3rd transistor and first diode that are connected in series with random order, and first end of the wherein said first element group is coupled to a plurality of electrodes, and second end of the described first element group is arrived the ground terminal by DC coupling;
The second element group comprises the inductor, the 4th transistor and second diode that are connected in series with random order, wherein first end of the second element group be coupled to a plurality of electrodes and the second element group second end by DC coupling to described ground terminal;
The 5th transistor has the 5th transistor the first terminal and the 5th transistor second terminal, and described the 5th transistor the first terminal is coupled to power supply;
The 6th transistor has the 6th transistor the first terminal that is coupled to described the 5th transistor second terminal and the 6th transistor second terminal that is coupled to described ground terminal; With
Capacitor, second capacitor terminal that has first capacitor terminal that is coupled to described the 5th transistor second terminal and described the 6th transistor the first terminal and be coupled to described transistor seconds second terminal and described ground terminal.
13. plasma display panel as claimed in claim 12, wherein:
When described the first transistor is switched on, be applied to a plurality of electrodes from the 5th transistorized first voltage; With
When described transistor seconds and described the 6th transistor are switched on, are applied to described first capacitor terminal from the ground voltage of described ground terminal, and are applied to a plurality of electrodes from second voltage of described second capacitor terminal.
14. plasma display panel as claimed in claim 13, wherein: described first voltage is positive voltage, and described second voltage is negative voltage.
15. plasma display panel as claimed in claim 12 also comprises: the 3rd diode has the anode that is coupled to described second capacitor terminal and is coupled to the negative electrode of described ground terminal.
16. plasma display panel as claimed in claim 12 also comprises: the 7th transistor has the 7th transistor the first terminal that is coupled to described second capacitor terminal and is coupled to the 7th transistor second terminal of described ground terminal.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR0047311/01 | 2001-08-06 | ||
| KR10-2001-0047311A KR100428624B1 (en) | 2001-08-06 | 2001-08-06 | Ac plasma display panel of sustain circuit |
| KR0013573/02 | 2002-03-13 | ||
| KR10-2002-0013573A KR100454025B1 (en) | 2002-03-13 | 2002-03-13 | Plasma display panel and driving apparatus thereof and driving method thereof |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB021276560A Division CN100341039C (en) | 2001-08-06 | 2002-08-06 | Apparatus and method for driving plasma displaying plate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101013555A CN101013555A (en) | 2007-08-08 |
| CN101013555B true CN101013555B (en) | 2010-10-06 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN2007100877899A Expired - Fee Related CN101013555B (en) | 2001-08-06 | 2002-08-06 | Apparatus for and method of driving a plasma display panel |
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| Country | Link |
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| KR (1) | KR100428624B1 (en) |
| CN (1) | CN101013555B (en) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100454025B1 (en) * | 2002-03-13 | 2004-10-20 | 삼성에스디아이 주식회사 | Plasma display panel and driving apparatus thereof and driving method thereof |
| KR100538324B1 (en) * | 2001-11-28 | 2005-12-22 | 엘지전자 주식회사 | Circuit for driving electrode of plasma display panel |
| KR100450203B1 (en) * | 2002-03-05 | 2004-09-24 | 삼성에스디아이 주식회사 | Plasma display panel and driving apparatus and method thereof |
| KR100457522B1 (en) * | 2002-06-04 | 2004-11-17 | 삼성전자주식회사 | Apparatus and method for recovering energy of a plasma display panel |
| KR100612333B1 (en) | 2003-10-31 | 2006-08-16 | 삼성에스디아이 주식회사 | Plasma display device and driving apparatus and method of plasma display panel |
| KR100553906B1 (en) * | 2003-12-05 | 2006-02-24 | 삼성전자주식회사 | Apparatus for generating reset waveform of ramp type in display panel and design method thereof |
| KR100765507B1 (en) | 2006-01-06 | 2007-10-10 | 엘지전자 주식회사 | Plasm Display Apparatus |
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|---|---|---|---|---|
| US4866349A (en) * | 1986-09-25 | 1989-09-12 | The Board Of Trustees Of The University Of Illinois | Power efficient sustain drivers and address drivers for plasma panel |
| CN1125993A (en) * | 1993-07-02 | 1996-07-03 | 德国汤姆逊-布朗特公司 | Alternating current generator for controlling a plasma display screen |
| WO1999012149A1 (en) * | 1997-08-29 | 1999-03-11 | Deutsche Thomson-Brandt Gmbh | Ac voltage generator for controlling a plasma display screen |
| EP1065650A2 (en) * | 1999-06-30 | 2001-01-03 | Fujitsu Limited | Driving apparatus and method for a plasma display panel |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3241577B2 (en) * | 1995-11-24 | 2001-12-25 | 日本電気株式会社 | Display panel drive circuit |
| KR19980023076A (en) * | 1996-09-25 | 1998-07-06 | 배순훈 | PDP Power Recovery Device |
| US6150999A (en) * | 1998-10-07 | 2000-11-21 | Acer Display Technology, Inc. | Energy recovery driving circuit for driving a plasma display unit |
-
2001
- 2001-08-06 KR KR10-2001-0047311A patent/KR100428624B1/en not_active IP Right Cessation
-
2002
- 2002-08-06 CN CN2007100877899A patent/CN101013555B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4866349A (en) * | 1986-09-25 | 1989-09-12 | The Board Of Trustees Of The University Of Illinois | Power efficient sustain drivers and address drivers for plasma panel |
| CN1125993A (en) * | 1993-07-02 | 1996-07-03 | 德国汤姆逊-布朗特公司 | Alternating current generator for controlling a plasma display screen |
| WO1999012149A1 (en) * | 1997-08-29 | 1999-03-11 | Deutsche Thomson-Brandt Gmbh | Ac voltage generator for controlling a plasma display screen |
| EP1065650A2 (en) * | 1999-06-30 | 2001-01-03 | Fujitsu Limited | Driving apparatus and method for a plasma display panel |
Non-Patent Citations (1)
| Title |
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| EP 1065650 A2,说明书全文. |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20030013028A (en) | 2003-02-14 |
| CN101013555A (en) | 2007-08-08 |
| KR100428624B1 (en) | 2004-04-27 |
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