JP4399425B2 - Game machine - Google Patents

Description

  The present invention relates to a gaming machine including a light emitting element that performs a light emitting effect.

Conventionally, it is the outline of a spinning machine using a medal (so-called slot machine), a spinning machine using a game ball (so-called pachinko slot machine), and a pachinko machine that is a kind of gaming machine. The front side of the front frame and the game area of the game board are provided with decorative members composed of a number of light emitters (light emitting elements) such as light emitting diodes. This decorative member is covered with a three-dimensional cover, or has a design that mimics a motif related to a pachinko machine. By providing the decorative member on the pachinko machine, the design of the pachinko machine is improved. You can improve your attention. At the same time, the decoration member is turned on (flashing) or turned off to perform a game effect (light emission effect) based on the light emission decoration, so that the player's vision is noticed and the player's interest is enhanced. Can be improved. Specifically, the lighting of the decoration lamp is controlled with a plurality of levels of brightness (brightness and luminance), and the brightness of the gaming machine (see Patent Document 1) that performs the lighting effect is gradually changed to fade. A gaming machine that performs so-called gradation control such as in and fade-out has been proposed (see Patent Document 2).
JP 2003-52916 A (Claim 1) JP 2003-52918 A (Claim 3)

  By the way, in the light emission control of the pachinko machine of Patent Document 1, the lightness is set by specifying the length of the lighting time until the next interrupt occurrence. However, in the light emission control for designating the length of the lighting time in a plurality of stages, the lighting time is stored in advance as data for each stage, and is designated by reading out the data as needed. Therefore, as the brightness level is increased, the data capacity of the control program is increased, and the storage capacity of the ROM storing the control program is pressed.

  Similarly, in the gradation control of the pachinko machine described in Patent Document 2, the brightness is changed by switching the length of the lighting time stepwise. However, when performing control to switch the length of the lighting time step by step, the lighting time has to be specified and stored in each step. For this reason, as the number of stages increases, the control program becomes complicated and long. Therefore, it takes a lot of time to create the control program, and there is a problem that the storage capacity of the ROM storing the control program is reduced.

  The present invention has been made paying attention to such problems existing in the prior art, and an object of the present invention is to perform gradation control that reduces the data capacity and changes the brightness of the light emitting element. It is to provide a gaming machine.

In order to achieve the above object, the invention described in claim 1 includes a light emitting element that produces a light emission effect by emitting light at a plurality of brightness levels, and a light emission control unit that performs light emission control of the light emitting element. In the gaming machine, comprising a storage means for storing a plurality of types of basic value data used for determining the lightness level of the light emitting element, the light emission control means based on the basic value data stored in the storage means, A first process for calculating and setting the lightness level of the light emitting element is executed, and a second process for setting a lighting time and a light-off time according to the lightness level set in the first process is executed. The basic value data stored in the storage means includes at least an initial brightness level, which is a brightness level of the light emitting element when the light emission control is started, and when the light emission control is terminated. A final lightness stage that is the last lightness level of the light emitting element, an update period that changes the lightness stage, and a unit increase / decrease value that indicates a difference between the lightness stages when changing to the next lightness stage, There is a difference of at least a plurality of levels between the initial brightness level and the final brightness level included in the value data, and the light emission control unit is configured to execute the first process at predetermined intervals. When executing the first process, based on the basic value data stored in the storage means, the unit increase / decrease value is stepwise for each update cycle from the initial brightness stage to the final brightness stage in the first process. When the lightness level is calculated and set so as to change the lightness level one by one and the second process is executed, the lightness level specified by the first process is multiplied by a predetermined coefficient to emit light. Elementary From the predetermined period so that the total time of the determined lighting time and the turn-off time corresponding to the lightness stage specified by the first process is always a predetermined period. The gist is to calculate and set a value obtained by subtracting the lighting time determined according to the stage as the light-off time .

The invention according to claim 2 is the invention according to claim 1 , wherein a plurality of types of symbols are fluctuated when a winning detection means for executing a winning detection of a gaming ball and a winning detection of the gaming ball by the winning detection means are triggered. An effect executing means for executing a symbol variation game to be displayed, a jackpot game granting means for granting a jackpot game when a jackpot display result is displayed in the symbol variation game, and a symbol variation game at the start of the symbol variation game A jackpot determining means for determining whether or not to win, and a variation pattern determining means for determining, from a plurality of types, a variation pattern for specifying the effect time of the symbol variation game based on the determination result of the jackpot determining means. The variation pattern is associated with block data indicating a light emission mode of the light emitting element in a predetermined light emission effect period in the order of reference. Thus, the block data associated with the variation pattern is referred to in the order of reference so that the total time of the light emission effect period of the block data matches the effect time specified by the associated variation pattern. The block data is associated with one or more basic value data, and the reference order of the basic value data is set. The basic value data associated with the block data is: By referring to the reference order set in the associated block data, the total time of the light emission control period from the start to the end of the change in the lightness level specified by the basic value data is associated with the block. The data is set to a length equal to or less than the light emission effect period, and the light emission control means performs the first process when executing the first process. Until the production time specified by the variation pattern determined by the pattern determining means ends, the block data associated with the variation pattern and the block data to be referenced are identified based on the reference order identified by the variation pattern, and Until the light emission effect period specified by the specified block data ends, the basic value data to be referred to is specified and specified based on the basic value data associated with the specified block data and the reference order specified by the block data. Based on the basic value data, the brightness level is changed, and the update cycle of the basic value data can be set for each basic value data .

According to a third aspect of the present invention, in the second aspect of the present invention, the light emission control means includes a total time of a light emission control period of basic value data associated with the block data specified as the block data to be referred to. In the case where the light emission effect period of the associated block data is shorter, the basic value data associated with the block data is repeatedly referred from the beginning according to the reference order until the light emission effect period of the block data ends, The gist is to calculate and set the lightness level so as to change the lightness level .

  According to the present invention, it is possible to perform gradation control that reduces the data capacity and changes the brightness of the light emitting element.

Hereinafter, an embodiment in which the present invention is embodied in a pachinko gaming machine (hereinafter, referred to as a “pachinko machine”) that is a type of the present invention will be described with reference to FIGS.
In FIG. 1, the front side of the pachinko machine 10 is schematically shown, and a vertical rectangular middle frame 12 for setting various game components is opened and closed on the front side of the opening of the outer frame 11 that forms the outline of the machine body. And is detachably assembled. Further, on the front side of the middle frame 12, a front frame 14 and a top ball tray 15 each having a glass frame for protecting the game board 13 disposed inside the machine in a see-through manner are assembled so as to be openable and closable in a laterally open state. ing. In addition, a speaker 17 that outputs various sounds (sound effects) and performs sound effects based on the sound output is provided below the outer frame 11. A lower ball tray 18 and a launching device 19 are attached to the lower part of the middle frame 12.

  A display decoration member D with various decorations is provided in the approximate center of the game area 13a of the game board 13, and a display provided with a liquid crystal display type variable display H at the window DW of the decoration member D. A device 20 is provided.

  The display decorative member D is made of a translucent material that transmits light. In FIG. 2, on the left side of the variable display H, a rope decoration portion D1 is arranged as a display decorative member D simulating a longline. Also, on the upper side of the variable display H, a thousand box decoration part D2 as a display decorative member D imitating a thousand box is arranged. Further, on the right side of the variable display H, a lantern decoration portion D3 is arranged as a display decoration member D imitating a lantern. Further, a cloud decoration portion D4 as a display decoration member D imitating a cloud is arranged on the outer periphery of the display device 20 (outside the thousand-thousand box decoration portion D2 and the lantern decoration portion D3).

  In the variable display H, a game effect (display effect) based on a varying image (or image display) is performed. In the variable display H, a symbol combination game (symbol variation game) is displayed in which a plurality of types of symbols are varied and displayed in a plurality of columns. In the present embodiment, combinations of three columns of symbols are derived in the symbol combination game, and the types of symbols of each column forming the combination are eight types of 1-8.

  Then, the player can recognize a big hit or loss from the symbol combination finally displayed in the symbol combination game. When the symbols of all the columns displayed on the variable display H are of the same type, the big hit can be recognized from the symbol combination ([222] [777], etc.). The symbol combination that can recognize the jackpot is a jackpot symbol combination. When the jackpot symbol combination is displayed, the player is given a jackpot gaming state. On the other hand, when the symbols of all the columns displayed on the variable display H are of different types, or when the symbols of one column are different from the symbols of the other two columns, the symbol combination ([123] [122] [767] etc.) can be recognized. A symbol combination that can recognize this deviation is a symbol combination that is out of sync. Further, in the pachinko machine 10 of the present embodiment, when the symbol combination game starts (when the symbols in each column start to change), the left column (left symbol) → the right column (right symbol) → middle as viewed from the player side The symbols are displayed in the order of columns (middle symbols). When the displayed left symbol and right symbol are of the same type, the reach can be recognized from the symbol combination ([↓] indicates that the symbol is changing, such as [1 ↓ 1]). The symbol combination that can recognize this reach is the symbol combination of the reach.

  Further, below the display device 20, a start winning opening 22 including an opening / closing blade 21 that opens and closes by the operation of an actuator (solenoid, motor, etc.) (not shown) is disposed. Behind the start winning opening 22 is provided a start opening sensor SE1 (shown in FIG. 3) that detects a winning game ball. The start winning opening 22 can give a start condition for the symbol combination game in response to detection of winning of a game ball. Also, below the start winning port 22, a large winning port 24 having a large winning port door 23 that opens and closes by the operation of an actuator (solenoid, motor, etc.) (not shown) is disposed. When the big hit gaming state is given, the big winning opening 24 is opened by the opening operation of the big winning opening door 23 so that the game ball can be won, so that the player has a chance to acquire a large number of winning balls. Obtainable. In FIG. 1, cloud decoration portions D5 and D6 are arranged on the left and right sides of the start winning opening 22 as decoration members D for the game board 13 simulating clouds.

  In addition, on the front side of the front frame 14 and the game area 13 a of the game board 13, a decoration lamp 16 that is turned on (flashes) or turned off and performs a light emission effect based on the light emission decoration is provided. More specifically, the decorative lamp 16 includes a game board lamp 16 a disposed on the game board 13 and a frame lamp 16 b disposed on the front frame 14.

  First, the game board lamp 16a will be described. The game board lamp 16a is composed of a plurality of light emitting elements (in this embodiment, light emitting diodes). In the light emitting diode, the lightness (luminance) of light emission is changed according to the time when the voltage is applied. The game board lamps 16a are respectively arranged on a plurality of lamp circuit boards 25 as shown in FIG. 4, and a decorative member D is covered thereon.

  More specifically, as shown in FIG. 4, a vertically long lamp circuit board 25 a is arranged on the left side of the variable display H in the display device 20. On the lamp circuit board 25a, ropes 1a, 1c, 2a, 2c, 3a, 3c, 4a, 4c and 4b are arranged. The ropes 1a, 1c, 2a, 2c, 3a, 3c, 4a, 4c and 4b are covered with a rope decoration D1. Therefore, when the leash lamps 1a, 1c, 2a, 2c, 3a, 3c, 4a, 4c, and 4b emit light, the leash decoration portion D1 appears to emit light. The ropes 1a, 2a, 3a, 4a and 4b emit red light, and the ropes 1c, 2c, 3c and 4c emit white light. The ropes 1a, 1c, 2a, 2c, 3a, 3c, 4a, 4c, and 4b emit light in two ways of ON and OFF (that is, two ways of brightness).

  In the display device 20, a vertically long lamp circuit board 25b is arranged on the left side of the variable display H and on the right side of the lamp circuit board 25a. On the lamp circuit board 25b, the rope right side lamps 1d, 2d, 3d, and 4d are arranged. The rope right side lamps 1d, 2d, 3d, and 4d are covered with a rope decoration portion D1. Therefore, when the rope right side lamps 1d, 2d, 3d, and 4d emit light, the rope decoration portion D1 appears to emit light. The rope right lateral lamps 1d, 2d, 3d, and 4d emit red light. The rope right side lamps 1d, 2d, 3d, and 4d emit light in two ways, that is, ON and OFF (that is, the lightness is two).

  As shown in FIG. 4, the display device 20 is provided with a horizontally long lamp circuit board 25 c above the variable display H. On the lamp circuit board 25c, thousand-car box lower lamps 1p, 2p, 3p, 4p are horizontally arranged. The thousand box lower lamps 1p, 2p, 3p, 4p are covered with a thousand box decoration D2. Therefore, when the thousand-car box lower lamps 1p, 2p, 3p, and 4p emit light, the thousand-car box decoration portion D2 appears to emit light.

  In the display device 20, a horizontally long lamp circuit board 25d is disposed above the variable display H and above the lamp circuit board 25c. On the lamp circuit board 25d, thousand-car box upper lamps 1o, 2o, 3o, 4o are arranged horizontally. The thousand-yen box upper lamps 1o, 2o, 3o, and 4o are covered with a thousand-yen box decoration portion D2. Accordingly, when the thousand-yen box upper lamps 1o, 2o, 3o, and 4o emit light, it appears that the thousand-yen box decoration portion D2 emits light. The thousand-car box upper lamps 1o, 2o, 3o, 4o and the thousand-car box lower lamps 1p, 2p, 3p, 4p emit white light. The thousand box upper lamps 1o, 2o, 3o, and 4o and the thousand box lower lamps 1p, 2p, 3p, and 4p emit light in two ways, that is, ON and OFF (that is, two brightness levels).

  Further, the display device 20 is provided with a horizontally long lamp circuit board 25e that is further curved above the variable display H and above the lamp circuit board 25d. On the lamp circuit board 25e, outer peripheral upper lamps 1e, 2e, 3e, and 4e are horizontally arranged. The outer peripheral upper lamps 1e, 2e, 3e, 4e are covered with a cloud decoration portion D4. More specifically, outer peripheral upper lamps 1e, 2e, 3e, and 4e are accommodated inside the cloud decoration portion D4. Therefore, when the outer peripheral upper lamps 1e, 2e, 3e, and 4e emit light, the upper part of the cloud decoration portion D4 appears to emit light. The outer peripheral upper lamps 1e, 2e, 3e, and 4e emit red light. The outer peripheral upper lamps 1e, 2e, 3e, 4e emit light in two ways of ON and OFF (that is, two ways of brightness).

  In the display device 20, a substantially triangular lamp circuit board 25f is disposed on the right side of the variable display H. On the lamp circuit board 25f, right inner peripheral lamps 1l, 1m, 2l, 3l, 2m, 4l, 3m, 1n, 2n, 4m, 3n and 4n are arranged in a plurality of rows. The right inner peripheral lamps 1l, 1m, 2l, 3l, 2m, 4l, 3m, 1n, 2n, 4m, 3n, and 4n are substantially covered with a cloud decoration portion D4. More specifically, right inner peripheral lamps 11, 1 m, 2 l, 3 l, 2 m, 4 l, 3 m, 1 n, 2 n, 4 m, 3 n, 4 n are accommodated inside the cloud decoration portion D4. Accordingly, when the right inner peripheral lamps 1l, 1m, 2l, 3l, 2m, 4l, 3m, 1n, 2n, 4m, 3n, and 4n emit light, the right side of the cloud decoration portion D4 appears to emit light. The right inner lamps 1m, 2m, 3m, and 4m emit red light, and the right inner lamps 1l, 2l, 3l, and 4l emit green light, and the right inner lamp The lamps 1n, 2n, 3n, 4n emit blue light. Further, the right inner peripheral lamps 1l, 1m, 2l, 3l, 2m, 4l, 3m, 1n, 2n, 4m, 3n, and 4n emit light in two ways of ON and OFF (that is, two brightness levels). ing.

  A substantially lantern-shaped lamp circuit board 25g is disposed on the lamp circuit board 25f and inside the lantern decoration portion D3. In other words, the lamp circuit board 25g is disposed so as to overlap the lamp circuit board 25f. On the upper side of the lamp circuit board 25g, lantern upper lamps 1g, 2g, 3g, 4g are located, and in the center, lantern middle lamps 1i, 1j, 1k, 2i, 2j, 2k, 3i, 3j, 3k, 4i, 4j. , 4k, and lantern lower lamps 1h, 2h, 3h, and 4h are respectively disposed on the lower side thereof. Lantern upper lamps 1g, 2g, 3g, 4g, lantern middle lamps 1i, 1j, 1k, 2i, 2j, 2k, 3i, 3j, 3k, 4i, 4j, 4k, lantern lower lamps 1h, 2h, 3h, 4h Covered by the lantern decoration D3. Therefore, the lantern upper lamps 1g, 2g, 3g, 4g, the lantern middle lamps 1i, 1j, 1k, 2i, 2j, 2k, 3i, 3j, 3k, 4i, 4j, 4k, the lantern lower lamps 1h, 2h, 3h, 4h When light is emitted, the lantern decoration part D3 appears to emit light.

  The lantern upper lamps 1g, 2g, 3g, 4g and the lantern middle lamps 1i, 2i, 3i, 4i emit red light. The lantern middle lamps 1j, 2j, 3j, 4j emit green light. The lantern middle lamps 1k, 2k, 3k, and 4k and the lantern lower lamps 1h, 2h, 3h, and 4h emit blue light. Also, lantern upper lamps 1g, 2g, 3g, 4g, lantern middle lamps 1i, 1j, 1k, 2i, 2j, 2k, 3i, 3j, 3k, 4i, 4j, 4k, lantern lower lamps 1h, 2h, 3h, 4h Emits light in two ways, ON and OFF (that is, the lightness is two).

  In the display device 20, a curved lamp circuit board 25h is disposed on the right side of the variable display H and further on the right side of the lamp circuit board 25f. On the lamp circuit board 25h, outer peripheral right lamps 1f, 2f, 3f and 4f are vertically arranged. The outer peripheral right lamps 1f, 2f, 3f, 4f are covered with a cloud decoration portion D4. More specifically, the outer right lamps 1f, 2f, 3f, 4f are accommodated inside the right side of the outer periphery of the cloud decoration portion D4. Therefore, when the outer right lamps 1f, 2f, 3f, and 4f emit light, the right side of the cloud decoration portion D4 appears to emit light. The outer right lamps 1f, 2f, 3f, 4f emit red light. The outer right lamps 1f, 2f, 3f, and 4f emit light in two ways of ON and OFF (that is, the lightness is two).

  A plurality of upper gradation lamps LMPa are arranged on the lamp circuit boards 25c, 25d, and 25e disposed on the upper side of the variable display H. The upper gradation lamps LMPa are arranged in a plurality of rows horizontally. More specifically, the upper gradation lamp LMPa is the outer peripheral upper portion of the thousand-box upper lamps 1o, 2o, 3o, and 4o in the lamp circuit board 25d, the upper lower lamps 1o, 2o, 3o, and 4o in the lamp circuit board 25d. The lamps 1e, 2e, 3e, 4e are arranged in the vicinity or alternately. The upper gradation lamp LMPa is covered with the upper parts of the thousand-thousand box decoration part D2 and the cloud decoration part D4. Note that the upper gradation lamp LMPa emits light in stages (in this embodiment, it emits light with 128 lightnesses).

  A plurality of right gradation lamps LMPb are disposed on the lamp circuit boards 25f and 25h disposed on the right side of the variable display H. The right gradation lamp LMPb is arranged in a plurality of rows in the vertical direction. More specifically, the right gradation lamp LMPb includes the lantern upper lamps 1g to 4g, the lantern middle lamps 1i, 1j, 1k, 2i, 2j, 2k, 3i, 3j, 3k, 4i, 4j, 4k on the lamp circuit board 25f. The lantern lower lamps 1h to 4h and the lamp circuit board 25h are arranged in the vicinity or alternately with the outer peripheral right lamps 1f to 4f. The right gradation lamp LMPb is covered with the right part of the cloud decoration part D4. The right gradation lamp LMPb emits light in stages (in this embodiment, it emits light with 128 lightnesses).

  The game board 13 on the left side of the start winning opening 22 is provided with a substantially linear ramp circuit board 25i as shown in FIG. A plurality of lower gradation lamps LMPc are arranged on the lamp circuit board 25i. The lower gradation lamp LMPc disposed on the lamp circuit board 25i is covered with the cloud decoration portion D5. Further, on the game board 13 on the right side of the start winning opening 22, a ramp circuit board 25j having a substantially L shape as shown in FIG. 5B is arranged. A plurality of lower gradation lamps LMPc are arranged on the lamp circuit board 25j. The lower gradation lamp LMPc arranged on the lamp circuit board 25j is covered with a cloud decoration portion D6. Note that the lower gradation lamp LMPc emits light in stages (in this embodiment, it emits light with 128 lightnesses).

  Next, the frame lamp 16b will be described. The frame lamp 16b includes a plurality of light emitting elements (in the present embodiment, light emitting diodes or luminous lamps). In the light emitting diode, the lightness (luminance) of light emission is changed according to the time when the voltage is applied. As in the case of the game board lamp 16a, the frame lamp 16b is arranged on each of the plurality of lamp circuit boards 25, and the decorative member D for the front frame 14 is covered thereon. The decorative member D for the front frame 14 is made of a translucent material that transmits light.

  More specifically, a vertically long lamp circuit board (not shown) is disposed on the left side of the front frame 14. As shown in FIG. 6, a plurality of frame left lamps 1s are arranged on the lamp circuit board so as to form a plurality of columns vertically. The frame left lamp 1s is covered with a decorative member D7 for the left side of the front frame 14. Accordingly, when the frame left lamp 1s emits light, the decorative member D7 on the left side of the front frame 14 appears to emit light. The frame left lamp 1s emits white light. The frame left lamp 1s emits light in two ways of ON and OFF (that is, two ways of brightness).

  A left luminous lamp ST3 is disposed above the lamp circuit board on which the frame left lamp 1s is disposed (above the frame left lamp 1s). The left luminous lamp ST3 is also covered with a decorative member D7 for the left side of the front frame 14. Accordingly, when the left luminous lamp ST3 emits light, the upper part of the decorative member D7 on the left side of the front frame 14 appears to emit light. Note that the left luminous lamp ST3 emits light in stages (in this embodiment, it emits light with 128 lightnesses).

  Similarly, a vertically long lamp circuit board (not shown) is disposed on the right side of the front frame 14. On the lamp circuit board, a plurality of frame right lamps 3t are arranged in a plurality of rows vertically. The frame right lamp 3t is covered with a decorative member D8 for the right side of the front frame 14. Accordingly, when the frame right lamp 3t emits light, the right decorative member D8 of the front frame 14 appears to emit light. The frame right lamp 3t emits white light. Further, the frame right lamp 3t emits light in two ways of ON and OFF (that is, two ways of brightness).

  A right luminous lamp ST5 is arranged above the lamp circuit board on which the frame right lamp 3t is arranged (above the frame right lamp 3t). The right luminous lamp ST5 is also covered with the decorative member D8 for the right side of the front frame 14. Accordingly, when the right luminous lamp ST5 emits light, the upper part of the decorative member D8 on the right side of the front frame 14 appears to emit light. Note that the right luminous lamp ST5 emits light in stages (in this embodiment, it emits light with 128 brightnesses).

  A horizontally long lamp circuit board (not shown) is disposed on the upper portion of the front frame 14. On the lamp circuit board, a plurality of top lamps ST1, ST2, ST4, ST6, ST7 are arranged in a horizontal row. The top lamps ST1, ST2, ST4, ST6, ST7 are covered with the central portion of the decorative member D9 on the upper part of the front frame 14. Therefore, when the top lamps ST1, ST2, ST4, ST6, ST7 emit light, it appears that the central portion of the decorative member D9 above the front frame 14 emits light. Note that the top lamps ST1, ST2, ST4, ST6, ST7 emit light in stages (in this embodiment, light is emitted with 128 different brightness levels).

  A plurality of top lower lamps 1q arranged in a horizontal row are arranged above the front frame 14 and below the top lamps ST1, ST2, ST4, ST6, ST7. The top lower lamp 1q is covered with a decorative member D9 at the top of the front frame 14. Accordingly, when the top lower lamp 1q emits light, it appears that the decorative member D9 at the upper part of the front frame 14 emits light. The top lower lamp 1q emits white light. The top lower lamp 1q emits light in two ways of ON and OFF (that is, the lightness is two).

  A horizontally long lamp circuit board (not shown) is disposed on the front side of the upper ball tray 15. On this lamp circuit board, a plurality of rows of upper plate lamps 1v, 1w, 1x are arranged horizontally. The upper plate lamps 1v, 1w, 1x emit white light. Further, the upper plate lamps 1v, 1w, 1x emit light in two ways of ON and OFF (that is, the lightness is two).

Next, the control configuration of the pachinko machine 10 will be described with reference to FIG.
On the back side of the pachinko machine 10, a power supply board 26 that supplies a power source (for example, AC 24 V) of the game hall to various components constituting the pachinko machine 10 is mounted. A main control board 30 that controls the entire pachinko machine 10 is mounted on the back side of the pachinko machine 10. The main control board 30 executes various processes for controlling the entire pachinko machine 10, performs arithmetic processing on various control signals (control commands) for controlling the game according to the processing results, and outputs the control signals ( Control command). In addition, an overall control board 31, a display control board 32, a lamp control board 33, and a sound control board 34 are mounted on the rear side of the machine. The overall control board 31 comprehensively controls the display control board 32, the lamp control board 33, and the sound control board 34 based on the control signal (control command) output from the main control board 30. The display control board 32 controls the display mode (display images of symbols, backgrounds, characters, etc.) of the variable display H based on the control signal (control command) output from the overall control board 31. The lamp control board 33 controls the light emission mode (lighting (flashing) / lighting off timing, etc.) of the decorative lamp 16 based on the control signal (control command) output from the overall control board 31. The sound control board 34 controls the sound output mode (sound output timing, etc.) of the speaker 17 based on the control signal (control command) output from the overall control board 31.

Hereinafter, specific configurations of the power supply board 26, the main control board 30, the overall control board 31, and the display control board 32 will be described.
The power supply board 26 is provided with a power supply circuit 27 that converts the power supply of the game hall into a power supply voltage V0 (for example, DC30V) as a supply voltage to the pachinko machine 10. The control boards 30 to 34 are connected to the power supply circuit 27. The power supply circuit 27 further converts the converted power supply voltage V0 into predetermined power supply voltages V1 to V5 to be supplied corresponding to the control boards 30 to 34, and the converted power supply voltages V1 to V5. Is supplied to each control board 30-34.

  Next, the main control board 30 will be described. As shown in FIG. 3, the main control board 30 is provided with a main CPU 30a, a ROM 30b, and a RAM 30c. The main CPU 30a updates the values of various random numbers in processing executed at predetermined intervals. The ROM 30b stores a main control program for controlling the pachinko machine 10 and a plurality of types of variation patterns. The RAM 30c stores (sets) various information (random number values and the like) that are appropriately rewritten during the operation of the pachinko machine 10.

  The variation pattern is a game effect (display effect, light effect, sound effect) from when the symbol starts to change (start of the symbol combination game) to when all the symbols are displayed (the symbol combination game ends). The pattern used as the base of this is shown, and the production time of the game effect is determined at least. Further, the plurality of types of variation patterns are classified into a variation pattern for a big hit effect, a variation pattern for a loss reach effect, and a variation pattern for a loss effect.

  The jackpot effect is an effect that the symbol combination game is developed so as to finally display the symbol combination of the jackpot through the reach effect. The outlier reach effect is an effect in which the symbol combination game is developed so as to finally display the symbol combination that has gone through the reach effect. The outlier effect is an effect that the symbol combination game is developed so as to finally display the symbol combination that is out of reach without undergoing the reach effect. In the reach production, after the reach symbol combination is displayed (in this embodiment, the right symbol of the same type as the left symbol once displayed is displayed once), the jackpot symbol combination or the off symbol combination is displayed. It is an effect performed until it is stopped.

  The main CPU 30a executes various processes such as jackpot determination, final stop symbol determination to be finally displayed, and variation pattern determination based on the main control program. For example, the main CPU 30a executes a big hit determination at the start of the symbol combination game. When the determination result of the big hit determination is affirmative (in the case of a big hit), the main CPU 30a determines the final stop symbols so that all the columns are of the same type, and also determines the variation pattern from among the variation patterns for the big hit effect. .

  On the other hand, when the determination result of the big hit determination is negative (in the case of loss), the main CPU 30a executes reach determination. When the determination result of reach determination is affirmative (when the reach effect is executed), the main CPU 30a finally stops so that the symbols in the left and right columns are the same type and the symbols in the middle row are not the same type as the symbols in the left and right columns. Determine the design. At the same time, the main CPU 30a determines a variation pattern from the variation patterns for the outlier reach effect. On the other hand, when the determination result of the reach determination is negative (when the reach effect is not executed), the main CPU 30a determines the final stop symbol so that the symbols on the left and right columns are not the same type. At the same time, the main CPU 30a determines a variation pattern from the variation patterns for the offending effect.

  The main CPU 30a that has determined the variation pattern and the final stop symbol outputs a predetermined control command to the overall control board 31 (overall CPU 31a) at a predetermined timing. Specifically, the main CPU 30a first outputs a variation pattern designation command that designates a variation pattern and instructs the start of symbol variation. Next, the main CPU 30a outputs a symbol designation command for designating a final stop symbol for each column. After that, the main CPU 30a instructs a change stop based on the change time set in the specified change pattern, and outputs an all symbol stop command for ending the symbol combination game.

  Next, the overall control board 31 will be described. The overall control board 31 is provided with an overall CPU 31a as shown in FIG. The overall CPU 31a sequentially updates the values of various random numbers in processing executed at predetermined intervals. Further, a ROM 31b and a RAM 31c are connected to the overall CPU 31a. The ROM 31b stores an overall control program for overall control of the control boards 32-34. The RAM 31c stores (sets) various information that can be appropriately rewritten during the operation of the pachinko machine 10.

  When a predetermined control command is input from the main CPU 30a at a predetermined timing, the overall CPU 31a outputs a predetermined control command at a predetermined timing accordingly. More specifically, when the general CPU 31a inputs a variation pattern designation command, the overall CPU 31a outputs the variation pattern designation command to each of the control boards 32-34. In addition, when the overall CPU 31 a inputs a symbol designation command or an all symbol stop command, the overall CPU 31 a outputs each command to the display control board 32.

Next, the display control board 32 will be described.
As shown in FIG. 3, the display control board 32 includes a sub CPU 32a, and a ROM 32b and a RAM 32c are connected to the sub CPU 32a. The ROM 32b stores a display control program for controlling the display content of the variable display H. The RAM 32c stores (sets) various information that can be appropriately rewritten during the operation of the pachinko machine 10.

  When the sub CPU 32a receives a control command from the overall control board 31 (overall CPU 31a), the sub CPU 32a performs control according to the input control command based on the display control program. Specifically, when the sub CPU 32a inputs the variation pattern designation command, the variable display H is configured so that the symbol combination game is started based on the variation pattern designated by the variation pattern designation command and the symbol combination game is started. Control display content. When the sub CPU 32a inputs the all symbol stop command, the sub CPU 32a controls the display content of the variable display H so that the symbol combination designated by the input symbol designation command is displayed on the variable display H. By this control, the symbol combination game is performed on the variable display H.

Next, the voice control board 34 will be described.
As shown in FIG. 3, the audio control board 34 includes a sub CPU 34a, and a ROM 34b and a RAM 34c are connected to the sub CPU 34a. The ROM 34b stores a voice control program and the like for controlling the contents of voice presentation by the speaker 17. The RAM 34c stores (sets) various information that can be appropriately rewritten during the operation of the pachinko machine 10.

  When the sub CPU 34a receives a control command from the overall control board 31 (overall CPU 31a), the sub CPU 34a performs control according to the input control command based on the voice control program. Specifically, the sub CPU 34 a controls the audio output content by the speaker 17 in accordance with the display content of the variable display H.

Next, the lamp control board 33 will be described.
As shown in FIG. 3, the lamp control board 33 includes a sub CPU 33a, and a ROM 33b and a RAM 33c as storage means are connected to the sub CPU 33a. The ROM 33b stores a light emission control program for performing light emission control. The RAM 33c stores (sets) various pieces of information (for example, measurement values used for measuring the interrupt period) that are appropriately rewritten during the operation of the pachinko machine 10. Based on the light emission control program, the sub CPU 33a controls the light emission mode of the decorative lamp 16 so that the light emission effect corresponding to the input control signal (control command) is performed. Therefore, the sub CPU 33a of this embodiment serves as a light emission control unit.

  Further, as shown in FIG. 7, the sub CPU 33a is connected to the output port 33d. When the light emission mode of the decoration lamp 16 is controlled, ON data or OFF data is input to the output port 33d. Yes. The output port 33d is connected to one end of each decorative lamp 16 (light emitting diode) via a switch 33e and the like. The other end of each decorative lamp 16 (light emitting diode) is supplied with a power supply voltage from a power supply circuit 27 of the power supply board 26. The sub CPU 33a outputs ON data to the switch 33e via the output port 33d, whereby the switch 33e is switched and one end of the decoration lamp 16 is grounded. As a result, a current flows through the decorative lamp 16, and the decorative lamp 16 is turned on.

  The lamp control board 33 is provided with a frequency oscillator (for example, a crystal oscillator) 40 as a frequency oscillating means, and is connected to the sub CPU 33a. The frequency oscillator 40 outputs an external clock signal having a predetermined frequency (for example, a frequency of 20 MHz) to the sub CPU 33a. The sub CPU 33a has a frequency dividing circuit (not shown) internally, and inputs an external clock signal input from the frequency oscillator 40 via the frequency dividing circuit. The frequency divider circuit divides the frequency of the external clock signal by half to generate a reference clock signal, and inputs the reference clock signal to the sub CPU 33a. That is, when the sub CPU 33a receives an external clock signal having a frequency of 20 MHz from the frequency oscillator 40 via the frequency dividing circuit, the sub CPU 33a inputs a reference clock signal having a frequency of 10 MHz.

  Then, the sub CPU 33a further divides the frequency of the input reference clock signal by 1/16 to generate an internal clock signal (reference signal). The sub CPU 33a adds 1 to the measured value for each period of the internal clock signal. Then, when the measured value reaches a predetermined value, the sub CPU 33a executes various processes on the assumption that one interrupt cycle has elapsed. That is, the sub CPU 33a assumes that the interrupt cycle has elapsed when it has measured that the cycle of the internal clock signal has elapsed.

  Specifically, the cycle of the internal clock signal obtained by dividing the frequency of the 10 MHz reference clock signal by 1/16 is 1.6 μs (1.6 microseconds). For this reason, the sub CPU 33a adds 1 to the measured value every 1.6 μs, and executes various processes for causing the decorative lamp 16 to emit light when the interrupt period has elapsed when the measured value reaches a predetermined value. It is like that.

  In the present embodiment, the sub CPU 33a performs a light emission control main process for performing processing such as a fixed time interval process (first process) for determining the brightness level of the decorative lamp 16 and a control command input based on the light emission control program. It is supposed to run. The execution cycle of the light emission control main process is fixed, and is executed every 2 ms in the present embodiment.

  A timer counter (not shown) is provided in the sub CPU 33a. This timer counter is adapted to receive an internal clock signal generated by the sub CPU 33a. When the internal clock signal corresponding to the count value (or time) set by the sub CPU 33a is input, the timer counter outputs an interrupt signal to the sub CPU 33a. When the interrupt signal is input, the sub CPU 33a executes a variable interval process (second process) for controlling the lighting time and the extinguishing time separately from the above-described regular interval process. The execution interval of the variable interval process is different from the regular interval process in which the execution interval is fixed, and is within a predetermined interval (25.6 μs in this embodiment) and within a predetermined range (25.6 in this embodiment). (Within the range of ˜3276.8 μs).

Hereinafter, various processes executed by the sub CPU 33a will be described in detail.
If the sub CPU 33a determines that a control command (a variation pattern designation command, a demo command, a big hit effect opening command, an ending command, or the like) is input from the overall control board 31 (overall CPU 31a) in the main process of emission control, the emission control is performed. The basic value setting process related to the initial setting for execution is executed. When the sub CPU 33a executes the basic value setting process, as shown in FIG. 8, an initial setting flag indicating whether or not the basic value setting process has been executed is set (a value of “1” is set). ) Is determined (step S1). The initial setting flag indicates that the basic value setting process has already been performed when “1” is set, and the basic value setting process is still performed when “0” is set. Indicates not done.

  When the determination result of step S1 is negative (when the initial setting flag is not set), the sub CPU 33a determines the maximum value of the lightness level of the decorative lamp 16 that emits gradation light (in this embodiment, “ 128 ") is set (step S2). In the present embodiment, the gradation light emission lamps are the upper gradation lamp LMPa, the right gradation lamp LMPb, the lower gradation lamp LMPc, the top lamps ST1, ST2, ST4, ST6, ST7, the left luminance lamp ST3, and the right luminance. This is the lamp ST5. By the processing in step S2, these decorative lamps 16 can emit light with 128 levels of brightness.

  Next, the sub CPU 33a sets OFF data instructing to turn off the lights to all the decoration lamps 16 (step S3). As a result, the decoration lamp 16 is temporarily turned off. Then, the sub CPU 33a sets “0” in the effect timer for measuring the light emission effect period (step S4). The light emission effect period is, for example, a game effect effect time designated by a change pattern designation command, a demo command, or the like, which is classified for each predetermined period. Next, the sub CPU 33a sets “0” to a basic value setting timer for measuring a light emission control period for performing light emission control (step S5). In the light emission control period, the light emission effect period is further classified for each predetermined period.

  Then, the sub CPU 33a sets “0” to the continuous remaining timer indicating the remaining time until the next brightness level is calculated in the regular interval processing (step S6). Thereafter, the sub CPU 33a sets gradation light emission pattern data indicating the gradation light emission pattern of the decorative lamp 16 in accordance with the input control command (step S7). There are a plurality of types of gradation light emission pattern data. As shown in FIG. 9, the gradation light emission pattern data is stored in the ROM 33b in association with a variation pattern designated by a variation pattern designation command, a demo pattern designated by a demo command, or the like. ing.

  Next, the sub CPU 33a sets “1” to the initial setting flag (step S8), and ends the basic value setting process. The effect timer, the basic value setting timer, the remaining continuation timer, the light emission pattern data, and the initial setting flag are set in a predetermined storage area of the RAM 33c.

  Next, the regular time interval process in the light emission control main process will be described with reference to FIGS. The regular time interval process is executed every time the light emission control main process is performed. That is, the sub CPU 33a is executed every time the measured value of the internal clock signal becomes a predetermined value (“1250” in the present embodiment) (every 2 ms).

  Sub CPU33a will determine whether the value of an effect timer is "0", if a fixed time interval process is performed (step S11). That is, the sub CPU 33a determines whether or not it is the start time of the light emission effect period. When the determination result of step S11 is affirmative (when the production timer = “0”), the sub CPU 33a updates the block data address (step S12). Specifically, the sub CPU 33a refers to the gradation light emission pattern data set in the RAM 33c in the basic value setting process. As shown in FIG. 12, the gradation light emission pattern data includes a plurality of block data indicating the length of each light emission effect period (time set in the effect timer) and the content of the gradation light emission pattern in each light emission effect period. The designated block data addresses are related in order from the start of the game effect. Then, the sub CPU 33a refers to the gradation light emission pattern data and acquires block data addresses in order from the beginning.

  The block data address indicates the address of the block data in the ROM 33b. In addition, as shown in FIG. 13, the block data stores basic value data addresses of basic value data indicating specific contents of light emission control in each light emission control period in order from the start of the light emission effect period.

  Then, based on the updated block data address value, the sub CPU 33a rewrites the contents of the RAM 33c so as to set the light emission effect period associated with the block data address in the effect timer (step S13). Then, the sub CPU 33a subtracts “1” from the value of the effect timer (step S14).

  Next, the sub CPU 33a determines whether or not the value of the basic value setting timer is “0” (step S15). That is, the sub CPU 33a determines whether or not it is the start time of the light emission control period. When the determination result of step S15 is affirmative (when the basic value setting timer is “0”), the sub CPU 33a refers to the block data and stores basic value data indicating the specific contents of the light emission control in each light emission control period. The basic value data address is updated (step S16).

  Each basic value data address indicates an address of basic value data in the ROM 33b. As shown in FIG. 14, the basic value data includes ON data indicating the decoration lamp 16 that emits gradation light, an initial lightness level indicating the lightness level at the start of the light emission control period, and an end lightness indicating the lightness level at the end of the light emission control period. A unit increase / decrease value that determines a difference between a stage and a brightness stage, an update period that is a period for calculating the brightness stage, and a basic value setting timer that indicates a light emission control period are associated. That is, in the basic value data, the length of the light emission control period, the function parameters for determining the brightness level of the decorative lamp 16, the calculation conditions, and the like are stored in the light emission control period. The unit increase / decrease value may be either a positive number or a negative number. The basic value data is stored in the ROM 33b. In the block data of this embodiment, as shown in FIG. 13, basic value data addresses are stored in order from the start of the light emission effect period.

  By the way, in the block data, the total value of the basic value setting timer values stored in all the basic value data constituting the block data (that is, the total value of the light emission control period) is shorter than the light emission effect period. There is a case. Specifically, in the present embodiment, the value (390 ms) of the basic value setting timer of the basic value data P3 constituting the changing block data is the light emission effect related to the block data address designating the block data. It is shorter than the period value (10920 ms). In this case, the sub CPU 33a repeatedly updates in order from the basic value data address stored at the beginning of the block data until the light emission control period ends (until the effect timer value becomes “0”). ing. That is, in the present embodiment, the basic value data P3 is repeatedly set during fluctuation.

  Then, the sub CPU 33a that has updated the basic value data address identifies the basic value data based on the value of the basic value data address, refers to the basic value data, and determines the ON data, the initial lightness level, the final lightness level, the unit The increase / decrease value, update cycle, and basic value setting timer value are set in the RAM 33c (step S17). Then, the sub CPU 33a sets the initial brightness level to the current value indicating the current brightness level (step S18). That is, the sub CPU 33a sets the initial brightness level as the current value at the start of the light emission control period. Then, the sub CPU 33a subtracts “1” from the basic value setting timer (step S19).

  Next, the sub CPU 33a determines whether or not the remaining continuation timer is “0” (step S20). That is, the sub CPU 33a determines whether to calculate the brightness level of the decorative lamp 16. When the determination result of step S20 is affirmative (when the continuous remaining timer = “0”), the sub CPU 33a determines whether or not the current value is in the final brightness level (step S21). If the determination result in step S21 is negative (if the current value is not the final brightness level), the sub CPU 33a sets a value obtained by adding the unit increase / decrease value to the current value as a new current value (step S22). That is, a new current value is set based on the function (K1).

Y = F + C (K1)
Where Y: current value, F: current value calculated in the previously executed regular interval processing (however, the initial brightness level at the start of the light emission control period), C: unit increase / decrease value, and the sub CPU 33a The update cycle set in step S17 is set in the timer (step S23). Thereafter, the sub CPU 33a subtracts “1” from the remaining continuation timer (step S24), and ends the regular interval processing. That is, the sub CPU 33a executes the processing from step S20 to step S24, so that the lightness stage calculated based on the function (K1) predetermined for each update cycle is changed to the final lightness stage during the light emission control period. Until then, new brightness levels are calculated step by step from the initial brightness level, and the calculated brightness level is set as the current value. Note that the function (K1) is given the initial brightness level as a parameter at the start of the light emission control period after the basic value setting process is executed, and thereafter, the current value calculated in the previous regular interval process is used as a parameter. Given.

  On the other hand, when the determination result of step S11 is negative (when the production timer is not 0), the sub CPU 33a proceeds to the process of step S14. If the determination result of step S15 is negative (if the basic value setting timer is not 0), the sub CPU 33a proceeds to the process of step S19. If the determination result of step S20 is negative, the sub CPU 33a proceeds to the process of step S24. Further, when the determination result of step S21 is affirmative (when the current output value is in the final brightness stage), the sub CPU 33a ends the regular interval processing as it is.

  Next, the variable interval process for controlling the lighting time and the lighting time will be described with reference to FIG. This variable interval process is executed when an interrupt signal is input from the timer counter. In the initial setting at the time of power-on, a predetermined interrupt time (4.8 μs in this embodiment) is set in the timer counter.

  When executing the variable interval process, the sub CPU 33a determines whether or not the ON / OFF flag indicating whether or not the decorative lamp 16 that has been determined to emit gradation light by applying a voltage is set to ON is set. (Step S31). The ON / OFF flag is stored in a predetermined storage area of the RAM 33c. If the value of the ON / OFF flag is “1”, ON is set, and if it is “0”, OFF is set. It will be set.

  When the determination result in step S31 is affirmative (when the value of the ON / OFF flag is “1”), the sub CPU 33a sends ON data to the decoration lamp 16 that is determined to emit gradation light in the regular interval processing. Output to the output port (step S32). As a result, a voltage is applied from the power supply substrate 26 to the decorative lamp 16 determined to emit gradation light in the regular interval processing until the OFF data is output.

  Then, the sub CPU 33a determines whether or not the current value is the lightness maximum value (“128” in the present embodiment) (step S33). When the determination result in step S33 is negative (when the current value is not the maximum brightness value), the sub CPU 33a determines the maximum brightness value as the period from the execution time of the next variable interval process to the execution time of the next variable interval process. Then, a value obtained by subtracting the current value from the predetermined coefficient M and unit time is calculated, and set in the timer counter (step S34). Note that the unit time in the present embodiment is the period “1.6 μs” of the internal clock signal. Specifically, the sub CPU 33a calculates a period from the execution time of the next variable interval process to the execution time of the next variable interval process by the function (K2).

T3 = (L1-Y) × M × T0 (K2)
However, T3: Light-off time, T0: Unit time (1.6 μs), M: Coefficient (16 in the present embodiment), L1: Brightness maximum value, Y: Current value.

  That is, when the lighting control is started in the variable interval process, the sub CPU 33a calculates the time for starting the lighting control next (the time for executing the variable interval process for outputting ON data) in the process of step S34. In other words, the sub CPU 33a calculates the next turn-off time (time until the next turn-on control is started) when the turn-on control is started in the variable interval process. When the period is set in step S34, the timer counter temporarily stores it. After the currently measured period (lighting time) ends and outputs an interrupt signal, the timer counter outputs the period (lighting time). Measurement is started.

  In this embodiment, since the interrupt cycle is measured by measuring the input cycle (1.6 μs) of the internal clock signal, the timer counter adds the coefficient M to the value obtained by subtracting the current value from the maximum brightness value. When the input of the internal clock signal corresponding to the number of times corresponding to the multiplied value is measured, an interrupt signal is output to the sub CPU 33a. Thereafter, the sub CPU 33a sets “0” in the ON / OFF flag (step S35), and ends the variable interval process. That is, the sub CPU 33a sets the ON / OFF flag to OFF and ends. Further, every time the brightness level (current value) set in the regular interval process is different by one level, the next turn-off time calculated by the sub CPU 33a in the variable interval process (the variable interval process in the case of performing the next lighting control). (Execution timing at the time of execution) is set so that a difference of a predetermined interval is generated. This difference is obtained by multiplying the unit time T0 (input period (1.6 μs)) by the coefficient M as indicated by the function (K2).

  On the other hand, when the determination result in step S33 is affirmative (when the current value is the maximum brightness value), the sub CPU 33a determines the unit from the execution time of the next variable interval process to the execution time of the next variable interval process. A value obtained by multiplying the time by the lightness maximum value “128” and the coefficient M is set (step S36), and the variable interval process is terminated as it is. Here, since the ON / OFF flag is not set, the sub CPU 33a newly sets a turn-off time when the lighting control is started by the variable interval process and the current value is the maximum brightness value. Without this, the lighting time is set continuously. That is, when the current value reaches the maximum brightness value, the sub CPU 33a continues to turn on the decorative lamp 16 without turning it off.

  On the other hand, when the determination result of step S31 is negative (when the ON / OFF flag is not set to ON), the sub CPU 33a outputs OFF data for the decoration lamp 16 determined to emit gradation light in the regular interval processing. Is continuously output (step S37). As a result, application of voltage is stopped until the ON data is output to the decorative lamp 16 determined to emit gradation light in the regular interval processing.

  Next, the sub CPU 33a determines whether or not the current value is the lightness minimum value (ie, “0”) at the lightness stage (step S38). When the determination result in step S38 is negative (when the current value is not the lightness minimum value), the sub CPU 33a determines the lightness maximum value as the period from the execution time of the next variable interval process to the execution time of the next variable interval process. Is multiplied by the unit time and a predetermined coefficient M, and is set in the timer counter (step S39).

Specifically, the sub CPU 33a calculates a period from the execution time of the next variable interval process to the execution time of the next variable interval process by the function (K3).
T2 = Y × T0 × M (K3)
Here, T2: lighting time, T0: unit time (1.6 μs), M: coefficient (16 in this embodiment), Y: current value.

  That is, when the turn-off control is started in the variable interval process, the sub CPU 33a calculates the time for starting the turn-off control next (the time for executing the variable interval process for outputting OFF data) in the process of step S39. In other words, the sub CPU 33a calculates the next lighting time (time until the next lighting control is started) when the lighting control is started in the variable interval process. When the period is set in step S39, the timer counter temporarily stores it, and after the period currently being measured (light extinction time) ends and outputs an interrupt signal, the timer counter outputs the period (lighting time). Measurement is started.

  In this embodiment, since the interrupt cycle is measured by measuring the input cycle (1.6 μs) of the internal clock signal, the timer counter corresponds to a value obtained by multiplying the maximum brightness value by a predetermined coefficient M. When the input of the internal clock signal for the number of times to be measured is measured, an interrupt signal is output to the sub CPU 33a. Thereafter, the sub CPU 33a sets “1” to the ON / OFF flag (step S40), and ends the variable interval process. That is, the sub CPU 33a sets ON / OFF flag to ON and ends. Further, every time the brightness level (current value) set in the regular interval process is different by one level, the next lighting time calculated by the sub CPU 33a in the variable interval process (the variable interval process in the case of performing the next extinction control). (Execution timing at the time of execution) is set so that a difference of a predetermined interval is generated. This difference is obtained by multiplying the unit time T0 (input period (1.6 μs)) by the coefficient M as indicated by the function (K3).

  On the other hand, when the determination result in step S38 is affirmative (when the current value is the lightness minimum value), the sub CPU 33a determines the period from the execution of the next variable interval process to the execution of the next variable interval process. A value obtained by multiplying the unit time by the lightness maximum value is set (step S37). Here, since the ON / OFF flag is not set, the sub CPU 33a newly sets the lighting time when the turn-off control is started by the variable interval process and the current value is the lightness minimum value. Without this, the lighting time is set continuously. That is, when the current value reaches the lightness minimum value, the sub CPU 33a continues to turn off the decoration lamp 16 without turning it on thereafter. Further, since the current value can be kept on when the brightness value is set to the maximum value (“128”) and kept off when the brightness value is set to the minimum value (“0”), the brightness can be turned on and off in two stages. Light emission similar to light emission can be performed.

  Next, a process for controlling the decorative lamp 16 that does not emit gradation light (brightness is ON / OFF in two stages) will be described. In the light emission control main process, when the sub CPU 33a inputs a control command from the overall CPU 31a, the sub CPU 33a determines a normal light emission pattern corresponding to the control command.

  As shown in FIGS. 16 to 19, the normal light emission pattern indicates ON / OFF for each decorative lamp 16 that does not emit gradation light, and the sub CPU 33 a performs each decorative lamp 16 based on the normal light emission pattern. Is controlled so as to apply a voltage (outputs ON data and OFF data). In the present embodiment, the normal light emission pattern is determined for each predetermined period in each light emission effect period, and the voltage is applied or stopped every time the period elapses. In addition, ON / OFF switching is performed every predetermined period in the normal light emission pattern.

  16 and 17 show normal light emission patterns in the light emission control period at the start of fluctuation, and FIGS. 18 and 19 show normal light emission patterns in the light emission control period at the reach effect. At the time of reach production, there are many decorative lamps 16 that emit light compared with the case of normal fluctuation (in the case of off-stage production), and the flash is generally flashed to improve the interest.

  Next, an operation when the decorative lamp 16 is caused to emit light by the above-described regular interval processing and variable interval processing will be described. In the following description, it is assumed that the game ball has won the start winning opening 22 and the main CPU 30a has determined the variation pattern for the offending effect without the reach effect.

  When the main CPU 30a determines the variation pattern for the offending effect, the main CPU 30a outputs a variation pattern designation command to the overall control board 31 (overall CPU 31a). When the central CPU 31a inputs the variation pattern designation command, the overall CPU 31a outputs the variation pattern designation command to each of the control boards 32-34.

  When the sub CPU 33a of the lamp control board 33 receives the change pattern designation command, it executes a basic value setting process of the light emission control main process and initializes various values of the RAM 33c. In step S7 of the basic value setting process, the sub CPU 33a sets the gradation light emission pattern data T1 (see FIG. 12) corresponding to the variation pattern for the off effect in the RAM 33c based on the premise.

  Thereafter, the sub CPU 33a executes a regular interval process. In step S11 of this regular interval process, the effect timer is set to “0” by the basic value setting process, and therefore the sub CPU 33a subsequently executes step S12. In step S12, the sub CPU 33a refers to the gradation light emission pattern data T1 shown in FIG. 12, and acquires the first block data address among the block data addresses specified by the gradation light emission pattern data T1. The block data address indicates the block data in the light emission control period at the start of fluctuation as shown in FIG. In step S13, the sub CPU 33a sets the light emission effect period (1020 ms) associated with the acquired block data address in the effect timer.

  Thereafter, in step S15, the sub CPU 33a determines whether or not the value of the basic value setting timer is “0”. Since the basic value setting timer is set to “0” by the basic value setting process, the sub CPU 33a executes the process of step S16 and updates the basic value data address with reference to the block data. At this time, the sub CPU 33a obtains the first basic value data address (address indicating the basic value data P1) among the basic value data addresses included in the block data shown in FIG.

  Then, the process of step S17 is executed, and the sub CPU 33a specifies the basic value data P1 based on the acquired basic value data address, and the ON data, initial lightness stage, final lightness stage, unit increase / decrease value, update cycle, The value of the basic value setting timer is set in the RAM 33c. Specifically, as shown in FIG. 14, the sub CPU 33a sets an upper gradation lamp LMP, a right gradation lamp LMPb, and a lower gradation lamp LMPc as ON data output targets. Further, the sub CPU 33a sets “16” as the initial lightness stage, “50” as the final lightness stage, “2” as the unit increase / decrease value, and “16 ms (8 interrupts)” as the update period for setting the basic value. “360 ms” is set as the timer value. In step S18, the sub CPU 33a sets the initial brightness level as the current value.

  Thereafter, the sub CPU 33a determines whether or not the continuation remaining timer is “0” in step S20. Since the continuation remaining timer is set to “0” by the basic value setting process, the sub CPU 33a executes the process of step S21 to determine whether or not the current value is in the final brightness level. Here, since the current value is in the initial lightness level by the process in step S18, the sub CPU 33a executes the process in step S22 to set the unit increase / decrease value “2” to the current value (initial lightness stage) based on the function (K1). Is added as a new current value. The sub CPU 33a that has set the current value executes the process of step S23, and sets the update cycle “16 ms (8 interrupts)” in the continuous remaining timer. Thereafter, the sub CPU 33a executes the process of step S24, and subtracts 2 ms (1 interrupt) from the continuous remaining timer. Then, the sub CPU 33a ends the regular interval process.

  On the other hand, every time an interrupt signal is input from the timer counter, the sub CPU 33a executes variable interval processing. In step S34 of this variable interval process, since “18” is set as the current value, the sub CPU 33a performs the upper gradation lamp LMP, the right gradation lamp LMPb, and the lower gradation as shown in FIG. The extinguishing time for stopping the application of voltage to the lamp LMPc is 2816 μs. In step S39 of this variable interval process, the sub CPU 33a sets the lighting time for applying voltages to the upper gradation lamp LMPa, the right gradation lamp LMPb, and the lower gradation lamp LMPc to 460.8 μs. Thus, as shown in FIG. 21, the 2816 μs lighting time and 460.8 μs lighting time are alternately repeated until 16 ms (update period) has elapsed from the start of the light emission control period. Note that FIG. 20 is shown for ease of understanding, and in actual processing, it is calculated each time based on the functions K2 and K3 described above. That is, the table shown in FIG. 20 is not stored in the ROM 33b.

  After the elapse of 16 ms from the start of the light emission control period, the sub CPU 33a executes the processing of step S21 and step S22 because the continuation remaining timer is “0” in the processing of step S20 when the regular interval processing is executed. As a result, the current value is updated using the value “20” obtained by adding the unit increase / decrease value “2” to the current value “18” as the new current value. After the current value is updated, in step S34 of the variable interval process that is first executed, the sub CPU 33a sets “20” to the current value, so as shown in FIG. The turn-off time for stopping the application of voltage to the right gradation lamp LMPb and the lower gradation lamp LMPc is 2764.8 μs. In step S39 of the variable interval process, the sub CPU 33a sets the lighting time for applying voltages to the upper gradation lamp LMPa, the right gradation lamp LMPb, and the lower gradation lamp LMPc to 512 μs. As a result, as shown in FIG. 21, the lighting time of 2764.8 μs and the light-off time of 512 μs are alternately repeated until 16 ms (update period) elapses after the current value is updated. Thereafter, the current value is updated every time 16 ms elapses, and the lighting time and extinguishing time are updated with the update.

  That is, as shown in FIG. 20, the time for applying the voltage stepwise increases every update cycle (16 ms), and the time for stopping the voltage application stepwise decreases accordingly. As a result, the brightness of the upper gradation lamp LMP, the right gradation lamp LMPb, and the lower gradation lamp LMPc increases stepwise. Thereafter, the voltage application time is increased stepwise until the current value reaches the final brightness level. In the present embodiment, the current value reaches the final brightness stage before the light emission control period ends. In this case, the voltage is continuously applied until the light emission control period ends, and the light is turned on. Thereby, gradation light emission can be seen more clearly and clearly.

  When the regular interval processing is executed after the light emission control period ends, the sub CPU 33a determines that the value of the basic value setting timer is “0” in step S15 of the regular interval processing. Then, the sub CPU 33a executes the process of step S16 and updates the basic value data address with reference to the block data. At this time, the sub CPU 33a obtains the second basic value data address (basic value data address indicating the basic value data P2) among the basic value data addresses included in the block data shown in FIG.

  Then, the processing of step S17 is executed, and the sub CPU 33a specifies the basic value data P2 based on the acquired basic value data address, and the ON data, the initial brightness level, the final brightness level, the unit increase / decrease value, the update cycle, The value of the basic value setting timer is set in the RAM 33c. Specifically, the sub CPU 33a sets an upper gradation lamp LMPa and a lower gradation lamp LMPc as ON data output targets as shown in FIG. Further, the sub CPU 33a sets “61” as the initial lightness stage, “126” as the final lightness stage, “2” as the unit increase / decrease value, and “20 ms (10 interrupts)” as the update period, for setting the basic value. “660 ms” is set as the timer value. Note that the current value remains the value set in the previous variable interval process until the initial brightness level is set in the current variable interval process. Thereafter, as described above, the sub CPU 33a executes the processing after step S20 and the variable interval processing to cause the upper gradation lamp LMPa and the lower gradation lamp LMPc to emit light in gradation. The sub CPU 33a repeatedly executes the above control until the light emission effect period ends.

  When the regular interval process is executed after the light emission effect period ends, the sub CPU 33a determines that the value of the effect timer is “0” in step S11 of the regular interval process, and in step S12, the block data address is set. Update the value. At this time, the sub CPU 33a refers to the gradation light emission pattern data T1 shown in FIG. 12, and among the block data addresses specified by the gradation light emission pattern data T1, the second block data address (the block data being changed). Address). The block data address indicates the block data in the light emission control period during the fluctuation shown in FIG. In step S13, the sub CPU 33a sets the light emission effect period (10920 ms) associated with the acquired block data address in the effect timer.

  In step S15, the sub CPU 33a determines whether or not the value of the basic value setting timer is “0”. Since the basic value setting timer is set to “0” at the end of the light emission control period, the sub CPU 33a executes the process of step S16 and updates the basic value data address with reference to the block data. At this time, the sub CPU 33a acquires the first basic value data address (the address indicating the basic value data P3 shown in FIG. 14) among the basic value data addresses included in the block data shown in FIG. 13B. Thereafter, as described above, the sub CPU 33a executes the processing after step S17 and the variable interval processing as described above to cause the right gradation lamp LMPb to emit gradation.

  Thereafter, when the light emission control period ends and the value of the basic value setting timer becomes “0”, the sub CPU 33a determines that the basic value setting timer is “0” at the time of execution of step S15 of the regular interval processing. Then, the process of step S16 is executed. At this time, as shown in FIG. 13B, the changing block data address has only the basic value data address indicating the basic value data P3, so the sub CPU 33a again displays the basic value data indicating the basic value data P3. Get the address. That is, the sub CPU 33a sequentially acquires the basic value data addresses included in the block data, and sets the basic value data addresses to the end before the light emission effect period ends (before the effect timer becomes “0”). If they have been acquired, the addresses are acquired again in order from the first basic value data address. Thereafter, similar processing is executed, and the sub CPU 33a causes the right gradation lamp LMPb to emit light in gradation. As described above, when the basic value data address is acquired to the end before the light emission effect period ends (before the effect timer becomes “0”), the basic value data address is acquired again in order from the first basic value data address. Since the same light emission pattern is repeated, the data capacity of the basic value data can be reduced. In addition, the block data used in another light emission effect period with a short light emission effect period can be used as it is. For this reason, it is possible to reduce the time and effort required to develop a program and to reduce the data capacity.

As described above in detail, the present embodiment has the following effects.
(1) The sub CPU 33a is based on a function (K1) given parameters stored in the ROM 33b (in this embodiment, the initial brightness level and the unit increase / decrease value stored in the ROM 33b and temporarily stored in the RAM 33c). The current value is calculated as the brightness level. In the variable interval processing, the sub CPU 33a sets the lighting time and the extinguishing time based on the current value (lightness level), and therefore stores all the lightness levels every time to determine the light emission mode. The number of items to be memorized can be reduced as compared with. That is, the storage capacity of the ROM 33b can be reduced. In particular, the decorative lamp 16 often repeats a predetermined light emission mode as compared with the display content of the variable display H, and the pachinko machine 10 often repeats the same light emission mode in a different order. For this reason, since various light emission modes can be reproduced by expressing the light emission mode as a function and storing the minimum parameters, the amount of data can be effectively reduced.

  (2) The brightness level is calculated step by step from the initial brightness level to the final brightness level. For this reason, compared with the case where a plurality of lightness levels are stored, it is only necessary to store two lightness levels, so that the data capacity stored in the ROM 33b can be reduced. Further, since the brightness level is calculated step by step, gradation light emission can be easily executed.

  (3) A periodic interval process is executed in the update cycle stored in the ROM 33b to calculate a new current value (lightness level). Thus, even when the same interval processing is executed, that is, even if the unit increase / decrease value and the initial lightness stage numerical value are the same, the light emission mode can be changed only by changing the update cycle for executing the fixed interval processing. Can be different. For example, if the update cycle is made earlier, the gradation light emission can be changed quickly, and an effect can be made that inspires the player's excitement. On the other hand, if the update cycle is delayed, the gradation light emission can be changed later, and the player can be calmed down. For this reason, even if the data amount is reduced as compared with the case where all the lightness levels are stored every time, various effects can be produced in different light emission modes.

  (4) A unit increase / decrease value that determines at least a difference in brightness level is stored as a parameter given to a predetermined function (K1). Thereby, a light emission mode can be changed only by changing the unit increase / decrease value. That is, if the unit increase / decrease value is increased, the change per unit time can be increased, while if the unit increase / decrease value is decreased, the change can be decreased. Therefore, even if the amount of data is reduced compared to the case where all the brightness levels are stored, various effects can be produced with different light emission modes.

  (5) In the variable interval processing, the sub CPU 33a changes the brightness level of the decoration lamp 16 by distributing a predetermined processing time (3276.8 μs) to the lighting time and the lighting time according to the current value. For this reason, the brightness level can be controlled only by the control by the sub CPU 33a, and can be easily changed as compared with the case where the brightness level of the decorative lamp 16 is changed by the voltage value. In addition, since the processing is simplified such that the processing time is distributed, the burden on the sub CPU 33a can be reduced. In other words, since the burden on the sub CPU 33a can be reduced, it is possible to reliably execute the turn-on time or turn-off time that is finely set to realize the lightness level within the processing time.

  (6) If the current value (brightness level) calculated before the end of the predetermined light emission control period reaches the final brightness level, the sub CPU 33a changes the final brightness level until the light emission control period ends. The calculation result of the regular interval processing is used. That is, the sub CPU 33a determines the lighting time and the light extinguishing time using the final brightness level as the current value until the light emission control period ends. In this way, by maintaining the final brightness level constant, the gradation emission can be seen more clearly and clearly.

  (7) The variable interval processing for setting the lighting time and the extinguishing time is executed separately from the regular interval processing for setting the current value (lightness level), and the control interval (execution timing) of the variable interval processing is set to the regular interval processing. Therefore, the variable interval process can be executed without being restricted by the control interval of the regular interval process. That is, since the variable interval process can be executed without waiting until the end of the regular interval process, the lighting time and the extinguishing time can be arbitrarily set in the variable interval process. In addition, since the control interval of the variable interval processing can be set so that the variable interval processing is executed a plurality of times during the control interval (execution) of the regular interval processing, the brightness level of the decoration lamp 16 is finely controlled. You can also. Therefore, it is possible to execute light emission control at a fine brightness level by increasing the brightness level of the decorative lamp 16.

  (8) The interval at which the variable interval process is executed is at least shorter than the interval at which the regular interval process is executed. That is, the execution timing of the variable interval process is set so that the variable interval process is executed a plurality of times during the control interval of the regular interval process. For this reason, it is possible to finely control the brightness level of the decorative lamp 16 that emits gradation light. Accordingly, it is possible to execute light emission control at a fine brightness level by increasing the brightness level of the brightness level of the decorative lamp 16 that emits gradation light.

  (9) The control cycle of the regular interval processing and the control cycle (execution timing) of the variable interval processing are the internal clock signal generated based on the external clock signal output from the same frequency oscillation circuit, and the sub CPU 33a (or the sub CPU 33a). Is counted by a timer counter). For this reason, it is measured by counting the internal clock signal obtained by dividing the external clock signal output by the same frequency oscillation circuit, so that a separate frequency oscillation circuit is provided for each process to generate the clock signal. In comparison, the manufacturing cost and installation space can be reduced.

  (10) When the sub CPU 33a starts the lighting control for lighting the decoration lamp 16 that emits gradation light in the variable interval process (when an affirmative determination is made in step S31), the sub CPU 33a next starts the lighting control (ie, Then, a turn-off time from the start time of the next turn-off control to the start of the next turn-on control) is determined. Further, when the sub CPU 33a starts the extinguishing control for extinguishing the decoration lamp 16 (when a negative determination is made in step S31), the sub CPU 33a starts the next extinguishing control (that is, from the next lighting control starting time). The lighting time until the next lighting control is started is determined. Since the control is performed in this way, the time at which the current lighting control or extinguishing control ends is not changed. Therefore, stable control can be performed even if variable interval processing is executed at high speed in order to execute light emission control at a fine brightness level.

  (11) Light emitting elements that can emit light at two different brightness levels (on / off) or in the vicinity of the light emitting elements that can emit light at 128 different brightness levels are arranged. Production can be performed.

In addition, the said embodiment can be embodied in another embodiment (another example) as follows.
In the basic value data of the above embodiment, the final brightness level is stored in association with it, but instead of the final brightness level, the calculation end time from the start to the end of the light emission control is stored. Also good. In this case, the sub CPU 33a calculates the brightness level step by step from the initial brightness level until the calculation end time elapses from the start of the light emission control period in the regular interval processing. In this way, as compared with the case where a plurality of lightness levels are stored, it is only necessary to store one lightness level and the calculation end time, so that the data capacity can be reduced. Further, since the brightness level is calculated step by step, gradation light emission can be easily executed.

  When the calculation end time is stored, the sub CPU 33a, when the calculation end time elapses before the predetermined light emission control period ends, the brightness calculated at the calculation end time until the light emission control period ends. Let the stage be the calculation result of the regular interval processing. In this way, after the calculation end time has elapsed, by maintaining the lightness level constant, the gradation emission can be seen more clearly and clearly.

  In the above embodiment, the sub CPU 33a calculates a new current value by adding the unit increase / decrease value to the previously calculated current value, but instead of the unit increase / decrease value, the elapsed time from the start of the light emission control period (divided) The initial lightness level may be added to a value obtained by multiplying the value by the number of times of image loading).

  In the above embodiment, the unit increase / decrease value may be either a positive number or a negative number, but may be only a positive number. In this case, when the initial lightness level is lower than the final lightness level, the sub CPU 33a adds unit increase / decrease values stepwise. On the other hand, when the initial lightness level is higher than the final lightness level, the sub CPU 33a gradually subtracts the unit increase / decrease value.

  In the above embodiment, the execution timing of the variable interval processing and the fixed time interval processing is determined based on the generated internal clock signal obtained by dividing the external clock signal input from the frequency oscillator 40. However, the variable interval processing and the fixed time interval are determined. The execution timing may be determined based on a different clock signal (different in frequency or the like) for the processing.

In the above embodiment, gradation light emission is performed in 128 steps, but gradation light emission may be performed in an arbitrary number of steps. For example, light may be emitted in 64 steps, and gradation light may be emitted in 256 steps.
In the above embodiment, all the decorative lamps 16 may emit light in gradation.

In the above embodiment, when the gradation light is emitted, all the decoration lamps 16 that emit the gradation light have the same brightness level, but the brightness level may be controlled to be different for each decoration lamp 16.
In the above embodiment, the brightness level of the decorative lamp 16 may be changed by making the turn-off time the same and making the turn-on time longer (or shorter).

  In the above embodiment, the predetermined processing time is set by distributing the lighting time and the lighting time in the variable interval processing, and the sum of the lighting time and the lighting time is made constant. As another example of this, the sum of the turn-off time and the turn-on time may be varied by changing the turn-on time and the turn-off time according to the current value.

  In the above embodiment, the regular interval processing is executed every 2 ms, but if it is executed at least every update cycle (basic value setting timer is “0”) indicated in the basic value data, The execution timing may be arbitrarily changed.

  In the above embodiment, the execution timing of the variable interval process is determined by the timer counter counting the internal clock signal. However, the sub CPU 33a may determine the execution timing by counting the internal clock signal.

  In the above embodiment, since the input cycle of the internal clock signal is made as small as 1.6 μs, the difference between the predetermined intervals that occurs at the execution timing of the variable interval processing is extremely small every time the brightness level (current value) differs by one level. In order to prevent this, the function M2 or function K3 is multiplied by a coefficient M in order to correct the lighting time or extinguishing time to an appropriate value. As another example, the coefficient M may be changed by changing the input cycle of the internal clock signal, or the input cycle of the internal clock signal may be set to be large and the coefficient M need not be multiplied.

  In the above embodiment, the execution interval of the variable interval processing is set in the range of 3276.8 μs or less, but is preferably shorter than the execution interval (2 ms) of the regular interval processing. In this way, even if the update cycle is 2 ms, it is possible to finely set the lightness level (in the above embodiment, 128 lightness levels are set).

Next, a technical idea that can be grasped from the above embodiment and another example will be added below.
(A) When the lightness level of the light emitting element calculated before the end of the predetermined light emission control period reaches the final lightness stage, the light emission control means determines the final lightness until the light emission control period ends. The gaming machine according to claim 2, wherein the stage is a calculation result of the first process.

  (B) In the first process, the light emission control unit calculates a lightness level based on the following function. If the calculated lightness level is not equal to or higher than the final lightness level, the calculated value is calculated by the first process. The calculated brightness level is set as the brightness level calculated by the first process when the calculated brightness level is equal to or higher than the final brightness level. 2. The gaming machine according to 2.

Y = F + C
Y: brightness level, F: initial brightness level or previously calculated brightness level, C: unit increase / decrease value that determines the difference between brightness levels.

  (C) In a gaming machine including a light emitting element that produces a light emission effect by emitting light at a plurality of brightness levels, and a light emission control unit that performs light emission control of the light emitting element, the light emission control unit includes: The first process is a second process for executing a first process for setting a brightness level and setting a lighting time and a turn-off time of the light emitting element according to the brightness level set in the first process. A gaming machine that is executed separately and wherein the control cycle of the second process is different from the control cycle of the first process.

  (D) The control cycle of the second process is set by the light emission control means so that a difference of a predetermined interval is generated every time the brightness level set in the first process is different by one level. The gaming machine according to the technical idea (c), which is set to be shorter than the control cycle of the first process.

(E) The gaming machine according to the technical idea (c) or the technical idea (d), wherein the control period of the second process is shorter than the control period of the first process.
(F) In the control cycle of the first process and the control cycle of the second process, the light emission control means counts a reference signal generated based on a signal output by the same frequency oscillation means provided in the light emission control means. The gaming machine according to any one of a technical idea (c) to a technical idea (e) characterized by being measured.

The front view which shows the machine surface side of a pachinko machine. Explanatory drawing explaining a display apparatus. The block diagram which shows the structure of a main control board, a display control board, a lamp control board, and an audio | voice control board. The front view which shows arrangement | positioning of a game board lamp. (A) And (b) is a front view which shows arrangement | positioning of a game board lamp. The front view which shows arrangement | positioning of a frame lamp. The schematic diagram which shows a lamp circuit board and a lamp control board. The flowchart which shows the flow of a basic value setting process. Explanatory drawing which shows the relationship between a control command and a gradation light emission pattern. The flowchart which shows the flow of a fixed interval process. The flowchart which shows the flow of a fixed interval process. Explanatory drawing which shows gradation light emission pattern data. (A) is explanatory drawing which shows the block data at the time of a fluctuation | variation start, (b) is explanatory drawing which shows the block data in fluctuation | variation. Explanatory drawing which shows basic value data. The flowchart which shows the flow of a variable space | interval process. (A) And (b) is explanatory drawing which shows the normal light emission pattern of the game board lamp at the time of a fluctuation | variation start. Explanatory drawing which shows the normal light emission pattern of the frame lamp at the time of a fluctuation | variation start. (A) And (b) is explanatory drawing which shows the normal light emission pattern of the game board lamp at the time of reach production. Explanatory drawing which shows the normal light emission pattern of the frame lamp at the time of reach production. Explanatory drawing which shows the lighting time and light extinction time for every update period. The timing chart which shows the application timing of a voltage.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 ... Pachinko machine (game machine), 16 ... Decoration lamp, 16a ... Game board lamp, 16b ... Frame lamp, 20 ... Display device, 30 ... Main control board, 30a ... Main CPU, 32 ... Display control board, 32a ... Sub CPU 33 ... Lamp control board, 33a ... Sub CPU (light emission control means), 33b ... ROM (storage means), D ... Decoration member, H ... Variable display.

Claims (3)

In a gaming machine including a light emitting element that produces a light emission effect by emitting light at a plurality of brightness levels, and a light emission control unit that performs light emission control of the light emitting element.
Comprising storage means for storing a plurality of types of basic value data used for determining the lightness level of the light emitting element;
The light emission control means executes a first process for calculating and setting a lightness level of the light emitting element based on the basic value data stored in the storage means, and the lightness set in the first process. It is configured to execute a second process for setting the lighting time and the lighting time according to the stage,
The basic value data stored in the storage means includes at least an initial brightness stage that is a brightness stage of the light emitting element when the light emission control is started, and a final brightness stage of the light emitting element when the light emission control is finished. The final lightness level, the update cycle that changes the lightness level, and a unit increase / decrease value that indicates the difference in lightness level when changing to the next lightness level,
There is a difference of at least a plurality of levels between the initial brightness level and the final brightness level included in the basic value data,
The light emission control means is configured to execute the first process at predetermined intervals. When the first process is executed, the light emission control means is configured to execute the first process based on the basic value data stored in the storage means. In one process, from the initial lightness stage to the final lightness stage, the lightness stage is calculated and set so as to change the lightness stage in increments of unit increments for each update cycle.
When the second process is executed, the lighting time of the light emitting element is calculated by multiplying the brightness level specified by the first process by a predetermined coefficient, and the determined lighting time and the first lighting time are calculated. A value obtained by subtracting the lighting time determined according to the lightness stage from the predetermined period so that the total time of the lighting time corresponding to the lightness stage specified by the processing is always a predetermined period determined in advance. A gaming machine that is calculated and set as: A winning detection means for detecting a winning of a game ball;
Production execution means for executing a symbol variation game that variably displays a plurality of types of symbols triggered by detection of a winning game ball by the winning detection means;
A jackpot game granting means for granting a jackpot game when a jackpot display result is displayed in the symbol variation game;
Jackpot determination means for determining whether or not the symbol variation game is a big hit at the start of the symbol variation game;
A variation pattern determining means for determining a variation pattern for specifying the effect time of the symbol variation game based on the determination result of the jackpot determining means from a plurality of types;
Each of the variation patterns is associated with block data indicating a light emission mode of the light emitting element in a predetermined light emission effect period in the order of reference,
The block data associated with the variation pattern is configured so that the total time of the light emission effect period of the block data matches the effect time specified by the associated change pattern by referring to the reference order. And
The block data is associated with one or more basic value data, and the reference order of the basic value data is set,
The basic value data associated with the block data is referred to in the reference order set in the associated block data, so that the change in the lightness level specified by the basic value data is started until the end. The total time of the light emission control period is set to a length equal to or shorter than the light emission effect period of the associated block data,
When the light emission control means executes the first processing, the block data associated with the fluctuation pattern and the fluctuation pattern until the presentation time specified by the fluctuation pattern determined by the fluctuation pattern determination means ends. The block data to be referred to is specified based on the reference order specified by the above, and the basic value data and the block data associated with the specified block data are used until the light emission effect period specified by the specified block data ends. Based on the identified reference order, the basic value data to be referenced is identified, and the lightness level is changed based on the identified basic value data.
The gaming machine according to claim 1, wherein the update period of the basic value data is configured to be set for each basic value data . When the total time of the light emission control period of the basic value data associated with the block data identified as the block data specified as the block data to be referred to is shorter than the light emission effect period of the associated block data, the light emission control means The lightness level is calculated and set so as to change the lightness level by repeatedly referring to the basic value data associated with the block data from the beginning according to the reference order until the data lighting effect period ends. The gaming machine according to claim 2 .

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