JP4396426B2 - Resistance element and multilayer printed wiring board incorporating the resistance element - Google Patents

Resistance element and multilayer printed wiring board incorporating the resistance element Download PDF

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JP4396426B2
JP4396426B2 JP2004201434A JP2004201434A JP4396426B2 JP 4396426 B2 JP4396426 B2 JP 4396426B2 JP 2004201434 A JP2004201434 A JP 2004201434A JP 2004201434 A JP2004201434 A JP 2004201434A JP 4396426 B2 JP4396426 B2 JP 4396426B2
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electrode
resistor
resistance element
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printed wiring
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充輝 遠藤
憲治 河本
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Toppan Inc
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Description

本発明は抵抗素子及びその抵抗素子を内蔵した多層プリント配線板に関する。   The present invention relates to a resistance element and a multilayer printed wiring board incorporating the resistance element.

近年、電子機器の高性能化、小型化の要求に伴い回路部品の高密度化、高機能化が強まっている。そのため、多層プリント配線板に電子部品を実装する場合においては、その実装効率を高めるためにコンデンサ(C)、レジスタ(R)、インダクタ(L)等の受動部品を基板内に内蔵した構造の多層プリント配線板が注目されている。   In recent years, with the demand for higher performance and smaller size of electronic devices, the density and functionality of circuit components are increasing. Therefore, when electronic components are mounted on a multilayer printed wiring board, a multilayer having a structure in which passive components such as a capacitor (C), a resistor (R), and an inductor (L) are built in the substrate in order to increase the mounting efficiency. Printed wiring boards are attracting attention.

例えば、プリント基板に設けた孔内にリードレスの回路部品を埋設する方法(例えば、特許文献1参照。)、絶縁基板に設けた貫通孔内にセラミックコンデンサ等の受動部品を埋設する方法(例えば、特許文献2参照。)、半導体素子のバイパスコンデンサをプリント基板の孔内に埋設する方法(例えば特許文献3及び4参照。)等が開示されている。   For example, a method of embedding a leadless circuit component in a hole provided in a printed circuit board (see, for example, Patent Document 1), a method of embedding a passive component such as a ceramic capacitor in a through hole provided in an insulating substrate (for example, Patent Document 2), and a method of embedding a bypass capacitor of a semiconductor element in a hole of a printed circuit board (for example, refer to Patent Documents 3 and 4).

しかしながら、上記の方法によりあらかじめ大容量が確保されているチップコンデンサ等を貫通孔へ埋設、実装する場合は、現行で最小サイズの0603チップを用いたとしても0.3mmあるいは0.6mmの層厚みが伴うため、現状程度の薄い多層プリント基板を実現するのは困難であり、絶縁樹脂とチップ部品との熱膨張率の差によりクラックが発生することが懸念される。   However, when embedding and mounting a chip capacitor having a large capacity in advance by the above method in a through-hole, the layer thickness is 0.3 mm or 0.6 mm even if the smallest size 0603 chip is used at present. Therefore, it is difficult to realize a thin multilayer printed board of the present level, and there is a concern that cracks may occur due to the difference in thermal expansion coefficient between the insulating resin and the chip component.

そこで、チタン酸バリウム等の高誘電フィラーをバインダー樹脂に分散した誘電ペースト、あるいはカーボン等の導電性粒子をバインダー樹脂に分散した抵抗ペーストをスクリーン印刷して多層プリント配線板内にキャパシタ素子あるいは抵抗素子を作り込む手法も多数考案されており、有機系絶縁基板に設けた貫通孔に電子部品形成材料を埋め込んで固化させた後、該電子部品形成材料の上下の端面に電極を形成してコンデンサや抵抗器を形成する方法(例えば、特許文献5参照)等が開示されている。   Therefore, a dielectric paste in which a high dielectric filler such as barium titanate is dispersed in a binder resin, or a resistive paste in which conductive particles such as carbon are dispersed in a binder resin is screen-printed to form a capacitor element or a resistive element in a multilayer printed wiring board. Many methods have been devised, and after embedding an electronic component forming material in a through hole provided in an organic insulating substrate and solidifying it, electrodes are formed on the upper and lower end surfaces of the electronic component forming material to form capacitors and A method of forming a resistor (for example, see Patent Document 5) is disclosed.

図3は、従来の抵抗素子内蔵の多層プリント配線板の一例の部分拡大図であり、aは、側断面図で、bは平面図ある。コア基板10の上には対になる第一電極21が形成され、その電極間に抵抗体50を形成した。図3に示すように、第一電極21上に直接抵抗体50を形成されている。ところが、前述の方法で抵抗素子を形成した場合、銅配線の一部よりなる電極とカーボンペーストよりなる抵抗体が直接接触する(図3)ため、界面の接触抵抗の影響が大きく、例えば高温高湿条件下(気温40℃、相対湿度95%)では界面の腐食等により抵抗値が大きく増加することが報告され、問題化されている(例えば、非特許文献1参照)。   FIG. 3 is a partially enlarged view of an example of a conventional multilayer printed wiring board with a built-in resistance element, where a is a side sectional view and b is a plan view. A pair of first electrodes 21 was formed on the core substrate 10, and a resistor 50 was formed between the electrodes. As shown in FIG. 3, the resistor 50 is formed directly on the first electrode 21. However, when the resistance element is formed by the above-described method, the electrode made of a part of the copper wiring and the resistor made of carbon paste are in direct contact with each other (FIG. 3). Under humid conditions (temperature 40 ° C., relative humidity 95%), it has been reported that the resistance value greatly increases due to interface corrosion or the like, which is problematic (for example, see Non-Patent Document 1).

図4は従来の抵抗素子内蔵の多層プリント配線板の一例の部分拡大図であり、aは、側断面図で、bは平面図ある。コア基板10の上には対になる第一電極21が形成され、その第一電極21上に第二電極を形成、その第二電極間に抵抗体50を形成した。図3に示すように、第一電極21上と抵抗体50は、第二電極を介して抵抗体50が形成されている。そこで、電極と抵抗体の間に電気的接続性に優れた銀ペーストを挟み界面の接触抵抗を低下させた構造の抵抗素子(図4)が報告されている(例えば、非特許文献1、特許文献6参照)。このような構造をとることにより、温度や湿度が変化しても抵抗値の変動が少ない安定性に優れた抵抗素子を形成することが可能となる。   FIG. 4 is a partially enlarged view of an example of a conventional multilayer printed wiring board with a built-in resistance element, where a is a side sectional view and b is a plan view. A pair of first electrodes 21 was formed on the core substrate 10, a second electrode was formed on the first electrode 21, and a resistor 50 was formed between the second electrodes. As shown in FIG. 3, the resistor 50 is formed on the first electrode 21 and the resistor 50 through the second electrode. Therefore, a resistance element (FIG. 4) having a structure in which a silver paste excellent in electrical connectivity is sandwiched between an electrode and a resistor to reduce the contact resistance at the interface has been reported (for example, Non-Patent Document 1, Patent). Reference 6). By adopting such a structure, it is possible to form a resistance element having excellent stability with little variation in resistance value even when temperature and humidity change.

しかしながら図4の構造により抵抗体を作製する場合、抵抗体の長さは電極上及び電極の内側に印刷された銀ペースト間の距離となるため銀ペーストの印刷精度が素子容量に影
響し、エッチングで形成した銅等の電極間の距離が抵抗体の長さとなる図3の構造に較べて、印刷で形成した銀ペースト間の距離が抵抗体の長さとなる図4の構造となり、エッチング精度より印刷精度が劣ることにより、素子容量の設計値への印刷精度の合わせ込みが難しく、作り込みの精度をあげるにはレーザートリミングが必要になるという問題点があった。すなわち、形状を修正するレーザートリミングが必要となる。さらには良導電性を実現するために銀フィラーが高充填されている銀ペーストを、電極と基板絶縁樹脂上という段差のある部分に印刷するため、サーマルサイクル試験(以下TCTと記す)を行うと電極のエッジ部分でクラックが生じることが懸念される。
However, when a resistor is manufactured with the structure shown in FIG. 4, the length of the resistor is the distance between the silver pastes printed on the electrodes and the inside of the electrodes, so the printing accuracy of the silver paste affects the element capacity and etching. Compared to the structure of FIG. 3 in which the distance between the electrodes made of copper or the like formed in step 3 becomes the length of the resistor, the distance between the silver paste formed by printing becomes the structure of FIG. Since the printing accuracy is inferior, it is difficult to match the printing accuracy to the design value of the element capacity, and there is a problem that laser trimming is necessary to increase the accuracy of making. That is, laser trimming for correcting the shape is required. Furthermore, when a thermal cycle test (hereinafter referred to as TCT) is performed in order to print a silver paste highly filled with a silver filler in order to realize good conductivity on a stepped portion between the electrode and the substrate insulating resin, There is a concern that cracks will occur at the edge of the electrode.

以下に公知文献を記す。
特開昭54−38561号公報 特公昭60−41480号公報 特開平4−73992号公報 特開平5−218615号公報 特開平10−56251号公報 特開平11−340633号公報 師岡 功: “埋め込み受動部品技術に使用されるポリマー抵抗体”, エレクトロニクス実装学会誌, Vol.6, No.4, pp.294−299, 2003
The known literature is described below.
JP-A-54-38561 Japanese Patent Publication No. 60-41480 JP-A-4-73992 JP-A-5-218615 Japanese Patent Laid-Open No. 10-56251 Japanese Patent Laid-Open No. 11-340633 Isao Shioka: “Polymer resistors used in embedded passive component technology”, Journal of Japan Institute of Electronics Packaging, Vol. 6, no. 4, pp. 294-299, 2003

本発明の目的は、多層プリント配線板に、インダクタ、コンデンサ、レジスタ等の受動部品として予め作りこんだ受動素子内蔵プリント配線板に用いる抵抗素子で、抵抗値の安定性を犠牲にすること無く、レーザートリミング無しで素子容量の設計値への合わせ込むこと、クラックの発生を抑えること、ペースト硬化物の膜厚を薄くしてトータルの基板厚を薄くすることにある。その結果、安価で信頼性に優れた、抵抗素子及びその抵抗素子を内蔵した多層プリント配線板を提供することである。   The object of the present invention is a resistance element used for a printed wiring board with a built-in passive element as a passive component such as an inductor, a capacitor, and a resistor in a multilayer printed wiring board, without sacrificing the stability of the resistance value. It is to adjust the element capacity to the design value without laser trimming, to suppress the generation of cracks, and to reduce the total thickness of the substrate by reducing the thickness of the paste cured product. As a result, it is an object of the present invention to provide a resistive element and a multilayer printed wiring board incorporating the resistive element that are inexpensive and excellent in reliability.

本発明の請求項1に係る発明は、絶縁層上に形成された一対からなる第一電極間に、抵抗体を形成した抵抗素子において、第一電極上に、該第一電極の、内端部を被覆しない位置で、大きさ以下の第二電極を設け、前記第一電極及び第二電極とその他の第一電極及び第二電極との一対の電極間に、両端が各々の第一電極の内端部と第二電極とに接するように抵抗体を設けたことを特徴とする抵抗素子である。   According to a first aspect of the present invention, there is provided a resistance element in which a resistor is formed between a pair of first electrodes formed on an insulating layer, the inner end of the first electrode on the first electrode. A second electrode having a size equal to or smaller than that of the first electrode and the second electrode and the other first electrode and the second electrode is provided between the first electrode and the second electrode. A resistance element is provided in which a resistor is provided so as to be in contact with the inner end portion and the second electrode.

この本発明によれば、第二電極を第一電極の内側の内端部を残した電極上に形成し、抵抗体を第一電極の内端部と第二電極の両方に接するように形成することで、抵抗体の素子容量がエッチングにより形成した前記第一電極間の距離が抵抗体の長さになれことにより、レーザートリミング無しで素子容量の設計値への合わせ込みが可能で、尚かつ抵抗値の安定性に優れた抵抗素子を形成することが可能になる。   According to this invention, the second electrode is formed on the electrode leaving the inner end portion inside the first electrode, and the resistor is formed so as to be in contact with both the inner end portion of the first electrode and the second electrode. As a result, the distance between the first electrodes formed by etching of the element capacitance of the resistor becomes the length of the resistor, so that the element capacitance can be adjusted to the design value without laser trimming. In addition, it is possible to form a resistance element having excellent resistance value stability.

本発明の請求項2に係る発明は、前記第一電極の内端部が、50〜200μmの長さを有する位置に設けられていることを特徴とする請求項1記載の抵抗素子である。   The invention according to claim 2 of the present invention is the resistance element according to claim 1, wherein the inner end portion of the first electrode is provided at a position having a length of 50 to 200 μm.

この発明によれば、印刷のアライメントずれ等により電極上から第二電極が絶縁層内側に入らない範囲で第一電極の内端部を残し、尚かつ第一電極に直接接触する抵抗体をできるだけ少なくすることで、素子容量の設計値への合わせ込みと抵抗値の安定性を両立することが可能になる。   According to the present invention, the inner end of the first electrode is left in a range in which the second electrode does not enter the insulating layer from the electrode due to misalignment of printing or the like, and the resistor that is in direct contact with the first electrode can be provided as much as possible. By reducing the number, it is possible to achieve both the adjustment of the element capacitance to the design value and the stability of the resistance value.

この発明によれば、第二電極の区画領域は、第一電極上にみに形成したことにより、エッチングにより形成した前記第一電極間の距離が抵抗体の長さになり、抵抗体の素子容量が安定する。   According to this invention, since the partition region of the second electrode is formed only on the first electrode, the distance between the first electrodes formed by etching becomes the length of the resistor, and the element of the resistor Capacity is stable.

本発明の請求項3に係る発明は、前記第一電極の内端部が、第一電極の他の部分より薄いことを特徴とする請求項1、又は2記載の抵抗素子である。   The invention according to claim 3 of the present invention is the resistance element according to claim 1 or 2, wherein an inner end portion of the first electrode is thinner than other portions of the first electrode.

この発明によれば、必要に応じて第一電極をハーフエッチング等の方法により、前記内端部を薄くすることで、第一電極・第二電極・抵抗体が重なる部分の総厚を埋め込みに適した厚さに薄くすることができる。また、絶縁層と第一電極の段差が少なくなることにより、この段差上に形成される抵抗体にクラックが生じにくくなる。   According to the present invention, if necessary, the first electrode is thinned by a method such as half-etching so that the total thickness of the portion where the first electrode, the second electrode, and the resistor overlap is embedded. Can be thinned to a suitable thickness. In addition, since the step between the insulating layer and the first electrode is reduced, it is difficult for the resistor formed on the step to be cracked.

本発明の請求項4に係る発明は、前記抵抗体が、抵抗ペーストから形成されていることを特徴とする請求項1乃至3のいずれか1項記載の抵抗素子である。   The invention according to claim 4 of the present invention is the resistance element according to any one of claims 1 to 3, wherein the resistor is formed of a resistance paste.

本発明の請求項5に係る発明は、前記第二電極が、貴金属からなることを特徴とする請求項1乃至4のいずれか1項記載の抵抗素子である。   The invention according to claim 5 of the present invention is the resistance element according to any one of claims 1 to 4, wherein the second electrode is made of a noble metal.

本発明の請求項6に係る発明は、前記第一電極が、多層プリント配線板を構成する導体層の一部であることを特徴とする請求項1乃至5のいずれか1項記載の抵抗素子である。   The resistance element according to any one of claims 1 to 5, wherein the first electrode is a part of a conductor layer constituting a multilayer printed wiring board. It is.

本発明の請求項7に係る発明は、請求項1乃至6のいずれか1項記載の抵抗素子を内蔵したことを特徴とする多層プリント配線板である。   According to a seventh aspect of the present invention, there is provided a multilayer printed wiring board comprising the resistance element according to any one of the first to sixth aspects.

この発明によれば、多層プリント配線板に用いられているプリプレグ、樹脂付き銅箔の接着層、ビルドアップ絶縁材に用いられている材料と同系統の材料と安価に入手可能なカーボンフィラーを用いることにより層間剥離等の生じない信頼性に優れた安価な抵抗素子内蔵の多層プリント配線板を提供することが可能となる。   According to this invention, the prepreg used for the multilayer printed wiring board, the adhesive layer of the resin-coated copper foil, the same material as the material used for the build-up insulating material, and the carbon filler available at low cost are used. As a result, it is possible to provide an inexpensive multilayer printed wiring board with a built-in resistance element that is excellent in reliability without causing delamination.

本発明によれば、第一電極及び第二電極の厚さを必要な範囲で最低限厚に薄くすることにより、従来の銀等の貴金属ペーストを第一電極上及び該電極内端部に形成した構造と同程度の抵抗値安定性・基板厚を確保しつつ、抵抗体の長さをエッチングで形成できる第一電極間の距離とすることで設計誤差を少なくでき、第二電極が第一電極上だけに形成されるため抵抗体のサイズを小さくできる。また、第一電極の一部をあらかじめハーフエッチング等で薄くしておくので、段差が少なくなり第二電極の接続信頼性が増す等のメリットがある。したがって、トリミングレスによる製造コストの削減・製造納期の短縮、基板の軽薄短小化、信頼性の向上等に効果がある。   According to the present invention, a conventional noble metal paste such as silver is formed on the first electrode and on the inner end of the electrode by reducing the thickness of the first electrode and the second electrode to the minimum necessary thickness. The design error can be reduced by making the length of the resistor the distance between the first electrodes that can be formed by etching while ensuring the same resistance value stability and substrate thickness as the above structure. Since it is formed only on the electrode, the size of the resistor can be reduced. In addition, since a part of the first electrode is thinned in advance by half-etching or the like, there are merits such that the level difference is reduced and the connection reliability of the second electrode is increased. Therefore, it is effective in reducing the manufacturing cost, shortening the manufacturing delivery time, making the substrate lighter and thinner, improving the reliability, etc. by trimming-less.

以下に、本発明における抵抗素子を内蔵した多層プリント配線板の一例について図面を用いて簡単に説明する。   Hereinafter, an example of a multilayer printed wiring board incorporating a resistance element according to the present invention will be briefly described with reference to the drawings.

図1は、本発明の抵抗素子内蔵の多層プリント配線板の部分拡大図であり、aは、側断
面図で、bは平面図で、cは各部品の配置を説明する平面図ある。
FIG. 1 is a partially enlarged view of a multilayer printed wiring board with a built-in resistance element according to the present invention, in which a is a side sectional view, b is a plan view, and c is a plan view for explaining the arrangement of components.

図1aに示す本発明の抵抗素子内蔵の多層プリント基板100では、一対からなる第一電極21上には、各々第一電極の内側の内端部を一部残して第二電極40を形成した電極、前記第一電極の内端部及び第二電極との両方を含む位置に抵抗体の両端が接するように一対の第一電極21間に内蔵した受動素子の抵抗体50を形成した抵抗素子内蔵の多層プリント配線板100である。   In the multilayer printed circuit board 100 with a built-in resistance element shown in FIG. 1a, the second electrode 40 is formed on the pair of first electrodes 21 while leaving a part of the inner end of each first electrode. A resistive element in which a passive element resistor 50 is formed between a pair of first electrodes 21 so that both ends of the resistor are in contact with a position including both the electrode, the inner end of the first electrode, and the second electrode This is a built-in multilayer printed wiring board 100.

図1bに示す第一電極の内側の内端部が、第二電極が形成されていない領域である。すなわち、第二電極形成の禁止領域であり、このことにより、抵抗体を形成時、抵抗体の素子容量は、エッチングで形成した第一電極間の距離が抵抗体の長さとなる。さらに、抵抗体形成の印刷法での印刷位置精度を考慮し、各々第一電極の内側の電極端部より第二電極の内側の電極端部までの(第一電極の内端部)距離を50〜200μmの範囲内とした抵抗素子を備えた抵抗素子内蔵の多層プリント配線板である。   The inner end portion inside the first electrode shown in FIG. 1b is a region where the second electrode is not formed. That is, it is a prohibited area for forming the second electrode. With this, when the resistor is formed, the element capacitance of the resistor is the distance between the first electrodes formed by etching is the length of the resistor. Furthermore, considering the printing position accuracy in the resistor forming printing method, the distance from the inner end of the first electrode to the inner end of the second electrode (the inner end of the first electrode) It is a multilayer printed wiring board with a built-in resistance element provided with a resistance element in the range of 50 to 200 μm.

第一電極の内端部を含む近傍領域の第一電極が、抵抗体電極の領域とし、その厚さが、10〜20μmの範囲までに膜厚を減して区画形成した抵抗素子内蔵の多層プリント配線板である。そのため、抵抗体形成時、第一電極の内側先端部でその段差が大幅に縮小され、該位置での抵抗体にクラックが生じにくくなる。   The first electrode in the vicinity region including the inner end portion of the first electrode is a resistor electrode region, and the thickness is reduced to a range of 10 to 20 μm, and a multilayer with a built-in resistor element is formed. It is a printed wiring board. Therefore, when the resistor is formed, the step is greatly reduced at the inner tip portion of the first electrode, and cracks are hardly generated in the resistor at the position.

図1cでは、受動素子の部品の配置図であり、基板10の絶縁樹脂層上に、一対の第一電極形成領域29があり、その第一電極形成領域内の内側先端には抵抗体形成領域59があり、その領域内の第一電極の内端部には、第二電極形成禁止領域45と、その外側に第二電極形成領域49が区画配置されている。なお、第一電極の内端部は、第二電極形成禁止領域45である。   FIG. 1c is a layout view of passive element components. A pair of first electrode formation regions 29 are provided on the insulating resin layer of the substrate 10, and a resistor formation region is provided at an inner tip in the first electrode formation region. 59, and the second electrode formation prohibition region 45 and the second electrode formation region 49 are partitioned and arranged at the inner end portion of the first electrode in the region. The inner end portion of the first electrode is a second electrode formation prohibition region 45.

図2は、本発明の抵抗素子内蔵の多層プリント配線板の製造方法を説明する側断面で、a〜iはその工程図である。   FIG. 2 is a side cross-sectional view for explaining a method of manufacturing a multilayer printed wiring board with a built-in resistance element according to the present invention, and a to i are process diagrams thereof.

投入する基板は、コアー基板の片面銅張積層板の基板10である(図2a参照)。次の工程は、基板10の表面の銅箔1をエッチングして導体回路と、抵抗体電極22を含む第一電極21からなるの導体配線層20を形成する(図2b参照)。次に、感光性レジスト30を用いてこの抵抗体電極22のみをハーフエッチングした後(図2c参照)、この抵抗体電極22上に、抵抗体電極22内側の100μm程度を残して銀ペーストをスクリーン印刷し、所定の硬化温度・時間で銀ペーストの第二電極40を硬化させる(図2d参照)。この際、銀ペーストの第二電極40の厚さは15μm前後であることが好ましい。さらに、この銀ペーストの印刷された第一電極21の間に、第一電極21の内端部と銀ペーストの第二電極40の両方に接触するよう抵抗体50をスクリーン印刷し、所定の硬化温度・時間で硬化させる(図2e参照)。この際、抵抗体50の厚さは20μm前後であることが好ましい。このようにして抵抗体50の形成された基板10上にビルドアップ絶縁樹脂60を真空加圧式ラミネーターにてラミネートし、平面プレス機で樹脂表面を平滑にした後、所定の硬化温度・時間で絶縁樹脂60を硬化させる(図2f参照)。次の工程は、CO2レーザー加工でビア用孔70を穿孔加工した後(図2g参照)、孔内に無電解銅めっき、電気銅めっきのめっき導体層8を行いビアを形成すると共に導体層を形成し、下層の導体配線層20と上層のめっき導体層8とを電気的に接続する(図2h参照)。次の工程は、めっき導体層8をエッチングして配線パターン80を形成することで、内層の導体配線層20に抵抗体50を内蔵した抵抗素子内蔵の多層プリント配線板100を形成することができる(図2i参照)。尚、コア基板として両面銅張積層板を用いて両面にビルドアップ層を形成しても構わないし、ビルドアップ層を2層以上形成し、コア以外の層上に抵抗素子が形成されていている構造であっても構わない。   The substrate to be loaded is a substrate 10 of a single-sided copper-clad laminate of a core substrate (see FIG. 2a). In the next step, the copper foil 1 on the surface of the substrate 10 is etched to form a conductor wiring layer 20 comprising a conductor circuit and a first electrode 21 including a resistor electrode 22 (see FIG. 2b). Next, after half-etching only the resistor electrode 22 using the photosensitive resist 30 (see FIG. 2c), a silver paste is screened on the resistor electrode 22 while leaving about 100 μm inside the resistor electrode 22. Printing is performed, and the second electrode 40 of the silver paste is cured at a predetermined curing temperature and time (see FIG. 2d). At this time, the thickness of the second electrode 40 of the silver paste is preferably around 15 μm. Further, between the first electrodes 21 printed with the silver paste, the resistor 50 is screen-printed so as to come into contact with both the inner end portion of the first electrode 21 and the second electrode 40 of the silver paste, and predetermined curing is performed. Cure at temperature and time (see FIG. 2e). At this time, the thickness of the resistor 50 is preferably about 20 μm. In this way, the build-up insulating resin 60 is laminated on the substrate 10 on which the resistor 50 is formed with a vacuum pressurizing laminator, the resin surface is smoothed with a flat press machine, and then insulated at a predetermined curing temperature and time. The resin 60 is cured (see FIG. 2f). The next step is to drill the via hole 70 by CO2 laser processing (see FIG. 2g), and then form a via in the hole by performing electroless copper plating and electrolytic copper plating plating conductor layer 8 and forming the conductor layer. Then, the lower conductor wiring layer 20 and the upper plated conductor layer 8 are electrically connected (see FIG. 2h). In the next step, the plated conductor layer 8 is etched to form the wiring pattern 80, whereby the multilayer printed wiring board 100 with a built-in resistance element in which the resistor 50 is built in the inner conductor wiring layer 20 can be formed. (See FIG. 2i). Note that a double-sided copper-clad laminate may be used as a core substrate to form a buildup layer on both sides, and two or more buildup layers are formed, and a resistance element is formed on a layer other than the core. It may be a structure.

本発明の抵抗素子内蔵の多層プリント配線板の製造方法では、第一電極の形成はフォトプロセス法を用いて薄膜の導体配線層をエッチングにて区画形成し、第二電極の形成は印刷法を用いて導電性の貴金属ペーストを直接に区画形成する。エッチングで形成した第一電極間の距離が抵抗体の長さとなる構造であり、印刷で区画形成した第二電極銀ペーストは、エッチング精度より劣る印刷精度の距離を予め許容値とした本発明の印刷方法により抵抗体の素子容量に影響されない構造となり、設計値への印刷精度の合わせ込みが安易となり、作り込みの精度をあげるにはレーザートリミングが不必要になる効果がある。   In the method for manufacturing a multilayer printed wiring board with a built-in resistance element of the present invention, the first electrode is formed by etching a thin conductive wiring layer using a photo process method, and the second electrode is formed by a printing method. Use to partition the conductive noble metal paste directly. The distance between the first electrodes formed by etching is the structure of the length of the resistor, and the second electrode silver paste that is partitioned by printing has a printing accuracy distance that is inferior to the etching accuracy. According to the printing method, the structure is not affected by the element capacity of the resistor, and it is easy to adjust the printing accuracy to the design value, and there is an effect that laser trimming is unnecessary to increase the accuracy of the manufacturing.

本発明における抵抗体電極22は、第一電極21上に貴金属ペーストの第二電極40及び抵抗ペーストの抵抗体50を印刷する必要があることから、製造する多層プリント配線板の層間厚及びプリプレグ・樹脂付き銅箔の接着層・ビルドアップ絶縁樹脂の埋め込み性を考慮すると導電性を損なわない範囲でなるべく薄くすることがこのましい。検討の結果、抵抗体電極22の厚さが10〜20μmの範囲であれば第一電極21の導電性を損なわずに層間厚100μm前後の多層プリント配線板が製造できることがわかった。また、第一電極21上に形成される貴金属ペーストの第二電極40及び抵抗ペーストの抵抗体50の密着性を向上させる目的から、あらかじめ抵抗体電極22を含む第一電極21の表面に黒化処理等の表面処理をしておくことが好ましい。   Since the resistor electrode 22 in the present invention needs to print the second electrode 40 of the noble metal paste and the resistor 50 of the resistor paste on the first electrode 21, the interlayer thickness and prepreg of the multilayer printed wiring board to be manufactured Considering the embedding property of the adhesive layer of the copper foil with resin and the build-up insulating resin, it is preferable to make it as thin as possible without impairing the conductivity. As a result of the examination, it was found that when the thickness of the resistor electrode 22 is in the range of 10 to 20 μm, a multilayer printed wiring board having an interlayer thickness of about 100 μm can be manufactured without impairing the conductivity of the first electrode 21. Further, for the purpose of improving the adhesion between the second electrode 40 of the noble metal paste formed on the first electrode 21 and the resistor 50 of the resistor paste, the surface of the first electrode 21 including the resistor electrode 22 is blackened in advance. It is preferable to perform surface treatment such as treatment.

本発明における貴金属ペーストは電極内側を一部残して印刷される。電極上で貴金属ペーストの印刷されない領域を電極内側端部よりあまり長く取りすぎると抵抗体と銅電極が直接接触している部分の影響が大きくなり接触抵抗が大きくなる、抵抗素子サイズが大きくなってしまう等の問題が発生し、一方、電極上で貴金属ペーストの印刷されない領域を電極内側端部よりあまりに短くしすぎると貴金属ペーストの印刷時にアライメントずれ等で抵抗体を含む第一電極上よりペーストがだれてしまい、絶縁層上に貴金属ペーストの第二電極の区画が形成されるために、その結果抵抗値が設計値から大きくずれてしまう危険がある。検討の結果、スクリーン印刷機のアライメント精度にもよるが、貴金属ペーストの第二電極が印刷されてない第一電極内側の領域がその電極端部より50μm〜200μmの範囲内であれば、接触抵抗を低く抑え、尚かつ抵抗値の設計値への合わせ込みが容易であることがわかった。前記第一電極内側の領域は、該一対の各々第一電極の内側の電極端部より当該電極上の第二電極の内側の電極端部までの距離で区画形成され、その距離が50μm〜200μmの範囲であれば、スクリーン印刷機のアライメント精度を吸収できる。   The noble metal paste in the present invention is printed leaving a part of the inside of the electrode. If the area where no precious metal paste is printed on the electrode is taken too long than the inner edge of the electrode, the influence of the part where the resistor and the copper electrode are in direct contact increases, and the contact resistance increases, the resistance element size increases. On the other hand, if the region where the noble metal paste is not printed on the electrode is made too short from the inner edge of the electrode, the paste will be transferred from the first electrode including the resistor due to misalignment during printing of the noble metal paste. As a result, the section of the second electrode of the noble metal paste is formed on the insulating layer, and as a result, there is a risk that the resistance value is greatly deviated from the design value. As a result of the examination, although depending on the alignment accuracy of the screen printing machine, if the region inside the first electrode where the second electrode of the noble metal paste is not printed is within the range of 50 μm to 200 μm from the end of the electrode, contact resistance It was found that it was easy to adjust the resistance value to the design value. The region inside the first electrode is partitioned and formed at a distance from an inner electrode end of each of the pair of first electrodes to an inner electrode end of the second electrode on the electrode, and the distance is 50 μm to 200 μm. If it is within the range, the alignment accuracy of the screen printing machine can be absorbed.

本発明における貴金属ペーストは、市販されている導電性ペーストの中から選択することができる。貴金属ペーストに用いられる貴金属フィラーとしては、銀、銀−カーボン、金、パラジウム、銀パラジウム合金、銀めっき銅粉等を用いる事が可能であるが、カーボンとの接触抵抗やコストを考慮すると銀を貴金属フィラーとして用いる事が特に好ましい。貴金属フィラーの粒子径としては、1〜5μmの範囲に有ることが好ましい。これは粒子系が1μmを大幅に下回るとペースト中に分散された貴金属フィラーの凝集が問題になり、5μmを大幅に越えると塗膜の表面平滑性が悪くなる他、硬化後の厚みが20μm以下にするとフィラー系が大きすぎて導電性が悪くなるためである。また、貴金属ペーストに用いられるバインダー樹脂としては、エポキシ樹脂、フェノール樹脂、メラミン樹脂、ポリイミド樹脂等の熱硬化性樹脂、及びこれらを変性した樹脂、またはこれらの樹脂と熱可塑性樹脂の混合物等を用いることができる。中でも、基材との密着性、耐薬品性、コストの点からエポキシ樹脂を用いることが好ましい。さらに、貴金属ペーストの硬化後の厚さは、電極上に貴金属ペースト硬化物及び抵抗ペースト硬化物が形成される必要があることから、製造する多層プリント配線板の層間厚及びプリプレグ、樹脂付き銅箔の接着層、ビルドアップ絶縁樹脂の埋め込み性を考慮すると導電性を損なわない範囲でなるべく薄くすることがこのましい。検討の結果、貴金属ペースト硬化物の厚さが10〜20μmの範
囲であれば導電性を損なわずに層間厚100μm前後の多層プリント配線板が製造できることがわかった。
The noble metal paste in the present invention can be selected from commercially available conductive pastes. Silver, silver-carbon, gold, palladium, silver-palladium alloy, silver-plated copper powder, etc. can be used as the precious metal filler used in the precious metal paste, but silver is considered in consideration of contact resistance with carbon and cost. It is particularly preferable to use it as a noble metal filler. The particle diameter of the noble metal filler is preferably in the range of 1 to 5 μm. This is because when the particle system is significantly less than 1 μm, aggregation of the noble metal filler dispersed in the paste becomes a problem, and when it exceeds 5 μm, the surface smoothness of the coating film is deteriorated and the thickness after curing is 20 μm or less. This is because the filler system is too large and the conductivity becomes poor. In addition, as the binder resin used in the noble metal paste, a thermosetting resin such as an epoxy resin, a phenol resin, a melamine resin, or a polyimide resin, a resin obtained by modifying these, or a mixture of these resins and a thermoplastic resin is used. be able to. Especially, it is preferable to use an epoxy resin from the point of adhesiveness with a base material, chemical resistance, and cost. Furthermore, since the thickness of the precious metal paste after curing requires that a precious metal paste cured product and a resistance paste cured product be formed on the electrode, the interlayer thickness and prepreg of the multilayer printed wiring board to be produced, the resin-coated copper foil In consideration of the embedding property of the adhesive layer and the build-up insulating resin, it is preferable to make the thickness as thin as possible without impairing the conductivity. As a result of the study, it was found that a multilayer printed wiring board having an interlayer thickness of around 100 μm can be produced without impairing the electrical conductivity if the thickness of the cured noble metal paste is in the range of 10 to 20 μm.

本発明で用いる抵抗ペーストは、市販されているカーボンペーストの中から選択することができる。カーボンペーストに用いられるバインダー樹脂としては、エポキシ樹脂、フェノール樹脂、メラミン樹脂、ポリイミド樹脂等の熱硬化性樹脂、及びこれを変性した樹脂、またはこれらの樹脂と熱可塑性樹脂の混合物等を用いることができる。中でも、基材との密着性、耐薬品性、コストの点からエポキシ樹脂を用いることが好ましい。カーボンペーストに含まれるフィラー成分としては、カーボン粉末の他にシリカ等の無機フィラーが加えてあっても構わない。カーボンペースト硬化物の厚さは、電極や銀ペーストの段差部に形成されるため、15〜25μmと貴金属ペーストより多少厚めに形成した方がクラック等が生じにくくなり好ましい。   The resistance paste used in the present invention can be selected from commercially available carbon pastes. As the binder resin used for the carbon paste, it is possible to use a thermosetting resin such as an epoxy resin, a phenol resin, a melamine resin, a polyimide resin, a modified resin thereof, or a mixture of these resins and a thermoplastic resin. it can. Especially, it is preferable to use an epoxy resin from the point of adhesiveness with a base material, chemical resistance, and cost. As a filler component contained in the carbon paste, an inorganic filler such as silica may be added in addition to the carbon powder. Since the thickness of the carbon paste cured product is formed at the step portion of the electrode or silver paste, it is preferable that the carbon paste cured product is formed to have a thickness of 15 to 25 μm, which is slightly thicker than the noble metal paste.

以下に、実施例及び比較例を示して本発明を具体的に説明するが、本発明はこれに限定されるものではない。   Hereinafter, the present invention will be specifically described with reference to Examples and Comparative Examples, but the present invention is not limited thereto.

各実施例及び比較例で製造した抵抗素子を内蔵した抵抗素子内蔵の多層プリント配線板について、抵抗値測定、高温高湿試験、サーマルサイクル試験(TCT)を行い内蔵されている抵抗素子の特性について評価した。評価方法は以下に示す通り。   About the characteristic of the built-in resistance element by performing resistance value measurement, high-temperature and high-humidity test, and thermal cycle test (TCT) for the multilayer printed wiring board with the built-in resistance element built in each example and comparative example. evaluated. The evaluation method is as follows.

抵抗値測定では、各実施例及び比較例で製造した抵抗素子内蔵基板のうち抵抗素子の設計値が100Ωである素子100個について、マルチメーターで抵抗値測定を行い平均抵抗値、標準偏差(σ)、3σの値を算出し抵抗値のばらつきの程度を評価した。   In the resistance value measurement, resistance values are measured with a multimeter for 100 elements having a resistance element design value of 100Ω among the resistance element built-in substrates manufactured in each of the examples and comparative examples, and the average resistance value and the standard deviation (σ ) The value of 3σ was calculated and the degree of variation in resistance value was evaluated.

高温高湿試験では、各実施例及び比較例で製造した抵抗素子内蔵基板について40℃、95%での高温高湿試験を1000時間行い、試験前後の抵抗値より抵抗値変化を算出した。   In the high-temperature and high-humidity test, the high-temperature and high-humidity test at 40 ° C. and 95% was performed for 1000 hours on the resistive element-embedded substrates manufactured in each Example and Comparative Example, and the change in resistance value was calculated from the resistance values before and after the test.

TCTでは、各実施例及び比較例で製造した抵抗素子内蔵基板について低温槽−40℃、高温槽125℃、さらし時間30分の条件で1000サイクルTCTを行い、試験後の抵抗値が106Ω以上となった素子をクラックによる不良と判定した。各実施例及び比較例について、設計値が100Ωである100個の素子についてテストした。 In TCT, the resistance element built-in substrate manufactured in each Example and Comparative Example was subjected to 1000 cycle TCT under conditions of a low temperature bath of −40 ° C., a high temperature bath of 125 ° C., and an exposure time of 30 minutes, and the resistance value after the test was 10 6 Ω. The element which became the above was determined to be defective due to cracks. For each example and comparative example, 100 devices having a design value of 100Ω were tested.

銅厚35μmの0.6mm厚のBTレジン両面銅張積層板(三菱ガス化学社製)の基板を脱脂、洗浄した後、エッチング用マスクのレジストをラミネートし、パターン転写する露光処理と、レジストを現像処理し、該レジストパターンをエッチング用マスクとして不要部分の銅箔をエッチングして導体回路及び抵抗体電極を含む第一電極を形成した。この時、抵抗体電極の幅は400μmであった。次に、基板上に再度エッチングのレジストをラミネート・露光・現像し、第一電極の抵抗体電極のみを開口させて、抵抗体電極の銅箔を厚さ約15μmまでハーフエッチングした。このようにして形成された抵抗体電極上に導電性の銀ペーストLS−504J(アサヒ化学研究所社製)を電極内側を100μm空けて残りの外側300μmの領域にスクリーン印刷した。乾燥・硬化後に、銀ペーストの第二電極の膜厚を測定したところ、膜厚は約15μmであった。このようにして銀ペーストの第二電極が形成した。電極上に抵抗体ペーストのカーボンペーストTU−100−8(アサヒ化学研究所社製)をスクリーン印刷した。次に、基板を乾燥・硬化後に、カーボンペーストの抵抗体の膜厚を測定したところ、膜厚は約20μmであった。次に、この基板上に樹脂付き銅箔ARCC R−0870(松下電工社製)を真空プレス機にて圧力30kgf/cm2、温度170℃で1時間かけて積層した後、ビアの形成部の銅箔をエッチングし、さらに、CO2レーザーで絶縁層を穿孔し、ビア用孔の加工を行った。この後
、無電解銅めっき、電気銅めっきによりビア用孔内、及び基板表面にめっき層を形成し、ビアを介して、下層及びめっき層を電気的に接続し、めっき層をエッチングにより所定の導体パターンを形成して、内層に抵抗体を内蔵した抵抗素子内蔵の多層プリント配線板を製造した。
After degreasing and cleaning the 0.6 mm thick BT resin double-sided copper-clad laminate (Mitsubishi Gas Chemical Co., Ltd.) with a copper thickness of 35 μm, laminating the resist of the mask for etching, and exposing the resist for pattern transfer The development process was carried out, and the copper foil of an unnecessary part was etched using this resist pattern as an etching mask to form a first electrode including a conductor circuit and a resistor electrode. At this time, the width of the resistor electrode was 400 μm. Next, the resist for etching was laminated, exposed and developed again on the substrate, and only the resistor electrode of the first electrode was opened, and the copper foil of the resistor electrode was half-etched to a thickness of about 15 μm. A conductive silver paste LS-504J (manufactured by Asahi Chemical Laboratories) was screen-printed on the remaining 300 μm area on the remaining 300 μm area on the resistor electrode formed in this manner. When the film thickness of the second electrode of the silver paste was measured after drying and curing, the film thickness was about 15 μm. A second electrode of silver paste was thus formed. Resistor paste carbon paste TU-100-8 (Asahi Chemical Laboratory Co., Ltd.) was screen-printed on the electrode. Next, when the thickness of the carbon paste resistor was measured after drying and curing the substrate, the thickness was about 20 μm. Next, a resin-coated copper foil ARCC R-0870 (manufactured by Matsushita Electric Industrial Co., Ltd.) was laminated on the substrate with a vacuum press at a pressure of 30 kgf / cm 2 and a temperature of 170 ° C. for 1 hour, and then the copper in the via formation portion. The foil was etched, and further, an insulating layer was drilled with a CO2 laser to process via holes. Thereafter, a plating layer is formed in the via hole and on the substrate surface by electroless copper plating and electrolytic copper plating, the lower layer and the plating layer are electrically connected through the via, and the plating layer is etched to a predetermined level. A conductor pattern was formed to produce a multilayer printed wiring board with a built-in resistance element having a built-in resistor in the inner layer.

銅厚18μmの0.6mm厚のBTレジン両面銅張積層板(三菱ガス化学社製)の基板を脱脂、洗浄した後、エッチングレジストをラミネート・露光・現像し、不要部分の銅箔をエッチングして導体回路及び抵抗体電極を含む第一電極をを形成した。この時抵抗体電極の幅は400μmであった。このようにして形成された抵抗体電極上に導電性の銀ペーストXA−436(藤倉化成社製)を電極内側を100μm空けて残りの外側300μmの領域にスクリーン印刷した。次に、乾燥・硬化後に、銀ペーストの第二電極を形成した。銀ペーストの第二電極の膜厚を測定したところ、膜厚は約12μmであった。このようにして銀ペーストの第二電極が形成された抵抗体電極を含む第一電極上にカーボンペーストのドータイトR−121(藤倉化成社製)をスクリーン印刷した。次に、乾燥・硬化後に、カーボンペーストの抵抗体の膜厚を測定したところ、膜厚は約15μmであった。次ぐに、この基板上にビルドアップ絶縁樹脂ABF−GX(味の素ファインテクノ社製)を真空加圧式ラミネーターでラミネートし、170℃の熱風オーブン中で1時間硬化させた。CO2レーザーでビア用孔の穿孔加工を行った後、無電解めっき・電気銅めっきを行い、ビア用孔内及び基板表面にビア及びめっき層を形成し、下層及び上層めっき層とをビアを介して電気的に接続した。この後、めっき層をエッチングにより所定の導体パターンを形成して、内層に抵抗体を内蔵した抵抗素子内蔵の多層プリント配線板を製造した。   After degreasing and cleaning the 0.6mm thick BT resin double-sided copper-clad laminate (Mitsubishi Gas Chemical Co., Ltd.) with a copper thickness of 18μm, the etching resist is laminated, exposed and developed, and the copper foil in unnecessary portions is etched. Thus, a first electrode including a conductor circuit and a resistor electrode was formed. At this time, the width of the resistor electrode was 400 μm. A conductive silver paste XA-436 (manufactured by Fujikura Kasei Co., Ltd.) was screen printed on the remaining 300 μm area on the remaining 300 μm area on the resistor electrode thus formed. Next, after drying and curing, a second electrode of silver paste was formed. When the film thickness of the second electrode of the silver paste was measured, the film thickness was about 12 μm. A carbon paste dotite R-121 (manufactured by Fujikura Kasei Co., Ltd.) was screen-printed on the first electrode including the resistor electrode on which the second electrode of the silver paste was formed. Next, when the film thickness of the carbon paste resistor was measured after drying and curing, the film thickness was about 15 μm. Next, build-up insulating resin ABF-GX (manufactured by Ajinomoto Fine Techno Co., Ltd.) was laminated on this substrate with a vacuum pressure laminator and cured in a hot air oven at 170 ° C. for 1 hour. After drilling the via holes with a CO2 laser, electroless plating and electrolytic copper plating are performed, vias and plating layers are formed in the via holes and on the substrate surface, and the lower and upper plating layers are connected via the vias. Connected electrically. Thereafter, a predetermined conductor pattern was formed by etching the plating layer, and a multilayer printed wiring board with a built-in resistance element having a built-in resistor in the inner layer was manufactured.

以下に、比較例として実施例した実施例3、実施例4を記す。   Below, the Example 3 and Example 4 which were implemented as a comparative example are described.

銅厚18μmの0.6mm厚のBTレジン両面銅張積層板(三菱ガス化学社製)の基板を脱脂、洗浄した後、エッチングレジストをラミネート・露光・現像し、不要部分の銅箔をエッチングして導体回路及び抵抗体電極を含む第一電極を形成した。この時抵抗体電極の幅は200μmであった。このようにして形成された抵抗体電極上に導電性の銀ペーストLS−504J(アサヒ化学研究所社製)を抵抗体電極上200μmの幅を全て被覆し、さらに、該電極よりも内側の基板の絶縁樹脂上に400μmにわたってスクリーン印刷した。次に、乾燥・硬化後に、銀ペーストの第二電極を形成した。銀ペーストの第二電極の膜厚を測定したところ、膜厚は約15μmであった。このようにして形成された銀ペーストの第二電極のうち、最も内側の200μmの部分に重なるようにカーボンペーストのTU−100−8(アサヒ化学研究所社製)をスクリーン印刷した。次に、乾燥・硬化後に、カーボンペーストの抵抗体の膜厚を測定したところ、膜厚は約20μmであった。この基板上に実施例1の製造方法と同様の方法で絶縁層及び導体回路等を形成し、内層に抵抗体を内蔵した抵抗素子内蔵の多層プリント配線板を製造した。   After degreasing and cleaning the 0.6mm thick BT resin double-sided copper-clad laminate (Mitsubishi Gas Chemical Co., Ltd.) with a copper thickness of 18μm, the etching resist is laminated, exposed and developed, and the copper foil in unnecessary portions is etched. The first electrode including the conductor circuit and the resistor electrode was formed. At this time, the width of the resistor electrode was 200 μm. A conductive silver paste LS-504J (manufactured by Asahi Chemical Research Laboratories) is coated on the resistor electrode so as to cover the entire width of 200 μm on the resistor electrode, and the substrate inside the electrode is further covered. Screen-printed over 400 μm on the insulating resin. Next, after drying and curing, a second electrode of silver paste was formed. When the film thickness of the second electrode of the silver paste was measured, the film thickness was about 15 μm. Carbon paste TU-100-8 (manufactured by Asahi Chemical Laboratory Co., Ltd.) was screen-printed so as to overlap the innermost 200 μm portion of the second electrode of the silver paste thus formed. Next, when the film thickness of the carbon paste resistor was measured after drying and curing, the film thickness was about 20 μm. An insulating layer, a conductor circuit, and the like were formed on this substrate in the same manner as in the manufacturing method of Example 1, and a multilayer printed wiring board with a built-in resistance element having a built-in resistor in the inner layer was manufactured.

銅厚18μmの0.6mm厚のBTレジン両面銅張積層板(三菱ガス化学社製)に基板を脱脂、洗浄した後、エッチングレジストをラミネート・露光・現像し、不要部分の銅箔をエッチングして導体回路及び抵抗電極を含む第一電極を形成した。この時、抵抗体電極の幅は400μmであった。このようにして形成された抵抗体電極上に導電性の銀ペーストLS−504J(アサヒ化学研究所社製)を抵抗体電極全体400μmにわたってスクリーン印刷した。次に、乾燥・硬化後に、銀ペーストの第二電極を形成した。銀ペーストの第二電極の膜厚を測定したところ、膜厚は約15μmであった。このようにして銀ペーストの第二電極が形成された第二電極上にカーボンペーストのTU−100−8(アサヒ化学研究所社製)をスクリーン印刷した。次に、乾燥・硬化後に、抵抗体を形成した。カ
ーボンペーストの抵抗体の膜厚を測定したところ、膜厚は約20μmであった。この基板上に実施例1の製造方法と同様の方法で絶縁層及び導体回路等を形成し、内層に抵抗体を内蔵した抵抗素子内蔵の多層プリント配線板を製造した。以下に実施例1〜実施例4の100個の内蔵されている抵抗素子の特性について評価した。評価結果は下記の表1に示す。
After degreasing and cleaning the substrate on a 0.6mm thick BT resin double-sided copper-clad laminate (Mitsubishi Gas Chemical Co., Ltd.) with a copper thickness of 18μm, the etching resist is laminated, exposed and developed, and the copper foil in unnecessary portions is etched Thus, a first electrode including a conductor circuit and a resistance electrode was formed. At this time, the width of the resistor electrode was 400 μm. A conductive silver paste LS-504J (manufactured by Asahi Chemical Research Laboratories) was screen-printed over the entire resistor electrode over 400 μm on the resistor electrode thus formed. Next, after drying and curing, a second electrode of silver paste was formed. When the film thickness of the second electrode of the silver paste was measured, the film thickness was about 15 μm. A carbon paste TU-100-8 (manufactured by Asahi Chemical Research Laboratories) was screen-printed on the second electrode on which the second electrode of the silver paste was thus formed. Next, a resistor was formed after drying and curing. When the film thickness of the carbon paste resistor was measured, the film thickness was about 20 μm. An insulating layer, a conductor circuit, and the like were formed on this substrate in the same manner as in the manufacturing method of Example 1, and a multilayer printed wiring board with a built-in resistance element having a built-in resistor in the inner layer was manufactured. The characteristics of 100 built-in resistance elements in Examples 1 to 4 were evaluated below. The evaluation results are shown in Table 1 below.

Figure 0004396426
なお、評価方法は、上述した方法に準じる。
Figure 0004396426
In addition, the evaluation method is based on the method mentioned above.

表1によれば、本発明の方法で製造された実施例1及び実施例2は、抵抗値のバラツキ、抵抗値変化、不良率共に良好な結果となった。   According to Table 1, Example 1 and Example 2 manufactured by the method of the present invention showed good results in resistance value variation, resistance value change, and defect rate.

本発明の抵抗素子を内蔵した多層プリント配線板の部分拡大図であり、aは、側断面図で、bは平面図で、cは、各部品の配置を説明する平面図ある。It is the elements on larger scale of the multilayer printed wiring board incorporating the resistive element of this invention, a is a sectional side view, b is a top view, c is a top view explaining arrangement | positioning of each component. 本発明の抵抗素子を内蔵した多層プリント配線板の製造方法の側断面工程図である。It is a side cross-sectional process drawing of the manufacturing method of the multilayer printed wiring board which incorporated the resistive element of this invention. 従来の抵抗素子を内蔵した多層プリント配線板の部分拡大図であり、aは、側断面図で、bは平面図ある。It is the elements on larger scale of the multilayer printed wiring board incorporating the conventional resistive element, a is a sectional side view, b is a top view. 従来の抵抗素子を内蔵した多層プリント配線板の部分拡大図であり、aは、側断面図で、bは平面図ある。It is the elements on larger scale of the multilayer printed wiring board incorporating the conventional resistive element, a is a sectional side view, b is a top view.

符号の説明Explanation of symbols

1…銅箔
10…コア基板の基板、片面銅張積層板の基板、基板
2…銅箔
20…導体配線層
21…第一電極
29…第一電極形成領域
22…抵抗体電極
30…感光性レジスト
40…(銀ペーストの)第二電極
45…第二電極形成禁止領域
49…第二電極形成領域
50…抵抗体
59…抵抗体形成領域
6…絶縁樹脂層
60…ビルドアップ絶縁樹脂
70…ビア用孔
71…ビア
8…(無電解銅めっき、電気銅めっきの)めっき導体層
80…配線パターン
100…抵抗素子内蔵の多層プリント配線板
DESCRIPTION OF SYMBOLS 1 ... Copper foil 10 ... The board | substrate of a core board | substrate, the board | substrate of a single-sided copper clad laminated board, the board | substrate 2 ... Copper foil 20 ... Conductor wiring layer 21 ... 1st electrode 29 ... 1st electrode formation area 22 ... Resistor electrode 30 ... Photosensitivity Resist 40 ... second electrode 45 (of silver paste) ... second electrode formation prohibition region 49 ... second electrode formation region 50 ... resistor 59 ... resistor formation region 6 ... insulating resin layer 60 ... build-up insulating resin 70 ... via Hole 71 ... via 8 ... plated conductor layer 80 (electroless copper plating, electrolytic copper plating) ... wiring pattern 100 ... multilayer printed wiring board with built-in resistance element

Claims (7)

絶縁層上に形成された一対からなる第一電極間に、抵抗体を形成した抵抗素子において、第一電極上に、該第一電極の、内端部を被覆しない位置で、大きさ以下の第二電極を設け、前記第一電極及び第二電極とその他の第一電極及び第二電極との一対の電極間に、両端が各々の第一電極の内端部と第二電極とに接するように抵抗体を設けたことを特徴とする抵抗素子。   In a resistance element in which a resistor is formed between a pair of first electrodes formed on an insulating layer, the first electrode has a size not larger than the first electrode at a position not covering the inner end portion. A second electrode is provided, and between the pair of electrodes of the first electrode and the second electrode and the other first electrode and the second electrode, both ends are in contact with the inner end of each first electrode and the second electrode. A resistance element provided with a resistor as described above. 前記第一電極の内端部が、50〜200μmの長さを有する位置に設けられていることを特徴とする請求項1記載の抵抗素子。   The resistance element according to claim 1, wherein the inner end portion of the first electrode is provided at a position having a length of 50 to 200 μm. 前記第一電極の内端部が、第一電極の他の部分より薄いことを特徴とする請求項1、又は2記載の抵抗素子。   The resistance element according to claim 1, wherein an inner end portion of the first electrode is thinner than other portions of the first electrode. 前記抵抗体が、抵抗ペーストから形成されていることを特徴とする請求項1乃至3のいずれか1項記載の抵抗素子。   The resistance element according to claim 1, wherein the resistor is made of a resistance paste. 前記第二電極が、貴金属からなることを特徴とする請求項1乃至4のいずれか1項記載の抵抗素子。   The resistance element according to claim 1, wherein the second electrode is made of a noble metal. 前記第一電極が、多層プリント配線板を構成する導体層の一部であることを特徴とする請求項1乃至5のいずれか1項記載の抵抗素子。   6. The resistance element according to claim 1, wherein the first electrode is a part of a conductor layer constituting a multilayer printed wiring board. 請求項1乃至6のいずれか1項記載の抵抗素子を内蔵したことを特徴とする多層プリント配線板。   A multilayer printed wiring board comprising the resistance element according to any one of claims 1 to 6.
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