JP4361418B2 - Digital / analog conversion circuit - Google Patents

Description

  The present invention relates to a digital / analog conversion circuit used in a 1-bit digital / analog converter.

  Conventionally, a 1-bit digital / analog conversion circuit has been put to practical use as a digital / analog conversion circuit for converting a digital audio signal into an analog audio signal. This 1-bit digital / analog conversion circuit obtains a 1-bit series pulse signal whose number or width changes as a converted output, and outputs an output whose number or width changes as a low pass. An analog audio signal can be obtained by supplying to the filter and averaging.

  In this case, the pulse waveform output from the digital / analog conversion circuit is either a high level or a low level binary, and the number of pulse waveforms that change in accordance with the input digital data is the pulse number modulation ( PNW), and the one whose pulse waveform width changes is called pulse width modulation (PWM). According to the digital / analog conversion circuit of such a system, distortion generated at the time of conversion can be suppressed to a minimum, and it can be converted into a good analog audio signal without distortion.

  FIG. 5 shows an actual configuration of a conventional 1-bit digital / analog conversion circuit. A conventional 1-bit digital / analog conversion circuit will be described with reference to FIG. The input includes digital audio data reproduced from a compact disc (CD) or the like. The digital audio data is digital data having a predetermined number of bits (here, one sample is 16 bits) and is supplied to the digital filter 1.

  The digital filter 1 performs oversampling of the supplied digital audio data and raises the sampling frequency to an integral multiple. Then, the digital audio data oversampled by the digital filter 1 is supplied to the noise shaper 4 via the adder 2, and the noise shaper 4 performs a process of compressing the number of bits per sample.

  Here, the noise shaper 4 compresses 16 bits into 4 bits, and the 4-bit data bit-compressed by the noise shaper 4 has a quantization step of 0, ± 0.25, ± 0.5, ± 0. .75, ± 1.0 9-value data.

  Here, the adder 2 performs processing for adding a constant DC component obtained from the offset data generation circuit 3 to the oversampled digital audio data. This DC component addition processing is performed in order to stably perform the bit compression processing in the noise shaper 4, and a small-level DC component is always added.

  The digital audio data to which the DC offset component has been added is bit-compressed by the noise shaper 4 and then supplied to the pulse converter 5 to be converted into 1-bit (binary) pulse data. By this conversion, pulse number modulation in which the number of pulse waveforms changes or pulse width modulation in which the width of the pulse waveform changes is performed, and the converted pulse data is averaged by the low-pass filter 6 to obtain an analog audio signal. Note that, when the input data is 0 data (that is, in a silent state) by the conversion process in the pulse conversion unit 5, a pulse with a duty of 50% is output.

  On the other hand, some audio devices can perform a mute operation for forcibly setting an output audio signal to a silent state. In order to perform a mute operation by digital signal processing in a device using a 1-bit digital / analog conversion circuit, the output of the noise shaper 4 is forcibly set to 0 data, and the duty of the pulse conversion unit 5 is 50%. It was controlled to output a pulse.

  However, when switching to output a pulse with a duty of 50% by such forced control, there is a problem that the audio signal output at the time of switching includes noise such as a click sound.

  The noise such as a click sound at the time of switching is due to the influence of the DC offset component added to stably perform the bit compression processing in the noise shaper 5, and the output of the noise shaper 5 becomes the boundary at the time of switching. It will be removed instantly, resulting in a click sound as a transient response.

  FIG. 6 is an explanatory diagram of a state in which noise such as a click sound is generated when the operation state is switched to the mute state. That is, in the operating state, for example, a positive (+) DC offset component is added to the analog reference voltage, and is instantaneously removed at the time of switching to the mute state. Noise is generated.

As a method for solving this, there is a method of supplying data corresponding to a DC offset component to the pulse converter 5 instead of 0 data when a mute operation is performed (see, for example, Patent Document 1).
JP-A-5-244010

  However, in the conventional method, the digital circuit needs to be in an operating state even in a mute state, and normal operation must be guaranteed. For example, the mute circuit cannot operate as a fail-safe circuit when the PLL is out of lock.

  In order to prevent this, control by a switch in an analog circuit is necessary, but at that time as well, as described above, due to the influence of the DC offset component, a DC offset is instantaneously generated at the time of switch switching or Since it is removed, a click sound is generated due to the transient response.

  In view of the above, an object of the present invention is to provide a 1-bit digital / analog conversion circuit that does not output noise such as a click sound during a mute operation.

  The digital / analog conversion circuit according to the present invention includes a DC offset generating means for generating a DC offset, an adding means for adding the DC offset to input digital data, and a bit for the digital data to which the DC offset is added. A noise shaper that performs compression processing; a subtracting unit that subtracts the DC offset from the digital data that has been subjected to bit compression; and a conversion unit that converts the digital data that has been subjected to the bit compression processing by subtracting the DC offset into 1-bit data. .

  According to the above configuration, by including the subtracting unit that subtracts the DC offset from the digital data that has been subjected to the bit compression processing that is output from the noise shaper, the DC offset component necessary for the stabilization of the noise shaper can be removed. In addition, it is possible to remove the DC offset component at the subsequent stage of the output of the noise shaper, stabilize the noise shaper, and switch to a smooth mute state in which noise such as a click sound does not occur.

  The digital / analog conversion circuit of the present invention includes a low-pass filter that converts the 1-bit data output from the conversion means into an analog signal and outputs the analog signal, and the low-pass filter during an initial operation or a mute operation. And a control means for bringing the output terminal into a high impedance state.

  According to the above configuration, by providing the control means for setting the output terminal of the low-pass filter in a high impedance state during the initial operation or the mute operation, noise such as a click sound is generated during the initial operation or the mute operation. Can be prevented.

  The digital / analog conversion circuit according to the present invention includes a DC offset generating means for generating a DC offset in accordance with a reference signal, an adding means for adding the DC offset to input digital data, and the DC offset being added. A noise shaper for performing bit compression processing on the digital data, conversion means for converting the digital data subjected to the bit compression processing into 1-bit data, and converting the 1-bit data output from the conversion means into an analog signal In addition, a low-pass filter that adds a direct-current component having a polarity opposite to that of the direct-current offset and outputs the output from an output terminal, and according to a comparison result between the output of the low-pass filter and a predetermined analog reference voltage, Comparing means for generating the reference signal to be supplied.

  According to the above configuration, the optimum DC offset is automatically obtained by comparing the output of the low-pass filter with a predetermined analog reference voltage and supplying the reference signal to the DC offset generating means according to the comparison result. And can be switched to a smooth mute state in which noise such as a click sound does not occur.

  The digital / analog conversion circuit according to the present invention includes control means for setting the output terminal of the low-pass filter to a high impedance state during an initial operation or a mute operation.

  According to the above configuration, by providing the control means for setting the output terminal of the low-pass filter in a high impedance state during the initial operation or the mute operation, noise such as a click sound is generated during the initial operation or the mute operation. Can be prevented.

  According to the present invention, the DC offset component necessary for stabilization of the noise shaper is not removed, and the DC offset component is removed at the subsequent stage of the output of the noise shaper, thereby stabilizing the noise shaper and clicking sound. Can be switched to a smooth mute state in which no noise is generated.

(Embodiment 1)
FIG. 1 is a block diagram showing a schematic configuration of a digital / analog conversion circuit for explaining the first embodiment of the present invention. The digital / analog conversion circuit of the present embodiment includes a digital filter 1 to which input digital data is supplied, an offset data generation circuit 3 that generates a DC offset, and a DC generated by the offset data generation circuit 3 at the output of the digital filter 1. An adder 2 that adds an offset, a noise shaper 4 that performs a bit compression process on the digital data added with the DC offset output from the adder 2, and a bit compression process that is output from the noise shaper 4 From the subtracter 10 for subtracting the DC offset generated by the offset data generation circuit 3 from the digital data, the pulse converter 5 for converting the digital data output from the subtractor 10 into 1-bit data, and the pulse converter 5 Low-pass fill that converts 1-bit output data into an analog signal And a 6.

  In the digital / analog conversion circuit of this embodiment, a predetermined DC offset component output from the offset data generation circuit 3 is added by the adder 2, and the output of the adder 2 is input to the noise shaper 4. The noise shaper 4 outputs the 4-bit data compressed from the 16-bit data as described above, and the subtractor 10 outputs a predetermined DC offset component supplied from the offset data generation circuit 3 from the output of the noise shaper 4. Subtract. The output of the subtracter 10 is supplied to the pulse converter 5. The output of the pulse converter 5 has a duty ratio of 50% when there is no sound, and the DC offset component is cancelled.

  In this case, as the DC offset component generated by the offset data generation circuit 3, the number of bits required by the adder 2 is, for example, 16 bits and a large number of bits, and a subtractor that receives the output after bit compression by the noise shaper 4 10 is, for example, 4 bits and does not match. For this reason, the DC offset data is set in advance so as to be the same before and after the noise shaper 4.

  As described above, according to the digital / analog conversion circuit of the present embodiment, the noise shaper 4 is stabilized by including the subtractor 10 that subtracts the DC offset from the digital data that has been subjected to the bit compression processing that is output from the noise shaper 4. The noise shaper 4 is stabilized by removing the DC offset component after the output of the noise shaper 4 without removing the DC offset component necessary for the conversion, and the click shaper and other noises are smoothly generated. Switching to the mute state can be performed.

(Embodiment 2)
FIG. 2 is a block diagram showing a schematic configuration of a digital / analog conversion circuit for explaining the second embodiment of the present invention. In addition to the second embodiment shown in FIG. 1, the digital / analog conversion circuit of the present embodiment includes a switch 11 that sets the output terminal of the low-pass filter 6 to a high impedance state during an initial operation or a mute operation.

  The digital / analog conversion circuit of the present embodiment performs the same operation as that of the first embodiment, but the switch 11 of the output unit is provided to create a mute state, and is also muted in the initial operation.

  For example, at the moment when the digital / analog conversion circuit is powered on, the processing of the subtracter 10 starts at a stage where the addition data from the adder 2 is not input to the noise shaper 4. That is, a reverse DC offset occurs, and the output of the pulse converter 5 does not reach a duty ratio of 50%. Thereafter, when the addition data from the adder 2 is processed by the noise shaper 4, the duty ratio returns to 50%.

  At that moment, a click sound is generated by removing the DC offset component. For this reason, the switch 11 is turned off at the initial operation or at the time of mute, and an operation for making a high impedance output is required.

  As described above, according to the digital / analog conversion circuit of the present embodiment, the switch 11 that sets the output terminal of the low-pass filter 6 to the high impedance state during the initial operation or the mute operation is provided. Generation of noise such as a click sound can be prevented.

(Embodiment 3)
FIG. 3 is a block diagram showing a schematic configuration of a digital / analog conversion circuit for explaining the third embodiment of the present invention. The digital / analog conversion circuit of the present embodiment includes a digital filter 1 to which input digital data is supplied, an offset data generation circuit 3 that generates a DC offset according to a supplied reference signal, and an output of the digital filter 1. From an adder 2 for adding the DC offset generated by the offset data generation circuit 3, a noise shaper 4 for performing bit compression processing on the digital data added with the DC offset output from the adder 2, and the noise shaper 4 A pulse converter 5 that converts the digital data that has been subjected to bit compression processing to 1-bit data, a low-pass filter 6 that converts 1-bit data output from the pulse converter 5 into an analog signal, and a low-pass filter 6 Is compared with a predetermined analog reference voltage and turned off according to the comparison result. And a comparator 12 for supplying a reference signal to Ttodeta generation circuit 3.

  The digital / analog conversion circuit of this embodiment does not need to correspond to the number of bits required before and after the noise shaper 4 in the offset data generation circuit 3 and can be automatically adjusted.

  A predetermined DC offset component from the offset data generation circuit 3 is added to the digital data by the adder 2 and supplied to the noise shaper 4. The noise shaper 4 outputs 4-bit data and supplies it to the pulse converter 5.

  The output of the pulse converter 5 has a duty ratio of 50% when there is no sound. However, since a predetermined DC offset component is added from the offset data generation circuit 3, the duty ratio does not become 50%.

  If this output is passed through the low-pass filter 6, only the DC offset component can be extracted. The low-pass filter 6 is an analog circuit and operates around an analog reference voltage. That is, (analog reference voltage + DC offset component voltage) is output.

  Therefore, a comparator 12 that compares the analog reference voltage and the output of the low-pass filter 6 is provided. The result is returned to the offset data generation circuit 3 to adjust the offset data. This loop is repeated until the analog reference voltage matches the output of the low-pass filter 6.

  However, the offset data generation circuit 3 originally required a DC offset component to stabilize the noise shaper 4. That is, matching the analog reference voltage with the output of the low-pass filter 4 means that the DC offset component becomes zero. In order to avoid this, an appropriate offset may be given to the low-pass filter 6 from the beginning.

  That is, by applying a reverse offset to the low-pass filter 6 as much as the DC offset component is necessary, a desired DC offset component is input to the noise shaper 4, and the output of the low-pass filter 6 matches the analog reference voltage. , There can be no DC offset.

  As described above, according to the digital / analog conversion circuit of the present embodiment, the output of the low-pass filter 6 is compared with a predetermined analog reference voltage, and the comparator supplies the reference signal to the offset data generation circuit 3 according to the comparison result. 12, the optimum DC offset can be automatically set, and the switching to a smooth mute state in which noise such as a click sound does not occur can be performed.

(Embodiment 4)
FIG. 4 is a block diagram showing a schematic configuration of a digital / analog conversion circuit for explaining the fourth embodiment of the present invention. In addition to the third embodiment shown in FIG. 3, the digital / analog conversion circuit of the present embodiment includes a switch 11 that sets the output terminal of the low-pass filter 6 to a high impedance state during an initial operation or a mute operation.

  In the digital / analog conversion circuit of the present embodiment, the same operation as in the third embodiment is performed, but the switch 11 of the output unit is provided to create a mute state, and is also muted in the initial operation.

  For example, at the moment when the digital / analog conversion circuit of this embodiment is powered on, the processing of the reverse DC offset component given to the low-pass filter 6 is performed at the stage where the addition data from the adder 2 is not input to the noise shaper 4. Begins.

  That is, a reverse DC offset occurs, and the output of the low-pass filter 6 does not match the analog reference voltage. Thereafter, the addition data from the adder 2 is processed by the noise shaper 4 and output from the pulse converter 5, a DC offset component is generated and coincides with the analog reference voltage.

  At that moment, a click sound is generated by removing the DC offset component. For this reason, the switch 11 is turned off at the initial operation or at the time of mute, and an operation for making a high impedance output is required.

  As described above, according to the digital / analog conversion circuit of the present embodiment, the switch 11 that sets the output terminal of the low-pass filter 6 to the high impedance state during the initial operation or the mute operation is provided. Generation of noise such as a click sound can be prevented.

  The digital / analog conversion circuit of the present invention is useful as a 1-bit digital / analog conversion circuit capable of smoothly switching to a mute state free from noise such as a click sound during mute.

1 is a circuit diagram showing an example of a configuration that can remove a DC offset component of a final output while giving a DC offset component to a noise shaper in Embodiment 1 of the present invention; FIG. 5 is a circuit diagram showing an example of a configuration in which switch control is provided for the final output of a digital / analog conversion circuit in Embodiment 2 of the present invention. FIG. 6 is a circuit diagram showing an example of a configuration that can remove a DC offset component of a final output while giving a DC offset component to a noise shaper in Embodiment 3 of the present invention. FIG. 7 is a circuit diagram showing an example of a configuration in which switch control is provided for the final output of a digital / analog conversion circuit in Embodiment 4 of the present invention. Circuit diagram showing an example of the configuration of a conventional digital / analog conversion circuit Diagram showing click sound generation mechanism

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Digital filter 2 Adder 3 Offset data generation circuit 4 Noise shaper 5 Pulse conversion part 6 Low pass filter 10 Subtractor 11 Switch 12 Comparator

Claims (4)

DC offset generating means for generating a DC offset;
Adding means for adding the DC offset to the input digital data;
A noise shaper that performs bit compression processing on the digital data to which the DC offset is added;
Subtracting means for subtracting the direct current offset from the bit-compressed digital data;
Conversion means for converting the bit-compressed digital data obtained by subtracting the DC offset into 1-bit data;
A digital / analog conversion circuit. The digital / analog conversion circuit according to claim 1,
A low-pass filter that converts 1-bit data output from the conversion means into an analog signal and outputs the analog signal;
Control means for setting the output terminal of the low-pass filter in a high impedance state during initial operation or mute operation,
A digital / analog conversion circuit. DC offset generating means for generating a DC offset according to the reference signal;
Adding means for adding the DC offset to the input digital data;
A noise shaper that performs bit compression processing on the digital data to which the DC offset is added;
Conversion means for converting the digital data subjected to the bit compression processing into 1-bit data;
A low-pass filter that converts 1-bit data output from the conversion means into an analog signal, adds a DC component having a polarity opposite to the DC offset, and outputs the resultant from an output terminal;
Comparing means for generating the reference signal to be supplied to the DC offset generating means according to a comparison result between the output of the low-pass filter and a predetermined analog reference voltage;
A digital / analog conversion circuit. A digital / analog converter circuit according to claim 3,
A digital / analog conversion circuit comprising control means for setting the output terminal of the low-pass filter in a high impedance state during an initial operation or a mute operation.

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