JP2009130633A - Controller - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To inexpensively provide a controller capable of suppressing the states of an object to be controlled even in a high frequency band. <P>SOLUTION: The controller 100A includes the first processing part A of a forward system and the second processing part B of a feedback system. The state of the object 50 to be controlled is detected by a sensor S as an analog signal 6a. The analog signal 6a is converted with ΔΣ so as to generate a digital signal d8 by a ΔΣADC 60. The digital signal d8 is a broad band bit stream and supplied to one terminal of a subtractor 20 as a digital signal d9 via a loop filter 70. An over-sampled digital signal d2 is supplied to the other terminal of the subtractor 20. Consequently, broad band feedback is performed. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a control device that controls a control object.

  When controlling a controlled object based on an input digital signal, the controlled object is controlled based on an analog signal obtained by DA-converting the digital signal. When this control is executed by feedback control, there are a method of feeding back an analog signal and a method of feeding back a digital signal.

A circuit that feeds back an analog signal has an advantage that there is no delay associated with sampling unlike a digital signal, and there is no band limitation due to the sampling frequency, so that the loop band can be easily widened. On the other hand, since a circuit that feeds back a digital signal can be configured with a loop filter as a digital circuit, it is not necessary to allow for a margin in consideration of variations in elements as compared with the case of configuring an analog circuit. For this reason, a circuit that feeds back a digital signal has advantages that the stability of the loop filter is high and the design freedom is wide, and that the loop filter can be dynamically changed. As a circuit for feeding back a digital signal, for example, a circuit described in Patent Document 1 is known.
JP-T-2004-537890

  However, a circuit that feeds back an analog signal is greatly affected by variations in elements, and it is difficult to design a highly sensitive loop filter. Furthermore, the stability of the element is poor and the degree of freedom in design is low, and it is difficult to dynamically change the loop filter. On the other hand, since a circuit that feeds back a digital signal is processed by a DSP (Digital Signal Processor), such a problem relating to the loop filter does not occur. Since a delay occurs in the / A converter, there is a problem that errors such as distortion and noise can be suppressed only in a band considerably lower than the sampling frequency. If the sampling frequency is increased in order to solve this problem, an expensive A / D converter and D / A converter must be used, resulting in an increase in cost. In addition, there is a similar problem when Ford forward control is executed to detect a disturbance and cancel it.

  The present invention has been made in view of such a situation, and an object of the present invention is to provide a control device capable of suppressing distortion of an analog output even in a high frequency band at a low cost.

  In order to solve the above problems, a control device according to the present invention controls a control object, and controls a control object based on a first digital signal (for example, d1 in FIG. 1). 1st means (for example, A of FIG. 1) which produces | generates an analog signal (for example, a5 of FIG. 1), and 2nd means (for example, figure) which detects the state of the said control target object and supplies it to said 1st means 1), and the first means oversamples the first digital signal to generate a second digital signal (for example, d2 in FIG. 1), and the second digital signal; Based on the fourth digital signal, a synthesis unit that synthesizes a third digital signal (for example, d9 in FIG. 1) supplied from the second means to generate a fourth digital signal (for example, d3 in FIG. 1). The first analog signal is And a processing unit (for example, 30 and 40 in FIG. 1) for controlling the control object, and the second means detects a state of the control object and detects a second analog signal (for example, FIG. A state detection unit that generates 1 a6), and a ΔΣ A / D conversion unit that converts the second analog signal by a ΔΣ method to generate a fifth digital signal of one or more bits (for example, d8 in FIG. 1); And applying at least one of phase compensation and gain compensation to the fifth digital signal and supplying the third digital signal to the first means (see FIG. 1), or supplying the fifth digital signal to the first digital signal A third digital signal is supplied to the first means (see FIG. 5). Further, it is preferable that the second means includes a loop filter that generates at least one of phase compensation and gain compensation on the fifth digital signal to generate the third digital signal.

  According to the present invention, the state of the control object is detected, and the fifth digital signal obtained by ΔΣ modulation of the detected state by the ΔΣ A / D converter is fed back. The output signal of ΔΣ modulation is wide band, but the number of bits is small. Therefore, the A / D conversion unit can be configured at low cost, and broadband feedback can be executed. Even if a delay occurs due to the A / D conversion unit or the loop filter, the first digital signal band (baseband) is extremely small and hardly causes a phase delay. When feedback is performed at the sampling rate of the first digital signal, the loop gain cannot be increased in consideration of the phase delay, but according to the present invention, the loop gain can be increased, so that distortion and noise are greatly suppressed. can do. That is, since the ΔΣ bit stream can achieve sufficiently high resolution in the low frequency range, it is possible to simultaneously realize high frequency and high resolution in the feedback band, and to greatly suppress distortion and noise.

  The processing unit includes a ΔΣ D / A conversion unit that converts the fourth digital signal into an analog signal by a 1-bit or multiple-bit ΔΣ method, and removes a high-frequency component of the analog signal to thereby generate the first analog signal. It is preferable to provide a low-pass filter that generates a signal. In this case, since the controlled object can be driven by ΔΣ modulation, high-accuracy control can be performed with an inexpensive configuration.

  On the other hand, instead of detecting the state of the controlled object and supplying it to the first means, the second means detects a disturbance and supplies it to the first means, and instead of the state detector, the second means And a disturbance detection unit that generates the second analog signal. In this case, since the state of the controlled object is not fed back, feedforward control is performed. However, since disturbance can be canceled, the controlled object can be controlled with high accuracy.

Here, it is preferable that the loop filter can change a loop characteristic according to an instruction from the outside. The instruction from the outside may be specified by a user operation or may be a command from a higher-level device.
Moreover, it is preferable that the loop filter can change a loop characteristic according to a situation of distortion or noise included in the second analog signal. In this case, the loop characteristics can be dynamically changed autonomously. For example, if the second analog signal is a clipped component or no input, this may be detected by a loop filter and the loop filter operation may be turned off to prevent the distortion and silence noise associated with the clip from being output. It becomes possible.
Further, the second means detects a disturbance and generates a third analog signal (for example, an output signal 110a shown in FIG. 8), and converts the third analog signal by a ΔΣ method to 1 Or a second ΔΣ A / D converter that generates a multi-bit sixth digital signal, and the loop filter is an adaptive filter that dynamically changes a loop characteristic based on the sixth digital signal. May be.

  Next, in the above-described control device, the second means supplies the fifth digital signal as the third digital signal to the first means, and the processing unit performs at least one of phase compensation and gain compensation. A loop filter, a ΔΣ D / A converter that converts the output signal of the loop filter into an analog signal that is pulse-width modulated by a 1-bit or multiple-bit ΔΣ method, and removes a high-frequency component of the analog signal It is preferable to provide a low-pass filter that generates the first analog signal.

1. Embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing a basic configuration of a control device 100A according to the present embodiment. As shown in the figure, the control device 100A is a device that includes a first processing unit A and a second processing unit B, and controls the control object 50 by inputting a digital signal d1. In this example, the first processing unit A is a forward system, and the second processing unit B is a feedback system. In the drawing, analog signals are indicated by solid lines, and digital signals are indicated by broken lines. The digital signals d1, d2, d3, and d9 are J (J is a natural number of 2 or more) bits, and the digital signal d8 (fifth digital signal) is K (K is a natural number of J> K) bits. In this example, J = 16 and K = 1.

  The sensor S detects the state of the control object 50. For example, when the control object 50 is a speaker, a microphone is used as the sensor S1. The sound output from the speaker may be converted into an electrical signal by a microphone and output to the ΔΣ ADC 60 as an analog signal a6 (second analog signal). Further, when the control object 50 is, for example, a power amplifier, the state of the control object is a drive signal. The analog signal a <b> 6 includes distortion and noise components generated in the control object 50. In the present embodiment, distortion and noise components are suppressed by feeding back a digital signal based on the analog signal a6 obtained by monitoring the control target 50.

The digital signal d1 (first digital signal) is a signal whose sampling frequency is fs input to the control device 100A. The digital signal d1 is oversampled by the oversampling filter 10 and converted into a digital signal d2 (second digital signal) having a frequency fns (> fs). Specifically, the digital signal d1 is given as a data string having a 1 / fs period, and the oversampling filter 10 performs an interpolation process based on the digital signal d2 and forms a digital signal d2 having a data string having a 1 / fns period. Is generated. The frequency fns may be n (n> 2) times the frequency fs.
The subtracter 20 is supplied with the digital signal d2 and the digital signal d9 (third digital signal) output from the loop filter 70. The subtracter 20 generates a digital signal d3 (fourth digital signal) by subtracting the digital signal d9 from the digital signal d2. The subtracter 20 functions as a unit that combines the digital signal d2 and the digital signal d9 to generate the digital signal d3, and the digital signal d3 functions as an error signal.

  The sampling rate of the digital signal d3 is the frequency fns. The digital signal d3 is converted to an analog signal by using a ΔΣ DAC 30 which is a ΔΣ D / A converter that performs processing with the number of bits limited to 1 to obtain an analog signal a4. Then, the control object 50 is controlled by the analog signal a5 (first analog signal) obtained by passing the analog signal a4 through the low-pass filter (hereinafter referred to as LPF) 40.

  The state of the control target 50 is monitored directly or indirectly as an analog signal a6. As a direct monitoring method, for example, a detection device that captures an output signal of a power amplifier is applicable. As an indirect monitoring method, for example, a microphone device that captures a speaker output is applicable. The analog signal a6 is digitally converted by a ΔΣ ADC 60, which is a ΔΣ A / D converter, and a digital signal d8 having a frequency fns is generated. A loop filter 70 is used to stabilize the feedback. The loop filter 70 executes at least one of phase compensation and gain compensation. The digital signal d9 obtained by the loop filter 70 compensating the digital signal d8 is input to the subtracter 20, so that a feedback circuit is constructed. The loop filter 70 can be configured by a DSP. By configuring the loop filter 70 with a DSP, the design becomes easy and the stability can be increased.

  As described above, in this embodiment, the analog output is digitally converted by the ΔΣ A / D converter, and feedback is performed in the state of the bit stream of ΔΣ, so that it is included in the state of the controlled object 50 (analog signal a6). Suppress distortion and noise. For example, assuming that fns / fs = 256, the digital signal d8, which is a bit stream of ΔΣ, has a high frequency, so that the band of the component to be fed back can be widened. In addition, the ΔΣ bit stream can achieve a sufficiently high resolution in a low frequency range. As a result, feedback control can be executed with high accuracy. Furthermore, although the sampling rate of the digital signal d8 is the frequency fns, which is a high frequency, since the ΔΣ ADC 60 is sufficient for one bit, it can be configured at low cost. In addition, since the loop filter 70 is realized by executing digital processing by a DSP or the like, it is possible to easily design a filter having high stability.

  The configuration of the ΔΣ DAC 30 is not particularly limited, and various circuits can be employed. FIG. 2 is a block diagram illustrating an example of the configuration of the ΔΣ DAC 30. In the example of this figure, the ΔΣ DAC 30 includes an error feedback circuit including the quantizer 31, the loop filter 33, and the adder 32. The loop filter 33 is a digital filter that processes truncation errors, and includes a plurality of delay elements 34 (34a to 34d), a multiplier 35 (35a to 35d), a multiplier 36 (36a to 36c), and an adder 37. And an adder 38. Note that a signal giving random noise or offset can be input to the adder 32 as the dither signal Dither.

  The configuration of the ΔΣ ADC 60 is not particularly limited, and various circuits can be employed. FIG. 3 is a block diagram illustrating an example of the configuration of the ΔΣ ADC 60. In the example of this figure, the ΔΣ ADC 60 includes a quantizer 65, a digital filter 68, a delay element 66, a multiplier 67, a multiplier 61a, and an adder 62a. Conventionally, a decimation filter for thinning out a digital signal is provided on the output side of the ΔΣ ADC 60, but in this embodiment, a decimation filter is not used, and the bit stream of ΔΣ is used as feedback as a digital signal d8. That is, in the present embodiment, the 1-bit signal output from the quantizer 65 in the ΔΣ ADC 60 is output to the compensation loop filter 70 as it is. However, when the quantizer 65 quantizes with K bits instead of 1 bit, it outputs to the loop filter 70 for phase compensation with K bits.

  The digital filter 68 functions as an integrator for performing ΔΣ modulation, and a plurality of multipliers 61 (61b to 61d), adders 62 (62b to 62d), multipliers 63 (63a to 63c), and delay elements 64 ( 64a to 64c) and an adder 67. Note that a signal giving random noise or offset can be input to the adder 62a as the dither signal Dither.

  Next, the operation of the control device 100A will be described with reference to FIG. 1 and FIG. FIG. 4 is a schematic diagram showing an outline of the distribution of the frequency spectrum of each signal. When the sampling frequency of the digital signal d1 that is the input signal is fs, if the oversampling filter 10 oversamples to fns, the frequency spectrum of the digital signal d2 remains the original frequency spectrum as shown in FIG. There is nothing at fs / 2 or higher. By limiting the number of bits by ΔΣ modulation in the ΔΣ DAC 30, the quantization noise is noise-shaped. As a result, the low frequency component of the quantization noise is suppressed in the frequency spectrum of the analog signal a4 as shown in FIG. By passing the analog signal a4 through the LPF 40, the remaining high-frequency quantization noise is deleted. As a result, the frequency spectrum of the analog signal a5 is as shown in FIG.

Next, since the controlled object 50 has a predetermined frequency characteristic, the frequency spectrum of the analog signal a6 is obtained by multiplying the frequency spectrum of the analog signal a5 by the predetermined frequency characteristic as shown in FIG. It will be a thing. When A / D conversion is performed on the analog signal a6 by the ΔΣ ADC 60, quantization noise is generated in a high frequency region as shown in FIG.
Next, in order to stabilize feedback, the loop filter 70 is used to compensate for the gain and phase of the digital signal d8. As a result, the frequency spectrum of the digital signal d9 is as shown in FIG. In this example, feedback is performed in the state of the bit stream of ΔΣ, and since the sampling frequency fns of the loop filter 70 is high, no phase delay occurs in the band of fs / 2.

2. Modifications The present invention is not limited to the above-described embodiments, and for example, various modifications described below are possible. About the following description, the same code | symbol is attached | subjected about the site | part same as the above-mentioned embodiment, and description is abbreviate | omitted.

(1) First Modification FIG. 5 is a block diagram illustrating a configuration of a control device 100B that is a first modification. This example is a control device that suppresses distortion of a class D amplifier. That is, the output signal of the loop filter 70 is input to the ΔΣPWM 80. In ΔΣPWM 80, a digital signal obtained by the multi-bit ΔΣ method is converted into a PWM signal. Then, voltage amplification is performed by an amplifier 90 composed of a power MOS or the like. The amplifier 90 operates in class D. Note that the control object in this example is a drive signal output from the LPF 40. For this reason, the sensor S that detects the state of the controlled object detects the output current and the output voltage.

  Then, the PWM carrier is removed by passing through the LPF 40 of an analog circuit using a coil, a capacitor, a resistor, and the like. In this process, distortion and noise occur in the amplifier 90, the coil, and the like. Therefore, in this modification, distortion and noise are suppressed by digitally converting the output of the LPF 40 by a ΔΣ ADC 60 that is a ΔΣ A / D converter and performing feedback in the state of the ΔΣ bit stream. In this example, ΔΣPWM 80 is used, but the present invention is not limited to this, and a multibit ΔΣ · DEM · DAC using DEM (Dynamic Element Matching) may be used.

(2) Second Modification FIG. 6 is a block diagram illustrating a configuration of a control device 100C that is a second modification. This example is a control device that performs active noise cancellation for removing noise included in the output of the speaker 55. That is, the digital signal obtained by the multi-bit ΔΣ method is converted into a PWM signal to remove noise, and the speaker 55 is driven through the amplifier 90. For example, the amplifier 90 can be a headphone amplifier, and the speaker 55 can be a headphone speaker.

The output of the speaker 55 is monitored by the microphone 110 arranged in the vicinity of the speaker 55, and feedback is performed in the state of the bit stream of ΔΣ through the ΔΣ ADC 60 and the loop filter A 70a. Thereby, noise generated in the speaker 55 is removed. Similarly, distortion generated in the speaker 55 is also removed. At this time, an optimum loop characteristic may be realized by changing the characteristic of the loop filter A 70a according to the noise state. The change in the characteristics of the loop filter A 70a may be executed based on an instruction from the outside. The instruction from the outside may be specified by a user operation or may be a command from a higher-level device.
Further, the noise situation may be detected and automatically changed. For example, if the analog signal a6 is a clipped component or no input, this is detected by the loop filter 70a, and the operation of the loop filter 70a is turned off so that distortion and silence noise associated with the clip are not output. Is possible.

(3) Third Modification In addition to the microphone 110 that monitors the output from the speaker 55 in the second modification described above, a microphone that captures ambient noise as in the third modification shown in FIG. 110a may be used. In this case, the noise acts as a disturbance on the speaker 55 that is the control target. Therefore, the microphone 110a functions as means for detecting a disturbance and outputting an analog signal. At this time, the output of the microphone 110a is returned to the subtracter 20. Note that an adder may be used instead of the subtracter 20, and the output of the microphone 110a may be supplied to the adder in reverse phase.
In this example, the state of the controlled object is not fed back, and the operation is performed so as to cancel the disturbance. Even in a noisy environment, when noise is input to the microphone 110a as a disturbance, the speaker 55 is controlled so as to cancel it, so that the user can hear a clear sound.

(4) Fourth Modification Furthermore, a fourth modification shown in FIG. 8 may be used. That is, the output of the speaker 55 is monitored by the microphone 110 arranged in the vicinity of the speaker 55, converted into a bit stream of ΔΣ by the ΔΣ ADC 60a, and input to the subtracter 20a. A subtractor 20a calculates a difference signal d10 from the output of the oversampling filter 10. On the other hand, ambient noise is captured by the microphone 110a, and a signal converted into a bit stream of ΔΣ by the ΔΣ ADC 60b is generated. The difference signal d10 and the digital signal output from the ΔΣ ADC 60b are supplied to the adaptive filter 120. The adaptive filter 120 dynamically changes the loop characteristic according to a situation such as a disturbance and applies at least one of phase compensation or gain compensation to the differential signal d10 to generate a digital signal d8. By feeding back the digital signal d8, it is possible to cancel active noise with high accuracy.

(5) Fifth Modification In the embodiment described above, the digital signal d8 having the frequency fns generated in the ΔΣ ADC 60 is fed back. In this case, if the frequency fns is a high frequency, the processing of the DSP constituting the loop filter 70 becomes heavy. The fifth modification improves this point. FIG. 9 shows a block diagram of a control device 100F according to the fifth modification.
The control apparatus 100F includes the upsampling filter 21 between the subtractor 20 and the ΔΣ ADC 30 and the down control filter 61 between the ΔΣ ADC 60 and the loop filter 70, except for the control apparatus 100F according to the embodiment shown in FIG. The configuration is the same as 100A. However, the oversampling filter 10 of this example generates a digital signal d2 having a frequency fsp lower than the frequency fns. The frequencies fs, fsp, and fns are fs <fsp <fns. That is, the frequency fsp is an intermediate frequency between the frequency fs and the frequency fns. For example, the frequency fsp is four times the frequency fs, and the frequency fns is 256 times the frequency fs.
The upsampling filter 21 upsamples the digital signal d3 having the frequency fsp output from the subtracter 20 to generate a digital signal d3 ′ having the frequency fns. The upsampling filter 21 may generate the digital signal d3 ′ by interpolation processing, but it is preferable to generate the digital signal d3 ′ by pre-holding from the viewpoint of simplifying the configuration and reducing the processing load.
The downsampling filter 61 generates a digital signal d8 ′ having a frequency fsp based on the digital signal d8 having a frequency fns. Note that the downsampling filter fns may have a low-pass filter function as necessary.
Since the loop filter 70 only needs to operate at the frequency fsp, the processing load can be greatly reduced.

From this modification, the following invention can be grasped.
In a control device for controlling a control object,
First means (A) for generating a first analog signal (a5) for controlling the control object (50) based on a first digital signal (d1) of a first frequency (fs);
A second means (B) for detecting the state of the control object and supplying it to the first means;
The first means includes
An oversampling unit (10) for oversampling the first digital signal to generate a second digital signal (d2) having a second frequency (fsp);
A synthesis unit (20) for synthesizing the second digital signal and the third digital signal (d9) of the second frequency supplied from the second means to generate a fourth digital signal (d3);
The fourth digital signal (d3) is upsampled to obtain a fifth of the third frequency (fns).
An upsampling unit (21) for generating a digital signal (d3 ′);
A ΔΣ D / A converter (30) for converting the fifth digital signal by a ΔΣ method to generate a second analog signal (a4);
A low-pass filter (40) for removing the high-frequency component of the second analog signal to generate the first analog signal;
The second means includes
A state detector (S) that detects a state of the control object and generates a third analog signal (a6);
A ΔΣ A / D converter (60) for converting the third analog signal by a ΔΣ method to generate a sixth digital signal (d8) of the third frequency in one or a plurality of bits;
A downsampling unit (61) for downsampling the sixth digital signal to generate a seventh digital signal of the second frequency;
A loop filter (70) that applies at least one of phase compensation or gain compensation to the seventh digital signal and supplies the third digital signal to the first means;
A control device characterized by that.

It is a block diagram which shows the structure of 1st Embodiment of this invention. It is a block diagram which shows an example of a structure of (DELTA) (SIGMA) DAC. It is a block diagram which shows an example of a structure of (DELTA) (Sigma) ADC. It is a schematic diagram which shows the distribution outline of the frequency spectrum of each signal. It is a block diagram which shows the structure of the 1st modification of this invention. It is a block diagram which shows the structure of the 2nd modification of this invention. It is a block diagram which shows the structure of the 3rd modification of this invention. It is a block diagram which shows the structure of the 4th modification of this invention. It is a block diagram which shows the structure of the 5th modification of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Oversampling filter, 20 ... Subtractor, 21 ... Upsampling filter, 30 ... ΔΣ DAC, 40 ... LPF, 50 ... Control object, 55 ... Speaker, 60 ... ΔΣ ADC, 61 ... Downsampling filter, 70 ... Loop filter, 80 ... ΔΣPWM, 90 ... Amplifier, 100 ... Control device, 110 ... Microphone, 120 ... Adaptive filter

Claims (8)

In a control device for controlling a control object,
First means for generating a first analog signal for controlling the control object based on a first digital signal;
A second means for detecting the state of the control object and supplying the first object to the first means;
The first means includes
An oversampling unit that oversamples the first digital signal to generate a second digital signal;
A synthesizer for synthesizing the second digital signal and the third digital signal supplied from the second means to generate a fourth digital signal;
A processing unit that generates the first analog signal based on the fourth digital signal and controls the control object;
The second means includes
A state detector that detects a state of the control object and generates a second analog signal;
A ΔΣ A / D converter that converts the second analog signal by a ΔΣ method to generate a fifth digital signal of one or more bits, and performs at least one of phase compensation and gain compensation on the fifth digital signal. Supplying the third digital signal to the first means, or supplying the fifth digital signal to the first means as the third digital signal,
A control device characterized by that.   2. The control apparatus according to claim 1, wherein the second means includes a loop filter that generates at least one of phase compensation and gain compensation on the fifth digital signal to generate the third digital signal. The processor is
A ΔΣ D / A converter that converts the fourth digital signal into an analog signal by a 1-bit or multiple-bit ΔΣ method;
A low-pass filter that removes high-frequency components of the analog signal and generates the first analog signal;
The control device according to claim 1 or 2, wherein Instead of detecting the state of the control object and supplying it to the first means, the second means detects a disturbance and supplies it to the first means,
In place of the state detection unit, a disturbance detection unit that detects a disturbance and generates the second analog signal is provided.
The control device according to claim 2 or 3, wherein   The control device according to any one of claims 2 to 4, wherein the loop filter is capable of changing a loop characteristic in accordance with an instruction from the outside.   5. The control device according to claim 2, wherein the loop filter is capable of changing a loop characteristic in accordance with a state of distortion or noise included in the second analog signal. 6. The second means includes
A disturbance detection unit that detects a disturbance and generates a third analog signal;
A second ΔΣ A / D converter that converts the third analog signal by a ΔΣ method to generate a sixth digital signal of one or more bits,
The loop filter is an adaptive filter that dynamically changes a loop characteristic based on the sixth digital signal.
The control device according to claim 2, wherein the control device is a control device. The second means supplies the fifth digital signal as the third digital signal to the first means,
The processor is
A loop filter that performs at least one of phase compensation and gain compensation;
A ΔΣ D / A converter that converts the output signal of the loop filter into an analog signal that is pulse-width modulated in a 1-bit or multiple-bit ΔΣ system;
A low-pass filter that removes high-frequency components of the analog signal and generates the first analog signal;
The control device according to claim 1.

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