CN111480299A

CN111480299A - Delta-sigma modulator system and method

Info

Publication number: CN111480299A
Application number: CN201980006705.5A
Authority: CN
Inventors: 申旦; L.克雷斯皮
Original assignee: Synaptic
Current assignee: Synaptic
Priority date: 2018-03-27
Filing date: 2019-01-25
Publication date: 2020-07-31
Also published as: US10211848B1; WO2019190621A1; EP3776866A4; JP2021518058A; EP3776866A1; JP7301836B2

Abstract

Systems and methods in accordance with one or more embodiments are provided for improving noise performance in a delta-sigma modulator that includes an adder, a quantizer, and an nth order filter. The summer is operable to receive the input signal and the feedback signal and output a modified input signal. The quantizer is operable to receive the modified input signal and output a quantized output signal having a corresponding quantization error. An nth order filter is operable to receive the quantization error value and generate a feedback signal, the nth order filter including a first storage element having a first error value, a second storage element having a second error value, and a gravity component operable to converge the first error value and the second error value when the input signal is approximately zero.

Description

Delta-sigma modulator system and method

Cross Reference to Related Applications

The present patent application claims priority AND benefit of U.S. patent application No. 15/937,764, entitled "DE L TA SIGMA MODU L ATORSYSTEMS AND METHODS," filed on 27/3.2018, which is hereby incorporated by reference in its entirety.

Technical Field

The present invention relates generally to data converters, and more particularly, for example, to systems and methods for improving noise performance in delta-sigma modulators.

Background

A delta-sigma modulator is typically used to convert between analog and digital signals and from high to low sample rates, and may be implemented, for example, in a digital-to-analog converter, an analog-to-digital converter, or a delta-sigma phase locked loop (P LL). an error feedback delta-sigma modulator may be used in some designs for increased stability.an example of a second order error feedback delta-sigma modulator 100 is illustrated in FIG. 1. in the illustrated example, an input signal u is combined with the output of a feedback filter 110 to generate a modified input signal y. having a first sample rate n.a modified input signal y is provided to a quantizer 104, which outputs a corresponding signal v at a lower sample rate m. when the least significant bits of the modified input signal y are removed to form an output signal v, the quantizer 104 introduces a quantization error E. the quantization value v is fed into the feedback filter 110 to generate a correction to be applied in the next iteration. at 108, the quantization value v is subtracted from the input signal y to produce an error E. the feedback filter 110, the error value E is fed back through the feedback filter 110 with the error value transfer function transferred by the feedback filter 110

Giving an impulse response. The z-domain output of the feedback filter 110 is combined with the input signal at 112 to produce a modified input signal y. With the delta-sigma demodulator 100, the output signal v may represent the input signal u in an averaged manner (but with fewer bits).

One drawback with conventional delta-sigma modulators such as delta-sigma modulator 100 is that the output signal may continue to produce a range of output values when the input signal is zero (or very small). for example, when the signal is zero or very small, or is a dc signal that includes only the Most Significant Bits (MSB) but not the least significant bits (L SB), the delta-sigma output may form a limited period of the signal output between 0 and 1 that may degrade out-of-band noise.

Disclosure of Invention

The present disclosure provides systems and methods that address the need in the art for improved noise performance in delta-sigma modulators. The scope of the present disclosure is defined by the claims, which are incorporated into this section by reference. A more complete understanding of embodiments of the present disclosure will be afforded to those skilled in the art, as well as a realization of additional advantages thereof, by a consideration of the following detailed description of one or more embodiments. Reference will be made to the appended sheets of drawings, which will first be described briefly.

Drawings

Fig. 1 illustrates a conventional second order delta-sigma modulator with an error feedback path.

Fig. 2 illustrates an exemplary delta-sigma modulator according to an embodiment of the present disclosure.

Fig. 3 illustrates an exemplary processing flow for converging a delta-sigma modulator according to an embodiment of the present disclosure.

Fig. 4A-C illustrate example output spectra from a delta-sigma modulator.

Fig. 5 illustrates an example output spectrum when an input signal to a delta-sigma modulator becomes zero in accordance with one or more embodiments of the present disclosure.

Fig. 6 illustrates an exemplary delta-sigma modulator with an n-order error feedback loop in accordance with an embodiment of the present disclosure.

Fig. 7 illustrates an exemplary audio output stage according to an embodiment of the present disclosure.

The included drawings are for illustrative purposes and are only intended to provide examples of possible systems and methods for sensing current in an audio system. These drawings in no way limit any changes in form and detail that may be made to the disclosure by one skilled in the art without departing from the spirit and scope of the disclosure.

Detailed Description

Digital sigma delta modulators are popular for achieving high resolution outputs with fewer bits and are widely used in data converters, phase locked loops (P LL), and other applications it is observed that even when the input becomes very small, conventional delta sigma modulators (e.g., as implemented in class D amplifiers) may generate limited period oscillations.

According to various embodiments disclosed herein, a circuit includes a delta-sigma modulator and an error feedback loop. The error feedback loop is operable to apply a gravitational effect to certain storage elements to drive the oscillating output of the delta-sigma modulator to zero when the input becomes zero. Thus, out-of-band noise may be reduced to zero when the input is zero. As disclosed herein, the gravitational effect provides a continuous smooth transition from normal modulation of the input signal to zero output, without adding in-band noise or discontinuities during the transition. The delta-sigma modulator disclosed herein may be implemented in a variety of delta-sigma circuits, including, for example, delta-sigma data converters and phase-locked loops.

Referring to fig. 2, delta sigma prefabricated will now be described in accordance with one or more embodiments. The delta-sigma modulator 200 receives an input signal u having a sampling rate n. The input signal u is combined with the output of the feedback filter 210 by an adder 212 to produce a modified input signal y. The modified input signal y is fed to a quantizer 204, which quantizer 204 outputs a corresponding signal v having a lower sampling rate m. With the delta-sigma modulator 200, the output signal v may represent the input signal u in an averaged manner (but with fewer bits). The quantizer 204 introduces a quantization error E when the least significant bits of the modified input signal y are removed to form the output signal v. The quantized value v is fed into a feedback filter 210 to generate a correction signal to be applied to the input signal n at 212 in the next iteration.

The quantized value v is subtracted from the modified input signal y by subtractor 208 to produce an error E. The error E is fed back to the input signal through the feedback filter 210 and the z-domain output of the feedback filter 210 is combined with the input signal at 212 to produce the modified input signal y. It is observed that if the first storage element e₁(output of delay element 214) and a second storage element e₂(the output of delay element 216) is equal, the delta-sigma modulator 200 output v will be zero when the input u is zero. For example, if

And the input u to the delta-sigma modulator 200 is zero, then the input to the quantizer 204 will be:

. Then, e₁Will be equal to a, and e₂Will also be equal to a and the output v generated by the delta-sigma modulator 200 will be zero. This is a desirable mode that produces a delta-sigma modulator output equal to zero without undesirable in-band or out-of-band noise.

In various embodiments, when the input signal u is zero, the gravitational effect is introduced to achieve

. When the input signal is zero, the gravitational effect acts to converge to a value e₁And e₂Without affecting the delta-sigma modulator 200Performance of other input values. In one embodiment, for each cycle, when a new e is calculated₁And e₂When the value is small, the value is added to move the storage elements closer together. For example, if e₁Is calculated as 113, and e₂Calculated as 3411, a new e may be assigned₁Adjusted to 114 (add an L SB code from the calculated value 113), and e₂May be set to 3410 (a reduction of one L SB code from the calculated value of 3411)₁Is approximately equal to e₂When both values can be set to zero (or another equivalent value) at the same time without changing the delta-sigma modulator 200 output. For storage element e₁And e₂The added L SB code will create some noise, but the added noise is relatively small (e.g., 2L SB in 2^ 24L SB), and the effect may be close to white noise, without affecting the in-band noise.

As illustrated in FIG. 2, a gravitational effect 220 is applied to e₁And the gravitational effect 222 is applied to e₂. In various embodiments, the gravitational effect may be applied to each storage element separately, or through a single block, such as part of adder 224. In some embodiments, the

gravitational effects

220 and 222 may include different algorithms and gravitational values. An exemplary processing flow 300 for applying the gravitational effect in a converging delta-sigma modulator is illustrated in fig. 3. It will be understood that the operations illustrated in FIG. 3 may be implemented in hardware, firmware, or a combination thereof.

In step 302, a new quantization error E is received at the error feedback filter and a memory element E is calculated₁And e₂Is started. At step 304, if e₁Is equal to e₂Then both values are set to 0 (step 306) and the transfer function-2 e is set in step 318₁+e₂Is applied to the input signal u. In other cases, in step 308, if e₁Greater than e₂+2 times the gravity value g, then e₁Is decreased by g, and e₂Is incremented by g (step 310) to slowly converge e₁And e₂The value of (c). At e from step 310₁And e₂In the case of a new value of (c), the transfer function-2 e is applied in step 318₁+e₂Is applied to the input signal u. In step 312, if e₁Is less than or equal to e ₂2 times the value of gravity g, e₁Is incremented by g, and e₂Is decremented by g (step 314) to slowly converge e₁And e₂The value of (c). At e from step 314₁And e₂In the case of a new value of (c), the transfer function-2 e is applied in step 318₁+e₂Is applied to the input signal u. If none of the conditions from

steps

304, 308, or 312 are true, then e₁And e₂Are significantly close (e.g., less than 2g apart), and in step 316, e is adjusted₁Is set to e₂. Then, at e from step 316₁And e₂In the case of a new value of (c), the transfer function-2 e is applied in step 318₁+e₂Is applied to the input signal u.

The systems and methods disclosed herein provide a delta-sigma modulator having an output that reliably goes to zero when an input signal is zero or small, without affecting delta-sigma modulator performance when other input signal values are received. Exemplary spectral output plots of a conventional delta-sigma modulator are illustrated in fig. 4A-C. As illustrated, the out-of-band signal may sometimes run away in a conventional delta-sigma modulator and lock into a different oscillation mode (see 402A, 402B, and 402C). As shown in fig. 5, the spectral output of a delta-sigma modulator implementing an embodiment of the gravity effect of the present disclosure has a small out-of-band signal when the input becomes zero. As verified in the test simulations, the delta-sigma modulator output reliably goes to zero without significant degradation in noise performance compared to conventional delta-sigma modulators.

In various embodiments, the delta-sigma modulators disclosed herein may be implemented with data converters, frequency synthesizers, or other delta-sigma implementations. In some embodiments, the delta-sigma modulator of the present disclosure may provide a signal to subsequent circuit blocks to turn off or enter a low power mode when the delta-sigma modulator output is zero. The disclosed delta-sigma modulators may also work with modulators of different orders by driving each error together, such as by converging storage element values toward an average or driving the error toward one or more of the other storage element values.

Fig. 6 illustrates an exemplary embodiment of a delta-sigma modulator 600 including an n-order error feedback loop 610. The nth order error feedback loop 610 receives the quantization error E as an input and comprises n delay units (616 a, 616b to 616 n) operable to store corresponding error values E representing the quantization error received in n previous clock cycles₁、e₂......e_n. A corresponding

gravitational effect

622a, 622b₁、e₂......e_n. In one embodiment, the error value e is corrected in each cycle₁、e₂......e_nAn averaging is performed, and each corresponding

gravitational effect

622a, 622b₁、e₂......e_nConverging towards the average error value. In one embodiment, the gravitational effect is selected as a fixed step size that is small enough to avoid creating undesirable in-band noise as determined by system requirements. The gravitational effect may be applied, for example, as a step size g that is added to or subtracted from the error value at each cycle to step the error value towards the average error value. In one embodiment, if the error value is within 2g of the average error value, the error value may be set as the average value. After the gravitational effect is applied, the resulting error values are combined at 624 to provide a transfer function H_f(z) the filter response given. In operation, a small gravitational effect will create some noise in the presence of the input signal u, but the added noise is relatively small, and the effect may be close to white noise, without affecting the in-band noise in the output signal v. When the input signal u becomes zero, the small gravitational effect will cause the error value e₁、e₂......e_nConverge and the resulting output signal v will become zero.

Referring to fig. 7, an audio output stage 700 according to an embodiment of the disclosure is illustrated. A digital audio signal having a first sampling rate n is received and input to a converged delta-sigma converter 702, such as the delta-sigma modulator 200 of fig. 2. The converged delta-sigma converter 702 down samples the digital audio signal into an output signal having a lower sampling rate m. The digital-to-analog converter 704 converts the digital audio samples into an analog audio signal, which is fed to a class-D amplifier 706 for driving a speaker 708. In various embodiments, the output of the converged delta-sigma converter 702 (and the audio output stage 700) will go to zero if the digital audio signal is no longer present or very small.

Where applicable, the various embodiments provided by the present disclosure can be implemented using hardware, software, or a combination of hardware and software. Also, where applicable, the various hardware components and/or software components set forth herein may be combined into composite components comprising software, hardware, and/or both without departing from the spirit of the present disclosure. Where applicable, the various hardware components and/or software components set forth herein may be separated into sub-components comprising software, hardware, or both without departing from the scope of the present disclosure. Further, where applicable, it is contemplated that software components may be implemented as hardware components, and vice versa.

In accordance with the present disclosure, software such as program code and/or data can be stored on one or more computer-readable media. It is also contemplated that software identified herein can be implemented using one or more general purpose or special purpose computers and/or computer systems (networked and/or otherwise). Where applicable, the order of various steps described herein can be changed, combined into composite steps, and/or separated into sub-steps to provide features described herein.

The above-described embodiments illustrate but do not limit the invention. It should also be understood that many modifications and variations are possible in light of the principles of the present invention. Accordingly, the scope of the invention is to be limited only by the following claims.

Claims

1. A circuit, comprising:

an adder operable to receive an input signal and a feedback signal and to output a modified input signal;

a quantizer operable to receive the modified input signal and output a quantized output signal having a corresponding quantization error; and

an nth order filter operable to receive quantization error values and generate the feedback signal, the nth order filter comprising:

at least n storage elements, each storage element operable to store quantization error value information corresponding to one of n previous clock cycles;

a gravity component operable to converge the quantization error value information to produce a modified quantization error value; and

a feedback signal generator operable to generate the feedback signal using the modified quantization error value.

2. The circuit of claim 1, wherein the input signal has a first data width and the quantized output signal has a second data width, the second data width being less than the first data width.

3. The circuit of claim 1, further comprising a subtractor operative to receive the modified input signal and subtract the quantized output signal to generate the quantization error value.

4. The circuit of claim 1, wherein n is equal to 2, wherein the nth order filter further comprises a first memory element storing a first error value and a second memory element storing a second error value, and wherein the gravity component is operable to add a gravity value to the lesser of the first error value and the second error value.

5. The circuit of claim 4, wherein the gravitational component is operable to subtract the gravitational value from the greater of the first error value and the second error value.

6. The circuit of claim 4, wherein the gravitational component is operable to set the first error value equal to the second error value when the first error value minus the second error value is less than twice the gravitational value.

7. The circuit of claim 1, wherein n-3, and wherein the nth order filter comprises a first storage element storing a first error value, a second storage element storing a second error value, a third storage element storing a third error value, and wherein the gravity component is operable to converge the first error value, the second error value, and the third error value.

8. A method, comprising:

adding the input signal and the feedback signal to produce a modified input signal;

quantizing the modified input signal to generate a quantized output signal, the quantized output signal having a quantization error; and

generating the feedback signal from successive quantization error values through an nth order filter, wherein generating the feedback signal comprises:

generating a first error value from a first storage element, the first error value representing the quantization error of a previous cycle;

generating a second error value from a second storage element, the second error value representing the quantization error from a second previous period; and

applying a gravitational effect to the first error value and the second error value, wherein the gravitational effect converges the first error value and the second error value.

9. The method of claim 8, wherein the input signal has a first sampling rate and the quantized output signal has a second sampling rate, the second sampling rate being less than the first sampling rate.

10. The method of claim 8, further comprising subtracting the quantized output signal from the modified input signal to generate the quantization error.

11. The method of claim 8, wherein applying the gravitational effect further comprises adding a gravitational value to the lesser of the first error value and the second error value.

12. The method of claim 8, wherein applying the gravitational effect further comprises subtracting a gravitational value from the greater of the first error value and the second error value.

13. The method of claim 8, wherein the gravitational effect is operable to set the first error value equal to the second error value when the first error value minus the second error value is less than twice the gravitational value.

14. The method of claim 8, wherein generating the feedback signal further comprises generating the feedback signal from the first error value and the second error value.

15. A delta-sigma modulator, comprising:

a feedback filter operable to receive the quantization error and generate the feedback signal, the feedback filter comprising:

a first storage element having a first quantization error value from a first cycle;

a second storage element having a second quantization error value from a second period;

a gravity component operable to modify the first quantization error value and modify the second quantization error value to converge the first and second quantization error values over a plurality of cycles; and

a feedback signal generator operable to generate the feedback signal from the modified first quantization error value and the modified second quantization error value.

16. The delta-sigma modulator of claim 15, wherein the input signal has a first sampling rate and the quantized output signal has a second sampling rate, the second sampling rate being less than the first sampling rate.

17. The delta-sigma modulator of claim 15, further comprising a subtractor operable to receive the modified input signal and subtract the quantized output signal to generate a value representative of the quantization error.

18. The delta-sigma modulator of claim 15, wherein the gravity component is operable to add a gravity value to the lesser of the first quantization error value and the second quantization error value.

19. The delta-sigma modulator of claim 15, wherein the gravity component is operable to subtract a gravity value from the greater of the first quantization error value and the second quantization error value.

20. The delta-sigma modulator of claim 15, wherein the feedback filter further comprises a third component having a third quantization error value; and wherein the gravity component is further operable to converge the first quantization error value, the second quantization error value, and the third quantization error value when the input signal is approximately zero.