JP4359113B2 - Wiring board manufacturing method and wiring board - Google Patents

Wiring board manufacturing method and wiring board Download PDF

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JP4359113B2
JP4359113B2 JP2003351492A JP2003351492A JP4359113B2 JP 4359113 B2 JP4359113 B2 JP 4359113B2 JP 2003351492 A JP2003351492 A JP 2003351492A JP 2003351492 A JP2003351492 A JP 2003351492A JP 4359113 B2 JP4359113 B2 JP 4359113B2
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opening
conductor
wiring board
insulating substrate
wiring
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JP2005116908A5 (en
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良一 小泉
勝美 鈴木
秀一 清田
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Hitachi Cable Ltd
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Description

本発明は、配線基板の製造方法及び配線基板に関し、特に、COF(Chip On Film)などの半導体装置に用いられる薄型の配線基板に適用して有効な技術に関するものである。   The present invention relates to a method for manufacturing a wiring board and a wiring board, and more particularly to a technique effective when applied to a thin wiring board used in a semiconductor device such as a COF (Chip On Film).

従来、テープキャリアパッケージ(Tape Carrier Package)などの半導体装置に用いられる配線基板(テープキャリア)は、フィルム状の絶縁基板の表面に、所定のパターンの導体配線が設けられている。   2. Description of the Related Art Conventionally, a wiring substrate (tape carrier) used in a semiconductor device such as a tape carrier package has a predetermined pattern of conductor wiring provided on the surface of a film-like insulating substrate.

前記配線基板は、図12及び図13に示すように、ポリイミドテープのような一方向に長尺なテープ状の絶縁基板1を用いており、前記絶縁基板1上に設けられた複数の半導体装置形成領域L1のそれぞれに、半導体装置を形成するための導体配線201が連続的に設けられている。ここで、図13は図12のF−F’線での断面図である。   As shown in FIGS. 12 and 13, the wiring board uses a tape-like insulating substrate 1 that is long in one direction, such as polyimide tape, and a plurality of semiconductor devices provided on the insulating substrate 1. A conductor wiring 201 for forming a semiconductor device is continuously provided in each of the formation regions L1. Here, FIG. 13 is a cross-sectional view taken along line F-F ′ of FIG. 12.

また、前記絶縁基板1は、長手方向の端部に沿って、半導体装置を形成する際の位置決めや搬送ガイドに用いる第2開口部(パーフォレーション孔)1Aが設けられている。   Further, the insulating substrate 1 is provided with a second opening (perforation hole) 1A used for positioning and a conveyance guide when forming the semiconductor device, along the end in the longitudinal direction.

また、近年では、半導体装置の薄型化にともない、前記配線基板、特に、前記絶縁基板1の薄型化が進んでおり、例えば、液晶ディスプレイの駆動用ドライバIC等のCOF型の半導体装置に用いられる配線基板では、ポリイミドテープ(絶縁基板1)の厚さが、例えば、25μmから40μm程度になってきている。   In recent years, as the semiconductor device is made thinner, the wiring board, in particular, the insulating substrate 1 is made thinner. For example, it is used for a COF type semiconductor device such as a driver IC for driving a liquid crystal display. In the wiring board, the thickness of the polyimide tape (insulating substrate 1) has become, for example, about 25 μm to 40 μm.

また、前記絶縁基板1の薄型化が進むと、前記絶縁基板1の強度の低下による第2開口部1Aの周辺でのテープ切れや、前記絶縁基板1の変形、歪みによる位置精度の低下が起きやすいため、図12及び図13に示したように、前記絶縁基板1の長手方向の端部、すなわち、前記第2開口部1Aが設けられた領域に補強導体202を設け、前記絶縁基板1の強度を確保している(例えば、特許文献1)。   Further, as the insulation substrate 1 is made thinner, the tape breaks around the second opening 1A due to a decrease in the strength of the insulation substrate 1, and the positional accuracy is degraded due to deformation and distortion of the insulation substrate 1. For the sake of simplicity, as shown in FIGS. 12 and 13, a reinforcing conductor 202 is provided at the end of the insulating substrate 1 in the longitudinal direction, that is, in the region where the second opening 1 </ b> A is provided. The strength is ensured (for example, Patent Document 1).

また、前記補強導体202は、前記絶縁基板1の長手方向の端部に沿って帯状に設けられているため、搬送時や各工程で前記配線基板に生じた静電気を除去する役目もある。   Further, since the reinforcing conductor 202 is provided in a strip shape along the longitudinal end of the insulating substrate 1, it also serves to remove static electricity generated on the wiring substrate during transport and in each process.

前記補強導体202が設けられた配線基板の製造方法を簡単に説明すると、まず、図14及び図15に示すように、一方向に長尺なテープ状の絶縁基板1の表面に導体膜2を形成する。このとき、前記絶縁基板1の幅は、前記配線基板として用いるときの幅よりも広く、例えば、半導体装置を形成する工程で前記配線基板として用いるときの幅が35mmである場合には、幅が45mm、あるいは70mmなどの基板を用いる。またこのとき、前記絶縁基板1の、配線基板として用いる領域101の外側の領域102に、前記絶縁基板1の長手方向に沿って、前記配線基板を形成する工程での位置決めや搬送ガイドに用いる第1開口部(第1パーフォレーション孔)1Bを形成しておく。   A method of manufacturing a wiring board provided with the reinforcing conductor 202 will be briefly described. First, as shown in FIGS. 14 and 15, a conductor film 2 is formed on the surface of a tape-like insulating substrate 1 that is long in one direction. Form. At this time, the width of the insulating substrate 1 is wider than the width when used as the wiring substrate. For example, when the width when used as the wiring substrate in the process of forming a semiconductor device is 35 mm, the width is as follows. A 45 mm or 70 mm substrate is used. At this time, the insulating substrate 1 is used for positioning and a conveyance guide in the step of forming the wiring substrate along the longitudinal direction of the insulating substrate 1 in the region 102 outside the region 101 used as the wiring substrate. One opening (first perforation hole) 1B is formed.

また、前記導体膜2は、例えば、電解銅箔や圧延銅箔などを接着して形成するが、このとき、前記第1開口部1Bを塞がないように、前記絶縁基板1の中央付近の、配線基板として用いる領域101全面に形成する。   The conductor film 2 is formed by adhering, for example, an electrolytic copper foil or a rolled copper foil. At this time, the conductor film 2 is formed in the vicinity of the center of the insulating substrate 1 so as not to block the first opening 1B. And formed over the entire surface of the region 101 used as a wiring board.

次に、図16及び図17に示すように、前記導体膜2をエッチング処理して、半導体装置形成領域L1内の導体配線201及び前記配線基板として用いる領域101の端部に沿った補強導体202を形成する。   Next, as shown in FIGS. 16 and 17, the conductor film 2 is etched to form the conductor wiring 201 in the semiconductor device formation region L <b> 1 and the reinforcing conductor 202 along the end portion of the region 101 used as the wiring substrate. Form.

このとき、前記導体配線201及び前記補強導体202は、例えば、図17に示したように、前記導体膜2上に、半導体装置を形成するための導体配線201及び補強導体202のパターンに対応したレジスト(エッチングレジスト)3を形成し、前記導体膜2をエッチング処理して形成する。   At this time, the conductor wiring 201 and the reinforcing conductor 202 correspond to the patterns of the conductor wiring 201 and the reinforcing conductor 202 for forming a semiconductor device on the conductor film 2, as shown in FIG. A resist (etching resist) 3 is formed, and the conductor film 2 is formed by etching.

また、前記導体配線201及び前記補強導体202を形成した後、図示は省略するが、例えば、前記導体配線201上に、はんだ保護膜や端子めっき等を形成する。   In addition, after the conductor wiring 201 and the reinforcing conductor 202 are formed, for example, a solder protective film or terminal plating is formed on the conductor wiring 201 although illustration is omitted.

次に、図18及び図19に示すように、例えば、金型、すなわち、ダイ4とパンチ5を用いて、前記補強導体202及び前記絶縁基板1を打ち抜き、第2開口部(第2パーフォレーション孔)1Aを形成する。   Next, as shown in FIGS. 18 and 19, for example, the reinforcing conductor 202 and the insulating substrate 1 are punched out using a die, that is, a die 4 and a punch 5, and a second opening (second perforation hole) is formed. ) 1A is formed.

その後、前記絶縁基板を、前記補強導体202が設けられた領域の外側、すなわち、前記第1開口部1Bが形成された領域102を切断して除去し、前記絶縁基板1を所定の幅、例えば35mmにすることにより、図12及び図13に示したような配線基板を得ることができる。   Thereafter, the insulating substrate is removed by cutting off the outside of the region where the reinforcing conductor 202 is provided, that is, the region 102 where the first opening 1B is formed, and the insulating substrate 1 is removed by a predetermined width, for example, By setting the thickness to 35 mm, a wiring board as shown in FIGS. 12 and 13 can be obtained.

前記図12及び図13に示したような配線基板を用いて半導体装置を製造する工程は、例えば、前記配線基板上の各半導体チップ実装領域L2に半導体チップを実装し、前記半導体チップの外部電極(ボンディングパッド)と前記導体配線の接続部を熱硬化性樹脂で封止し、前記各半導体装置形成領域L1を切断して個片化する。   The step of manufacturing a semiconductor device using the wiring substrate as shown in FIGS. 12 and 13 includes, for example, mounting a semiconductor chip in each semiconductor chip mounting region L2 on the wiring substrate, and external electrodes of the semiconductor chip. The connection portion between the (bonding pad) and the conductor wiring is sealed with a thermosetting resin, and each semiconductor device forming region L1 is cut into individual pieces.

このとき、前記各工程は、リールツーリール(reel to reel)方式で行われ、前記配線基板の開口部(第2開口部)1Aを利用して位置決めを行う。
特開平2−91956号公報
At this time, each process is performed by a reel to reel method, and positioning is performed using the opening (second opening) 1A of the wiring board.
Japanese Patent Laid-Open No. 2-91956

しかしながら、前記従来の技術では、前記導体膜2をエッチング処理して、前記導体配線201及び前記補強導体202を形成した後、図18及び図19に示したように、前記補強導体202及び前記絶縁基板1を打ち抜いて前記第2開口部(パーフォレーション孔)1Aを形成している。そのため、前記補強導体202と前記絶縁基板1のせん断応力の違いなどから、図20に示すように、第2開口部1A内にバリ8や、金属屑(図示しない)等の異物付着が生じやすいという問題があった。   However, in the prior art, after the conductor film 2 is etched to form the conductor wiring 201 and the reinforcing conductor 202, the reinforcing conductor 202 and the insulating conductor are formed as shown in FIGS. The substrate 1 is punched to form the second opening (perforation hole) 1A. For this reason, due to the difference in shear stress between the reinforcing conductor 202 and the insulating substrate 1, foreign matter such as burrs 8 and metal debris (not shown) is likely to be generated in the second opening 1A as shown in FIG. There was a problem.

また、前記バリ8や異物付着による前記第2開口部1Aの形状不良は、前記配線基板を用いて半導体装置を形成する際の位置決めの精度を低下させる原因、あるいは異物が混入して半導体装置の信頼性が低下する原因となるため、その配線基板は不良品となり、配線基板の製造歩留まりが低下し、配線基板の製造コストが上昇するという問題があった。   In addition, the defective shape of the second opening 1A due to the burr 8 or the adhesion of foreign matter may cause a decrease in positioning accuracy when the semiconductor device is formed using the wiring substrate, or foreign matter may enter the semiconductor device. Since the reliability is reduced, the wiring board becomes a defective product, and the manufacturing yield of the wiring board is lowered, and the manufacturing cost of the wiring board is increased.

また、前記バリや異物付着により前記第2開口部の形状が粗いと、前記配線基板を用いて半導体装置を形成する際の位置決めの精度が低下するため、半導体装置の製造歩留まりが低下するという問題があった。   Further, if the shape of the second opening is rough due to the attachment of burrs or foreign matters, the positioning accuracy when forming the semiconductor device using the wiring board is lowered, and thus the manufacturing yield of the semiconductor device is lowered. was there.

本発明の目的は、絶縁基板に設けた位置決め用の開口部(パーフォレーション孔)の周辺に補強導体を設けた配線基板において、前記開口部内のバリや異物付着を低減することが可能な技術を提供することにある。   An object of the present invention is to provide a technique capable of reducing burrs and foreign matter adhesion in the opening in a wiring board in which a reinforcing conductor is provided around a positioning opening (perforation hole) provided in an insulating substrate. There is to do.

本発明の他の目的は、絶縁基板に設けた位置決め用の開口部(パーフォレーション孔)の周辺に補強導体を設けた配線基板の製造歩留まりを向上させ、前記配線基板の製造コストを低減することが可能な技術を提供することにある。   Another object of the present invention is to improve the manufacturing yield of a wiring board provided with a reinforcing conductor around a positioning opening (perforation hole) provided in an insulating board, and to reduce the manufacturing cost of the wiring board. It is to provide possible technology.

本発明の他の目的は、絶縁基板に設けた位置決め用の開口部の周辺に補強導体を設けた配線基板を用いて形成する半導体装置の製造歩留まりの低下を防ぐことが可能な技術を提供することにある。   Another object of the present invention is to provide a technique capable of preventing a decrease in manufacturing yield of a semiconductor device formed using a wiring board provided with a reinforcing conductor around a positioning opening provided in an insulating substrate. There is.

本発明の前記ならびにその他の目的と新規な特徴は、本明細書の記述および添付図面によって明らかになるであろう。   The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

本願において開示される発明の概要を説明すれば、以下のとおりである。   The outline of the invention disclosed in the present application will be described as follows.

(1)テープ状の絶縁基板の表面に導体膜を形成し、前記導体膜をエッチング処理して、導体配線及び前記絶縁基板の長手方向に沿った補強導体を形成し、前記絶縁基板の、前記補強導体を形成した領域を打ち抜いて、開口部(パーフォレーション孔)を形成する配線基板の製造方法において、前記補強導体は、前記エッチング処理により前記開口部を形成する領域が開口するように形成した後金型を用いて前記補強導体の開口した領域内の絶縁基板を打ち抜いて、前記開口部を形成することを特徴とする配線基板の製造方法である。 (1) forming a conductor film on the surface of the tape-like insulating substrate, etching the conductor film to form a conductor wiring and a reinforcing conductor along the longitudinal direction of the insulating substrate; In the method of manufacturing a wiring board in which the region where the reinforcing conductor is formed is punched to form an opening (perforation hole), the reinforcing conductor is formed so that the region where the opening is formed is opened by the etching process . Thereafter , the opening is formed by punching out an insulating substrate in a region where the reinforcing conductor is opened using a mold .

前記(1)の手段によれば、前記補強導体を形成する際に、前記開口部(パーフォレーション孔)を形成する部分を開口しておくことにより、前記絶縁基板のみを打ち抜いて前記開口部を形成することができる。そのため、従来のように、前記絶縁基板及び前記補強導体を打ち抜く場合に比べ、前記開口部内にバリ(残留物)が発生しにくい。また、前記絶縁基板のみを打ち抜くことにより、前記補強導体のバリ、金属屑の発生を防ぐことができる。   According to the means of (1), when forming the reinforcing conductor, by opening a portion for forming the opening (perforation hole), only the insulating substrate is punched to form the opening. can do. Therefore, as compared with the conventional case where the insulating substrate and the reinforcing conductor are punched out, burrs (residues) are less likely to be generated in the opening. Further, by punching only the insulating substrate, it is possible to prevent generation of burrs and metal debris in the reinforcing conductor.

また、前記開口部内に、前記バリや金属屑が生じることや、開口部の形状不良による配線基板の製造歩留まりの低下を防げ、配線基板の製造コストを低減することができる。   In addition, it is possible to prevent the generation of the burrs and metal scraps in the opening and the reduction in the manufacturing yield of the wiring board due to the defective shape of the opening, thereby reducing the manufacturing cost of the wiring board.

またこのとき、前記絶縁基板は、長手方向の端部に沿って第1開口部(第1パーフォレーション孔)が形成されており、前記第1開口部が形成された領域の内側に、前記導体膜を形成し、前記導体膜をエッチング処理して前記導体配線及び前記補強導体を形成し、前記補強導体を形成した領域を打ち抜いて第2開口部(第2パーフォレーション孔)を形成した後、前記絶縁基板の、前記第2開口部を形成した領域の外側を切断除去する。   Further, at this time, the insulating substrate has a first opening (first perforation hole) formed along an end portion in a longitudinal direction, and the conductor film is formed inside the region where the first opening is formed. The conductive film is etched to form the conductor wiring and the reinforcing conductor, and the region where the reinforcing conductor is formed is punched to form a second opening (second perforation hole), and then the insulation The substrate is cut and removed outside the region where the second opening is formed.

(2)テープ状の絶縁基板の長手方向に沿って開口部(パーフォレーション孔)が設けられ、前記絶縁基板の表面に導体配線が設けられ、前記絶縁基板の前記開口部の周辺に、前記開口部上が開口した補強導体が設けられている配線基板の製造方法において、前記補強導体の開口部の面積は、前記絶縁基板の開口部の面積よりも広く、前記絶縁基板の開口部は、前記補強導体の開口部の内部領域に設けられている配線基板の製造方法である。 (2) An opening (perforation hole) is provided along the longitudinal direction of the tape-shaped insulating substrate, a conductor wiring is provided on the surface of the insulating substrate, and the opening is formed around the opening of the insulating substrate. In the method of manufacturing a wiring board provided with a reinforcing conductor having an open top, the area of the opening of the reinforcing conductor is larger than the area of the opening of the insulating board, and the opening of the insulating board is This is a method for manufacturing a wiring board provided in an inner region of an opening of a conductor.

前記(2)の手段によれば、前記絶縁基板の開口部が、前記補強導体の開口部の内部領域に設けられていることにより、前記開口部(パーフォレーション孔)の内部にバリや金属屑が残りにくく、開口部の形状不良が少ないため、前記配線基板を用いて半導体装置を製造する際の、位置決めの精度の低下を防ぐことができる。そのため、前記半導体装置の製造歩留まりを向上させることができる。   According to the means of (2), since the opening of the insulating substrate is provided in the inner region of the opening of the reinforcing conductor, burrs and metal debris are formed inside the opening (perforation hole). Since it is hard to remain and there are few shape defects of an opening part, the fall of the positioning precision at the time of manufacturing a semiconductor device using the said wiring board can be prevented. Therefore, the manufacturing yield of the semiconductor device can be improved.

また、前記開口部の内部に金属屑などの異物が残りにくいため、前記配線基板を用いて半導体装置を製造する際に、異物の混入による装置の信頼性の低下を防げる。   In addition, since foreign matter such as metal scraps hardly remains inside the opening, when the semiconductor device is manufactured using the wiring board, the reliability of the device can be prevented from being deteriorated due to contamination of the foreign matter.

以下、本発明について、図面を参照して実施の形態(実施例)とともに詳細に説明する。   Hereinafter, the present invention will be described in detail together with embodiments (examples) with reference to the drawings.

なお、実施例を説明するための全図において、同一機能を有するものは、同一符号をつけ、その繰り返しの説明は省略する。   In all the drawings for explaining the embodiments, parts having the same function are given the same reference numerals, and repeated explanation thereof is omitted.

本願において開示される発明のうち、代表的なものによって得られる効果を簡単に説明すれば、以下のとおりである。   Of the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

(1)絶縁基板に設けた位置決め用の開口部(パーフォレーション孔)の周辺に補強導体を設けた配線基板において、前記開口部内のバリや異物付着を低減することができる。   (1) In a wiring board in which a reinforcing conductor is provided around a positioning opening (perforation hole) provided in an insulating substrate, it is possible to reduce burrs and foreign matter adhesion in the opening.

(2)絶縁基板に設けた位置決め用の開口部(パーフォレーション孔)の周辺に補強導体を設けた配線基板の製造歩留まりを向上させ、前記配線基板の製造コストを低減することができる。   (2) It is possible to improve the manufacturing yield of the wiring board in which the reinforcing conductor is provided around the positioning opening (perforation hole) provided in the insulating board, and to reduce the manufacturing cost of the wiring board.

(3)絶縁基板に設けた位置決め用の開口部の周辺に補強導体を設けた配線基板を用いて形成する半導体装置の製造歩留まりの低下を防ぐことができる。   (3) It is possible to prevent a decrease in manufacturing yield of a semiconductor device formed by using a wiring board provided with a reinforcing conductor around a positioning opening provided in an insulating substrate.

(実施例)
図1乃至図3は、本発明による一実施例の配線基板の概略構成を示す模式図であり、図1は配線基板の平面図、図2は図1に示した配線基板のA−A’線での断面図、図3(a)は図1に示した配線基板の領域L3の拡大平面図、図3(b)は図3(a)のB−B’線での断面図である。
(Example)
1 to 3 are schematic views showing a schematic configuration of a wiring board according to an embodiment of the present invention. FIG. 1 is a plan view of the wiring board, and FIG. 2 is an AA ′ of the wiring board shown in FIG. 3A is an enlarged plan view of a region L3 of the wiring board shown in FIG. 1, and FIG. 3B is a cross-sectional view taken along line BB ′ of FIG. .

図1乃至図3において、1は絶縁基板、1Aは第2開口部(パーフォレーション孔)、201は導体配線、202は補強導体、202Aは補強導体の開口部、L1は半導体装置形成領域、L2は半導体チップ実装領域、W1は開口部1Aの一辺の長さ、W2は補強導体の開口部202Aの一辺の長さ、W3は段差幅である。   1 to 3, 1 is an insulating substrate, 1A is a second opening (perforation hole), 201 is a conductor wiring, 202 is a reinforcing conductor, 202A is an opening of the reinforcing conductor, L1 is a semiconductor device formation region, and L2 is The semiconductor chip mounting area, W1 is the length of one side of the opening 1A, W2 is the length of one side of the opening 202A of the reinforcing conductor, and W3 is the step width.

本実施例の配線基板は、図1及び図2に示したように、テープ状の絶縁基板1の長手方向に沿って第2開口部(パーフォレーション孔)1Aを設け、前記絶縁基板1の表面に導体配線201を設け、前記絶縁基板1の前記第2開口部1Aの周辺に、前記第2開口部1A上が開口した補強導体202を設けた配線基板である。   As shown in FIGS. 1 and 2, the wiring board of the present embodiment is provided with a second opening (perforation hole) 1 </ b> A along the longitudinal direction of the tape-like insulating substrate 1, and the surface of the insulating substrate 1. In this wiring board, a conductor wiring 201 is provided, and a reinforcing conductor 202 having an opening on the second opening 1A is provided around the second opening 1A of the insulating substrate 1.

このとき、前記絶縁基板1は、一方向に長尺なテープ状で、前記導体配線201及び前記補強導体202は、リールツーリール(reel to reel)方式で形成されており、前記絶縁基板1上に設けられている多数個の半導体装置形成領域L1のそれぞれに、図1に示したように、同種のパターンの導体配線201が設けられている。   At this time, the insulating substrate 1 has a tape shape that is long in one direction, and the conductor wiring 201 and the reinforcing conductor 202 are formed in a reel-to-reel method. As shown in FIG. 1, conductor wiring 201 having the same kind of pattern is provided in each of a large number of semiconductor device formation regions L1 provided in FIG.

また、前記配線基板は、例えば、液晶ディスプレイのドライバICなどに用いられるCOF(Chip On Film)型の半導体装置のように、小型、薄型の半導体装置に用いられる配線基板であり、前記絶縁基板1には、例えば、厚さが25μmから40μm程度の薄いポリイミドテープを用いている。そのため、搬送中の変形やテープ切れを防ぐために、前記第2開口部(パーフォレーション孔)1Aの周辺、すなわち、前記絶縁基板1の長手方向の端部に沿って補強導体202を設けている。   The wiring board is a wiring board used for a small and thin semiconductor device such as a COF (Chip On Film) type semiconductor device used for a driver IC of a liquid crystal display, for example. For example, a thin polyimide tape having a thickness of about 25 μm to 40 μm is used. Therefore, in order to prevent deformation during transport and tape breakage, the reinforcing conductor 202 is provided around the second opening (perforation hole) 1A, that is, along the end of the insulating substrate 1 in the longitudinal direction.

また、前記補強導体の開口部202Aの面積は、図3(a)及び図3(b)に示したように、前記絶縁基板の第2開口部1Aの面積よりも広く、前記絶縁基板の第2開口部1Aは、前記補強導体の開口部202Aの内部領域に設けられている。このとき、前記絶縁基板の第2開口部1Aの形状が、図3(a)に示したように、矩形状であり、前記第2開口部(パーフォレーション孔)1Aの一辺の長さW1は、例えば、1.981mm、あるいは1.420mm程度であるため、前記補強導体の開口部202Aの一辺の長さW2は、前記第2開口部1Aの一辺の長さW1よりも若干長くなるように形成し、前記絶縁基板の第2開口部1Aの内壁と前記補強導体の内壁202Aに段差ができるようにしている。またこのとき、前記段差の幅W3は、4辺とも均等になるのが好ましく、それぞれ、0.1mm程度になるように設ける。   Further, the area of the opening 202A of the reinforcing conductor is larger than the area of the second opening 1A of the insulating substrate, as shown in FIGS. The two openings 1A are provided in the inner region of the reinforcing conductor opening 202A. At this time, as shown in FIG. 3A, the shape of the second opening 1A of the insulating substrate is rectangular, and the length W1 of one side of the second opening (perforation hole) 1A is For example, since it is about 1.981 mm or 1.420 mm, the length W2 of one side of the opening 202A of the reinforcing conductor is formed to be slightly longer than the length W1 of one side of the second opening 1A. In addition, a step is formed between the inner wall of the second opening 1A of the insulating substrate and the inner wall 202A of the reinforcing conductor. At this time, the width W3 of the step is preferably equal on all four sides, and is set to be about 0.1 mm.

図4乃至図9は、本実施例の配線基板の製造方法を説明するための模式図であり、図4は絶縁基板の表面に導体膜を形成する工程の平面図、図5は図4のC−C’線での断面図、図6は導体配線及び補強導体を形成する工程の平面図、図7は図6のD−D’線での断面図、図8は第2開口部(第2パーフォレーション孔)を形成する工程の平面図、図9は図8のE−E’線での断面図である。   4 to 9 are schematic views for explaining the method of manufacturing the wiring board according to the present embodiment. FIG. 4 is a plan view of a process for forming a conductor film on the surface of the insulating substrate. FIG. 5 is a plan view of FIG. FIG. 6 is a plan view of the step of forming the conductor wiring and the reinforcing conductor, FIG. 7 is a sectional view taken along the line DD ′ of FIG. 6, and FIG. FIG. 9 is a cross-sectional view taken along line EE ′ of FIG. 8.

以下、図4乃至図9に沿って、本実施例の配線基板の製造方法について説明する。   Hereinafter, the manufacturing method of the wiring board of the present embodiment will be described with reference to FIGS.

まず、図4及び図5に示すように、一方向に長尺なテープ状の絶縁基板1の表面に導体膜2を形成する。このとき、前記絶縁基板1の幅は、前記配線基板として用いるときの幅よりも広く、例えば、半導体装置を形成する工程で前記配線基板として用いるときの幅が35mmである場合には、幅が45mm、あるいは70mmなどの基板を用いる。またこのとき、前記絶縁基板1の、配線基板として用いる領域101の外側の領域102には、前記絶縁基板1の長手方向に沿って、前記配線基板を形成する際の位置決めに用いる第1開口部(第1パーフォレーション孔)1Bを形成しておく。   First, as shown in FIGS. 4 and 5, a conductor film 2 is formed on the surface of a tape-like insulating substrate 1 that is long in one direction. At this time, the width of the insulating substrate 1 is wider than the width when used as the wiring substrate. For example, when the width when used as the wiring substrate in the process of forming a semiconductor device is 35 mm, the width is as follows. A 45 mm or 70 mm substrate is used. Further, at this time, in the region 102 outside the region 101 used as the wiring substrate of the insulating substrate 1, the first opening used for positioning when forming the wiring substrate along the longitudinal direction of the insulating substrate 1. (First perforation hole) 1B is formed.

また、前記導体膜2は、例えば、電解銅箔や圧延銅箔などを接着して形成するが、このとき、前記第1開口部1Bを塞がないように、前記絶縁基板1の中央付近の、配線基板として用いる領域101の全面に形成する。   The conductor film 2 is formed by adhering, for example, an electrolytic copper foil or a rolled copper foil. At this time, the conductor film 2 is formed in the vicinity of the center of the insulating substrate 1 so as not to block the first opening 1B. And formed on the entire surface of the region 101 used as a wiring board.

次に、図6及び図7に示すように、前記導体膜2をエッチング処理して、半導体装置形成領域L1内の導体配線201及び前記配線基板として用いる領域101の端部に沿った補強導体202を形成する。   Next, as shown in FIGS. 6 and 7, the conductor film 2 is etched to form the conductor wiring 201 in the semiconductor device formation region L <b> 1 and the reinforcing conductor 202 along the end of the region 101 used as the wiring substrate. Form.

このとき、前記導体配線201及び前記補強導体202は、例えば、図7に示したように、前記導体膜2上に、半導体装置を形成するための導体配線201及び補強導体202のパターンに対応したレジスト(エッチングレジスト)3を形成し、前記導体膜2をエッチング処理して形成する。   At this time, the conductor wiring 201 and the reinforcing conductor 202 correspond to the patterns of the conductor wiring 201 and the reinforcing conductor 202 for forming a semiconductor device on the conductor film 2, as shown in FIG. A resist (etching resist) 3 is formed, and the conductor film 2 is formed by etching.

またこのとき、前記補強導体202は、後の工程で開口部(第2開口部)1Aを形成する領域に、前記第2開口部1Aの面積よりも広い開口部202Aを形成するため、前記補強導体202上のエッチングレジスト3には、開口部3Aを設ける。   At this time, the reinforcing conductor 202 forms the opening 202A larger than the area of the second opening 1A in a region where the opening (second opening) 1A is formed in a later step. The etching resist 3 on the conductor 202 is provided with an opening 3A.

また、前記導体配線201及び前記補強導体202を形成した後、図示は省略するが、例えば、前記導体配線201上に、はんだ保護膜や端子めっき等を形成する。   In addition, after the conductor wiring 201 and the reinforcing conductor 202 are formed, for example, a solder protective film or terminal plating is formed on the conductor wiring 201 although illustration is omitted.

次に、図8及び図9に示すように、例えば、金型、すなわち、ダイ4とパンチ5を用いて、前記補強導体の開口部202A内の絶縁基板1を打ち抜き、第2開口部(第2パーフォレーション孔)1Aを形成する。   Next, as shown in FIGS. 8 and 9, the insulating substrate 1 in the opening 202A of the reinforcing conductor is punched out using a die, that is, a die 4 and a punch 5, for example, and a second opening (first 2 perforation holes) 1A is formed.

このとき、前記ダイ4の開口部4A及びパンチ5の面積は、前記補強導体の開口部202Aの面積よりも狭くしておき、前記絶縁基板1のみを打ち抜く。そのため、従来の、銅箔及び絶縁基板を打ち抜く場合に比べ、第2開口部1Aの内部にバリや金属屑が生じにくく、前記第2開口部1Aの内部の形状不良を低減することができる。   At this time, the area of the opening 4A and the punch 5 of the die 4 is made smaller than the area of the opening 202A of the reinforcing conductor, and only the insulating substrate 1 is punched out. Therefore, as compared with the conventional case of punching the copper foil and the insulating substrate, burrs and metal debris are less likely to be generated inside the second opening 1A, and the shape defect inside the second opening 1A can be reduced.

その後、前記絶縁基板を、前記補強導体202が設けられた領域の外側で切断して、前記第1開口部1Bが形成された領域102を除去し、前記絶縁基板1を所定の幅、例えば35mmにすることにより、図1及び図2に示したような配線基板を得ることができる。   Thereafter, the insulating substrate is cut outside the region where the reinforcing conductor 202 is provided to remove the region 102 where the first opening 1B is formed, and the insulating substrate 1 is made to have a predetermined width, for example, 35 mm. By doing so, a wiring board as shown in FIGS. 1 and 2 can be obtained.

また、前記配線基板は、半導体装置を製造する前に、例えば、前記導体配線201の導通検査や電気的特性の検査とともに、前記第2開口部1Aの形状不良に関する検査も行われる。このとき、前記第2開口部1Aの形状不良が多いと、半導体装置を製造する際の位置決めの精度が低下し、半導体装置の製造歩留まりが低下する。そのため、前記開口部1Aの形状不良が所定の個数(条件)よりも多いと、その配線基板は不良品となり、配線基板の製造歩留まりが低下し、配線基板の製造コストが上昇するが、本実施例の配線基板のように、あらかじめ補強導体202を開口しておき、その開口部202A内の絶縁基板1のみを打ち抜いて前記第2開口部1Aを形成することにより、前記第2開口部1Aの形状不良を低減できるため、配線基板の製造歩留まりを向上させることができる。   In addition, before manufacturing the semiconductor device, the wiring board is subjected to, for example, a continuity inspection of the conductor wiring 201 and an inspection of electrical characteristics, and an inspection regarding a shape defect of the second opening 1A. At this time, if there are many defective shapes of the second opening 1A, the positioning accuracy in manufacturing the semiconductor device is lowered, and the manufacturing yield of the semiconductor device is lowered. For this reason, if the shape defect of the opening 1A is larger than a predetermined number (condition), the wiring board becomes a defective product, the manufacturing yield of the wiring board is reduced, and the manufacturing cost of the wiring board is increased. As in the example wiring board, the reinforcing conductor 202 is opened in advance, and only the insulating substrate 1 in the opening 202A is punched to form the second opening 1A, thereby forming the second opening 1A. Since the shape defects can be reduced, the manufacturing yield of the wiring board can be improved.

前記図1及び図2に示したような配線基板を用いて半導体装置を製造する工程は、従来の半導体装置の製造方法と同様で、例えば、前記配線基板上の各半導体チップ実装領域L2に半導体チップを実装し、前記半導体チップの外部電極(ボンディングパッド)と前記導体配線の接続部を熱硬化性樹脂で封止し、前記各半導体装置形成領域L1を切断して個片化する。   The process of manufacturing a semiconductor device using the wiring substrate as shown in FIGS. 1 and 2 is the same as the conventional method of manufacturing a semiconductor device. For example, a semiconductor is mounted in each semiconductor chip mounting region L2 on the wiring substrate. A chip is mounted, the connection portion between the external electrode (bonding pad) of the semiconductor chip and the conductor wiring is sealed with a thermosetting resin, and each semiconductor device formation region L1 is cut into individual pieces.

このとき、前記各工程は、リールツーリール方式で行われ、前記配線基板の開口部(第2開口部)1Aを利用して位置決めを行うため、本実施例の配線基板のように、前記第2開口部1A内にバリや金属屑が生じにくく、形状不良の少ない配線基板を用いることにより、前記第2開口部1Aを用いた位置決めの精度を向上させ、半導体装置の製造歩留まりを向上させることができる。   At this time, each of the steps is performed in a reel-to-reel manner, and positioning is performed using the opening (second opening) 1A of the wiring board. Therefore, like the wiring board of this embodiment, the first step is performed. By using a wiring board that is less likely to generate burrs and metal debris in the two openings 1A and has less shape defects, it is possible to improve the positioning accuracy using the second openings 1A and improve the manufacturing yield of the semiconductor device. Can do.

以上説明したように、本実施例の配線基板によれば、あらかじめ前記補強導体2の所定領域に開口部202Aを設けておき、前記補強導体の開口部202Aの内部の前記絶縁基板1のみを金型で打ち抜くため、従来の、銅箔及び絶縁基板を打ち抜く場合に比べ、バリや金属屑が生じにくく、前記絶縁基板1の開口部(第2開口部)1Aの内部の形状不良を低減することができる。   As described above, according to the wiring board of this embodiment, an opening 202A is provided in a predetermined region of the reinforcing conductor 2 in advance, and only the insulating substrate 1 inside the opening 202A of the reinforcing conductor is made of gold. Since punching with a mold is less likely to generate burrs and metal debris than when punching a conventional copper foil and insulating substrate, reducing shape defects inside the opening (second opening) 1A of the insulating substrate 1 Can do.

また、前記第2開口部1Aの内部の形状不良を低減することができるため、配線基板の製造歩留まりを向上することができ、前記配線基板の製造コストを低減することができる。   Moreover, since the shape defect inside the second opening 1A can be reduced, the manufacturing yield of the wiring board can be improved, and the manufacturing cost of the wiring board can be reduced.

また、前記配線基板の、前記第2開口部1Aの形状不良を低減することができるため、前記配線基板を用いて半導体装置を形成する際に、前記第2開口部1Aを用いた位置決めの精度を向上させることができ、半導体装置の製造歩留まりを向上させることができる。   In addition, since the shape defect of the second opening 1A of the wiring board can be reduced, the accuracy of positioning using the second opening 1A when forming a semiconductor device using the wiring board. The manufacturing yield of semiconductor devices can be improved.

また、前記第2開口部1A内に、金属屑などの異物が生じないため、前記配線基板を用いて半導体装置を形成する際に、異物の混入により装置の信頼性が低下することを防げる。   In addition, since foreign matter such as metal scrap does not occur in the second opening 1A, it is possible to prevent the reliability of the device from being lowered due to the inclusion of foreign matter when the semiconductor device is formed using the wiring board.

また、前記実施例では、図3に示したように、矩形状(正方形状)の第2開口部1Aを設けた配線基板を例にあげて説明しているが、前記第2開口部1Aの形状は、これに限らず、円形や長円形、あるいは長方形状など、種々の形状のであってもよいことは言うまでもない。   Moreover, in the said Example, as shown in FIG. 3, although demonstrated taking the case of the wiring board provided with the rectangular-shaped (square-shaped) 2nd opening part 1A, the said 2nd opening part 1A is demonstrated. Needless to say, the shape is not limited to this, and may be various shapes such as a circular shape, an oval shape, or a rectangular shape.

図10は、前記実施例の配線基板の他の製造方法を説明するための模式図であり、図10(a)及び図10(b)はそれぞれ、前記導体配線及び前記補強導体を形成する工程の断面図である。なお、図10(a)及び図10(b)はそれぞれ、図6のD−D’線での断面に相当する断面図である。   FIG. 10 is a schematic view for explaining another method of manufacturing the wiring board of the embodiment, and FIGS. 10A and 10B are steps for forming the conductor wiring and the reinforcing conductor, respectively. FIG. 10A and 10B are cross-sectional views corresponding to the cross section taken along line D-D 'of FIG.

前記実施例の配線基板の製造方法では、図7に示したように、前記導体配線201及び前記補強導体202を形成する領域にレジスト(エッチングレジスト)3を形成して前記導体膜2をエッチング処理したが、これに限らず、例えば、アディティブ法を用いて、図10(a)に示すように、前記導体配線201及び前記補強導体202を形成する領域が開口するようなレジスト(めっきレジスト)6を形成して、前記導体膜2上に銅めっき膜7を形成した後、前記めっきレジスト6を除去し、前記銅めっき膜7をマスクとして前記導体膜2をエッチング処理してもよい。   In the method of manufacturing the wiring board of the embodiment, as shown in FIG. 7, a resist (etching resist) 3 is formed in a region where the conductor wiring 201 and the reinforcing conductor 202 are formed, and the conductor film 2 is etched. However, the present invention is not limited to this. For example, as shown in FIG. 10A, a resist (plating resist) 6 in which the regions for forming the conductor wiring 201 and the reinforcing conductor 202 are opened using the additive method. After forming the copper plating film 7 on the conductor film 2, the plating resist 6 may be removed, and the conductor film 2 may be etched using the copper plating film 7 as a mask.

図11は、前記実施例の配線基板の応用例を示す模式平面図である。   FIG. 11 is a schematic plan view showing an application example of the wiring board of the embodiment.

前記実施例の配線基板では、図4に示したように、配線基板として用いる領域101が1本(1条)の場合を示したが、これに限らず、さらに幅の広い絶縁基板を用いて、配線基板として用いる領域101が2本(2条)、または図11に示すように、3本(3条)の場合、あるいはそれ以上の場合でも、前記手順に沿ってそれぞれの領域101に前記導体配線201及び補強導体202を形成し、最後に、前記絶縁基板1を切断線で切断して複数の配線基板に分割してもよいことは言うまでもない。   In the wiring board of the above-described embodiment, as shown in FIG. 4, the case where one region 101 is used as the wiring board is shown. However, the invention is not limited to this, and a wider insulating substrate is used. Even if there are two (two) regions 101 used as a wiring board, or three (three) or more than three regions 101 as shown in FIG. Needless to say, the conductor wiring 201 and the reinforcing conductor 202 may be formed, and finally, the insulating substrate 1 may be cut along a cutting line and divided into a plurality of wiring substrates.

以上、本発明を、前記実施例に基づき具体的に説明したが、本発明は、前記実施例に限定されるものではなく、その要旨を逸脱しない範囲において種々変更可能であることはもちろんである。   The present invention has been specifically described above based on the above-described embodiments. However, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the present invention. .

本発明による一実施例の配線基板の概略構成を示す模式平面図である。It is a model top view which shows schematic structure of the wiring board of one Example by this invention. 本実施例の配線基板の概略構成を示す模式図であり、図1に示した配線基板のA−A’線での断面図である。It is a schematic diagram which shows schematic structure of the wiring board of a present Example, and is sectional drawing in the A-A 'line of the wiring board shown in FIG. 本実施例の配線基板の概略構成を示す模式図であり、図3(a)は図1に示した配線基板の領域L3の拡大平面図、図3(b)は図3(a)のB−B’線での断面図である。FIG. 3A is a schematic diagram showing a schematic configuration of the wiring board of the present embodiment, FIG. 3A is an enlarged plan view of a region L3 of the wiring board shown in FIG. 1, and FIG. 3B is a diagram B in FIG. It is sectional drawing in the -B 'line. 本実施例の配線基板の製造方法を説明するための模式図であり、絶縁基板の表面に導体膜を形成する工程の平面図である。It is a schematic diagram for demonstrating the manufacturing method of the wiring board of a present Example, and is a top view of the process of forming a conductor film on the surface of an insulated substrate. 本実施例の配線基板の製造方法を説明するための模式図であり、図4のC−C’線での断面図である。It is a schematic diagram for demonstrating the manufacturing method of the wiring board of a present Example, and is sectional drawing in the C-C 'line | wire of FIG. 本実施例の配線基板の製造方法を説明するための模式図であり、導体配線及び補強導体を形成する工程の平面図である。It is a schematic diagram for demonstrating the manufacturing method of the wiring board of a present Example, and is a top view of the process of forming a conductor wiring and a reinforcement conductor. 本実施例の配線基板の製造方法を説明するための模式図であり、図6のD−D’線での断面図である。It is a schematic diagram for demonstrating the manufacturing method of the wiring board of a present Example, and is sectional drawing in the D-D 'line | wire of FIG. 本実施例の配線基板の製造方法を説明するための模式図であり、第2開口部を形成する工程の平面図である。It is a schematic diagram for demonstrating the manufacturing method of the wiring board of a present Example, and is a top view of the process of forming a 2nd opening part. 本実施例の配線基板の製造方法を説明するための模式図であり、図8のE−E’線での断面図である。FIG. 9 is a schematic diagram for explaining a method for manufacturing a wiring board according to the present embodiment, and is a cross-sectional view taken along line E-E ′ of FIG. 8. 前記実施例の配線基板の製造方法の変形例を説明するための模式図であり、図10(a)及び図10(b)はそれぞれ、導体配線及び補強導体を形成する工程の断面図である。FIGS. 10A and 10B are schematic views for explaining a modified example of the method of manufacturing the wiring board according to the embodiment, and FIGS. 10A and 10B are cross-sectional views of the process of forming the conductor wiring and the reinforcing conductor, respectively. . 前記実施例の配線基板の応用例を示す模式平面図である。It is a schematic plan view which shows the application example of the wiring board of the said Example. 従来の配線基板の概略構成を示す模式平面図である。It is a model top view which shows schematic structure of the conventional wiring board. 従来の配線基板の概略構成を示す模式図であり、図12に示した配線基板のF−F’線での断面図である。It is a schematic diagram which shows schematic structure of the conventional wiring board, and is sectional drawing in the F-F 'line | wire of the wiring board shown in FIG. 従来の配線基板の製造方法を説明するための模式図であり、絶縁基板の表面に導体膜を形成する工程の平面図である。It is a schematic diagram for demonstrating the manufacturing method of the conventional wiring board, and is a top view of the process of forming a conductor film on the surface of an insulated substrate. 従来の配線基板の製造方法を説明するための模式図であり、図14のG−G’線での断面図である。It is a schematic diagram for demonstrating the manufacturing method of the conventional wiring board, and is sectional drawing in the G-G 'line | wire of FIG. 従来の配線基板の製造方法を説明するための模式図であり、導体配線及び補強導体を形成する工程の平面図である。It is a schematic diagram for demonstrating the manufacturing method of the conventional wiring board, and is a top view of the process of forming a conductor wiring and a reinforcement conductor. 従来の配線基板の製造方法を説明するための模式図であり、図16のH−H’線での断面図である。It is a schematic diagram for demonstrating the manufacturing method of the conventional wiring board, and is sectional drawing in the H-H 'line | wire of FIG. 従来の配線基板の製造方法を説明するための模式図であり、第2開口部を形成する工程の平面図である。It is a schematic diagram for demonstrating the manufacturing method of the conventional wiring board, and is a top view of the process of forming a 2nd opening part. 従来の配線基板の製造方法を説明するための模式図であり、図18のI−I’線での断面図である。It is a schematic diagram for demonstrating the manufacturing method of the conventional wiring board, and is sectional drawing in the I-I 'line | wire of FIG. 従来の配線基板の課題を説明するための模式断面図である。It is a schematic cross section for demonstrating the subject of the conventional wiring board.

符号の説明Explanation of symbols

1 絶縁基板
1A 開口部(第2開口部)
1B 第1開口部
101 配線基板として用いる領域
102 第1開口部を形成する領域
2 導体膜
201 導体配線
202 補強導体
202A 補強導体の開口部
3 レジスト(エッチングレジスト)
4 金型(ダイ)
5 金型(パンチ)
6 レジスト(めっきレジスト)
7 電解銅めっき膜
8 バリ
1 Insulating substrate 1A Opening (second opening)
DESCRIPTION OF SYMBOLS 1B 1st opening part 101 Area | region used as a wiring board 102 Area | region which forms 1st opening part 2 Conductor film 201 Conductor wiring 202 Reinforcement conductor 202A Reinforcement conductor opening part 3 Resist (etching resist)
4 Mold (die)
5 Mold (punch)
6 resist (plating resist)
7 Electrolytic copper plating film 8 Bali

Claims (2)

テープ状の絶縁基板の表面に導体膜を形成し、
前記導体膜をエッチング処理して、導体配線及び前記絶縁基板の長手方向に沿った補強導体を形成し、
前記絶縁基板の、前記補強導体を形成した領域を打ち抜いて、開口部(パーフォレーション孔)を形成する配線基板の製造方法において、
前記補強導体は、前記エッチング処理により前記開口部を形成する領域が開口するように形成した後、
金型を用いて前記補強導体の開口した領域内の絶縁基板を打ち抜いて、前記開口部を形成するにあたり、
前記補強導体の開口部の面積は、前記絶縁基板の開口部の面積よりも広く、前記絶縁基板の開口部は前記補強導体の開口部の内部領域に設けられるようにすることを特徴とする配線基板の製造方法。
Form a conductor film on the surface of the tape-shaped insulating substrate,
Etching the conductor film to form a conductor conductor and a reinforcing conductor along the longitudinal direction of the insulating substrate,
In the method of manufacturing a wiring substrate, the region where the reinforcing conductor is formed of the insulating substrate is punched to form an opening (perforation hole).
The reinforcing conductor is formed so that the region for forming the opening is opened by the etching process,
In forming the opening by punching out the insulating substrate in the opening area of the reinforcing conductor using a mold ,
The area of the opening of the reinforcing conductor is larger than the area of the opening of the insulating substrate, and the opening of the insulating substrate is provided in an inner region of the opening of the reinforcing conductor. A method for manufacturing a substrate.
前記絶縁基板は、長手方向の端部に沿って第1開口部(第1パーフォレーション孔)が形成されており、
前記第1開口部が形成された領域の内側に、前記導体膜を形成し、
前記導体膜をエッチング処理して前記導体配線及び前記補強導体を形成し、
前記補強導体を形成した領域を打ち抜いて第2開口部(第2パーフォレーション孔)を形成した後、
前記絶縁基板の、前記第1開口部が形成された領域を切断除去することを特徴とする請求項1に記載の配線基板の製造方法。
The insulating substrate has a first opening (first perforation hole) formed along an end in the longitudinal direction,
Forming the conductor film inside the region where the first opening is formed;
Etching the conductor film to form the conductor wiring and the reinforcing conductor,
After punching the region where the reinforcing conductor is formed to form the second opening (second perforation hole),
The method for manufacturing a wiring board according to claim 1, wherein a region of the insulating substrate in which the first opening is formed is cut and removed.
JP2003351492A 2003-10-10 2003-10-10 Wiring board manufacturing method and wiring board Expired - Fee Related JP4359113B2 (en)

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