JP4342985B2 - Electronic circuit unit - Google Patents

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JP4342985B2
JP4342985B2 JP2004067840A JP2004067840A JP4342985B2 JP 4342985 B2 JP4342985 B2 JP 4342985B2 JP 2004067840 A JP2004067840 A JP 2004067840A JP 2004067840 A JP2004067840 A JP 2004067840A JP 4342985 B2 JP4342985 B2 JP 4342985B2
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circuit board
conductive pattern
connecting portion
cover
insulating layer
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JP2005259901A (en
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秀一 武田
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Alps Alpine Co Ltd
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Alps Electric Co Ltd
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Description

本発明は携帯電話機の送受信ユニット等に使用して好適な電子回路ユニットに関する。   The present invention relates to an electronic circuit unit suitable for use in a transmission / reception unit of a cellular phone.

従来の電子回路ユニットの図面を説明すると、図5は従来の電子回路ユニットを示す平面図、図6は従来の電子回路ユニットを示す要部の断面図、図7は従来の電子回路ユニットに係り、隣り合う第1,第2の回路の接続構造を示す要部の断面図である。   FIG. 5 is a plan view showing a conventional electronic circuit unit, FIG. 6 is a cross-sectional view of the main part showing the conventional electronic circuit unit, and FIG. 7 is related to the conventional electronic circuit unit. FIG. 3 is a cross-sectional view of a main part showing a connection structure between adjacent first and second circuits.

次に、従来の電子回路ユニットの構成を図5〜図7に基づいて説明すると、表裏の両面に配線パターン51が設けられた回路基板52は、互いに区分された第1,第2の領域53,54を有し、この第1の領域53には、電子部品55が搭載されて、送受信切換回路等の第1の回路56が形成され、また、第2の領域54には、電子部品57が搭載されて、送受信回路等の第2の回路58が形成されている。   Next, the configuration of the conventional electronic circuit unit will be described with reference to FIGS. 5 to 7. The circuit board 52 provided with the wiring patterns 51 on both the front and back surfaces is divided into first and second regions 53 which are separated from each other. , 54, an electronic component 55 is mounted in the first region 53, and a first circuit 56 such as a transmission / reception switching circuit is formed, and an electronic component 57 is formed in the second region 54. And a second circuit 58 such as a transmission / reception circuit is formed.

金属板を折り曲げして形成された箱形の第1のカバー61は、矩形状の上板61aと、この上板61aの四方から傾斜を持って下方に折り曲げ形成された4つの側板61bを有する。   A box-shaped first cover 61 formed by bending a metal plate has a rectangular upper plate 61a and four side plates 61b that are bent downward from four sides of the upper plate 61a. .

金属板を折り曲げして形成された箱形の第2のカバー62は、矩形状の上板62aと、この上板62aの四方から傾斜を持って下方に折り曲げ形成された4つの側板62bを有する。   A box-shaped second cover 62 formed by bending a metal plate has a rectangular upper plate 62a and four side plates 62b bent downward from four sides of the upper plate 62a. .

また、この第1,第2のカバー61,62は、互いに向かい合う側板61b、62b同士の下端部を繋ぐ平板状の連結部63によって、一体化されると共に、この連結部63には、複数個の孔64が設けられている。   The first and second covers 61 and 62 are integrated by a flat plate-like connecting portion 63 that connects the lower ends of the side plates 61b and 62b facing each other. Holes 64 are provided.

そして、連結されたこの第1,第2のカバー61,62は、それぞれで第1,第2の回路56,58を覆った状態で、第1,第2のカバー61,62が回路基板52上に載置され、第1,第2のカバー61,62の側板61b、62bの下部の全周と連結部63が回路基板52に設けられた接地用導電パターン(図示せず)に半田65付けされるようになっている。(例えば、特許文献1参照)   The connected first and second covers 61 and 62 cover the first and second circuits 56 and 58, respectively, and the first and second covers 61 and 62 are connected to the circuit board 52. Solder 65 is attached to a grounding conductive pattern (not shown) provided on the circuit board 52 with the entire periphery of the lower portions of the side plates 61b and 62b of the first and second covers 61 and 62 and the connecting portion 63 mounted thereon. It has come to be attached. (For example, see Patent Document 1)

また、このような電子回路ユニットにあっては、隣り合う第1,第2の回路56,58間を接続する必要が生じるが、この場合、図7に示すように、回路基板52の上面と下面に設けられた配線パターン51同士が接続導体(スルーホール)66によって接続される構成となっている。   Further, in such an electronic circuit unit, it is necessary to connect the adjacent first and second circuits 56 and 58. In this case, as shown in FIG. The wiring patterns 51 provided on the lower surface are connected to each other by a connection conductor (through hole) 66.

しかし、このように、回路基板52の上面と下面に設けられた配線パターン51同士が接続導体(スルーホール)66によって接続される構成では、下面に位置する配線パターン51が露出状態となって、信号の漏れが大きくなるばかりか、接続導体(スルーホール)66の存在によって、容量の増大やインピーダンスの不整合が生じて、性能が悪くなる。   However, in this way, in the configuration in which the wiring patterns 51 provided on the upper surface and the lower surface of the circuit board 52 are connected by the connection conductor (through hole) 66, the wiring pattern 51 located on the lower surface is exposed, Not only does the signal leakage increase, but the presence of the connecting conductor (through hole) 66 causes an increase in capacitance and impedance mismatch, resulting in poor performance.

特開2003−258476号公報JP 2003-258476 A

従来の電子回路ユニットは、回路基板52の上面と下面に設けられた配線パターン51同士が接続導体(スルーホール)66によって接続されるため、下面に位置する配線パターン51が露出状態となって、信号の漏れが大きくなるばかりか、接続導体(スルーホール)66の存在によって、容量の増大やインピーダンスの不整合が生じて、性能が悪くなるという問題がある。   In the conventional electronic circuit unit, since the wiring patterns 51 provided on the upper surface and the lower surface of the circuit board 52 are connected to each other by the connection conductor (through hole) 66, the wiring pattern 51 located on the lower surface is exposed. Not only does the signal leakage increase, but the presence of the connecting conductor (through hole) 66 causes a problem that the capacity is increased and impedance mismatching occurs, resulting in poor performance.

そこで、本発明は信号の漏れが少なく、性能の良好な電子回路ユニットを提供することを目的とする。   SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide an electronic circuit unit with less signal leakage and good performance.

上記課題を解決するための第1の解決手段として、互いに区分けされた第1,第2の領域に電子部品が搭載されて第1,第2の回路を形成した回路基板と、前記第1,第2の回路のそれぞれを覆うべく上板と、この上板から下方に折り曲げられた側板とからそれぞれ構成され、前記側板の下部が前記回路基板に半田付けにより取り付けられ第1,第2のカバーと、前記回路基板の上面前記第1,第2の領域に跨って設けられ、前記第1,第2の回路を接続する接続用導電パターンと、前記回路基板の上面に前記接続用導電パターン上を覆うように形成された絶縁層と、前記第1,第2のカバーに設けられ、前記第1,第2のカバーの互いに向かい合う前記側板同士の下端部を連結するとともに、前記絶縁層上に位置した状態前記回路基板に半田付けされることにより、前記回路基板の上面で前記絶縁層を介して前記接続用導電パターンをシールドする連結部とを備えた構成とした。
As a first means for solving the above problems, a circuit board in which electronic components are mounted in first and second regions separated from each other to form first and second circuits; a top plate to cover the respective second circuit, each configured from the bent side plate from the top plate downwardly, first, of the second lower portion of the side plate is attached by soldering to the circuit board A cover , a conductive pattern for connection provided on the upper surface of the circuit board across the first and second regions, and connecting the first and second circuits; and the conductive pattern for connection on the upper surface of the circuit board. an insulating layer formed to cover the pattern, the first, provided on the second cover, together with the connecting the first, lower portion of the side plates to each other facing the second cover, said insulating layer It said circuit group in a state of being positioned above In the Rukoto soldered, and a structure in which a connecting portion to shield the conductive pattern for the connection via the insulating layer on the upper surface of the circuit board.

また、第2の解決手段として、絶縁層の上面と前記連結部の下面との間に僅かな隙間を持たせた構成とした。
また、第3の解決手段として、前記絶縁層が半田レジストで形成された構成とした。
Further, as a second solution, a slight gap is provided between the upper surface of the insulating layer and the lower surface of the connecting portion.
As a third solution, the insulating layer is formed of a solder resist.

また、第4の解決手段として、前記回路基板の上面には、前記接続用導電パターンを除いた状態で、前記連結部の下面に対向して接地用導電パターンが設けられ、前記連結部の下面と前記接地用導電パターンとの間に隙間を持たせた状態で、前記連結部と前記接地用導電パターンが半田付けされた構成とした。   As a fourth solution, a grounding conductive pattern is provided on the upper surface of the circuit board so as to be opposed to the lower surface of the connecting portion, excluding the connecting conductive pattern, and the lower surface of the connecting portion. The connecting portion and the grounding conductive pattern are soldered with a gap between the grounding conductive pattern and the grounding conductive pattern.

本発明の電子回路ユニットは、互いに区分けされた第1,第2の領域に電子部品が搭載されて第1,第2の回路を形成した回路基板と、第1,第2の回路のそれぞれを覆うように回路基板に半田付けにより取り付けられ、互いに結合された第1,第2のカバーを備え、回路基板の上面には、第1,第2の領域に跨って設けられ、第1,第2の回路を接続する接続用導電パターンと、この接続用導電パターン上を覆うように形成された絶縁層を有し、第1,第2のカバーは、それぞれ上板と、この上板から下方に折り曲げられた側板とで構成されると共に、第1,第2のカバーの互いに向かい合う側板同士の下端部が連結部によって連結され、連結部が絶縁層上に位置した状態で、連結部と側板の下部が回路基板に半田付けされた構成とした。
即ち、回路基板が互いに連結された第1,第2のカバーで覆われたものにおいて、回路基板の上面には、絶縁層によって覆われ、第1,第2の回路を接続する接続用導電パターンが設けられたため、接続用導電パターンが第1,第2のカバーによってシールドされて、信号の漏れが少なく、また、接続用導電パターンは、従来に接続導体に比して、容量の増加やインピーダンスの不整合が少なく、性能の良好なものが得られる。
An electronic circuit unit according to the present invention includes a circuit board in which electronic components are mounted in first and second regions separated from each other to form first and second circuits, and each of the first and second circuits. The circuit board includes first and second covers that are attached to the circuit board by soldering and coupled to each other. The upper surface of the circuit board is provided across the first and second regions, and the first and second covers are provided. A conductive pattern for connecting the two circuits, and an insulating layer formed so as to cover the conductive pattern. The first and second covers are respectively an upper plate and a lower side from the upper plate. And the bottom plate of the side plates facing each other of the first and second covers are connected by a connecting portion, and the connecting portion and the side plate are positioned on the insulating layer. The lower part of the circuit board was soldered to the circuit board.
That is, in the case where the circuit board is covered with the first and second covers connected to each other, the upper surface of the circuit board is covered with the insulating layer and connected to the first and second circuits. Since the connection conductive pattern is shielded by the first and second covers, there is less signal leakage, and the connection conductive pattern has an increased capacity and impedance compared to the conventional connection conductor. Thus, a good performance can be obtained.

また、絶縁層の上面と連結部の下面との間に僅かな隙間を持たせたため、連結部と接続用導電パターンとの間の絶縁が確実となって、品質の良好なものが得られる。   In addition, since a slight gap is provided between the upper surface of the insulating layer and the lower surface of the connecting portion, insulation between the connecting portion and the conductive pattern for connection is ensured, and a product with good quality can be obtained.

また、絶縁層が半田レジストで形成されたため、その形成が簡単で、生産性が良く、安価なものが得られる。   In addition, since the insulating layer is formed of a solder resist, it is easy to form, and a product with good productivity and low cost can be obtained.

また、回路基板の上面には、接続用導電パターンを除いた状態で、連結部の下面に対向して接地用導電パターンが設けられ、連結部の下面と接地用導電パターンとの間に隙間を持たせた状態で、連結部と接地用導電パターンが半田付けされたため、連結部と接地用導電パターンとの間の隙間の存在によって、溶けた半田が毛細管現象によってその隙間に確実に流入して、半田付の確実なものが得られる。   In addition, a grounding conductive pattern is provided on the upper surface of the circuit board so as to face the lower surface of the connecting portion, with the conductive pattern for connection removed, and a gap is provided between the lower surface of the connecting portion and the grounding conductive pattern. Since the connecting portion and the grounding conductive pattern are soldered in the state of holding, the presence of a gap between the connecting portion and the grounding conductive pattern ensures that the melted solder flows into the gap by capillary action. A certain soldered one can be obtained.

本発明の電子回路ユニットの図面を説明すると、図1は本発明の電子回路ユニットを示す平面図、図2は図1の2−2線における断面図、図3は図1の3−3線における断面図、図4は本発明の電子回路ユニットに係る回路基板の平面図である。   1 is a plan view showing an electronic circuit unit of the present invention, FIG. 2 is a cross-sectional view taken along line 2-2 of FIG. 1, and FIG. 3 is a line 3-3 of FIG. FIG. 4 is a plan view of a circuit board according to the electronic circuit unit of the present invention.

次に、本発明の電子回路ユニットの構成を図1〜図4に基づいて説明すると、多層基板等からなる回路基板1は、互いに区分された第1,第2の領域2,3を有すると共に、回路基板1の上面には、特に図4に示すように、外周を囲むように形成された第1の接地用導電パターン4aと、第1,第2の領域2,3間を仕切るように配置され、一部に切り欠き部4bが設けられた第2の接地用導電パターン4cを有する。   Next, the configuration of the electronic circuit unit of the present invention will be described with reference to FIGS. 1 to 4. A circuit board 1 made of a multilayer board or the like has first and second regions 2 and 3 which are separated from each other. On the upper surface of the circuit board 1, as shown particularly in FIG. 4, the first grounding conductive pattern 4a formed to surround the outer periphery and the first and second regions 2 and 3 are partitioned. It has the 2nd earthing conductive pattern 4c arrange | positioned and the notch part 4b was provided in part.

また、回路基板1の上面には、第1,第2の領域2,3のそれぞれに設けられた配線パターン5と、切り欠き部4bの位置で、第1,第2の領域2,3に跨って設けられた接続用導電パターン6と、この接続用導電パターン6の上面を覆うように設けられた半田レジスト等からなる絶縁層7を有すると共に、回路基板1の積層内にも配線パターン5が設けられている。   Further, on the upper surface of the circuit board 1, the wiring pattern 5 provided in each of the first and second regions 2 and 3 and the position of the notch portion 4b are arranged in the first and second regions 2 and 3. The conductive pattern 6 for connection provided across the board and the insulating layer 7 made of solder resist or the like provided so as to cover the upper surface of the conductive pattern 6 for connection are provided. Is provided.

そして、第1の領域2には、電子部品8が搭載されて、送受信切換回路等の第1の回路9が形成され、また、第2の領域3には、電子部品10が搭載されて、送受信回路等の第2の回路11が形成されると共に、接続用導電パターン6によって第1,第2の回路9,11が接続され、この接続用導電パターン6によってRF信号が伝送されるようになっている。   In the first area 2, an electronic component 8 is mounted to form a first circuit 9 such as a transmission / reception switching circuit, and in the second area 3, an electronic component 10 is mounted, A second circuit 11 such as a transmission / reception circuit is formed, and the first and second circuits 9 and 11 are connected by the connection conductive pattern 6 so that an RF signal is transmitted by the connection conductive pattern 6. It has become.

金属板を折り曲げして形成された箱形の第1のカバー12は、矩形状の上板12aと、この上板12aの四方から下方に折り曲げ形成された4つの側板12bを有し、また、金属板を折り曲げして形成された箱形の第2のカバー13は、矩形状の上板13aと、この上板13aの四方から下方に折り曲げ形成された4つの側板13bを有する。   A box-shaped first cover 12 formed by bending a metal plate has a rectangular upper plate 12a and four side plates 12b bent downward from four sides of the upper plate 12a. The box-shaped second cover 13 formed by bending a metal plate has a rectangular upper plate 13a and four side plates 13b bent downward from four sides of the upper plate 13a.

また、この第1,第2のカバー12,13は、互いに向かい合う側板12b、13b同士の下端部を繋ぐ平板状の連結部14によって、一体化されており、そして、下面が面一状態になった連結部14によって連結された第1,第2のカバー12,13は、それぞれで第1,第2の回路9,11を覆った状態で、第1,第2のカバー12,13が側板12b、13bの下部の全周が第1の接地用導電パターン4aに半田15付されると共に、連結部14が回路基板1に設けられた第2の接地用導電パターン4cに半田15付けされるようになっている。   The first and second covers 12 and 13 are integrated by a flat plate-like connecting portion 14 that connects the lower ends of the side plates 12b and 13b facing each other, and the lower surfaces are flush with each other. The first and second covers 12 and 13 connected by the connecting portion 14 cover the first and second circuits 9 and 11, respectively, and the first and second covers 12 and 13 are side plates. The entire circumference of the lower part of 12b and 13b is soldered to the first grounding conductive pattern 4a, and the connecting portion 14 is soldered to the second grounding conductive pattern 4c provided on the circuit board 1. It is like that.

この時、連結部14の下面と絶縁層7の上面との間は、0.2mm〜0.3mm程度の隙間が形成された状態になると共に、連結部14の下面と第1の接地用導電パターン4cとの間は、0.3mm程度の隙間が設けられて、溶けた半田が毛細管現象によって、連結部14の下面と第1の接地用導電パターン4cとの間の隙間内に流入するようになっている。   At this time, a gap of about 0.2 mm to 0.3 mm is formed between the lower surface of the connecting portion 14 and the upper surface of the insulating layer 7, and the lower surface of the connecting portion 14 and the first grounding conductive material are formed. A gap of about 0.3 mm is provided between the pattern 4c and the melted solder flows into the gap between the lower surface of the connecting portion 14 and the first grounding conductive pattern 4c by capillary action. It has become.

そして、第1,第2のカバー12,13の回路基板1への半田付は、先ず、第1,第2の接地用導電パターン4a、4c上にクリーム半田を塗布した後、第1,第2のカバー12,13の側板12b、13bの下部と連結部14の下面をクリーム半田上に載置する。   The soldering of the first and second covers 12 and 13 to the circuit board 1 is performed by first applying cream solder on the first and second grounding conductive patterns 4a and 4c, and then the first and second covers. The lower portions of the side plates 12b and 13b of the second covers 12 and 13 and the lower surface of the connecting portion 14 are placed on the cream solder.

しかる後、この状態でリフロー炉内に搬送して、クリーム半田が溶けると、側板12b、13bの下端部が第1の接地用導電パターン4a上に接触した状態で、側板12b、13bの外周部と第1の接地用導電パターン4aとの間で半田15付が行われると共に、側板12b、13bの下端部が第1の接地用導電パターン4a上に接触した時、連結部14の下面と絶縁層7の上面との間、及び連結部14の下面と第2の接地用導電パターン4cとの間に隙間が生じ、連結部14の下面と第2の接地用導電パターン4cとの間の隙間内には、溶けた半田が毛細管現象によって流入して、半田15付が行われるようになっている。   Thereafter, when the solder paste is transported into the reflow furnace in this state and the solder paste is melted, the outer peripheral portions of the side plates 12b and 13b are in contact with the lower end portions of the side plates 12b and 13b on the first grounding conductive pattern 4a. And the first grounding conductive pattern 4a are soldered, and when the lower ends of the side plates 12b and 13b come into contact with the first grounding conductive pattern 4a, they are insulated from the lower surface of the connecting portion 14. A gap is generated between the upper surface of the layer 7 and between the lower surface of the connecting portion 14 and the second grounding conductive pattern 4c, and a gap between the lower surface of the connecting portion 14 and the second grounding conductive pattern 4c. The melted solder flows into the inside due to a capillary phenomenon, and soldering 15 is performed.

本発明の電子回路ユニットを示す平面図。The top view which shows the electronic circuit unit of this invention. 図1の2−2線における断面図。Sectional drawing in the 2-2 line of FIG. 図1の3−3線における断面図。Sectional drawing in the 3-3 line of FIG. 本発明の電子回路ユニットに係る回路基板の平面図。The top view of the circuit board which concerns on the electronic circuit unit of this invention. 従来の電子回路ユニットを示す平面図。The top view which shows the conventional electronic circuit unit. 従来の電子回路ユニットを示す要部の断面図。Sectional drawing of the principal part which shows the conventional electronic circuit unit. 従来の電子回路ユニットに係り、隣り合う第1,第2の回路の接続構造を示す要部の断面図。Sectional drawing of the principal part which shows the connection structure of the adjacent 1st, 2nd circuit concerning the conventional electronic circuit unit.

符号の説明Explanation of symbols

1:回路基板
2:第1の領域
3:第2の領域
4a:第1の接地用導電パターン
4b:切り欠き部
4c:第2の接地用導電パターン
5:配線パターン
6:接続用導電パターン
7:絶縁層
8:電子部品
9:第1の回路
10:電子部品
11:第2の回路
12:第1のカバー
12a:上板
12b:側板
13:第2のカバー
13a:上板
13b:側板
14:連結部
15:半田
1: circuit board 2: first region 3: second region 4a: first grounding conductive pattern 4b: notch 4c: second grounding conductive pattern 5: wiring pattern 6: connection conductive pattern 7 : Insulating layer 8: Electronic component 9: First circuit 10: Electronic component 11: Second circuit 12: First cover 12a: Upper plate 12b: Side plate 13: Second cover 13a: Upper plate 13b: Side plate 14 : Connection part 15: Solder

Claims (4)

互いに区分けされた第1,第2の領域に電子部品が搭載されて第1,第2の回路を形成した回路基板と、
前記第1,第2の回路のそれぞれを覆うべく上板と、この上板から下方に折り曲げられた側板とからそれぞれ構成され、前記側板の下部が前記回路基板に半田付けにより取り付けられ第1,第2のカバーと、
前記回路基板の上面前記第1,第2の領域に跨って設けられ、前記第1,第2の回路を接続する接続用導電パターンと、
前記回路基板の上面に前記接続用導電パターン上を覆うように形成された絶縁層と、
前記第1,第2のカバーに設けられ、前記第1,第2のカバーの互いに向かい合う前記側板同士の下端部を連結するとともに、前記絶縁層上に位置した状態前記回路基板に半田付けされることにより、前記回路基板の上面で前記絶縁層を介して前記接続用導電パターンをシールドする連結部と
を備えたことを特徴とする電子回路ユニット。
A circuit board on which electronic components are mounted in first and second regions separated from each other to form first and second circuits;
The first, upper plate to cover the respective second circuit, each configured from the bent side plate from the top plate downwardly, first the lower portion of the side plate is attached by soldering to the circuit board A second cover ;
A conductive pattern for connection for connecting the first and second circuits, which is provided across the first and second regions on the upper surface of the circuit board;
An insulating layer formed on the upper surface of the circuit board so as to cover the conductive pattern for connection ;
The first, provided on the second cover, the first, as well as connecting the lower ends of the side plates to each other face of the second cover is soldered to the circuit board in a state of being positioned on the insulating layer A connecting portion that shields the conductive pattern for connection through the insulating layer on the upper surface of the circuit board;
Electronic circuit unit characterized by comprising a.
前記絶縁層の上面と前記連結部の下面との間隙間を持たせたことを特徴とする請求項1記載の電子回路ユニット。 Electronic circuit unit according to claim 1, characterized in that to have a gap between the upper surface and the lower surface of the connecting portion of the insulating layer. 前記絶縁層が半田レジストで形成されたことを特徴とする請求項2記載の電子回路ユニット。 The electronic circuit unit according to claim 2 , wherein the insulating layer is formed of a solder resist. 前記回路基板の上面には、前記接続用導電パターンを除いた状態で、前記連結部の下面に対向して接地用導電パターンが設けられており、前記連結部の下面と前記接地用導電パターンとの間に隙間を持たせた状態で、前記連結部と前記接地用導電パターンが半田付けされたことを特徴とする請求項1から3の何れかに記載の電子回路ユニット。 The upper surface of the circuit board, in a state except for the connecting conductive patterns, wherein are opposed to the grounding conductor pattern on the lower surface of the connecting portion is provided, and the lower surface of the connecting portion and the ground conductive pattern 4. The electronic circuit unit according to claim 1, wherein the connecting portion and the grounding conductive pattern are soldered in a state where a gap is provided therebetween.
JP2004067840A 2004-03-10 2004-03-10 Electronic circuit unit Expired - Fee Related JP4342985B2 (en)

Priority Applications (1)

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JP2004067840A JP4342985B2 (en) 2004-03-10 2004-03-10 Electronic circuit unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004067840A JP4342985B2 (en) 2004-03-10 2004-03-10 Electronic circuit unit

Publications (2)

Publication Number Publication Date
JP2005259901A JP2005259901A (en) 2005-09-22
JP4342985B2 true JP4342985B2 (en) 2009-10-14

Family

ID=35085348

Family Applications (1)

Application Number Title Priority Date Filing Date
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