JP4318865B2 - Music data adder - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a musical tone data adding device used for mixing musical tone data.
[0002]
[Prior art]
Devices such as electronic musical instruments that generate musical sounds electronically have recently been able to purchase 18-20 bit DACs (Digital Analog Conveters) at a low price due to large growth in CDs (Compact Disks) and so on. / R stereo output is almost all.
[0003]
In recent years, such general-purpose DAC chips all adopt the serial input method (most of them are MSB first input methods) in order to reduce the number of pins and the number of wirings on the board.
[0004]
The format used for the serial data transfer is generally called a CDF format, and music data of 16 bits to 24 bits of one channel is transferred MSB first (MSB first).
[0005]
In recent years, many electronic musical tone generators have two or more stereophonic sound waveform output sequences that are not in time for a single stereo sequence.
[0006]
As one of its utilization methods, a tone generator (TG) such as a tone generator LSI (sound source chip) and a sound effect adding device such as a digital signal processor (DSP) exist as separate chips. In order to add a different acoustic effect for each output series of the generator TG, the digital signal processor DSP, which is an acoustic effect addition apparatus, also needs a serial data input port of two or more series in accordance with it.
[0007]
In order to add a reverberation effect (Reverb) that is common throughout the digital signal processor DSP and then to add a common reverberation effect (Reverb), when mixing (adding) two or more stereo sequences, the digital signal processor DSP In general, since an ALU (Arithmetic Logic Unit) of 24 to 32 bits is provided, it can be easily handled.
[0008]
If it is a stereo two-line electronic musical instrument that is equivalent to an electronic piano, a configuration using such a digital signal processor DSP may be used. However, in a system comprising an electronic organ or an electronic piano with an automatic accompaniment or automatic performance function, a different tone is used. Since it is necessary to generate a plurality of them simultaneously, as shown in FIG. 9, a large number of series obtained by combining two or three of the above-described configurations is required. In the configuration shown in the figure, the series of musical tone generators TG1 and TG2, digital signal processors DSP1 and DSP2, and digital / analog converters DACs 114a and 114b are two series, and the microphones 110 and 111-analog / digital converters ADC112 and 113 on the analog input side (Analog Digital Conveter), a digital signal processor DSPm, and a digital / analog converter DAC 114c have a series of sets, and the analog tone data is mixed by the mixing circuit 117 on the final stage side.
[0009]
In this case, each digital signal processor DSP must be configured as shown in FIG. That is, a reverberation effect addition block (Reverb) must be prepared in addition to the respective sound effect addition blocks in the all-digital signal processor DSP, but the processing in this part is heavy, and half of the entire digital signal processor DSP. Since nearby processing is required, there is a lot of waste.
[0010]
Therefore, as shown in FIG. 11, it is considered to adopt a configuration in which acoustic effects other than the reverberation effect are added by the respective digital signal processors DSP1 to DSPm, and after adding them, the reverberation effect is added by one digital signal processor DSPn. It is done. In such a configuration, the digital signal processors DSP1 to DSPm are configured as shown in FIG. 12, and the digital signal processor DSPn is configured as shown in FIG.
[0011]
With the above configuration, the number of digital signal processors DSP increases, but the processing capability of each digital signal processor DSP is about half of the processing capability required for the digital signal processor DSP in the case of the previous configuration. Therefore, a general-purpose digital signal processor DSP can be employed, and the number of digital-analog converter DACs can be reduced.
[0012]
[Problems to be solved by the invention]
However, in the configuration of the general-purpose digital signal processor DSP, input / output with the outside is performed serially, and the number of input / output pins is usually 2 to 3 (one input in the figure is for DSP control). Therefore, although the processing capability is sufficient, the configuration of FIG. 11 causes a problem that mixing (addition) cannot be performed. That is, in the configuration of FIG. 11, since musical sound data of four or more series must be input to the digital signal processor DSPn, it is physically impossible for a general-purpose digital signal processor DSP having about 2 to 3 input pins. It is.
[0013]
The present invention was devised in view of the above problems, and in a musical sound data processing configuration having a plurality of musical sound waveform output sequences, a general-purpose digital signal processor DSP executes processing necessary for each sequence, We will provide a musical sound data adding device that can perform addition processing more efficiently in a simpler form without increasing the number of parts unnecessarily when the same processing is performed on these multiple lines later. It is.
[0014]
[Means for Solving the Problems]
In the configuration as shown in FIG. 11, in order to apply the same processing to a plurality of series of musical sound data with one general-purpose digital signal processor DSPn, a plurality of input ports are provided in front of the digital signal processor DSPn. It is necessary to provide an adder circuit for mixing.
[0015]
The present invention proposes a configuration of such an adding device. However, an adder circuit usually requires a large number of cells (or gates) per bit, and when 24 bits are added together, it becomes a large circuit.
[0016]
Further, in the MSB-first serial data transfer system that is generally used in recent years, as shown in FIG. 14, it is necessary to return to parallel once before addition, and a large-scale circuit configuration is also required from this point of view. It will be.
[0017]
Therefore, in the configuration of the present application, it is assumed that the serial musical sound data output in LSB first is input to the adding device, whereby the musical sound data are added together with an extremely simple circuit configuration and can be output.
[0018]
  That is, the configuration of the present invention is as follows.
  A music data adding device for adding music data,
  The musical sound data consists of a plurality of channels that are time-division multiplexed.
  An identification signal that can identify which of the plurality of channels is currently being transmitted / received is attached,
  Each channel of the plurality of channels is composed of a plurality of bits,
  theseAn addition processing unit for inputting musical sound data in order from the LSB side and adding the predetermined number of bits less than the total number of bits.When,
  An edge generator that generates a signal that detects the edge when the identification signal changes;
Have
  The addition processing unit uses the carry output that is a part of the addition result for each bit as a carry input at the time of the next higher bit addition,
  And when adding the LSBs of the above musical sound data,According to the signal generated by the edge generatorEnter zero as carry input
This is a basic feature.
[0019]
According to the above configuration, in the addition processing unit, the musical tone data composed of a plurality of bits is input in order from the LSB side, and the addition processing is performed for each predetermined bit (may be 1 bit) less than the total number of bits. Therefore, it is possible to add serially input musical sound data as it is without using a configuration such as a shift register (it can be processed in real time), and with a simple circuit configuration, It is possible to execute the addition process efficiently. Accordingly, by combining a plurality of such simple and fast calculation structures, it is possible to mix a plurality of series of musical sound data.
[0020]
  Of course, if there is a carry at the time of the above addition processing, the musical sound data is input with LSB first, so that the addition processing unit sequentially inputs the carry output that is a part of the addition result for each bit. This is the carry input when adding the higher bits. Furthermore, when adding the LSBs of the above musical sound data,According to the signal generated by the edge generatorZero is input as the carry input.
[0021]
Since the normal musical tone data is represented by two's complement, the MSB is 0 for a positive number, and the MSB is 1 for a negative number. In the above configuration, input is performed sequentially from the LSB side, and the addition process is performed sequentially, and finally the addition process on the MSB side is performed. In such an MSB addition process, overflow (or arithmetic overflow; overflow, Depending on the underflow, the sign may be reversed.
[0022]
That is, as shown in FIG. 8 (a), there is a carry in the addition processing of the bits before the MSB, and the values of the two musical sound data to be added in the next MSB are positive (that is, the MSB). When 0 is input to both), the carry causes the MSB to be 1 and represents a negative number.
[0023]
Also, as shown in FIG. 5B, when the addition processing of the bits before the MSB has no carry, the values of the two musical tone data to be added by the next MSB are negative (that is, 1 as both as the MSB). In the above addition process, the MSB portion becomes 0 and represents a positive number.
[0024]
  The configuration of claim 2 is a configuration that prevents the positive and negative from being reversed due to such overflow.In addition to the addition processing unit, a pulse generation unit that generates a signal indicating the timing at which the MSB of the musical sound data is input to the addition processing unit, and a delay unit that delays and outputs the output of the addition processing unit by a predetermined time And when the pulse generation unit indicates that the MSB of the musical sound data is input to the addition processing unit, the addition processing unitBased on the addition result, an overflow is detected, and at the overflow,Instead of the output of the delay unitPredetermined values (for example, maximum value at overflow, minimum value at underflow)TheIt is characterized by output. This eliminates the reversal of positive and negative in the calculation result, thereby preventing the generation of strange musical sounds and preventing circuit instability.
[0025]
  Even if at least one of the musical tone data to be added is parallel data, the addition processing according to the above-described configuration of the present invention can be executed if converted to serial data before the addition processing is executed. Become.In particular,The musical tone data has the same sampling period, and at least one of the musical tone data is converted into serial data output earlier from the LSB side after being converted into parallel data.To do.
[0026]
  Furthermore, the above-described configuration can be provided in the musical tone generator.That is,It is intended for the configuration of a musical tone data adding device provided in the musical tone generating device. As a feature of the configuration in that case, one of the input musical tone data to be added bit by bit in the addition processing unit is input from the outside Serial music data, the other is parallel music data created internally and converted to serial in synchronization with the external serial timingTo.
[0027]
  Further, even if at least one of the musical tone data to be added is output in the MSB first format as usual, if it is converted to the LSB first format before the addition processing is executed, It is possible to execute addition processing according to the configuration of the present invention.Claim 3Has proposed such a configuration. Specifically, the musical tone data composed of a plurality of bits is input in order from the LSB side, and the addition processing is performed for each predetermined bit smaller than the total number of bits. The addition processing unit sets a carry output, which is a part of the result of addition for each bit, as a carry input at the time of the next upper bit addition, and at least one input of the addition processing unit. A data input switching unit is provided on the side, and the musical sound data is sequentially input to the addition processing unit from the LSB side by the switching process.
[0028]
  The configuration of the present invention can also be applied to stereo sound data. That is, since the addition processing unit has a simple configuration and the calculation speed is sufficiently high, it is possible to add musical sound data by processing the Left and Right waveforms in a time division manner in the addition processing unit. Enough for processingIt is.
[0029]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
Example 1
FIG. 1 is an explanatory diagram showing a functional block configuration of an electronic organ that can mix voice and live performances with the performance of the main body. As shown in the figure, the electronic organ has a stereo configuration and a tone data processing configuration having a plurality of tone waveform output sequences. Further, a process necessary for each series is performed by the general-purpose digital signal processors DSP1 to DSPm, and a process for adding a reverberation effect to these series by another digital signal processor DSPn (switching to another process) Can also be done). The mixer 1a provided between the digital signal processors DSP1 to DSPm and the digital signal processor DSPn is the configuration of the adding device according to the present embodiment.
[0030]
As shown in the figure, the configuration of the electronic organ is provided with a CPU 100, which receives a key event from the keyboard 101 and sends it to the musical sound waveform output series side, or receives an operation instruction of the panel 102 or the like. The entire electronic organ is controlled. Then, the tone generation circuits TG1 to TG1 to which the key event is inputted generate the specified tone respectively under the control of the CPU 100. Thereafter, under the same control from the CPU 100, the digital signal processors DSP1 to DSPl add an acoustic effect corresponding to each tone color or an arbitrary acoustic effect by the panel operation.
[0031]
In addition to these musical sound waveform output series, in this embodiment, live voices of human voices and musical instruments are picked up by microphones 110 and 111, converted to digital data by analog-digital converters ADC 112 and 113, and controlled by the CPU 100. A predetermined sound effect is added by the received digital signal processor DSPm.
[0032]
These plural series of musical tone data are mixed by the addition processing of the mixer 1a. Thereafter, a reverberation effect is added by the digital signal processor DSPn, converted to analog data by the digital / analog converter DAC 114, amplified by the amplifier 115, and output from the speaker 116 as R / L stereo music.
[0033]
In the above configuration, the musical sound data is converted into LSB first serial data in the digital signal processors DSP1 to DSPm and output and input to the mixer 1a, and a reverberation effect is added by the digital signal processor DSPn. The musical tone data is converted into MSB first serial data in the digital signal processor DSPn (or LSB first if digital analog converter DAC 114 described later is supported), and output to digital analog converter DAC 114. The
[0034]
In the above configuration, the mixer 1a has a circuit configuration of an addition processing unit as shown in FIG. The configuration of the addition processing unit receives the two LSB-first musical tone data (DATin1, DATin2) serially output from the two stereophonic musical tone waveform output series, performs an addition process for each bit, and the addition result An adder 10 that outputs (DATout) and a carry output (Cout) that is a part of the addition result for each bit from the adder 10 and is used as a carry input (Cin) for the next higher bit addition A bit register 11 (comprising a D latch circuit).
[0035]
Since the adder 10 performs the addition process in synchronization with the system clock, the carry bit register 11 receives the system clock (SCKin), receives the carry output (Cout) in synchronization with the clock, and At the next clock (next upper bit), carry input (Cin) to the adder 10 is performed.
[0036]
In this configuration, left and right musical tone data is processed in a time-sharing manner for stereo output. Therefore, an edge generator 12 is provided, an LR clock is input, and the L and R data are input. A square wave is generated and input to the carry bit register 11.
[0037]
Furthermore, when the two music data LSBs are added to each other, the carry bit register 11 inputs zero as the carry input.
[0038]
FIG. 3 is a timing chart of each input / output data and clock in the above configuration. At the time of stereo left and right processing, 24 bits of musical sound data (DATin1, DATin2) are input for each system clock, and the addition result is output bit by bit (DATout). The output has a delay of 50 to 100 ns with respect to the bit unit width of 491 ns, but no particular problem occurs.
[0039]
In the above configuration, two serial musical tone data are added. However, when more than one series of addition processing is performed, by combining a plurality of the above configurations corresponding to the number, Mixing processing can be performed.
[0040]
(Example 2)
FIG. 4 is a circuit block diagram showing a circuit configuration of an adder according to the second embodiment of the present invention used as an electronic organ mixer 1b. The configuration of the electronic organ to which the configuration of the present application is applied is basically the same as that of the first embodiment, and details thereof are omitted.
[0041]
In the configuration of this embodiment, the serial musical sound data input as DATin2 is input in LSB first, but the serial musical sound data input as the other DATin1 may be either LSB first or MSB first. Moreover, these musical tone data are input with different system clocks (SCKin1, SCKin2) and LR clocks (LRCKin1, LRCKin2).
[0042]
In the above configuration, the same number as the first embodiment is basically the same configuration. Here, a data input switching unit 20 is provided on one input side of the adder 10, and musical sound data input as DATin 1 is converted to LSB first and input to the adder 10 by the switching process. Yes.
[0043]
That is, when serial musical tone data (DATin1) is converted into parallel data by a shift register configuration, the MSB is converted into the upper bit as usual, and the LSB is converted into the upper bit to invert the serial-parallel. The converter 24 and the two outputs of the serial-parallel converter 24 are input, and the changeover switch 22 switches the parallel data with the MSB as the upper bit or the parallel data with the LSB as the upper bit. 21 and a parallel-serial converter 23 for converting parallel data input from the switch 21 into serial data, and the data input switching unit 20 is configured by these.
[0044]
As described above, the serial musical sound data (DATin1) is input in synchronization with the system clock (SCKin1) and the LR clock (LRCKin1), and the other serial musical sound data (DATin2) The parallel-serial converter 23 is synchronized with the system clock (SCKin2) and the LR clock (LRCKin2) on the serial musical sound data (DATin2) side, which are input in synchronization with the SCKin2) and LR clock (LRCKin2). Therefore, the addition result (DATout) is output from the D latch circuit 13 in synchronization with the system clock (SCKin2) and LR clock (LRCKin2) on the serial musical sound data (DATin2) side.
[0045]
By combining a plurality of the above-described configurations, it is possible to perform a mixing process of three or more series. In this case, the addition result output (DATout), the system clock output (SCKout), and the LR clock output (LRCKout) of this configuration are , Serial music data (DATin1), system clock (SCKin1) and LR clock (LRCKin1), or serial music data (DATin2), system clock (SCKin2) and LR clock (LRCKin2) of the next addition processing unit to be combined Will be.
[0046]
In the configuration of this embodiment, even if at least one of the musical tone data to be added is output in the MSB first format as usual, the data input switching unit 20 causes the LSB first format as described above. Since the addition process by the adder 10 is executed after the conversion into the above, the above-described configuration of the present invention enables the mixing process.
[0047]
(Example 3)
FIG. 5 is a diagram showing an example of an electronic organ that can output a musical sound with each sound effect addition process for each musical sound waveform output series. By applying the configuration of the present invention, the output series is mixed and mixed. It is explanatory drawing which shows the functional block of the structure which can add another acoustic effect to the musical tone data.
[0048]
The configuration of this embodiment is an addition device implemented as an addition processing configuration provided in a tone generator LSI that constitutes a musical tone generator provided in one musical sound waveform output series. In other words, in this configuration, the same configuration of the addition processing units 1c and 1d as those in the above embodiment is provided on the output side of the tone generation circuit TG2 of the tone generator LSI 117.
[0049]
FIG. 6 is a circuit diagram showing the configuration of the addition processing units 1c and 1d. The configuration is basically the same as that of the first embodiment. In this configuration, the 16-bit parallel data output of the musical tone generating circuit TG2 is supplied to the LSB first 24-bit serial musical tone data (DATin: serial musical tone data of another output series as shown in FIG. 5). The process which adds is performed. Therefore, the parallel data generated by the tone generation circuit TG 2 is converted into LSB first serial data by the parallel-serial converter 30 and input to the adder 10. On the other hand, since the external input data (DATin) input to the adder 10 is 24-bit data as described above, in the data conversion by the parallel-serial converter 30, 16-bit data is converted to 24-bit data. Is converted. The adder 10 performs addition processing in 48 time divisions in total of L and R24 time divisions. The addition result (DATout) is output by the shifter 31 after being delayed by a half cycle (24 stages), as will be described later.
[0050]
Here, a portion indicated by a broken line as 40 in the figure is a configuration of an overflow detection unit that detects an overflow of the adder 10. This configuration includes two EXOR circuits 41 and 43, one inverter 42, and one AND circuit 44.
[0051]
That is, the serial tone data of the internal sound source output from the parallel-serial converter 30 and the serial tone data taken from outside (external input) are input to the EXOR circuit 41. Here, when both inputs are 0 or 1, 0 is output from the EXOR circuit 41, converted to 1 by the inverter 42, and output.
[0052]
Also, one of the above inputs and the addition result of the adder 10 are input to the other EXOR circuit 43. Here, when both inputs have opposite values (that is, when one is 0 and the other is 1), the EXOR circuit 43 outputs 1.
[0053]
When 1 is output from the EXOR circuit 41 via the inverter 42 and 1 is output from the EXOR circuit 43 in the last bit MSB of the musical sound data input LSB first, that is, (1) both MSBs Is 0 representing a positive number and the addition result is 1 representing a negative number, or (2) both MSBs are 1 representing a negative number and the addition result is 0 representing a positive number. Sometimes it ’s overflowing. Therefore, if both values input to the AND circuit 44 are 1, it is detected that the sign of the addition result is reversed due to overflow of the MSB.
[0054]
In this embodiment, when such an overflow has not occurred, the selector 48 selects the output from the shifter 31 side as an addition result (selection of the A side input) via the D latch circuit 45 and outputs it. The selector 48 outputs the addition result as DATout. On the other hand, when the overflow occurs, the selector 48 selects the output from the D latch circuit 45 and EXOR circuit 47 side as the addition result (selects the B side input) via the D latch circuit 45 and outputs it. An instruction is issued, and the selector 48 outputs the addition result as DATout. At this time, the output DATout of the addition result from the D latch circuit 45 and the EXOR circuit 47 side is also output after being delayed by a half cycle (24 stages), similarly to the output of the addition result of the shifter 31. The edge pulse from the edge generator 12 is also input to the D latch circuit 45, and time division processing is performed for each of L and R.
[0055]
When overflow is detected and the addition result is output from the D latch circuit 45 and the EXOR circuit 47 side, the addition result of the adder 10 is transmitted from the EXOR circuit 47 via the D latch circuit 45 for bits other than the MSB. Although it is output as it is, only the MSB bit part is pulsed from the b23 pulse generator 46 (which generates a pulse only when it is MSB), and the EXB circuit 47 outputs the MSB output from the D latch circuit 45. When 0 is 0, it is converted to 1 and when the MSB is 1, it is converted to 0 and input to the selector 48.
[0056]
FIG. 7 shows a timing chart of the above embodiment. Here, the data input from the tone generation circuit TG2 is 16-bit parallel, but is converted into 24-bit serial data in accordance with the external input data (DATin) by conversion by the parallel-serial converter 30. . As described above, the output of the shifter 31 is delayed by a half cycle, and the output of the selector 48 is the same. This is a half-cycle delay due to the MSB processing when overflowing. Also, in the figure, the bit b23 which is the MSB is filled with diagonal lines in the output of the selector 48. However, in this case, when there is an overflow, the addition result of the adder 10 is converted to the opposite value. Will be processed.
[0057]
In the configuration of the present embodiment described in detail above, overflow or underflow in the adder 10 is detected by the configuration 40 for detecting overflow. When these are detected, the D latch circuit 45, the EXOR circuit 47, In the configuration of the b pulse generator 46 and the selector 48, the positive / negative value in the MSB is corrected and the addition result is output. Therefore, the positive / negative inversion in the calculation result is eliminated, and the generation of strange music is eliminated. Can be prevented from becoming unstable.
[0058]
Also, in this configuration, the configuration of the addition processing units 1c and 1d according to the present invention is provided on the output side of the tone generation circuit TG2 of the tone generator LSI 117, and internally generated parallel tone data is converted into a parallel-serial converter. 30, the data is converted to LSB first serial data, and the external input data (DATin) LSB first serial musical tone data is added to the adder 10 so that the musical tone data to be added is parallel data. However, the addition processing according to the above-described configuration of the present invention can be executed.
[0059]
Further, even if the musical tone data to be added is output in the MSB first format as usual, if it is converted to the LSB first format before the addition processing is executed, the above-described configuration of the present invention is applied. It is possible to execute the addition process by.
[0060]
The musical tone data adding apparatus of the present invention is not limited to the above-described embodiment, and it is needless to say that various modifications can be made without departing from the gist of the present invention.
[0061]
【The invention's effect】
  As described above, the claims of the present invention1-3According to the described musical sound data adding device, it is possible to obtain an excellent effect that the adding process can be efficiently performed in a simpler form without increasing the number of parts. Accordingly, by combining a plurality of such simple and fast calculation structures, it is possible to mix a plurality of series of musical sound data.
[0062]
  Also, as in the configuration of claim 2,When the pulse generation unit indicates that the MSB of the musical sound data is input to the addition processing unit, the addition processing unitBased on the addition result, an overflow is detected, and at the overflow,Instead of the output of the delay unitEach predetermined valueTheSince it is possible to prevent the positive and negative reversal phenomenon caused by overflowing, it is possible to prevent the generation of strange musical sounds and to prevent circuit instability. Become.
[0063]
  Furthermore, even if at least one of the musical tone data to be added is output in the MSB first format as usual,Claim 3If the data input switching unit is provided on at least one input side of the addition processing unit and the addition processing is performed by performing conversion to the LSB first format before the addition processing is executed as in the configuration of It is possible to execute addition processing.
[Brief description of the drawings]
FIG. 1 is a circuit block diagram showing a functional block configuration of an electronic organ that can mix voice and live performances with the performance of a main body.
FIG. 2 is a circuit diagram showing a circuit configuration of an addition processing unit constituting the mixer 1a in the embodiment.
FIG. 3 is a timing chart of each input / output data and clock in the above configuration.
FIG. 4 is a circuit block diagram showing a circuit configuration of an adder according to a second embodiment of the present invention used as an electronic organ mixer 1b.
FIG. 5 is an explanatory diagram showing a functional block configuration of an electronic organ that can output a musical sound with each acoustic effect addition process for each musical sound waveform output series to which the configuration of the present invention is applied.
FIG. 6 is a circuit diagram showing a configuration of addition processing units 1c and 1d applied to the configuration of the embodiment.
FIG. 7 is a timing chart of the above embodiment.
FIG. 8 is an explanatory diagram for explaining a state of overflow in MSB addition processing;
FIG. 9 is a system explanatory diagram of an electronic organ having a plurality of musical sound generation sequences and an electronic piano with automatic accompaniment or automatic performance function.
FIG. 10 is an explanatory diagram showing an internal configuration of a digital signal processor DSP in the system.
11 is a system explanatory diagram of an electronic organ having an arrangement different from that of FIG. 9 and an electronic piano with an automatic accompaniment or automatic performance function.
FIG. 12 is an explanatory diagram showing an internal configuration of a digital signal processor DSP1 in the system.
FIG. 13 is an explanatory diagram showing an internal configuration of the digital signal processor DSP2 in the same system.
FIG. 14 is an explanatory diagram showing a configuration for adding conventional MSB first serial tone data.
[Explanation of symbols]
1a, 1b mixer
1c, 1d addition processing unit
10 Adder
11 Carry bit register
12 Edge generator
13 Latch circuit
20 Data input switching part
21 selector
22 selector switch
23 Parallel-serial converter
24 Serial-parallel converter
30 Parallel-serial converter
31 Shifter
Configuration to detect overflow of 40 digits
41, 43, 47 EXOR circuit
42 Inverter
44 AND circuit
45 D latch circuit
46 b23 pulse generator
48 selector
100 CPU
101 keyboard
102 panels
110, 111 microphones
112, 113 Analog to digital converter
114 Digital-to-analog converter
115 amplifier
116 Speaker
117 Sound source LSI
TG music generator
TG1 ~ 1 Musical sound generation circuit
DSP digital signal processor

Claims (3)

A music data adding device for adding music data,
The musical sound data consists of a plurality of channels that are time-division multiplexed.
An identification signal that can identify which of the plurality of channels is currently being transmitted / received is attached,
Each channel of the plurality of channels is composed of a plurality of bits,
An addition processing unit that sequentially inputs these musical tone data from the LSB side and adds each predetermined number of bits less than the total number of bits ,
An edge generator for generating a signal that detects the edge when the identification signal changes ; and
The addition processing unit uses the carry output that is a part of the addition result for each bit as a carry input at the time of the next higher bit addition,
In addition, when adding the LSBs of the musical sound data, a musical sound data adding device is characterized in that zero is input as a carry input in accordance with a signal generated by the edge generation unit . A music data adding device for adding music data,
The musical sound data consists of a plurality of channels that are time-division multiplexed.
Each channel of the plurality of channels is composed of a plurality of bits,
An addition processing unit that sequentially inputs these musical tone data from the LSB side and adds each predetermined number of bits less than the total number of bits ,
A pulse generator for generating a signal indicating the timing at which the MSB of the musical sound data is input to the addition processor;
A delay unit for delaying the output of the addition processing unit by a predetermined time and outputting ,
The addition processing unit sets a carry output which is a part of the addition result for each bit as a carry input at the time of the next higher bit addition,
When the pulse generation unit indicates that the MSB of the musical tone data is input to the addition processing unit , the overflow is detected based on the addition result by the addition processing unit. when the tone data adding unit and outputs a respective predetermined value instead of the output of the delay unit of. 3. A musical tone data adding apparatus for adding musical tone data according to claim 1 or 2, wherein the musical tone data composed of a plurality of bits are inputted in order from the LSB side and less than the total number of bits. An addition processing unit for adding each predetermined bit, and the addition processing unit sets a carry output which is a part of the addition result for each bit as a carry input at the time of the next higher bit addition, It provided with a data input switching unit on at least one of the input side of the addition processing section, by the switching process, according to claim 1 or 2, characterized in that inputs the musical sound data to the addition unit from the LSB side in order musical tone data addition device.

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