JP4312754B2 - インピーダンス整合のための構成要素 - Google Patents
インピーダンス整合のための構成要素 Download PDFInfo
- Publication number
- JP4312754B2 JP4312754B2 JP2005357348A JP2005357348A JP4312754B2 JP 4312754 B2 JP4312754 B2 JP 4312754B2 JP 2005357348 A JP2005357348 A JP 2005357348A JP 2005357348 A JP2005357348 A JP 2005357348A JP 4312754 B2 JP4312754 B2 JP 4312754B2
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- Prior art keywords
- substrate
- component
- conductive ground
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- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/025—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
- H05K1/0251—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance related to vias or transitions between vias and transmission lines
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
- H05K1/0219—Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors
- H05K1/0222—Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors for shielding around a single via or around a group of vias, e.g. coaxial vias or vias surrounded by a grounded via fence
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/184—Components including terminals inserted in holes through the printed circuit board and connected to printed contacts on the walls of the holes or at the edges thereof or protruding over or into the holes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4046—Through-connections; Vertical interconnect access [VIA] connections using auxiliary conductive elements, e.g. metallic spheres, eyelets, pieces of wire
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09645—Patterning on via walls; Plural lands around one hole
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09809—Coaxial layout
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/09836—Oblique hole, via or bump
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10742—Details of leads
- H05K2201/10886—Other details
- H05K2201/10893—Grouped leads, i.e. element comprising multiple leads distributed around but not through a common insulator
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
- Y10T29/49139—Assembling to base an electrical component, e.g., capacitor, etc. by inserting component lead or terminal into base aperture
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structure Of Printed Boards (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Description
102 導電性グランドコア
104 誘電体層
106 信号導体層
Claims (9)
- 構成要素(100)であって、
多層基板内の孔に挿入されて該基板の複数の層を貫通して延びるよう構成された導電性グランドコア(102)と、
該導電性グランドコア(102)をグランド基準に接続する該導電性グランドコア(102)の一端に電気的に結合された導電性グランド接続(108)と、
該導電性グランドコア(102)を横方向に包囲する誘電体層(104)と、
該誘電体層(104)に対して横方向に結合され、前記導電性グランドコア(102)及び前記導電性グランド接続(108)から電気的に分離されている信号導体層(106)とを備えており、
前記導電性グランドコア(102)、前記誘電体層(104)、及び前記信号導体層(106)の寸法及び材料が、前記多層基板がインピーダンス整合されるよう選択される、構成要素(100)。 - 基板(300)であって、
信号トラック層(304)及び分離層(310)を含む複数の基板層(302)であって、少なくとも2つの信号トラック層間で信号を伝達するのに適した場所で孔(312)によって貫通される、複数の基板層(302)と、
前記孔(312)に挿入して、前記少なくとも2つの信号トラック層(304)間における信号の伝送を可能にする、構成要素(320)とを備えており、該構成要素(320)が、
前記複数の基板層の複数の層を通って挿入されるよう構成された導電性グランドコア(322)と、
該導電性グランドコア(332)をグランド基準に接続する該導電性グランドコア(332)の一端に電気的に結合された該導電性グランド接続(328)と、
前記導電性グランドコア(322)を横方向に包囲する誘電体層(324)と、
該誘電体層(324)に対して横方向に結合され、前記導電性グランドコア(332)及び前記導電性グランド接続(328)から電気的に分離されている信号導体層(326)とを備えており、
前記導電性グランドコア(332)、前記誘電体層(324)、及び前記信号導体層(326)の寸法及び材料が、該基板がインピーダンス整合されるよう選択される、基板(300)。 - 外側基板層上のグランド平面層(314)を更に備えており、
前記構成要素(320)内の前記導電性グランド接続(328)が、前記導電性グランドコア(322)の一端に電気的に結合され、前記構成要素(320)が前記孔(312)内に完全に挿入された際に前記グランド平面層(314)と導通可能な状態で接触する、
請求項2に記載の基板(300)。 - 前記構成要素(320)に対して選択された位置において選択された基板層内に形成されるグランドステッチ(404)及び/又はバイア(604)を更に備えている、請求項2に記載の基板(300)。
- 多層プリント回路基板(PCB)として構成される、請求項2に記載の基板(300)。
- 前記構成要素が、非平衡終端された構成要素(100)であり、前記信号導体層(106,326)が、前記誘電体層(104,324)を少なくとも部分的に包囲する単一の連続した層として構成される、請求項1ないし請求項5の何れか一項に記載の構成要素又は基板。
- 前記構成要素が、差動対構成要素(200)であり、前記信号導体層(106,326)が、前記基板内の異なる信号トラックと導通可能な状態で接触することができる一対の別個の信号導体(206,207)として構成される、請求項1ないし請求項5の何れか一項に記載の構成要素又は基板。
- 前記基板内の前記孔の長手方向軸と実質的に平行である長手方向軸(110,710)に沿って延びる導電性グランドコア(102,322)と、
該グランドコアの前記長手方向軸(110,710)と平行な長手方向軸(112,712)を有する円筒構造を有する誘電体層(104,324)と
を更に備えている、請求項1ないし請求項5の何れか一項に記載の構成要素又は基板。 - 前記構成要素のインピーダンスが所定の値に設定されるように、前記誘電体層(104,324)内の誘電体材料、及び前記導電性グランドコア(102,322)と前記信号導体層(106,326)内の少なくとも1つの導体との間の相対的な間隔が選択される、請求項1ないし請求項5の何れか一項に記載の構成要素又は基板。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/027,431 US7652896B2 (en) | 2004-12-29 | 2004-12-29 | Component for impedance matching |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006191018A JP2006191018A (ja) | 2006-07-20 |
JP4312754B2 true JP4312754B2 (ja) | 2009-08-12 |
Family
ID=36599543
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2005357348A Expired - Fee Related JP4312754B2 (ja) | 2004-12-29 | 2005-12-12 | インピーダンス整合のための構成要素 |
Country Status (3)
Country | Link |
---|---|
US (1) | US7652896B2 (ja) |
JP (1) | JP4312754B2 (ja) |
DE (1) | DE102005057464A1 (ja) |
Families Citing this family (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7629541B2 (en) * | 2006-06-19 | 2009-12-08 | Endicott Interconnect Technologies, Inc. | High speed interposer |
US9036364B1 (en) * | 2007-04-24 | 2015-05-19 | Rpx Clearinghouse Llc | Circuit board with signal layers of different dimensions to communicate signals of different frequencies |
CN101048034A (zh) * | 2007-04-30 | 2007-10-03 | 华为技术有限公司 | 电路板互连系统、连接器组件、电路板及电路板加工方法 |
US20110017504A1 (en) * | 2009-07-23 | 2011-01-27 | Keith Bryan Hardin | Z-Directed Ferrite Bead Components for Printed Circuit Boards |
US8278568B2 (en) * | 2009-07-23 | 2012-10-02 | Lexmark International, Inc. | Z-directed variable value components for printed circuit boards |
US20110017581A1 (en) * | 2009-07-23 | 2011-01-27 | Keith Bryan Hardin | Z-Directed Switch Components for Printed Circuit Boards |
US8273996B2 (en) * | 2009-07-23 | 2012-09-25 | Lexmark International, Inc. | Z-directed connector components for printed circuit boards |
US8198547B2 (en) | 2009-07-23 | 2012-06-12 | Lexmark International, Inc. | Z-directed pass-through components for printed circuit boards |
US8735734B2 (en) * | 2009-07-23 | 2014-05-27 | Lexmark International, Inc. | Z-directed delay line components for printed circuit boards |
US20110017502A1 (en) * | 2009-07-23 | 2011-01-27 | Keith Bryan Hardin | Z-Directed Components for Printed Circuit Boards |
TWI449136B (zh) * | 2011-04-20 | 2014-08-11 | Cyntec Co Ltd | 金屬芯印刷電路板及電子封裝結構 |
CN102811549A (zh) * | 2011-06-03 | 2012-12-05 | 鸿富锦精密工业(深圳)有限公司 | 电路板 |
CN102291929A (zh) * | 2011-06-24 | 2011-12-21 | 福建星网锐捷网络有限公司 | 印刷电路板及控制印刷电路板上通孔结构的阻抗的方法 |
US8790520B2 (en) | 2011-08-31 | 2014-07-29 | Lexmark International, Inc. | Die press process for manufacturing a Z-directed component for a printed circuit board |
US9078374B2 (en) | 2011-08-31 | 2015-07-07 | Lexmark International, Inc. | Screening process for manufacturing a Z-directed component for a printed circuit board |
US9009954B2 (en) | 2011-08-31 | 2015-04-21 | Lexmark International, Inc. | Process for manufacturing a Z-directed component for a printed circuit board using a sacrificial constraining material |
US8658245B2 (en) | 2011-08-31 | 2014-02-25 | Lexmark International, Inc. | Spin coat process for manufacturing a Z-directed component for a printed circuit board |
US8752280B2 (en) | 2011-09-30 | 2014-06-17 | Lexmark International, Inc. | Extrusion process for manufacturing a Z-directed component for a printed circuit board |
US8943684B2 (en) * | 2011-08-31 | 2015-02-03 | Lexmark International, Inc. | Continuous extrusion process for manufacturing a Z-directed component for a printed circuit board |
US8912452B2 (en) | 2012-03-29 | 2014-12-16 | Lexmark International, Inc. | Z-directed printed circuit board components having different dielectric regions |
US8822838B2 (en) | 2012-03-29 | 2014-09-02 | Lexmark International, Inc. | Z-directed printed circuit board components having conductive channels for reducing radiated emissions |
US8822840B2 (en) | 2012-03-29 | 2014-09-02 | Lexmark International, Inc. | Z-directed printed circuit board components having conductive channels for controlling transmission line impedance |
US8830692B2 (en) | 2012-03-29 | 2014-09-09 | Lexmark International, Inc. | Ball grid array systems for surface mounting an integrated circuit using a Z-directed printed circuit board component |
KR101926797B1 (ko) * | 2012-07-31 | 2018-12-07 | 삼성전기주식회사 | 인쇄회로기판 |
US10187971B2 (en) * | 2012-08-31 | 2019-01-22 | Sony Corporation | Wiring board and method of manufacturing wiring board |
US8957325B2 (en) | 2013-01-15 | 2015-02-17 | Fujitsu Limited | Optimized via cutouts with ground references |
Family Cites Families (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4153988A (en) * | 1977-07-15 | 1979-05-15 | International Business Machines Corporation | High performance integrated circuit semiconductor package and method of making |
JP3167141B2 (ja) * | 1991-04-16 | 2001-05-21 | 日本特殊陶業株式会社 | 集積回路用パッケージ |
US5768109A (en) * | 1991-06-26 | 1998-06-16 | Hughes Electronics | Multi-layer circuit board and semiconductor flip chip connection |
US5278524A (en) * | 1992-05-11 | 1994-01-11 | Mullen Urban E | Multi-layered printed circuit board with transmission line capabilities |
US5745333A (en) * | 1994-11-21 | 1998-04-28 | International Business Machines Corporation | Laminar stackable circuit board structure with capacitor |
US5720818A (en) * | 1996-04-26 | 1998-02-24 | Applied Materials, Inc. | Conduits for flow of heat transfer fluid to the surface of an electrostatic chuck |
US6225568B1 (en) | 1998-08-31 | 2001-05-01 | Advanced Flexible Circuits Co., Ltd. | Circuit board having shielding planes with varied void opening patterns for controlling the impedance and the transmission time |
US6372996B2 (en) | 1998-08-31 | 2002-04-16 | Advanced Flexible Circuits Co., Ltd. | Circuit board having shielding planes with varied void opening patterns for controlling the impedance and the transmission time |
US6711812B1 (en) * | 1999-04-13 | 2004-03-30 | Unicap Electronics Industrial Corporation | Method of making metal core substrate printed circuit wiring board enabling thermally enhanced ball grid array (BGA) packages |
US7071557B2 (en) * | 1999-09-01 | 2006-07-04 | Micron Technology, Inc. | Metallization structures for semiconductor device interconnects, methods for making same, and semiconductor devices including same |
US6530062B1 (en) | 2000-03-10 | 2003-03-04 | Rambus Inc. | Active impedance compensation |
US6366466B1 (en) | 2000-03-14 | 2002-04-02 | Intel Corporation | Multi-layer printed circuit board with signal traces of varying width |
US6479764B1 (en) * | 2000-05-10 | 2002-11-12 | International Business Machines Corporation | Via structure with dual current path |
US6417675B1 (en) | 2000-08-31 | 2002-07-09 | Intel Corporation | Receiver impedance calibration arrangements in full duplex communication systems |
US6501031B1 (en) * | 2000-09-06 | 2002-12-31 | Visteon Global Tech., Inc. | Electrical circuit board and a method for making the same |
US6686762B2 (en) | 2000-12-11 | 2004-02-03 | Intel Corporation | Memory module using DRAM package to match channel impedance |
US6441319B1 (en) | 2000-12-28 | 2002-08-27 | Nortel Networks Limited | Inserted components for via connection of signal tracks to achieve continuous impedance matching in multi-layer substrate |
KR100454123B1 (ko) | 2001-12-06 | 2004-10-26 | 삼성전자주식회사 | 반도체 집적 회로 장치 및 그것을 구비한 모듈 |
US6765298B2 (en) | 2001-12-08 | 2004-07-20 | National Semiconductor Corporation | Substrate pads with reduced impedance mismatch and methods to fabricate substrate pads |
US6700457B2 (en) | 2001-12-26 | 2004-03-02 | Intel Corporation | Impedance compensation for circuit board breakout region |
US7204648B2 (en) | 2002-03-19 | 2007-04-17 | Finisar Corporation | Apparatus for enhancing impedance-matching in a high-speed data communications system |
EP1506701B1 (en) * | 2002-05-23 | 2007-07-11 | International Business Machines Corporation | Improved structure of stacked vias in multiple layer electronic device carriers |
US6940165B2 (en) | 2002-09-11 | 2005-09-06 | International Business Machines Corporation | Impedance matched electrical interconnect using dielectric compounds |
US7112285B2 (en) * | 2002-12-05 | 2006-09-26 | Intel Corporation | Conductive core substrate fabrication |
JP4259311B2 (ja) * | 2003-12-19 | 2009-04-30 | 株式会社日立製作所 | 多層配線基板 |
KR100836968B1 (ko) * | 2003-12-24 | 2008-06-10 | 몰렉스 인코포레이티드 | 변형 임피던스 및 납땜 랜드를 구비한 전송 라인 |
-
2004
- 2004-12-29 US US11/027,431 patent/US7652896B2/en not_active Expired - Fee Related
-
2005
- 2005-12-01 DE DE102005057464A patent/DE102005057464A1/de not_active Ceased
- 2005-12-12 JP JP2005357348A patent/JP4312754B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2006191018A (ja) | 2006-07-20 |
US20060137907A1 (en) | 2006-06-29 |
DE102005057464A1 (de) | 2006-07-13 |
US7652896B2 (en) | 2010-01-26 |
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