JP4254209B2

JP4254209B2 - Battery voltage detection line inspection method, inspection circuit, and battery module

Info

Publication number: JP4254209B2
Application number: JP2002338940A
Authority: JP
Inventors: 憲一朗水流; 彰彦工藤
Original assignee: Shin Kobe Electric Machinery Co Ltd
Current assignee: Shin Kobe Electric Machinery Co Ltd
Priority date: 2002-11-22
Filing date: 2002-11-22
Publication date: 2009-04-15
Anticipated expiration: 2022-11-22
Also published as: JP2004170335A

Description

【０００１】
【発明の属する技術分野】
本発明は電池電圧検出線の検査方法、検査回路及び電池モジュールに関する。
【０００２】
【従来の技術】
例えば、電気自動車等には、二次電池（以下、単電池という。）を必要な電圧に相当する分だけ複数個直列に接続した組電池が使用されている。このような組電池は、複数個の単電池を用いるので、信頼性を確保することが重要である。すなわち、組電池を構成する単電池のうちの何れかが過充電や過放電等によりその機能が低下すると、組電池全体としての機能も低下することになる。また、組電池を構成する各単電池には製造時のバラツキがあり、更に、温度分布が均一でないこと等により、各単電池の充電受入性や放電容量が異なってくる。この状態で組電池を使用すると、過放電、過充電となる単電池が発生し、組電池全体の寿命が短くなってしまう。
【０００３】
このため、電池モジュールでは、各単電池や組電池を制御する制御回路を具備しており、各単電池の電圧を単電池から導出された電池電圧検出線を介して検出して、検出した単電池の電圧に応じて二次電池毎に調整する容量（例えば、電流値と時間との積）をマイクロコンピュータで演算して、単電池に並列に接続された容量調整用抵抗と、容量調整用抵抗に直列に接続されたスイッチと、で構成される容量調整回路のスイッチを演算した所定時間の間オン状態とすることにより単電池と容量調整回路との間で閉回路を構成して、各単電池間の容量を均一に調整している。容量調整回路のスイッチは、例えば、ＦＥＴ等のユニポーラトランジスタやバイポーラトランジスタ等で構成されており、マイクロコンピュータから２値制御のハイレベル信号を出力し、ＦＥＴやトランジスタのゲート又はベースに微少電流を流すことにより、ドレイン・ソース間又はコレクタ・エミッタ間に容量調整電流を流し、抵抗で調整容量分の電力を熱消費させている。
【０００４】
ところで、このような電池電圧検出線の接続状態についての検査は、従来、単電池毎の電池電圧を測定し（例えば、特許文献１参照）、単電池の電圧が検出されることで接続状態の確認をする方法が一般的であった。
【０００５】
【特許文献１】
特開２０００−９２７３２号公報
【０００６】
【発明が解決しようとする課題】
しかしながら、上記従来の電池電圧検出線の接続検査方法では、組電池が休止状態にあるときに各単電池の開放電圧のみを測定するので、電池電圧検出線が微小断線状態にあると、測定される電池電圧に影響が表れず、電池電圧検出線の接続状態を正常と判断してしまう、という問題があった。
【０００７】
本発明は上記事案に鑑み、電池電圧検出線の接続状態を正確に検査可能な検査方法、検査回路、該検査回路を備えた電池モジュールを提供することを課題とする。
【０００８】
【課題を解決するための手段】
上記課題を解決するために、本発明の第１の態様は、電池電圧検出線の検査方法であって、本態様では、電池電圧検出線に微小断線があると、単電池と並列に抵抗を接続し電流を流したときの電圧値が、電池検出線が正常なとき（微小断線がないとき）に比べ異なってくるので、単電池の開放電圧値との差が予め定められた所定値以上となり、電池電圧検出線の接続状態に異常があることを判定することができる。
【００１１】
【発明の実施の形態】
以下、図面を参照して本発明が適用可能な電池モジュールの実施の形態について説明する。
【００１２】
（構成）
図１に示すように、本実施形態の電池モジュール２０は、リチウムイオン二次電池（以下、単電池という。）１、７、１１が３個直列に接続された組電池１５を備えている。単電池１、７、１１には、それぞれ単電池の容量を調整するための容量調整回路２、８、１２が並列に接続されている。
【００１３】
すなわち、単電池１、７、１１の＋端子には電池電圧検出線Ｌ１、Ｌ２、Ｌ３を介して容量調整用のバイパス抵抗３、９、１３の一端が接続されており、バイパス抵抗３、９、１３の他端にはスイッチとして機能するＦＥＴ４、１０、１４のドレインがそれぞれ接続されている。一方、単電池１、７、１１の−端子には電池電圧検出線Ｌ２、Ｌ３、Ｌ４を介してＦＥＴ４、１０、１４のソースがそれぞれ接続されており、ＦＥＴ４、１０、１４のゲートは後述するマイクロコンピュータ（以下、マイコンという。）５の出力ポートに接続されている。従って、マイコン５の出力ポートからＦＥＴのゲートに微弱な２値ハイレベル信号が入力されると（オン状態となると）、ＦＥＴ４、１０、１４のドレイン側（単電池の＋端子側）からソース側（単電池の−端子側）に電流が流れることで、電流がバイパス抵抗３、９、１３により熱消費され単電池１、７、１１毎に容量調整が可能である（以下、ＦＥＴ４、１０、１４をそれらの機能に着目してスイッチ４、１０、１４という。）。
【００１４】
また、電池モジュール２０は、単電池１、７、１１の電圧を単電池毎に測定する開放電圧検出手段及び電池電圧検出手段の一部としての電圧測定回路６、電池モジュール２０を制御し開放電圧検出手段、スイッチ制御手段、電池電圧検出手段、電圧差演算手段及び異常判定手段としてのマイコン５、組電池１５の充放電並びに休止状態を検出して組電池１５の状態をマイコン５に出力する図示を省略した充放電判別部、及び、マイコン５や電圧測定回路６に作動電源を供給する図示を省略した電源部を備えている。
【００１５】
マイコン５は、演算処理を行うＣＰＵ、ＣＰＵが実行するプログラム及び種々の設定値等を格納したＲＯＭ、ＣＰＵのワークエリアとして働くＲＡＭ、及び電圧測定回路６からのアナログ電圧をデジタル化するＡ／Ｄ変換部を含んで構成されている。また、マイコン５は、上述した各ＦＥＴにハイレベル信号を出力する出力ポートの他に、電圧測定回路６に電圧測定対象の単電池を指定するための単電池指定ポート、電圧測定回路６から指定した単電池の電圧が入力されるＡＤ入力ポート、インターフェース（Ｉ／Ｆ）を介して電池モジュール２０を制御する上位システムとの通信を行うための図示を省略したシリアルポートを有している。
【００１６】
電圧測定回路６は、各単電池の電圧を個別に測定する回路であり、例えば、増幅率１の差動増幅回路等を含む回路により構成することができる。電圧測定回路６の入力側は電池電圧検出線Ｌ１、Ｌ２、Ｌ３、Ｌ４に接続されており、電圧測定回路６の出力側はマイコン５のＡＤ入力ポートに接続されている。また、電圧測定回路６は、マイコン５から電圧測定対象の単電池の指定を受けるためにマイコン５の単電池指定ポートに接続されている。従って、マイコン５は、単電池指定ポートから電圧測定回路６に電圧測定対象の単電池を指定することで、ＡＤ入力ポートを介して電圧測定回路６から測定対象の単電池の電圧を取り込み、かつ、Ａ／Ｄ変換することで、指定した単電池の電圧値を取得（測定）することが可能である。
【００１７】
なお、図示を省略した充放電判別部は、最上位側の単電池１の＋端子と組電池１５の＋外部出力端子との間に挿入されている。充放電判別部は、例えば、シャント（分路）抵抗やホール素子等により組電池１５を流れる電流方向を検出可能に構成することができ、組電池１５が充電、放電、休止のいずれの状態にあるかをマイコン５へ出力するものである。また、単電池１１の−端子は電池モジュール２０の−外部出力端子に接続されており、電池モジュール２０の＋外部出力端子及び−外部出力端子は充電器又は負荷に接続される。
【００１８】
（動作）
次に、フローチャートを参照して、本実施形態の電池モジュール２０の動作について説明する。なお、初期状態においてマイコン５に電源が投入されると、ＲＯＭに格納された種々の設定値がＲＡＭに移行され電池電圧検出線Ｌ１〜Ｌ４を検査するための電池電圧検出線検査ルーチンが実行可能な状態となり、インターフェースを介して図示しない検査治具から又は上位システムから所定信号を受信すると以下の電池電圧検出線検査ルーチンが実行される。
【００１９】
図２に示すように、電池電圧検出線検査ルーチンでは、まず、ステップ１０２において、単電池１、７、１１の開放電圧値Ｖｂ１、Ｖｃ１、Ｖｄ１を取得（測定）し、ＲＡＭに記憶する。すなわち、単電池指定ポートから電圧測定回路６に電圧測定対象の単電池１を指定し開放電圧値Ｖｂ１を取得してＲＡＭに記憶した後、単電池７を指定し開放電圧値Ｖｃ１を取得してＲＡＭに記憶し、同様に、単電池１１を指定し開放電圧値Ｖｄ１を取得してＲＡＭに記憶する。
【００２０】
次にステップ１０４では、スイッチ４をオン状態（以下、ＯＮと略記する。）、スイッチ１０、１４をオフ状態（ＦＥＴ１０、１４のゲートへの信号がローレベルの状態、以下、ＯＦＦと略記する。）とし、次のステップ１０６でバイパス抵抗３を並列に接続し電流を流したときの単電池１の電圧値Ｖｂ２を取得してＲＡＭに記憶する。次いでステップ１０８において、（Ｖｂ２−Ｖｂ１）の絶対値が予め定められた所定値より小さいか否かを判断する。なお、このような所定値は、電池電圧検出線Ｌ１〜Ｌ４の長さ、電池電圧検出線Ｌ１〜Ｌ４と単電池１、７、１１との接合方法、バイパス抵抗３、９、１３の値等の影響を考慮し適切な値を設定することが好ましい（本例の場合は、０．８Ｖ）。肯定判断のときは、ステップ１１０で電池電圧検出線Ｌ１及びＬ２に異常がないこと（ＯＫ）をＲＡＭに記憶し、否定判断のときは、ステップ１１２で電池電圧検出線Ｌ１及び／又はＬ２に異常（電池電圧検出線Ｌ１のみ異常、電池電圧検出線Ｌ２のみ異常、又は電池電圧検出線Ｌ１、Ｌ２の双方が異常）があること（ＮＧ）をＲＡＭに記憶する。
【００２１】
次にステップ１１４では、スイッチ１０をＯＮ、スイッチ４、１４をＯＦＦとし、次のステップ１１６でバイパス抵抗９を並列に接続し電流を流したときの単電池７の電圧値Ｖｃ２を取得してＲＡＭに記憶する。次いでステップ１１８において、（Ｖｃ２−Ｖｃ１）の絶対値が所定値より小さいか否かを判断する。肯定判断のときは、ステップ１２０で電池電圧検出線Ｌ２及びＬ３に異常がないことをＲＡＭに記憶し、否定判断のときは、ステップ１２２で電池電圧検出線Ｌ２及び／又はＬ３に異常があることをＲＡＭに記憶する。
【００２２】
次にステップ１２４では、スイッチ１４をＯＮ、スイッチ４、１０をＯＦＦとし、次のステップ１２６でバイパス抵抗１３を並列に接続し電流を流したときの単電池１１の電圧値Ｖｄ２を取得してＲＡＭに記憶する。次いでステップ１２８において、（Ｖｄ２−Ｖｄ１）の絶対値が所定値より小さいか否かを判断する。肯定判断のときは、ステップ１３０で電池電圧検出線Ｌ３及びＬ４に異常がないことをＲＡＭに記憶し、否定判断のときは、ステップ１３２で電池電圧検出線Ｌ３及び／又はＬ４に異常があることをＲＡＭに記憶する。
【００２３】
次のステップ１３４では、すべての電池電圧検出線Ｌ１〜Ｌ４が異常がないか否かを判断し、肯定判断のときは、図３のステップ１６８へ進み、否定判断のときは、図３のステップ１３６へ進む。
【００２４】
ステップ１６８では、電池電圧検出線Ｌ１〜Ｌ４のすべてに異常がない（ＯＫ）ので、ＯＫを表すデフォルト値を選択してステップ１７０へ進む。一方、ステップ１３６では、スイッチ４、１０をＯＮ、スイッチ１４をＯＦＦとし、次のステップ１３８で単電池１、７の電圧値Ｖｂ３、Ｖｃ３をそれぞれ取得してＲＡＭに記憶する。次いでステップ１４０において、｛（Ｖｂ３＋Ｖｃ３）−（Ｖｂ１＋Ｖｃ１）｝の絶対値が所定値より小さいか否かを判断する。肯定判断のときは、ステップ１４２で電池電圧検出線Ｌ１及びＬ３に異常がないことをＲＡＭに記憶し、否定判断のときは、ステップ１４４で電池電圧検出線Ｌ１及び／又はＬ３に異常があることをＲＡＭに記憶する。
【００２５】
次にステップ１４６では、スイッチ１０、１４をＯＮ、スイッチ４をＯＦＦとし、次のステップ１４８で単電池７、１１の電圧値Ｖｃ４、Ｖｄ３をそれぞれ取得してＲＡＭに記憶する。次いでステップ１５０において、｛（Ｖｃ４＋Ｖｄ３）−（Ｖｃ１＋Ｖｄ１）｝の絶対値が所定値より小さいか否かを判断する。肯定判断のときは、ステップ１５２で電池電圧検出線Ｌ２及びＬ４に異常がないことをＲＡＭに記憶し、否定判断のときは、ステップ１５４で電池電圧検出線Ｌ２及び／又はＬ４に異常があることをＲＡＭに記憶する。
【００２６】
次にステップ１５６では、スイッチ４、１０、１４をＯＮとし、次のステップ１５８で単電池１、７、１１の電圧値Ｖｂ４、Ｖｃ５、Ｖｄ４をそれぞれ取得してＲＡＭに記憶する。次いでステップ１６０において、｛（Ｖｂ４＋Ｖｃ５＋Ｖｄ４）−（Ｖｂ１＋Ｖｃ１＋Ｖｄ１）｝の絶対値が所定値より小さいか否かを判断する。肯定判断のときは、ステップ１６２で電池電圧検出線Ｌ１及びＬ４に異常がないことをＲＡＭに記憶し、否定判断のときは、ステップ１６４で電池電圧検出線Ｌ１及び／又はＬ４に異常があることをＲＡＭに記憶する。
【００２７】
次のステップ１６６では、ステップ１４２、１４４、１５２、１５４、１６２、１６４でＲＡＭに記憶した電池電圧検出線Ｌ１〜Ｌ４のうち接続状態が異常な箇所（ＮＧ箇所）を特定し、特定されたＮＧ箇所のデフォルト値を選択してステップ１７０へ進む。ステップ１７０では、選択されたデフォルト値をインターフェースから出力して電池電圧検出線検査ルーチンを終了する。これにより、図示しない検査治具又は上位システムに接続された検査治具のディスプレイには電池電圧検出線Ｌ１〜Ｌ４の接続状態が表示される。
【００２８】
（作用等）
本実施形態の電池モジュール２０では、スイッチ３、９、１２をＯＮ、ＯＦＦすることで、組電池１５を構成する特定の単電池に１つずつパイパス抵抗を接続したり、又は、組み合わせることで、単電池１、７、１１から導出された電池電圧検出線Ｌ１〜Ｌ４の接続状態を精度よく検査することができる。すなわち、電池電圧検出線Ｌ１〜Ｌ４に微小断線があると、単電池と並列に抵抗を接続し電流を流したときの電圧値が、電池検出線がＯＫのないときに比べ異なってくるので、単電池の開放電圧値との差が予め定められた所定値以上となり、接続状態に異常があることを電池電圧検出線Ｌ１〜Ｌ４毎に判定することができる。また、単電池１、７、１１にはバイパス抵抗３、９、１３が並列接続されているので、電池モジュール２０の外部で抵抗を接続することなく、これらのバイパス抵抗を利用して単電池の放電時の電圧値を測定することでより精度の高い電池電圧検出線の接続状態の検査を行うことができる。更に、本実施形態の電池モジュール２０では、電池電圧検出線検査ルーチンを実行可能なプログラムマイコン５に格納すると共に、ハードウエアを電池モジュール２０が有している回路を使用して電池電圧検出線の接続状態を検査するようにしたので、検査治具の負担（回路構成）を小さくすることができる。
【００２９】
なお、本実施形態では、電池モジュール２０内のマイコン５に電池電圧検出線検査ルーチンを実行させるソフトウエアの例を示したが、本発明はこれに制限されず、ＯＰアンプ等を含むハードウエア等で構成するようにしてもよい。
【００３０】
また、本実施形態では、電圧測定回路６について単電池の電圧を１つずつ測定する例を示したが、複数の単電池の電圧を一度に測定可能な電圧測定回路を用いるようにしてもよい。
【００３１】
更に、本実施形態では、図４に示したように、電池電圧検出線Ｌ１〜Ｌ４のひとつでも異常が判明すると、正常と判明した電池電圧検出線についても再検査する例を示したが、図３で接続状態が異常の可能性がある電池電圧検出線についてのみ検査を行うようにしてもよい。このようにすれば、接続状態が異常な電池電圧検出線を早く特定することが可能となる。
【００３２】
【発明の効果】
以上説明したように、本発明によれば、電池電圧検出線に微小断線があると、単電池と並列に抵抗を接続し電流を流したときの電圧値が、電池検出線が正常なときに比べ異なってくるので、単電池の開放電圧値との差が予め定められた所定値以上となり、電池電圧検出線の接続状態に異常があることを判定することができる、という効果を得ることができる。
【図面の簡単な説明】
【図１】本発明が適用可能な実施形態の電池モジュールのブロック回路図である。
【図２】マイコンのＣＰＵが実行する電池電圧検出線検査ルーチンその１のフローチャートである。
【図３】マイコンのＣＰＵが実行する電池電圧検出線検査ルーチンその２のフローチャートである。
【符号の説明】
１、７、１１リチウムイオン二次電池（リチウムイオン電池、単電池）
２、８、１２容量調整回路
３、９、１３バイパス抵抗
４、１０、１４ＦＥＴ（半導体スイッチ）
５マイコン（記憶回路、制御回路）
６電圧測定回路（選択回路）
１５組電池
２０電池モジュール
Ｌ１、Ｌ２、Ｌ３、Ｌ４電池電圧検出線[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a battery voltage detection line inspection method, an inspection circuit, and a battery module.
[0002]
[Prior art]
For example, an assembled battery in which a plurality of secondary batteries (hereinafter referred to as single cells) are connected in series corresponding to a required voltage is used for an electric vehicle or the like. Since such an assembled battery uses a plurality of single cells, it is important to ensure reliability. That is, when any of the single cells constituting the assembled battery has its function lowered due to overcharge or overdischarge, the function of the assembled battery as a whole is also lowered. Further, each unit cell constituting the assembled battery has variations at the time of manufacture, and furthermore, the charge acceptance and discharge capacity of each unit cell differ due to the non-uniform temperature distribution. When the assembled battery is used in this state, a unit cell that is overdischarged or overcharged is generated, and the life of the entire assembled battery is shortened.
[0003]
For this reason, the battery module is provided with a control circuit that controls each unit cell or battery pack, and detects the voltage of each unit cell by detecting the voltage of each unit cell through a battery voltage detection line derived from the unit cell. The capacity (for example, the product of the current value and time) to be adjusted for each secondary battery according to the battery voltage is calculated by the microcomputer, and the capacity adjustment resistor connected in parallel to the single battery and the capacity adjustment A switch connected in series with the resistor, and a switch of the capacity adjustment circuit composed of a switch is turned on for a predetermined time by calculating a closed circuit between the unit cell and the capacity adjustment circuit, The capacity between cells is adjusted uniformly. The switch of the capacity adjustment circuit is composed of, for example, a unipolar transistor such as an FET or a bipolar transistor, and outputs a high-level signal of binary control from a microcomputer to flow a minute current to the gate or base of the FET or transistor. As a result, a capacitance adjustment current is passed between the drain and source or between the collector and emitter, and the electric power corresponding to the adjustment capacitance is consumed by the resistor.
[0004]
By the way, the inspection about the connection state of such a battery voltage detection line conventionally measures the battery voltage for every single cell (for example, refer patent document 1), and the state of a connection state is detected by detecting the voltage of a single cell. The method of confirming was common.
[0005]
[Patent Document 1]
JP-A-2000-92732 gazette
[Problems to be solved by the invention]
However, in the above conventional battery voltage detection line connection inspection method, only the open voltage of each unit cell is measured when the assembled battery is in a dormant state. Therefore, it is measured when the battery voltage detection line is in a minute disconnection state. There is a problem that the battery voltage is not affected and the connection state of the battery voltage detection line is determined to be normal.
[0007]
An object of the present invention is to provide an inspection method, an inspection circuit, and a battery module including the inspection circuit capable of accurately inspecting the connection state of the battery voltage detection line in view of the above-described case.
[0008]
[Means for Solving the Problems]
In order to solve the above problems, a first aspect of the present invention is a method for inspecting a battery voltage detection line . In this aspect, if there is a minute disconnection in the battery voltage detection line, a resistance is provided in parallel with the unit cell. Since the voltage value when the current is connected and current is different compared to when the battery detection line is normal (when there is no minute disconnection), the difference from the open voltage value of the unit cell is greater than a predetermined value Thus, it can be determined that there is an abnormality in the connection state of the battery voltage detection line .
[0011]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of a battery module to which the present invention can be applied will be described with reference to the drawings.
[0012]
(Constitution)
As shown in FIG. 1, the battery module 20 of the present embodiment includes an assembled battery 15 in which three lithium ion secondary batteries (hereinafter referred to as single cells) 1, 7, and 11 are connected in series. The unit cells 1, 7, and 11 are connected in parallel with capacity adjustment circuits 2, 8, and 12, respectively, for adjusting the unit cell capacity.
[0013]
That is, one end of capacity adjusting bypass resistors 3, 9, 13 is connected to the + terminals of the cells 1, 7, 11 through battery voltage detection lines L 1, L 2, L 3. , 13 are connected to the drains of FETs 4, 10, 14 functioning as switches, respectively. On the other hand, the sources of the FETs 4, 10, and 14 are connected to the negative terminals of the cells 1, 7, and 11 through battery voltage detection lines L2, L3, and L4, respectively, and the gates of the FETs 4, 10, and 14 will be described later. It is connected to an output port of a microcomputer (hereinafter referred to as a microcomputer) 5. Therefore, when a weak binary high level signal is input from the output port of the microcomputer 5 to the gate of the FET (when turned on), the drain side of the FETs 4, 10, 14 (the + terminal side of the unit cell) to the source side When the current flows through (the −terminal side of the unit cell), the current is thermally consumed by the bypass resistors 3, 9, and 13, and the capacity can be adjusted for each unit cell 1, 7, 11 (hereinafter, FET 4, 10, 14 is referred to as switches 4, 10, and 14 in view of their functions).
[0014]
In addition, the battery module 20 controls the open-circuit voltage detection means for measuring the voltage of the single cells 1, 7, and 11 for each single battery, and the voltage measurement circuit 6 as a part of the battery voltage detection means and the battery module 20 to control the open-circuit voltage. Detection means, switch control means, battery voltage detection means, voltage difference calculation means, abnormality determination means, microcomputer 5, charge / discharge of battery pack 15 and rest state are detected and the state of battery pack 15 is output to microcomputer 5 And a power supply unit (not shown) that supplies operating power to the microcomputer 5 and the voltage measurement circuit 6.
[0015]
The microcomputer 5 is a CPU that performs arithmetic processing, a ROM that stores programs executed by the CPU and various setting values, a RAM that serves as a work area for the CPU, and an A / D that digitizes an analog voltage from the voltage measurement circuit 6. A conversion unit is included. In addition to the output port that outputs a high level signal to each FET described above, the microcomputer 5 designates the voltage measurement circuit 6 from a single cell designation port for designating a single cell to be measured, and the voltage measurement circuit 6. An AD input port to which the voltage of the single cell is input, and a serial port (not shown) for communicating with a host system that controls the battery module 20 via an interface (I / F).
[0016]
The voltage measurement circuit 6 is a circuit that individually measures the voltage of each unit cell, and can be configured by a circuit including a differential amplification circuit having an amplification factor of 1, for example. The input side of the voltage measurement circuit 6 is connected to the battery voltage detection lines L 1, L 2, L 3 and L 4, and the output side of the voltage measurement circuit 6 is connected to the AD input port of the microcomputer 5. In addition, the voltage measurement circuit 6 is connected to a single cell designation port of the microcomputer 5 in order to receive designation of a single cell for voltage measurement from the microcomputer 5. Therefore, the microcomputer 5 designates the voltage measurement target cell from the cell designation port to the voltage measurement circuit 6, thereby taking in the voltage of the measurement target cell from the voltage measurement circuit 6 through the AD input port, and By performing A / D conversion, it is possible to acquire (measure) the voltage value of the designated cell.
[0017]
The charge / discharge determination unit (not shown) is inserted between the + terminal of the uppermost unit cell 1 and the + external output terminal of the assembled battery 15. The charge / discharge discriminating unit can be configured to detect the direction of current flowing through the assembled battery 15 using, for example, a shunt (shunt) resistor or a Hall element, and the assembled battery 15 can be in any state of charging, discharging, and resting. Whether or not there is is output to the microcomputer 5. Further, the negative terminal of the cell 11 is connected to the negative external output terminal of the battery module 20, and the positive external output terminal and negative external output terminal of the battery module 20 are connected to a charger or a load.
[0018]
(Operation)
Next, with reference to a flowchart, operation | movement of the battery module 20 of this embodiment is demonstrated. When the microcomputer 5 is turned on in the initial state, various set values stored in the ROM are transferred to the RAM, and a battery voltage detection line inspection routine for inspecting the battery voltage detection lines L1 to L4 can be executed. When a predetermined signal is received from an inspection jig (not shown) or from a host system via the interface, the following battery voltage detection line inspection routine is executed.
[0019]
As shown in FIG. 2, in the battery voltage detection line inspection routine, first, in step 102, open voltage values Vb1, Vc1, and Vd1 of the single cells 1, 7, and 11 are acquired (measured) and stored in the RAM. That is, after specifying the unit cell 1 to be voltage measured from the unit cell designation port to the voltage measurement circuit 6 and acquiring the open voltage value Vb1 and storing it in the RAM, the unit cell 7 is specified and the open circuit voltage value Vc1 is acquired. Similarly, the unit cell 11 is designated and the open-circuit voltage value Vd1 is acquired and stored in the RAM.
[0020]
Next, in step 104, the switch 4 is turned on (hereinafter abbreviated as ON), and the switches 10 and 14 are turned off (signals to the gates of the FETs 10 and 14 are at a low level, hereinafter abbreviated as OFF). In the next step 106, the bypass resistor 3 is connected in parallel, and the voltage value Vb2 of the unit cell 1 when the current flows is acquired and stored in the RAM. Next, at step 108, it is determined whether or not the absolute value of (Vb2-Vb1) is smaller than a predetermined value. Such predetermined values include the lengths of the battery voltage detection lines L1 to L4, the joining method of the battery voltage detection lines L1 to L4 and the cells 1, 7, and 11, the values of the bypass resistors 3, 9, and 13 and the like. It is preferable to set an appropriate value in consideration of the influence of (0.8 V in this example). If the determination is affirmative, the fact that there is no abnormality in the battery voltage detection lines L1 and L2 (OK) is stored in the RAM in step 110. If the determination is negative, the battery voltage detection lines L1 and / or L2 are abnormal in step 112. (NG) is stored in the RAM that there is an abnormality (only battery voltage detection line L1 is abnormal, only battery voltage detection line L2 is abnormal, or both battery voltage detection lines L1 and L2 are abnormal).
[0021]
Next, in step 114, the switch 10 is turned on, the switches 4 and 14 are turned off, and in the next step 116, the bypass resistor 9 is connected in parallel to obtain the voltage value Vc2 of the unit cell 7 when the current flows. To remember. Next, at step 118, it is determined whether or not the absolute value of (Vc2-Vc1) is smaller than a predetermined value. If the determination is affirmative, the fact that there is no abnormality in the battery voltage detection lines L2 and L3 is stored in the RAM in step 120, and if the determination is negative, there is an abnormality in the battery voltage detection lines L2 and / or L3 in step 122. Is stored in the RAM.
[0022]
Next, in step 124, the switch 14 is turned on, the switches 4 and 10 are turned off, and in the next step 126, the bypass resistor 13 is connected in parallel to obtain the voltage value Vd2 of the unit cell 11 when a current is passed. To remember. Next, at step 128, it is determined whether or not the absolute value of (Vd2-Vd1) is smaller than a predetermined value. If the determination is affirmative, the battery voltage detection lines L3 and L4 are stored in the RAM in step 130, and if the determination is negative, the battery voltage detection lines L3 and / or L4 are abnormal in step 132. Is stored in the RAM.
[0023]
In the next step 134, it is determined whether or not all the battery voltage detection lines L1 to L4 are abnormal. If the determination is affirmative, the process proceeds to step 168 of FIG. 3, and if the determination is negative, the step of FIG. Go to 136.
[0024]
In step 168, since all of the battery voltage detection lines L1 to L4 are not abnormal (OK), a default value representing OK is selected and the process proceeds to step 170. On the other hand, in step 136, the switches 4 and 10 are turned on and the switch 14 is turned off. In the next step 138, the voltage values Vb3 and Vc3 of the single cells 1 and 7 are acquired and stored in the RAM. Next, at step 140, it is determined whether or not the absolute value of {(Vb3 + Vc3) − (Vb1 + Vc1)} is smaller than a predetermined value. If an affirmative decision is made, the fact that there is no abnormality in the battery voltage detection lines L1 and L3 is stored in the RAM in step 142, and if a negative decision is made, there is an abnormality in the battery voltage detection lines L1 and / or L3 in step 144. Is stored in the RAM.
[0025]
Next, in step 146, the switches 10 and 14 are turned on and the switch 4 is turned off. In the next step 148, the voltage values Vc4 and Vd3 of the single cells 7 and 11 are acquired and stored in the RAM. Next, at step 150, it is determined whether or not the absolute value of {(Vc4 + Vd3) − (Vc1 + Vd1)} is smaller than a predetermined value. If the determination is affirmative, the fact that there is no abnormality in the battery voltage detection lines L2 and L4 is stored in the RAM in step 152, and if the determination is negative, the battery voltage detection lines L2 and / or L4 are abnormal in step 154. Is stored in the RAM.
[0026]
Next, in step 156, the switches 4, 10, and 14 are turned ON, and in the next step 158, the voltage values Vb4, Vc5, and Vd4 of the single cells 1, 7, and 11 are acquired and stored in the RAM. Next, at step 160, it is determined whether or not the absolute value of {(Vb4 + Vc5 + Vd4) − (Vb1 + Vc1 + Vd1)} is smaller than a predetermined value. If an affirmative determination is made, the fact that there is no abnormality in the battery voltage detection lines L1 and L4 is stored in the RAM in step 162, and if a negative determination is made, there is an abnormality in the battery voltage detection lines L1 and / or L4 in step 164. Is stored in the RAM.
[0027]
In the next step 166, the battery voltage detection lines L1 to L4 stored in the RAM in steps 142, 144, 152, 154, 162, and 164 are identified as locations where the connection state is abnormal (NG locations), and the identified NG The default value of the location is selected and the process proceeds to step 170. In step 170, the selected default value is output from the interface, and the battery voltage detection line inspection routine is terminated. Thereby, the connection state of the battery voltage detection lines L1 to L4 is displayed on the display of the inspection jig (not shown) or the inspection jig connected to the host system.
[0028]
(Action etc.)
In the battery module 20 of the present embodiment, by turning ON / OFF the switches 3, 9, and 12, a bypass resistor is connected to a specific unit cell constituting the assembled battery 15 one by one, or combined, The connection state of the battery voltage detection lines L1 to L4 derived from the single cells 1, 7, and 11 can be accurately inspected. That is, if there is a minute disconnection in the battery voltage detection lines L1 to L4, the voltage value when a resistor is connected in parallel with the unit cell and current flows is different from when the battery detection line is not OK. The difference from the open-circuit voltage value of the unit cell is equal to or greater than a predetermined value, and it can be determined for each of the battery voltage detection lines L1 to L4 that the connection state is abnormal. In addition, since the bypass resistors 3, 9, and 13 are connected in parallel to the single cells 1, 7, and 11, without using the resistors outside the battery module 20, these bypass resistors are used to connect the single cells. By measuring the voltage value at the time of discharging, it is possible to inspect the connection state of the battery voltage detection line with higher accuracy. Further, in the battery module 20 of the present embodiment, the battery voltage detection line is stored in the program microcomputer 5 capable of executing the battery voltage detection line inspection routine, and the hardware of the battery voltage detection line is used by using a circuit that the battery module 20 has. Since the connection state is inspected, the burden on the inspection jig (circuit configuration) can be reduced.
[0029]
In the present embodiment, an example of software that causes the microcomputer 5 in the battery module 20 to execute the battery voltage detection line inspection routine is shown, but the present invention is not limited to this, and hardware including an OP amplifier and the like You may make it comprise.
[0030]
Further, in the present embodiment, an example in which the voltage of the single cell is measured one by one with respect to the voltage measurement circuit 6 is shown, but a voltage measurement circuit that can measure the voltages of a plurality of single cells at a time may be used. .
[0031]
Furthermore, in the present embodiment, as shown in FIG. 4, when an abnormality is found in any one of the battery voltage detection lines L1 to L4, the battery voltage detection line that has been found to be normal is reexamined. 3 may be performed only for the battery voltage detection line in which the connection state may be abnormal. In this way, it is possible to quickly identify a battery voltage detection line with an abnormal connection state.
[0032]
【The invention's effect】
As described above, according to the present invention, when there is a minute disconnection in the battery voltage detection line, the voltage value when a current is passed by connecting a resistor in parallel with the unit cell is determined when the battery detection line is normal. Since the difference is different, the difference from the open-circuit voltage value of the unit cell is equal to or greater than a predetermined value, and it is possible to determine that there is an abnormality in the connection state of the battery voltage detection line. it can.
[Brief description of the drawings]
FIG. 1 is a block circuit diagram of a battery module according to an embodiment to which the present invention is applicable.
FIG. 2 is a flowchart of a battery voltage detection line inspection routine 1 executed by a CPU of a microcomputer.
FIG. 3 is a flowchart of a battery voltage detection line inspection routine 2 executed by the CPU of the microcomputer.
[Explanation of symbols]
1, 7, 11 Lithium ion secondary battery (lithium ion battery, single battery)
2,8,12 capacity adjustment circuits 3,9,13 bypass resistor 4,10,14 FET (semiconductor switch)
5 microcomputer (memory circuit, control circuits)
6 Voltage measurement circuit (selection circuit)
15 Battery pack 20 Battery module L1, L2, L3, L4 Battery voltage detection line

Claims

A plurality of lithium ion batteries connected in series;
A selection circuit for receiving a plurality of terminal voltages from the plurality of lithium ion batteries and selecting a designated terminal voltage from the plurality of terminal voltages based on a designation signal;
A battery voltage detection line for guiding terminal voltages of the plurality of lithium ion batteries to the selection circuit, and
A plurality of capacity adjustment circuits each having a series circuit of a bypass resistor and a semiconductor switch and connected between the terminals of the plurality of lithium ion batteries via the battery voltage detection line;
An AD converter circuit for converting an analog value into a digital value;
A memory circuit;
And a control circuit that operates based on a program,
The semiconductor switch of the capacity adjustment circuit is controlled based on the operation of the control circuit, and the capacity adjustment of the lithium ion battery to which the capacity adjustment circuit is connected is performed.
Further, by the operation of the control circuit, the semiconductor switch of one capacity adjustment circuit connected to one lithium ion battery of the plurality of lithium ion batteries is turned on, and the inside of the plurality of lithium ion batteries Control the semiconductor switch of the other capacity adjustment circuit connected in parallel to the other lithium ion battery to the OFF state,
Based on the designation signal designating one lithium ion battery from the control circuit, the selection circuit selects the terminal voltage of the one lithium ion battery based on the ON operation of the semiconductor switch of one capacity adjustment circuit,
The selected terminal voltage is converted into the digital value by the AD conversion circuit,
An inspection method for a battery voltage detection line, wherein an abnormality determination of a connection state of the battery voltage detection line is performed based on the digital value by an operation of the control circuit, and a determination result is stored in the storage circuit.

A plurality of cells connected in series;
A plurality of battery voltage detection lines for guiding the terminal voltage of each of the plurality of unit cells;
A selection circuit for selecting a terminal voltage based on a designation signal from a plurality of terminal voltages input via the plurality of battery voltage detection lines;
A plurality of capacity adjustment circuits, each having a series circuit of a bypass resistor and a semiconductor switch, each connected between terminals of each unit cell via the battery voltage detection line;
An AD converter circuit for converting an analog value into a digital value;
A memory circuit;
And a control circuit that operates based on a program,
One and the other of one capacity adjustment circuit connected in parallel to one unit cell of the plurality of unit cells and the other capacity adjustment circuit connected in parallel to the other unit cell among the plurality of unit cells The semiconductor switches are controlled based on the operation of the control circuit, respectively, and the capacity adjustment of the one and the other unit cells is performed,
Separately from the operation for adjusting the capacity, the operation of the control circuit controls one of the semiconductor switches to be in an ON state and the other semiconductor switch to be in an OFF state, and designates the terminal voltage of one unit cell. A signal is applied to the selection circuit to select the terminal voltage of the one unit cell, and the terminal voltage of the selected one unit cell is digitally converted by the AD conversion circuit, and the battery is converted from the converted digital value. An inspection method for a battery voltage detection line, wherein abnormality determination of a connection state of the voltage detection line is performed.

A plurality of cells connected in series;
A plurality of battery voltage detection lines for guiding the terminal voltage of each of the plurality of unit cells;
A selection circuit for selecting a terminal voltage based on a designation signal from a plurality of terminal voltages input via the plurality of battery voltage detection lines;
A plurality of capacity adjustment circuits each having a series circuit of a bypass resistor and a semiconductor switch, each connected between each terminal of the unit cell via the battery voltage detection line;
An AD converter circuit for converting an analog value into a digital value;
A memory circuit;
And a control circuit that operates based on a program,
One and the other of one capacity adjustment circuit connected in parallel to one unit cell of the plurality of unit cells and the other capacity adjustment circuit connected in parallel to the other unit cell among the plurality of unit cells The semiconductor switches are controlled based on the operation of the control circuit, respectively, and the capacity adjustment of the one and the other unit cells is performed,
Separately from the operation for adjusting the capacity, the operation of the control circuit controls one of the semiconductor switches to be in an ON state and the other semiconductor switch to be in an OFF state, and designates the terminal voltage of one unit cell. A signal is applied to the selection circuit to select a terminal voltage of the one unit cell, and the terminal voltage of the selected one unit cell is digitally converted by the AD conversion circuit,
Further, by the operation of the control circuit, the other semiconductor switch is controlled to be in an ON state and one semiconductor switch is controlled to be in an OFF state, and a designation signal designating a terminal voltage of the other unit cell is applied to the selection circuit. The terminal voltage of the other unit cell is selected, and the terminal voltage of the selected other unit cell is digitally converted by the AD conversion circuit,
An inspection method for a battery voltage detection line, wherein abnormality determination of a connection state of the battery voltage detection line is performed from digital values of the one and the other unit cells.

A plurality of lithium ion batteries connected in series;
A selection circuit for receiving a plurality of terminal voltages from the plurality of lithium ion batteries and selecting a designated terminal voltage from the plurality of terminal voltages based on a designation signal;
A battery voltage detection line for guiding terminal voltages of the plurality of lithium ion batteries to the selection circuit, and
A plurality of capacity adjustment circuits each having a series circuit of a bypass resistor and a semiconductor switch and connected between the terminals of the plurality of lithium ion batteries via the battery voltage detection line;
An AD converter circuit for converting an analog value into a digital value;
A memory circuit;
And a control circuit that operates based on a program,
The semiconductor switch of the capacity adjustment circuit is controlled based on the operation of the control circuit, and the capacity adjustment of the lithium ion battery to which the capacity adjustment circuit is connected is performed.
When the control circuit shifts from the control stop state to the operation start state, the control circuit is connected to one lithium ion battery of the plurality of lithium ion batteries, and the semiconductor switch of one capacity adjustment circuit is connected to the lithium ion battery. And the semiconductor switch of the other capacity adjustment circuit connected in parallel to the other lithium ion battery among the plurality of lithium ion batteries is controlled to be in the OFF state,
Based on the designation signal designating one lithium ion battery from the control circuit, the selection circuit selects the terminal voltage of the one lithium ion battery based on the ON operation of the semiconductor switch of one capacity adjustment circuit,
The selected terminal voltage is converted into the digital value by the AD conversion circuit,
An inspection method for a battery voltage detection line, wherein an abnormality determination of a connection state of the battery voltage detection line is performed based on the digital value by an operation of the control circuit, and a determination result is stored in the storage circuit.

A plurality of cells connected in series;
A plurality of battery voltage detection lines for guiding the terminal voltage of each of the plurality of unit cells;
A selection circuit for selecting a terminal voltage based on a designation signal from a plurality of terminal voltages input via the plurality of battery voltage detection lines;
A plurality of capacity adjustment circuits, each having a series circuit of a bypass resistor and a semiconductor switch, each connected between terminals of each unit cell via the battery voltage detection line;
An AD converter circuit for converting an analog value into a digital value;
A memory circuit;
And a control circuit that operates based on a program,
One and the other of one capacity adjustment circuit connected in parallel to one unit cell of the plurality of unit cells and the other capacity adjustment circuit connected in parallel to the other unit cell among the plurality of unit cells The semiconductor switches are controlled based on the operation of the control circuit, respectively, and the capacity adjustment of the one and the other unit cells is performed,
Based on this, when the control circuit shifts from the control stop state to the operation start state, one semiconductor switch is controlled to be in the ON state and the other semiconductor switch is controlled to be in the OFF state, and the designation that specifies the terminal voltage of one unit cell A signal is applied to the selection circuit to select the terminal voltage of the one unit cell, and the terminal voltage of the selected one unit cell is digitally converted by the AD conversion circuit, and the battery is converted from the converted digital value. An inspection method for a battery voltage detection line, wherein abnormality determination of a connection state of the voltage detection line is performed.

A plurality of cells connected in series;
A plurality of battery voltage detection lines for guiding the terminal voltage of each of the plurality of unit cells;
A selection circuit for selecting a terminal voltage based on a designation signal from a plurality of terminal voltages input via the plurality of battery voltage detection lines;
A plurality of capacity adjustment circuits each having a series circuit of a bypass resistor and a semiconductor switch and connected in parallel to each of the cells via the battery voltage detection line;
An AD converter circuit for converting an analog value into a digital value;
A memory circuit;
And a control circuit that operates based on a program,
One and the other of one capacity adjustment circuit connected in parallel to one unit cell of the plurality of unit cells and the other capacity adjustment circuit connected in parallel to the other unit cell among the plurality of unit cells The semiconductor switches are controlled based on the operation of the control circuit, respectively, and the capacity adjustment of the one and the other unit cells is performed,
Based on this, when the control circuit shifts from the control stop state to the operation start state, one semiconductor switch is controlled to be in the ON state and the other semiconductor switch is controlled to be in the OFF state, and the designation that specifies the terminal voltage of one unit cell A signal is applied to the selection circuit to select a terminal voltage of the one unit cell, and the terminal voltage of the selected unit cell is digitally converted by the AD conversion circuit,
Further, by the operation of the control circuit, the other semiconductor switch is controlled to be in an ON state and one semiconductor switch is controlled to be in an OFF state, and a designation signal designating a terminal voltage of the other unit cell is applied to the selection circuit. The terminal voltage of the other unit cell is selected, and the terminal voltage of the selected other unit cell is digitally converted by the AD conversion circuit,
An inspection method for a battery voltage detection line, wherein abnormality determination of a connection state of the battery voltage detection line is performed from digital values of the one and the other unit cells.