JP4250348B2 - Operational amplifier - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an operational amplifier used in an electronic circuit such as a constant voltage circuit.
[0002]
[Prior art]
FIG. 4 is an example of a circuit diagram of a conventional general operational amplifier 300. The operational amplifier 300 is roughly composed of a differential circuit S and an amplifier circuit A. The differential circuit S includes a pair of N-channel transistors 3 and 4 each having a current mirror composed of P-channel transistors 1 and 2. An N-channel transistor 5 to which a predetermined bias voltage Vb is applied is connected to the gates of the pair of N-channel transistors 3 and 4 so that a constant driving current flows.
[0003]
The amplifier circuit A is a two-stage amplifier including a P-channel transistor 6 and an N-channel transistor 8 and increases or decreases the output voltage Vout according to the output of the differential circuit S. The N-channel transistors 7 and 9 each have a predetermined bias voltage Vb applied to their gates, and function as a constant current circuit that allows a constant drive current to flow through the transistors 6 and 8. The voltage at the point P 1 of the differential circuit S is applied to the gate of the P-channel transistor 6. A capacitor C1 and a resistor R1 provided between the gate and drain of the P-channel transistor 6 and connected in series function as a phase compensation circuit.
[0004]
In the operational amplifier 300 configured as described above, when the value of the voltage Vin + applied to the positive phase input terminal of the differential circuit S becomes larger than the value of the voltage Vin− applied to the negative phase input terminal, the potential at the point P1 decreases. The potential of the drain of the P-channel transistor 6, that is, the voltage applied to the gate of the N-channel transistor 8 increases, and the level of the output voltage Vout increases. On the other hand, when the value of the voltage Vin + applied to the positive phase input terminal of the differential circuit S becomes smaller than the value of the voltage Vin− applied to the negative phase input terminal, the potential at the point P1 rises and the drain of the P channel transistor 6 , That is, the voltage applied to the gate of the N-channel transistor 8 decreases, and the level of the output voltage Vout decreases.
[0005]
[Problems to be solved by the invention]
In the operational amplifier 300 having the above configuration, when the value of the voltage Vin + applied to the positive phase input terminal decreases and the potential at the point P1 rises to near Vcc, the P-channel transistor 6 is completely turned off. The response speed when turning on from a completely off state to a predetermined level is slower from the level of speed required for the circuit than when turning on from a slightly on state to a predetermined level. There is a possibility that this characteristic of the conventional operational amplifier 300 is an obstacle to speeding up the integrated circuit.
[0006]
An object of the present invention is to provide an operational amplifier that has a simple configuration and exhibits high-speed response.
[0007]
[Means for Solving the Problems]
The operational amplifier according to claim 1 is an operational amplifier (100) including a differential circuit (S) and an amplifier circuit (A), wherein the amplifier circuit includes a gate electrode as the differential circuit. An output having a source electrode connected to a positive high potential (Vcc) line and a drain electrode connected to the output terminal of the operational amplifier via an amplifier (8). And a P-channel first transistor (6) and an output correction circuit (C) for the drain electrode of the first transistor . The output correction circuit has one P-channel second transistor (12). The gate electrode of the second transistor is connected to the drain electrode of the first transistor, the source electrode of the second transistor is connected to the gate electrode of the first transistor, and the drain of the second transistor Is connected to a lower potential line (0 V ) than the higher potential line, and the threshold value for turning on the second transistor causes the output of the differential circuit to completely turn off the first transistor. This is a potential output from the drain electrode when the value is reached.
An operational amplifier according to a second aspect is the operational amplifier according to the first aspect, wherein the P channel is connected between the gate electrode of the first transistor and the source electrode of the second transistor. One or more three transistors (10, 11) are connected in series.
An operational amplifier according to claim 3 is the operational amplifier according to claim 1 or 2, further comprising a phase compensation circuit including an RC series circuit between the gate and drain electrodes of the first transistor. It is characterized by that.
[0008]
The operational amplifier according to claim 4 is an operational amplifier (200) including a differential circuit (S ') and an amplifier circuit (A'), wherein the amplifier circuit has a gate electrode that is the difference circuit. Connected to the output of the dynamic circuit , the drain electrode is connected to a high potential ground line , and the source electrode is connected to the output terminal of the operational amplifier via an amplifier (8 ') . An N-channel first transistor (6 ′) and an output correction circuit (C ′) for the source electrode of the first transistor , the output correction circuit being one N-channel second transistor (12 ′). The gate electrode of the second transistor is connected to the source electrode of the first transistor, the drain electrode of the second transistor is connected to the gate electrode of the first transistor, and the source of the second transistor Electrode Serial high than the ground line potential is connected to the low potential line (-Vcc), the threshold to turn on the second transistor, the value of the output of the differential circuit is completely off the first transistor It is a potential that is output from the source electrode at this time.
The operational amplifier according to claim 5 is the operational amplifier according to claim 4, wherein the N-channel first is grounded between the gate electrode of the first transistor and the drain electrode of the second transistor. One or more three transistors (10 ′, 11 ′) are connected in series.
The operational amplifier according to claim 6 is the operational amplifier according to claim 4 or 5, further comprising a phase compensation circuit including an RC series circuit between the gate and drain electrodes of the first transistor. It is characterized by that.
[0009]
DETAILED DESCRIPTION OF THE INVENTION
(1) Summary of the Invention In the present invention, the potential difference between the drain and source of a transistor to which the output of the differential circuit constituting the operational amplifier is applied to the gate is a predetermined value (in the case of a P-channel transistor, the voltage applied to the source is Yes, in the case of an N-channel transistor, it operates when the voltage exceeds a value slightly smaller than the voltage applied to the drain) to correct the output of the differential circuit, that is, the voltage applied to the gate of the transistor Is corrected so that the potential difference between the drain and source of the transistor is smaller than the predetermined value. That is, before the transistor is completely turned off, the output of the differential circuit is added / subtracted, and the voltage applied to the gate of the transistor is corrected to correct the transistor so that the transistor is turned on slightly. A circuit is provided. By adopting this configuration, the response performance of the operational amplifier is improved.
[0010]
(2) Embodiment 1
FIG. 1 is a circuit diagram of an operational amplifier 100 according to the first embodiment. For ease of understanding, the same reference numerals are assigned to the same components as those of the conventional operational amplifier 300 shown in FIG. In the operational amplifier 100, similarly to the known operational amplifier 300, when the value of the voltage Vin + applied to the positive phase input terminal of the differential circuit S becomes larger than the voltage Vin− applied to the negative phase input terminal, the point P1 Decreases, the potential of the drain of the P-channel transistor 6, that is, the voltage applied to the gate of the N-channel transistor 8 increases, and the level of the output voltage Vout increases. On the other hand, when the value of the voltage Vin + applied to the positive phase input terminal of the differential circuit S decreases, the potential at the point P1 rises and is applied to the drain potential of the P-channel transistor 6, that is, the gate of the N-channel transistor 8. The voltage decreases and the level of the output voltage Vout decreases.
[0011]
Hereinafter, the configuration of the operational amplifier 100 will be described. The operational amplifier 100 is roughly composed of a differential circuit S and an amplifier circuit A. The differential circuit S is a known differential circuit including a pair of N-channel transistors 3 and 4 having a current mirror composed of P-channel transistors 1 and 2. An N-channel transistor 5 to which a predetermined bias voltage Vb is applied is connected to the gates of the pair of N-channel transistors 3 and 4 so that a constant driving current flows. In addition, as long as the voltage according to the difference between the voltage Vin + applied to the positive phase input terminal and the voltage Vin− applied to the negative phase input terminal is output to the amplifier circuit A provided in the next stage, other A well-known differential circuit may be employed.
[0012]
The amplifier circuit A is obtained by adding an output correction circuit C to a known two-stage amplifier composed of a P-channel transistor 6 and an N-channel transistor 8. The gate of the P channel transistor 6 is connected to the output terminal (point P) of the differential circuit S, the source is applied to the supply terminal of the power supply voltage Vcc, and the drain is connected to the gate of the N channel transistor 8. The drain of the N-channel transistor 8 is connected to the supply terminal of the power supply voltage Vcc, and the source is connected to the Vout output terminal.
[0013]
The drain of the P-channel transistor 6 is connected to the drain of the N-channel transistor 7 to which a predetermined bias voltage Vb is applied to the gate. Similarly, the source of the N channel transistor 8 is connected to the drain of the N channel transistor 9 to which a predetermined bias voltage Vb is applied to the gate. The transistors 7 and 9 function as a constant current circuit that supplies a constant drive current to the transistors 6 and 8.
[0014]
The capacitor C1 and the resistor R1 provided between the gate and drain of the P-channel transistor 6 function as a phase compensation circuit.
[0015]
The output correction circuit C is provided between the gate and drain of the P-channel transistor 6, and the potential difference between the drain and source of the transistor 6 is a predetermined value (a value slightly smaller (eg, several mV) than Vcc applied to the source). ) That is, that is, when the output of the differential circuit S becomes a value that completely turns off the P-channel transistor 6, the potential difference between the drain and source of the transistor 6 becomes smaller than the predetermined value. In other words, the output of the differential circuit S is corrected so that the transistor 6 is slightly turned on.
[0016]
Hereinafter, the configuration and operation of the output correction circuit C will be described in detail. In the output correction circuit C, P-channel transistors 10, 11, 12 are connected in series to the gate of the P-channel transistor 6, the gates and drains of the P-channel transistors 10, 11 are connected, and P located at the most downstream side. The gate of the channel transistor 12 is connected to the drain of the P-channel transistor 6, and the drain of the transistor 12 is grounded.
[0017]
The P channel transistors 10, 11, and 12 are of the threshold Vth that is turned on immediately before the P channel transistor 6 is completely turned off. By adopting this configuration, immediately before the P-channel transistor 6 is completely turned off, the P-channel transistors 12, 11, and 10 are sequentially turned on, and the gate voltage of the P-channel transistor 6 is lowered. Note that the voltage drop amount caused by the P channel transistors 10, 11, and 12 is used so that the P channel transistor is maintained in a slightly ON state (for example, about several mV).
[0018]
Even when the voltage of Vin + applied to the positive-phase input terminal of the differential circuit S becomes small due to the above correction action of the output correction circuit C, the P-channel transistor 6 is not completely turned off. Keep it on. This improves the response of the circuit when Vin + changes to a high value (High level) again.
[0019]
FIG. 2 shows a simulation result when a signal whose potential level is periodically toggled is applied to Vin + of the operational amplifier 100 having the above configuration. In the middle of the figure, the potential change of Vin + is shown, the upper waveform shows the signal waveform flowing to the point P2, and the lower row shows the drain potential (output waveform) of the P-channel transistor 6. In addition, the signal waveform flowing at the point P2 when the output correction circuit C is not provided and the potential (output waveform) of the drain of the P-channel transistor 6 are shown by being overlapped with a dotted line. From this figure, it can be confirmed that by providing the output correction circuit C, the response speed of the output of the P-channel transistor 6 is increased by about 5 ns when the potential of Vin + changes from High level to Low level.
[0020]
(3) Embodiment 2
FIG. 3 is a circuit diagram of the operational amplifier 200 according to the second embodiment. The operational amplifier 200 is _obtained by operating the operational amplifier 100 with a negative power supply voltage −V _cc1 and is obtained by performing P⇔N conversion on the transistor channel to be used. This is the same as the amplifier 100. The reference number given to each component is a dash ('′) in the reference number of each component of the corresponding FET drive circuit 100 (in the case of a transistor, the point that the channel is P⇔N converted). ).
[0021]
The output correction circuit C ′ included in the operational amplifier 200 has a case where the output from the differential circuit S ′ becomes large and the potential difference between the drain and source of the N-channel transistor 6 ′ becomes a predetermined value or more, that is, the N-channel transistor 6 Before 'is completely turned off, the output from the differential circuit S' is corrected to increase so that the potential difference between the drain and source of the transistor 6 'is smaller than the predetermined value. To keep it on.
[0022]
The operation of the operational amplifier 200 is the same as that of the operational amplifier 100 according to the first embodiment except that the operational amplifier 200 operates at a negative power supply voltage −V _cc1 , and thus further explanation is omitted.
[0023]
【The invention's effect】
The operational amplifier according to any one of claims 1 to 6, wherein the output of the differential circuit is such that the potential difference between the drain and source of the first transistor to which the output of the differential circuit is applied to the gate does not exceed a predetermined value. Correct. As a result, it is possible to prevent the time required for the first transistor to be completely turned off and turn on again to a predetermined level, thereby improving the response speed of the circuit.
[Brief description of the drawings]
FIG. 1 is a circuit diagram of an operational amplifier according to a first embodiment.
FIG. 2 shows signals inside an operational amplifier with and without an output correction circuit.
FIG. 3 is a circuit diagram of an operational amplifier according to the second embodiment.
FIG. 4 is a circuit diagram of a conventional operational amplifier.
[Explanation of symbols]
1, 2, 6, 3 ', 4', 5 ', 7', 8 ', 9', 10 ', 11', 12 'P-channel transistors, 3, 4, 5, 7, 8, 9, 10, 11, 12, 1 ′, 2 ′, 6 ′ N-channel transistor, C1 capacitor, R1 resistance, 100, 200, 300 operational amplifier, S differential circuit, A amplifier circuit, C output correction circuit.

Claims (6)

An operational amplifier (100) including a differential circuit (S) and an amplifier circuit (A),
The amplifier circuit has a gate electrode connected to the output of the differential circuit , a source electrode connected to a positive high potential (Vcc) line , and a drain electrode connected to the output terminal of the operational amplifier. An output P-channel first transistor (6) connected via (8), and an output correction circuit (C) for the drain electrode of the first transistor ;
The output correction circuit has one P-channel second transistor (12), the gate electrode of the second transistor is connected to the drain electrode of the first transistor, and the source electrode of the second transistor is The gate electrode of the first transistor is connected, the drain electrode of the second transistor is connected to a line (0 V ) having a potential lower than that of the high potential line, and the threshold value for turning on the second transistor is The potential output from the drain electrode when the output of the differential circuit becomes a value that completely turns off the first transistor.
An operational amplifier characterized by that. One or more P-channel third transistors (10, 11) that are grounded are connected in series between the gate electrode of the first transistor and the source electrode of the second transistor.
The operational amplifier according to claim 1. A phase compensation circuit including an RC series circuit is provided between the gate and drain electrodes of the first transistor.
The operational amplifier according to claim 1 or 2. An operational amplifier (200) including a differential circuit (S ′) and an amplifier circuit (A ′),
The amplifier circuit has a gate electrode connected to the output of the differential circuit , a drain electrode connected to a high potential ground line , and a source electrode connected to the output terminal of the operational amplifier. And an output N-channel first transistor (6 ′) and an output correction circuit (C ′) for the source electrode of the first transistor, which are connected via
The output correction circuit has one N-channel second transistor (12 ′), the gate electrode of the second transistor is connected to the source electrode of the first transistor, and the drain electrode of the second transistor Is connected to the gate electrode of the first transistor, and the source electrode of the second transistor is connected to a line (−Vcc) having a potential lower than that of the high-potential ground line to turn on the second transistor. The threshold value is a potential output from the source electrode when the output of the differential circuit becomes a value that completely turns off the first transistor.
An operational amplifier characterized by that. Between the gate electrode of the first transistor and the drain electrode of the second transistor, one or more N-channel third transistors (10 ′, 11 ′) that are grounded are connected in series.
The operational amplifier according to claim 4. A phase compensation circuit including an RC series circuit is provided between the gate and source electrodes of the first transistor.
The operational amplifier according to claim 4 or 5.

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