JP4246558B2 - Wiring substrate for probe and method for manufacturing semiconductor element - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a connection device used for inspection of a semiconductor element, a semiconductor chip inspection device, a semiconductor chip manufacturing device, or a semiconductor chip manufactured using the same, and in particular, microelectrode pads are arranged at a narrow pitch, Alternatively, a large number of electrode pads can be connected at the same time, which is suitable for connection to a semiconductor element that transmits a high-speed signal.
[0002]
[Prior art]
In recent years, multi-chip modules in which semiconductor chips such as LSI and memory are integrated are very popular. This is largely due to the fact that the degree of integration of semiconductor chips has been dramatically improved by the use of bare chips.
[0003]
FIG. 1A is a perspective view showing a wafer 1 in which a large number of semiconductor chips 2 are arranged in parallel, and FIG. 1B is an enlarged perspective view showing one semiconductor chip 2. A large number of semiconductor chips 2 are formed side by side on the wafer 1 and then separated for use. A large number of electrode pads 3 are arranged along the periphery on the surface of the semiconductor chip 2. Along with the high integration of semiconductor chips, the electrode pads 3 are in a state of further narrowing and higher density. The pitch of the electrode pads is about 200 μm or less, for example, 130 μm, 100 μm, or less, and products approaching 40 μm have been developed. In order to increase the density of the electrode pads, there is a tendency that they are arranged on the entire surface from the first row to the second row along the periphery.
[0004]
In addition, the speed of the semiconductor chip is remarkably increased, and the clock of the microcomputer reaches about several gigahertz.
[0005]
In order to manufacture such a semiconductor chip and a multichip module incorporating the semiconductor chip with a high yield, a technique for efficiently inspecting electrical characteristics at the end of the semiconductor chip manufacturing process is required.
[0006]
On the other hand, a connection device having a mechanism in which minute contact terminals are connected at high density to a wiring board for inspection on which high-density wiring is formed has been developed.
[0007]
Conventional probing devices are known in JP-A-07-283280, JP-A-8-50146, JP-A-10-308423, and JP-A-11-23615.
[0008]
A conventional method for manufacturing a high-density wiring board is known in Japanese Patent Application Laid-Open No. 08-78846.
[0009]
[Patent Document 1]
Japanese Patent Application Laid-Open No. 07-283280
[Patent Document 2]
JP-A-8-50146
[Patent Document 3]
JP-A-10-308423
[Patent Document 4]
Japanese Patent Laid-Open No. 11-23615
[Patent Document 5]
Japanese Patent Laid-Open No. 08-78846
[0010]
[Problems to be solved by the invention]
With the downsizing of chips and the increase in diameter of wafers, the number of semiconductor chips manufactured with one wafer has increased, and the time required for these inspections has increased dramatically. In order to manufacture a connection device for fine electrode pads arranged at a narrow pitch, a fine and narrow pitch contact terminal corresponding to the electrode pad is formed, and an inspection wiring board having a narrow pitch wiring is connected. It is necessary to appropriately integrate the narrow pitch connection technology. Further, the inspection time can be shortened by connecting a plurality of semiconductor chips at the same time, but the shape and position of the connection terminals must be accurately fixed.
[0011]
However, the thermal expansion coefficient α of the polyimide film as the base material is several tens to several hundred ppm / ° C., which is larger than α (several ppm / ° C.) of silicon as the base material to be inspected. Therefore, the internal stress of the insulating film due to the thermal history during the manufacturing process is large and easily stretches. As contact characteristics, it is required to stably connect repeatedly several hundred thousand to several million times with a low load. When a plurality of contact terminals are simultaneously connected to the electrode to be inspected, the electrode to be inspected and the contact terminal must be parallel. However, it is very difficult in terms of manufacturing accuracy. Therefore, in the connecting operation, the pressing operation is further performed after several contact terminals are connected to the electrode. Since the member that absorbs such an excessive load is mainly the polyimide layer, some contact terminals are crushed at an early stage of repeated connection. In addition, there is no mention of the structure, manufacturing method, and limitations of through-hole miniaturization and narrow pitch, and the connection device with the electrode pad of the semiconductor chip.
[0012]
As the chip signal to be inspected increases in speed, it is necessary to transmit the high-speed signal also to the inspection connection device. When transmitting high-speed signals, electromagnetic waves are generated by radiation. As described above, it is necessary to form a narrow-pitch wiring on the inspection wiring board. For example, a multilayer wiring structure is a very effective means. In such a wiring structure, an independent signal line is formed around a signal line for transmitting a high-speed signal. Since the electromagnetic waves cause noise in the surrounding signal lines, normal inspection cannot be performed. Therefore, it is a problem to suppress the propagation of noise.
[0013]
In general, a wiring board such as a printed board, especially a board used for high-speed signals, is provided with a ground layer in order to suppress noise propagation of electromagnetic radiation.
[0014]
However, in a probing apparatus for connecting to a semiconductor chip or the like, a conventional probe is not used because its target is focused on a low-speed signal.
[0015]
In view of the above-mentioned problems, the object of the present invention is to provide a contact terminal having a fine and uniform shape as small as the size of the electrode pad and a narrow pitch and high density as high as the pitch of the electrode pad while ensuring the above advantages. An object of the present invention is to provide a probe wiring board arranged with high positional accuracy.
[0016]
Another object of the present invention is a probing device in which both are electrically connected well, and can be used for simultaneous connection to a large number of electrode pads or electrode pads of a plurality of chips, and these It is another object of the present invention to provide a method for manufacturing a semiconductor device using the above probing apparatus.
[0017]
[Means for Solving the Problems]
In order to achieve the above-mentioned object, the present invention is configured to contact the electrode group arranged on the inspection object with the contact terminal group arranged in the region on the probing side corresponding to the electrode group and to inspect the electric signal. A wiring board for a probe for inputting and outputting to a target, the first wiring layer having a plurality of first wiring portions electrically connected to each contact terminal portion of the contact terminal group, and the first wiring layer A second wiring layer having a plurality of second wiring portions formed by sandwiching the wiring layer and the second insulating layer; and each of the first wiring portions and each of the second wiring layers provided in the second insulating layer. Embedded in the second insulating layer between the second through-hole conductor portion electrically connecting the two wiring portions and the first wiring layer and the second wiring layer, Second And a thin metal plate having an opening in the vicinity of the through-hole conductor portion, and the second or first wiring portion is formed so as to be drawn out to the peripheral portion by a lead-out wiring.
[0018]
Further, the present invention is characterized in that the metal thin plate is a ground layer.
[0019]
According to the present invention, a first insulating layer is sandwiched between the connection terminal group and the first wiring layer, and the first insulation is provided between the contact terminal portions and the first wiring portion. The first through-hole conductor portion provided in the layer is electrically connected and configured.
[0020]
Further, the present invention is characterized in that the contact terminal group and the first wiring layer are formed in substantially the same layer, and the contact terminal portions and the first wiring portion are electrically connected. And
[0021]
Further, the present invention is characterized in that the contact terminal portions are fixed to the bottom surface of the first through-hole conductor portion by solder bonding.
[0022]
According to the present invention, an opening is formed in the metal thin plate near the contact terminal group, an elastic resin is provided on the insulating layer near the contact terminal group, and the elastic resin is pressed by a pressing member. A pressing force is applied to the contact terminal portion through an opening of the metal thin plate that is pressed and embedded in the insulating layer.
[0023]
According to the present invention, an opening is formed in the metal thin plate immediately above the contact terminal group, and an elastic resin is provided in a hole reaching the vicinity of the upper surface of the contact terminal group through the opening of the metal thin plate in the insulating layer. The elastic resin is pressed by a pressing member to apply a pressing force to the contact terminal portion.
[0024]
Further, the present invention is for bringing an electrode group arranged on an inspection object into contact with a contact terminal group arranged in a region on the probing side corresponding to the electrode group to input / output an electric signal to / from the inspection object. A wiring board for a probe, wherein the first wiring layer is formed on the contact terminal group with the first insulating layer sandwiched therebetween, and is formed on the first insulating layer to constitute the first wiring layer A first through-hole conductor portion that electrically connects each of the plurality of first wiring portions to each contact terminal portion of the contact terminal group, and a protective insulating layer that covers the first wiring layer A ground layer formed from a thin metal plate adhered on the protective insulating layer and having an opening immediately above the contact terminal group, and an elastic resin is provided in the opening on the protective insulating layer, An elastic resin is pressed with a pressing member to protect the protective insulating layer and the first Through the edge layer is characterized by being configured to apply a pressing force to the contact terminal.
[0025]
In the present invention, the probe wiring board is attached to a support wiring board, and contact pressure is applied to the pressing member attached to the region on the side opposite to the probing side of the probe wiring board by contact pressure applying means. Grant To Using a roving device, the contact terminal group connected to the tester via the lead wiring and the electrode group of the semiconductor element to be inspected are relatively aligned and brought into contact at a desired contact pressure. Electrically connected, this connected tester and the electrode group The semiconductor device is manufactured by exchanging electrical signals between the semiconductor device and inspecting the electrical characteristics of the semiconductor device to manufacture the semiconductor device.
[0026]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments according to the present invention will be described with reference to the drawings. The present invention is not limited to these embodiments.
[0027]
According to the present invention, in the state of a wafer, a small contact pressure (at the same time for one or a plurality of semiconductor chips in which a large number of semiconductor elements in which fine electrode pads are arranged at a narrow pitch and at a high density are arranged in parallel. The tester is securely connected to the electrode pad 3 such as aluminum or solder having an oxide formed on the surface with a stable low resistance value of about 0.05 to 0.1Ω. Can cope with high density and narrow pitch of each semiconductor element, enables inspection by simultaneous connection of a large number of chips, and enables evaluation of electrical characteristics by high-speed electrical signals (high frequency of about 100 MHz to several tens GHz). The probing apparatus and the manufacturing of the semiconductor element by using the probing apparatus and the electrical characteristics of the semiconductor element will be described.
[0028]
First, an embodiment of a probe wiring board used in the probing apparatus (connecting apparatus) according to the present invention will be described.
[0029]
<First Example of Probe Wiring Board>
FIG. 4 shows a manufacturing process of the first embodiment of the probe wiring board used in the connection device according to the present invention.
[0030]
First, the silicon dioxide film 30 having a thickness of 0.2 μm is formed by holding the (100) plane of the single crystal silicon wafer 20 for 90 minutes in an oxygen atmosphere with an oxidation temperature of 1000 degrees, for example. Next, a photosensitive resist having a thickness of 3 μm is applied to the surface of the silicon dioxide film 30, and the resist in a region where contact terminals are to be formed is removed by photolithography in a subsequent process. Thereby, a resist in which a plurality of openings with a corner of 20 μm are arranged at intervals of 30 μm is formed. The silicon dioxide film in the opening is etched by dipping in a mixture of hydrofluoric acid and ammonium fluoride. Next, the photosensitive resist is removed, and the exposed silicon surface is anisotropically etched with a potassium hydroxide aqueous solution heated to 90 degrees using silicon dioxide as a mask to form a quadrangular pyramid-shaped hole 31 having a bottom surface of 20 μm. To do. As a result, the cross section shown in FIG. 4A is obtained. Then, the silicon dioxide film 21 having a thickness of 0.2 μm is formed by performing thermal oxidation again. The above is the same as the method described in Japanese Patent Application Laid-Open No. 07-283280.
[0031]
Next, by depositing chromium (about 0.5 μm thickness) and copper (about 1 μm thickness) in this order on the silicon dioxide film 21 in order, the cross-sectional shape shown in FIG. Is obtained.
[0032]
As the base film 22 thus formed on the silicon dioxide film 21, at least one metal selected from the group consisting of gold, platinum, silver, rhodium, palladium, iridium, ruthenium, tungsten, chromium, copper and tin is used. Or the alloy is mentioned.
[0033]
A gold film having a thickness of about 1 μm formed by sputtering on the silicon dioxide film 21 as the base film 22 does not have strong adhesion between the silicon dioxide film 21 on the silicon wafer and the contact terminal portion 47 and the polyimide film 32 described later. Therefore, the separation of the silicon dioxide film 21 from the contact terminal portion 47 and the polyimide film 32 is particularly excellent and easy.
[0034]
When the base film 22 is formed by laminating gold and tungsten on the silicon dioxide film 21 in this order, the silicon dioxide film 21 and the gold film on the silicon wafer, the tungsten film and the contact terminal portion 47, and the polyimide film 32 are formed. Since the adhesive force is good, the probe wiring board used in the connection device can be stably manufactured. In addition, gold diffuses into the tungsten film by the heat treatment in the process, and gold diffuses to the interface between the contact terminal portion 47 and the polyimide film 32a at the end of the manufacturing process, and therefore the silicon dioxide film 21 and the contact terminal portion 47. Further, separation from the polyimide film 32a is facilitated, and occurrence of defects during the manufacturing process can be reduced.
[0035]
Further, when the base film 22 is formed by laminating chromium and copper in this order as described above, the silicon dioxide film 21 and the chromium film on the silicon wafer, copper Since the adhesion between the film and the contact terminal portion 47 and the polyimide film 32a is good, the probe wiring board used in the connection device can be manufactured stably.
[0036]
Next, a photosensitive resist is applied to the base film 22 to a thickness of 10 μm, and the resist where the contact terminal portion including the quadrangular pyramid hole is formed is removed by photolithography.
[0037]
Next, the removed resist openings are filled with nickel plating, which is a hard metal, to form contact terminal portions 47 having quadrangular pyramid contact terminals. Thereafter, the resist other than where the contact terminal portions are formed is removed. Thereafter, a polyimide film 32 a having a thickness of about 15 μm (about 12 μm to 20 μm) serving as an insulating layer is formed on the contact terminal portion 47 and the underlying film between the contact terminal portions 47.
[0038]
Next, an aluminum film 33, which is a metal film, is sputtered on the polyimide film 32a forming the insulating layer, and the aluminum film 33 is etched by photolithography of a photosensitive resist and etching of the aluminum film 33 by a mixed acid containing phosphoric acid as a main component. A part of the contact terminal portion is opened. Thus, since the mask of the aluminum film 33 which is a metal film is formed by photolithography, a mask having a high degree of positional accuracy can be formed.
[0039]
Next, dry etching with a laser or reactive gas is performed until the nickel contact terminal is exposed, using the aluminum film 33, which is a metal film in close contact with the polyimide film 32a as an insulating layer and having an opening pattern, as a mask. Or the like is used to form a through hole 34a consisting of micro holes of about 10 to 20 μm in an insulating layer 32a such as a polyimide film. As a result, the cross-sectional shape shown in FIG.
[0040]
When laser processing is used, the laser type is preferably an ultraviolet laser, and an excimer laser is exemplified. As shown in FIG. 2, it is known that the angle formed by the vertical surface 12 of the laser optical axis 11 and the side wall of the through hole, that is, the taper angle 16 can be controlled by the energy density on the processing surface. For example, energy density 0.25 J / cm ² In polyimide processing by excimer laser of about 65 degrees, 0.20 J / cm ² Then, it is about 55 degrees. From this, the processing of the through hole 34 for the polyimide film 32 having a thickness of about 15 μm is 0.25 J / cm. ² In the case of about 12 μm, 0.20 J / cm ² In this case, the diameter can be reduced to about 20 μm. When the energy density is increased, the taper angle is enlarged. However, in the excimer laser processing, the so-called ablation phenomenon is dominant, so the taper angle does not exceed 90 degrees. Furthermore, in the ablation process, since the carbonization action of the resin is small and the generation of residue can be suppressed, the residue cleaning process is unnecessary or can be reduced.
[0041]
When dry etching using reactive gas is used, reactive ion etching using oxygen gas as the main reactive gas is exemplified. According to this, the ion bombardment or oxidation action of oxygen dominates the processing. In this case as well, the taper angle is defined, but the through hole 34 having a taper angle exceeding 90 degrees, that is, a so-called reverse taper angle can be formed. Depending on processing conditions such as gas pressure and processing time, the shape of the through hole can be controlled so as not to have an extreme taper angle. That is, when a reactive gas is used, the through hole 34 having a taper angle of about 90 degrees can be processed. Therefore, the through hole 34 formed in the polyimide film 32 can be miniaturized to about 10 μm square. Furthermore, with the miniaturization of the through hole, the distance between the contact terminal portions 47 is made closer. probe The wiring board 35 for use can be obtained. Therefore, dry etching is an effective through hole forming method for reducing the diameter.
[0042]
Moreover, as a method of forming the through hole 34 in the insulating layer 32 such as a polyimide film, a method of irradiating a laser positioned by an optical component is exemplified. Since this method uses a laser positioned by an optical component typified by a galvanometer mirror, the mask 33 is not required, and the cost of the probe wiring board can be reduced. In order to process through holes having a smaller diameter while controlling the generation of residues due to the carbonization of the resin, an ultraviolet laser that is an ablation process is desirable, and a harmonic YAG laser is exemplified. Even if a carbon dioxide laser is used, if a residue is removed by dry etching of a reactive gas, a small-diameter through hole can be formed. The through hole 34 formed in this way does not become an extreme reverse taper.
[0043]
By the way, as will be described later, when the wiring is formed in the through hole 34 portion, if the taper angle is 90 degrees or more, the following failure occurs. That is, when a wet process such as plating is performed, the upper portion of the through hole is initially closed as shown in FIG. 3B, and the unfilled portion 26 may remain in the through hole. Further, if a metal film is formed by a dry process such as sputtering, a portion 24 which is shaded and does not form a sputtered film is formed as shown in FIG. 3A, and a uniform film cannot be formed.
[0044]
However, the through hole forming method by laser processing is a processing method advantageous for preventing such a failure.
[0045]
Next, the aluminum film 33 is removed by dipping in an aqueous sodium hydroxide solution. Next, in order to improve adhesion, a chromium and copper film is sequentially laminated on the polyimide film 32a including the side wall of the through hole by sputtering, and using this as a seed film, resist patterning and copper plating are performed by a so-called semi-additive method. Then, pattern separation is performed to form the first layer wiring portion 48. Naturally, a conductor portion (via) is buried by plating such as copper in the through hole 34a formed of a minute hole formed in the polyimide film 32a which is an insulating layer, so that the first layer wiring portion 48 is formed. Thereafter, a protective polyimide film 27 is formed on the first layer wiring 48 and on the polyimide film 32 a as an insulating layer between the first layer wiring 48. This protective polyimide film 27 is for protecting the first-layer wiring 48 and for separating a ground layer 40 described later from the first-layer wiring 48 in the vertical direction.
[0046]
Next, a 42 alloy having a thickness of about 0.08 mm to 0.15 mm as a metal thin plate is provided through a low melting point adhesive sheet 28 based on polyimide such as SPB-A manufactured by Nippon Steel Chemical Co., Ltd. The sheet 29 is laminated and bonded over almost the entire surface of the inspection wiring board. As a result, the cross-sectional shape shown in FIG.
[0047]
As will be described later, the thin metal plate 29 having a thickness of about 0.08 mm to 0.15 mm for forming the ground layer 40 is an iron-based alloy containing at least one of nickel, chromium, cobalt, and aluminum, or the iron Examples thereof include iron-based composites obtained by applying copper clad to a base alloy, tungsten, copper, molybdenum, tantalum, nickel, and aluminum. Since the semiconductor chip to be connected is based on a low thermal expansion material such as silicon, it is desirable that the thermal expansion coefficient of the probe wiring board is also small. In particular, this characteristic is essential for use in so-called burn-in inspection in which a semiconductor chip is connected in a heated state. Therefore, invar (iron-36 wt% nickel alloy), the above-described 42 alloy (iron-42 wt% nickel alloy) or the like is desirable. Moreover, since copper and aluminum have low electric resistance, it is advantageous when this is used as a ground layer, and is excellent in corrosion resistance.
[0048]
Next, the 42 alloy sheet 29, which is a thin metal plate, is removed by etching so as to form an opening in the vicinity of the pad portion in the wiring 48, whereby the remaining 42 alloy sheet is used. T A land layer 40 is formed. Next, run On top of layer 40 and run A polyimide film 32 b as an insulating layer having a thickness of about 100 to 170 μm thicker than the thickness of the 42 alloy sheet 29 is formed on the adhesive sheet 28 between the conductive layers 40.
[0049]
next, Gran As the protective polyimide film 27, the adhesive sheet 28, and the insulating layer in the opening of the 42 alloy sheet without exposing the layer 40 of A small diameter hole 34b of about 20 to 80 μm reaching the pad on the wiring 48 is formed in the polyimide film 32b by the same processing method as the above-described through hole 34a. Next, a plating film such as copper is applied to the inside of the hole 34b and the surface of the polyimide film 32b, and patterned to form a third layer wiring portion 39, with a contact terminal portion formed on the silicon wafer 20 probe A wiring board 35 is obtained. In FIG. 4E, the signal contact terminal portion 47 has a conductor portion (via) embedded in a fine through hole 34a formed in the insulating layer 32a made of a polyimide film by plating such as copper. Through the one-layer wiring portion 48, the pads of the first-layer wiring portion 48, the protective polyimide film 32, the adhesive sheet 28, and the minute through-hole 34b formed in the insulating layer 32b made of the polyimide film are made of copper or the like. The case where it connects with the wiring 39 of the 3rd layer which has the conductor part (via | veer) embedded by plating is shown. In short, the third-layer wiring 39 is connected to the pad of the first-layer wiring portion by the conductor portion (via) embedded in the minute through hole 34b. As a result, a gutter formed by opening a thin metal plate 29 having a thickness of 0.08 mm to 0.15 mm. run The layer 40 is surrounded by the first layer wiring portion 48, the conductor portion (via) embedded in the through hole 34b, and the third layer wiring portion 39, and the high-speed signal characteristics of the signal line (about 100 MHz to several tens GHz) (High frequency) can be greatly improved. As shown in FIG. 10 and FIG. 11, the third-layer wiring 39 or the first-layer wiring 48 may be used as the lead-out wiring to be drawn out to the periphery.
[0050]
In addition, the ground contact terminal portion 47 is formed of a fine through hole 3. 4 a through the fine through hole from the pad of the first wiring part. run Connected to the layer 40.
[0051]
Next, when the probe wiring board 35a is used, for example, as a connection device shown in FIG. 12, as described in Japanese Patent Laid-Open Nos. 10-308423 and 11-23615, the third layer Around the surface of the wiring 39 Part 352 Next, the metal frame 45 is aligned and insulated with an adhesive to be bonded and fixed. Desirably, a protective polyimide film (not shown) is formed on the surface of the third layer wiring so that the surface is flat, and the periphery of the protective polyimide film surface. Part 352 Next, the metal frame 45 is aligned and fixed. Next, a silicone-based coating material is supplied into the frame 45 as the buffer layer 46. The role of the buffer layer 46 is to alleviate the impact as a whole when the tips of the multiple contact terminals 47a come into contact with the electrodes 3 arranged on the semiconductor wafer 1, and the height of the tips of the individual contact terminals 47a is ±. This is because the variation of about 2 μm or less is absorbed by local deformation, and the contact by uniform biting is performed following the variation of about ± 0.5 μm of the height of each electrode 3 arranged on the semiconductor wafer 1. . However, the buffer layer 46 is not necessarily required as long as the variation in the height of the tip of the contact terminal 47a can be about ± 0.5 μm or less.
[0052]
Next, the holding member 43 is screwed to the frame 45 with screws 56. Next, the silicon wafer 20 on which the probe wiring board 35 in which the pressing member 43 is screwed to the frame 45 is formed on a stainless steel fixing jig (not shown) for etching the silicon wafer 20 as a mold material. And a stainless steel lid (not shown) through an O-ring.
[0053]
Next, the fixing jig made of stainless steel is put into a 90-degree potassium hydroxide aqueous solution, and the silicon wafer 20 is removed by etching. Next, the silicon dioxide film 21 and the chromium film and the copper film as the base film 22 are removed by sequentially immersing them in a mixed solution of hydrofluoric acid and ammonium fluoride, a potassium permanganate solution, and a copper etching solution. As a result, the first embodiment 35a of the probe wiring board having the cross-sectional shape shown in FIG. 4E is obtained.
[0054]
In the first embodiment 35a thus fabricated, a large number of fine contact terminals 47a having a height of about 15 μm and a bottom surface angle of about 20 μm are arranged at a narrow pitch (for example, 30 μm or less) in accordance with the arrangement of the electrodes of the semiconductor chip. As shown in FIG. probe Embedded in the insulating layer 32a below the wiring board 35 for use. A large number of arranged contact terminal portions 47 for signals are provided as lead wires through the first wiring layer or the first wiring layer serving as lead wires through fine through holes formed in a plurality of insulating layers. It is electrically connected to the third wiring layer. Also, run The contact terminals for the terminals are connected to the first layer wiring section through the minute through holes, and the pads of the first layer wiring section are connected to the minute through holes. - It is connected to the ground layer through a hole.
[0055]
According to the first embodiment described above, the adhesion between the polyimide film 32a and the silicon wafer 20 can be increased by the base film 22 made of chromium, copper, etc. Swelling could be suppressed. In addition, a group consisting of a thin metal plate such as a 42 alloy sheet having a thickness of about 0.08 mm to 0.15 mm. run The in-plane position of the contact terminal can be maintained with high accuracy by the layer 40. Furthermore, by using a metal thin plate such as 42 alloy sheet to form an opening by etching and using it as the ground layer 40, the high-speed signal characteristics (high frequency of about 100 MHz to several tens GHz) of the signal line can be greatly improved. .
[0056]
<Second embodiment of wiring board for probe>
A manufacturing process of the second embodiment of the probe wiring board used in the connection device according to the present invention is shown in FIG.
[0057]
FIGS. 5A and 5B are the same as FIGS. 4A and 4B.
[0058]
In the second embodiment, the first difference from the first embodiment is that first, nickel plating, which is a hard metal, is first applied to the resist opening pattern portion using the base film 22 as a seed film, and copper is then formed thereon. The point is that the resist is removed by filling the plating and performing pattern separation to form the first layer wiring 48 with the contact terminal portion 47. The first layer wiring portion 48 with the contact terminal portion is formed with a resist opening pattern for the contact terminal portion and filled with nickel plating, and a resist opening pattern for the first layer wiring portion is formed with copper plating. It is also possible to fill and connect them in the same layer. Thus, in the second embodiment, the wiring of the first layer is connected to the contact terminal portion 47 in substantially the same layer. In addition, the first layer wiring Third-layer wiring portion 39 composed of a conductor portion (via) connected to the top Position of This is because it is desired to separate the contact terminal portion 47 from the contact terminal portion 47 in a plan view. As a result, for example, as shown in FIG. 7, the elastic resin 38 or the like can be disposed directly above the contact terminal portion 47.
[0059]
Next, a second point different from the first embodiment is that there is no protective polyimide film on the first layer wiring 48 with the contact terminal portion 47 and between the first layer wirings 48, for example, 42 alloy sheet 29 having a thickness of about 0.08 mm to 0.15 mm as a thin metal plate is laminated and bonded through a low melting point adhesive sheet 28 based on polyimide such as SPB-A manufactured by Nippon Steel Chemical Co., Ltd. There is in point to do. As a result, the cross-sectional shape shown in FIG. 5C is obtained. As the metal thin plate 29, other materials described in the first embodiment can also be used.
[0060]
The subsequent steps are the same as in the first embodiment. In other words, in the thin metal plate 29, the vicinity of the pad portion in the wiring 48 is removed by etching and opened. run A polyimide layer 32b having a thickness of about 15 μm and serving as an insulating layer is formed thereon. Next, a through-hole forming mask 33 is formed on the polyimide film 32b. G run The through hole 34b reaching the pad on the wiring 48 is formed in the same manner as in the first embodiment so that the exposed layer 40 is not exposed. As a result, the cross-sectional shape shown in FIG. 5D is obtained.
[0061]
Next, the mask 33 is removed by dipping in an aqueous sodium hydroxide solution. Next, copper or the like is plated on the polyimide film 32b including the side wall of the through hole 34b and patterned to form a third-layer wiring portion 39. Of course, it is preferable to use the third layer wiring portion 39 as the lead-out wiring.
[0062]
Next, when the probe wiring board 35b is used as, for example, the connecting device shown in FIG. 12, as described in Japanese Patent Laid-Open Nos. 10-308423 and 11-23615, the third layer Around the surface of the wiring 39 Part 352 Next, the metal frame 45 is aligned and insulated with an adhesive to be bonded and fixed. Desirably, a protective polyimide film (not shown) is formed on the surface of the third layer wiring so that the surface is flat, and the periphery of the protective polyimide film surface. Part 352 Next, the metal frame 45 is aligned and fixed. Next, a silicone-based coating material is supplied into the frame 45 as the buffer layer 46. Then, the holding member 43 is screwed to the frame 45 with screws 56. Next, it mounts | wears with the stainless steel fixing jig (not shown) for etching the silicon wafer 20 which is a mold material similarly to the first embodiment.
[0063]
Next, as in the first embodiment, the stainless steel fixing jig is put into a 90-degree potassium hydroxide aqueous solution, the silicon wafer 20 is etched away, and a silicon dioxide film and a base film are formed. Remove the chromium film and the copper film. As a result, the second embodiment 35b of the probe wiring board having the cross-sectional shape shown in FIG. 5E is obtained.
[0064]
According to the second embodiment 35b, the same effects as those of the first embodiment can be obtained, the protective polyimide film forming step can be eliminated, and the through hole forming step can be further reduced.
[0065]
<Third Example of Probe Wiring Board>
A manufacturing process of the third embodiment of the probe wiring board used in the connection device according to the present invention is shown in FIG.
[0066]
In the third embodiment, the first difference from the first embodiment is that a contact terminal portion 47 is formed on the single crystal silicon wafer 20 as shown in FIGS. 6 (a) and 6 (b). There is. A second difference from the first embodiment is that a probe wiring board is separately formed on a glass substrate 36 as shown in FIGS. 6C to 6E. Is to remove. Further, a third point different from the first embodiment is that, as shown in FIG. 6 (f), the contact terminal portion 47 made separately and the through-hole conductor portion on the bottom surface of the probe wiring board are connected. The third embodiment 35c is completed by fixing by solder bonding and then peeling off the silicon wafer 20 at the interface between the silicon dioxide film 21 and the base film 22 and removing the base film.
[0067]
That is, in FIGS. 6A and 6B, the process is the same as that of the first embodiment until the contact terminal portion 47 is formed. However, a gold film was used as the base film 22.
[0068]
Separately, a polyimide film 32a having a thickness of about 15 μm serving as an insulating layer is formed on the glass substrate 36 as in the first embodiment, and a mask 33 made of an aluminum film for forming a through hole is formed on the polyimide film 32a. Form. Using this as a mask, a through hole 34a is formed in the polyimide film 32a by laser processing or the like, as in the first embodiment. As a result, the cross-sectional shape shown in FIG.
[0069]
Thereafter, as in the first embodiment, the mask 33 is removed by dipping in an aqueous sodium hydroxide solution. Thereafter, similarly to the first embodiment, a chromium and copper film is sequentially laminated on the polyimide film 32a including the sidewall of the through hole 34a by sputtering, and this is used as a seed film, and resist patterning is performed by a so-called semi-additive method. Then, a first layer wiring portion 48 is formed through copper plating and pattern separation, and a protective polyimide film 27 is formed thereon.
[0070]
A copper plate 19 having a thickness of about 0.08 mm to 0.15 mm as a metal thin plate obtained by etching a portion corresponding to the pad portion in the wiring portion 48 of the first layer (etching). run Layer 40) and the low melting point adhesive sheet 27 are separately laminated and bonded to the protective polyimide film 27. As a result, the cross-sectional shape shown in FIG.
[0071]
As in the first embodiment, a polyimide film 32b serving as an insulating layer is formed thereon, and the run In order to prevent the exposed layer 40 from being exposed, a small-diameter hole 34b reaching the pad on the first-layer wiring portion 48 is formed in the adhesive sheet 28 and the polyimide layer 32b in the opening of the copper plate in the same manner as the through-hole 34a. Open using the method. Next, the hole 34b and the surface of the polyimide film 32b are plated with copper or the like and patterned to form a third-layer wiring portion 39 to obtain an inspection wiring board. The lead-out wiring may be either the third-layer wiring section 39 or the first-layer wiring section 48.
[0072]
Thereafter, in order to separate the inspection wiring board from the glass substrate 36, the glass substrate 36 is removed by etching by immersion in a mixed solution of hydrofluoric acid and ammonium fluoride. At this time, it is necessary to seal the probe wiring board with a jig or the like so as not to be affected by the mixed solution.
[0073]
Next, a solder 37 having a thickness of about 3 μm is formed on the bottom through-hole conductor portion (first-layer wiring portion 48) by plating. As a result, an inspection wiring board having a cross-sectional shape shown in FIG.
[0074]
Next, the nickel contact terminal 47 with silicon wafer and the 37 solder portions on the bottom surface of the probe wiring board are brought into contact with each other and heated to fix the solder.
[0075]
Next, when the probe wiring board 35c is used as, for example, the connection device shown in FIG. 12, the periphery of the surface of the third layer wiring 39 is used. Part 352 Next, the metal frame 45 is aligned and insulated with an adhesive to be bonded and fixed. Desirably, a protective polyimide film (not shown) is formed on the surface of the third layer wiring so that the surface is flat, and the periphery of the protective polyimide film surface. Part 352 Next, the metal frame 45 is aligned and fixed. Next, a silicone-based coating material is supplied into the frame 45 as the buffer layer 46. Then, the holding member 43 is screwed to the frame 45 with screws 56. Next, it mounts | wears with the fixing jig made from stainless steel (not shown) for etching the silicon wafer 20 which is a type | mold material similarly to the 1st and 2nd Example.
[0076]
Next, the silicon wafer 20 is peeled off at the interface between the silicon dioxide film 21 and the base film 22, and the base film 22 made of a gold film is removed to complete the third embodiment 35c.
[0077]
According to the third embodiment 35c thus manufactured, the same operational effects as those of the first embodiment can be obtained. Further, since the base film 22 is made of a gold film, the silicon dioxide film 21 and the probe wiring board can be easily separated. Further, by cleaning the silicon wafer 20 and repeating the formation of the base film 22 with the gold film, it can be used as a mold material for forming a new contact terminal portion.
[0078]
According to the first to third embodiments described above, the contact terminals 47a have a fine and narrow pitch, and as shown in FIG. 4 (e), FIG. 5 (e), and FIG. run The wiring layer 40 is formed so as to be surrounded by the third-layer wiring portion 39 including the contact terminal portion 47, the first-layer wiring portion 48, and the conductor portion (via) filled in the through hole. Thus, the high-speed signal characteristics of the signal line can be greatly improved, and the metal layers 29 and 19 that are laminated and bonded are opened to form the ground layer 40. As a result, the effect of maintaining the in-plane position of the contact terminal with high accuracy is obtained. Furthermore, if invar (iron-36 wt% nickel alloy), 42 alloy (iron-42 wt% nickel alloy), or the like is used as the metal thin plate 29, it is possible to sufficiently cope with the burn-in test.
<Fourth Example of Probe Wiring Board>
FIG. 7 shows a fourth embodiment of the probe wiring board used in the connection device according to the present invention. The fourth embodiment is a probe in which an elastic resin 38 is arranged on a protective polyimide film 27 in which a thin metal plate 29 in the vicinity of the contact terminal portion 47 is opened in order to apply a load to make contact with a semiconductor chip. This is a wiring board 35d. (Fig. 7 (a))
In the manufacturing process of the fourth embodiment, first up to the lamination adhesion of the 42 alloy sheet 29 as a metal thin plate is carried out by the same method as described in the first embodiment. Next, the 42 alloy sheet 29 in the vicinity of the contact terminal portion 47 in a plane is removed by etching, and an elastic resin 38 such as a silicone rubber adhesive is printed on the etched portion, so that a fourth embodiment 35d is obtained. Is obtained.
[0079]
Next, when the probe wiring board 35d is used as, for example, a connection device shown in FIG. 12, a protective polyimide film (not shown) is formed on the surface of the 42 alloy sheet 29 so that the surface becomes flat. . Next, the metal frame 45 is aligned and fixed to the surface of the protective polyimide film. Then, the holding member 43 is screwed to the frame 45 with screws 56. Next, as in the first and second embodiments, the silicon wafer 20 as a mold material is mounted on a stainless steel fixing jig (not shown). Thereafter, similarly to the first embodiment, the silicon wafer is removed by etching, and further, the chromium dioxide film and the copper film which are the silicon dioxide film 21 and the base film 22 are removed.
[0080]
Made in this way For probe An upper view of the device 35d is shown in FIG. A 42 alloy sheet is disposed so as to surround the contact terminal 47a disposed on the quadrangular side, and an elastic resin 38 is disposed immediately above the contact terminal. From the above, the in-plane positional accuracy could be accurately fixed by the 42 alloy sheet. Further, by pressing the protruding portion 43a of the pressing member 43 to push out the elastic resin 38, stable contact characteristics could be obtained. Such a connection device can increase the number of connection terminals, expand the contact area, and collectively connect to terminals of a plurality of chips.
[0081]
<Fifth Example of Probe Wiring Board>
As shown in FIG. 8, the fifth embodiment is a multi-layered wiring structure 35e of the probe wiring board manufactured according to the fourth embodiment.
[0082]
The manufacturing process of the fifth embodiment is the same as that of the first embodiment. After the third layer wiring portion 39 is formed, the metal thin plate 29 is opened immediately above the contact terminal portion 47. A probe wiring board 35e is obtained by printing an elastic resin 38 such as a silicone rubber-based adhesive on the insulating layer 32b. The subsequent steps are the same as in the fourth embodiment.
[0083]
35e produced in this way can obtain the same effects as those of the fourth embodiment.
[0084]
<Sixth embodiment of wiring board for probe>
In the sixth embodiment, as shown in FIG. 9, after the third layer wiring portion 39 is formed, the first layer wiring layer is formed on the insulating layers 27, 28, and 32b immediately above the contact terminal portion 47. Holes are processed with a laser up to 48 surfaces. This hole may or may not reach the first wiring layer 48. The probe wiring board 35f is obtained by printing an elastic resin 38 such as a silicone rubber adhesive in the hole. The subsequent steps are the same as in the fourth and fifth embodiments.
[0085]
In addition to the fifth embodiment, 35f produced in this way has contact characteristics equivalent to those of the fifth embodiment even at a lower load because the elastic resin 38 is formed closer to the contact terminal. A wiring board for probes could be created.
[0086]
In the first to sixth embodiments described above, the opened metal thin plate is connected to the ground and described as the ground layer 40. However, it may be configured to be electrically floated without being connected to the ground.
[0087]
Next, a semiconductor chip inspection apparatus or a semiconductor chip manufacturing apparatus using the connection apparatus provided with the probe wiring board manufactured according to the first to sixth embodiments will be described.
[0088]
The arrangement of the contact terminals on the probe wiring board 35 and the wiring on the probe wiring board are variously configured in accordance with the arrangement of an object to be inspected, for example, an electrode pad of a semiconductor chip. 10 and 11 show an overall embodiment of these 35. FIG. 10 (a) is a plan view showing a seventh embodiment of the whole 35, and FIG. 10 (b) is a perspective view showing a state in which the probe wiring board 35 provided with the wiring is bent. . FIG. 11A is a plan view showing an eighth embodiment of the whole 35, and FIG. 11B is a perspective view showing a state in which the probe wiring board 35 is bent. In these figures, the number of contact terminals and wirings is reduced for the sake of simplicity of illustration and description, and the density is reduced. In practice, a larger number of contact terminals are provided and arranged at high density.
[0089]
As shown in FIGS. 10A and 10B and FIGS. 11A and 11B, the connection device includes, for example, a probe wiring board having a polyimide film as a base material to be inspected. A contact terminal 47a arranged at a position corresponding to the electrode pad 3 is connected to one end, and the other end is an electrode 51 provided on the peripheral portion of the probe wiring board, and wiring 48 or 39 for connecting them is formed. ing. The wiring 48 or 39 can be wired in various ways. For example, each wiring can be drawn out in one direction, or can be wired radially. Specifically, in the first embodiment shown in FIGS. 10A and 10B, the probe wiring board is formed in a rectangular shape, and the electrodes 51 are arranged at both ends. In the second embodiment shown in FIGS. 11A and 11B, the probe wiring board is formed in a square shape, and wirings 48 or 39 are provided up to the electrodes 51 provided on each side of the square.
[0090]
The connection device for transmitting an electrical signal to the inspection apparatus main body is shown in FIG. 10A or FIG. 11A when the object to be inspected is an electrode pad on the surface of a semiconductor chip formed on a wafer. As described above, the contact terminal forming mold material 102 such as a silicon wafer that is slightly larger than the region 101 of the wafer on which the semiconductor chip is formed is manufactured by the methods of the first to sixth embodiments. In FIG. 10B or FIG. 11B, the region 101 where the contact terminals 47a are formed is bent so as to be surrounded by a polygon.
[0091]
In the present embodiment, the case is shown in which the object to be inspected contacts the electrode pads of all the semiconductor chips formed on the wafer in a lump. However, the present invention is not limited to this. For example, the probe wiring board may be manufactured in an area smaller than the wafer size as a connection device for inspecting semiconductor chips individually or simultaneously with any number of semiconductor chips.
[0092]
FIG. 12 is a diagram showing a main part of a form in which the connection device including the probe wiring board 35 according to the present invention is incorporated into an inspection connection system. The upper fixed plate 40 and the center pivot 41 that is fixed to the upper fixed plate 40 and has a spherical surface 41a at the lower portion and the center pivot 41 are arranged symmetrically in the left and right and front and rear directions. The spring probe 42 which is a pressing force applying means for applying a force to the center pivot 41 and the spring probe 42 is held so as to be tiltable by an inclination 43c, so that a pressing force with a low load (about 3 to 50 mN per pin) is applied. The pressing member 43 to be applied, the probe wiring board 35, and the back surface of the probe wiring board 35 Peripheral part A frame 45 fixed to 352, a buffer layer 46 or an elastic resin 38 provided between the probe wiring board 35 and the pressing member 43, and a contact terminal portion 47 provided on the probe wiring board 35. . The reason why the pressing force against the pressing member 43 is applied by the spring probe 42 is that a pressing force with a substantially constant low load with respect to the displacement of the tip of the spring probe 42 is obtained. It is not necessary to use the probe 42. That is, a compliance mechanism having a low load per pin is formed by the relationship between the center pivot (pressing member support shaft) 41 and the pressing member 43 and the spring probe 42 arranged symmetrically. The tip of the contact terminal 47a follows the surface 3a of the electrode 3 for one or a large number of semiconductor elements, and parallelism is performed.
[0093]
The upper fixing plate 40 is mounted on the support wiring board 50. The support wiring substrate 50 is made of, for example, a resin material such as polyimide resin or glass epoxy resin, and includes internal wiring 50b and connection terminals 50c. The electrode 50a is composed of, for example, a via 50d connected to a part of the internal wiring 50b. The support wiring board 50 and the probe wiring board 35 are fixed using, for example, screws 54 and the like, with the support wiring board 50 and the probe wiring board 35 sandwiched between the pressing members 53. The probe wiring board 35 is formed so that the peripheral edge extends outside the frame 45, and the extension is smoothly bent outside the frame 45 and fixed on the support wiring board 50. At that time, the wiring 48 or 39 of the probe wiring board 35 is electrically connected to the electrode 50 a provided on the support wiring board 50. For this connection, for example, the electrode 51 and the electrode 50a are directly brought into contact with each other, or are connected using an anisotropic conductive sheet 52 or solder.
[0094]
The buffer layer 46 is preferably a substance having elasticity, and an example of a polymer material having rubber-like elasticity is silicon rubber. The buffer layer 46 may be configured such that the pressing member 43 is movably sealed with respect to the frame 45 and gas is supplied to the sealed space. Further, if the height of the contact terminal 47a can be made uniform, the buffer layer 46 may be omitted. In FIG. 12, for the sake of simplicity of explanation, only two contact terminals 47 and wirings 48 or 39 are shown, but a plurality of contact terminals are actually arranged.
[0095]
The connection device according to the present invention oxidizes the surface of one or a plurality of semiconductor chips arranged in parallel in the wafer state at the same time with a low load (about 3 to 50 mN per pin). The object is to reliably connect the electrode pad 3 such as aluminum or solder on which an object is formed with a stable low resistance value of about 0.05 to 0.1Ω. Accordingly, it is not necessary to perform a scribe operation as in the prior art, and it is possible to prevent generation of indentations and electrode material scraps due to the scribe operation. That is, in the probe wiring board 35, the tips of the contact terminals 47a arranged in parallel so as to correspond to the arrangement of the electrode pads 3 are sharpened, and the peripheral portion 352 is supported with respect to the peripheral portion 352 supported by the frame 45. A buffer layer 46 or an elastic resin is formed by following an area 351 in which the above-mentioned contact terminal portions 47 are arranged side by side with a lower surface 43b in which a high-precision flatness is secured in a protruding portion 43a formed below the pressing member 43. 38, the probe wiring board itself is slackened, and the pointed tip of the contact terminal 47a arranged in parallel with the protruding region 351 is perpendicular to the electrode pad 3 such as aluminum or solder. By pressing with a low load, the oxide formed on the surface of the electrode pad 3 is easily broken and brought into contact with the metal conductor material of the electrode on the lower surface, and a stable low resistance value is good. It is possible to ensure the Do contact. In particular, a region portion 351 in which a large number of contact terminal portions 47 in the peripheral portion 352 are arranged side by side with respect to the peripheral portion 352 supported by the frame 45 is formed in the protruding portion 43 a formed below the pressing member 43. By squeezing and overhanging the buffer layer 46 or the elastic resin 38 following the lower surface 43b in which high-precision flatness is ensured, the sagging of the probe wiring board itself is eliminated, and the flatness of the tips of the numerous contact terminals 47 is reduced. The purpose is to ensure high accuracy in accordance with the flatness of the lower surface 43b of the protrusion 43a. The overhang amount in the region portion 351 is determined by the amount of protrusion of the screw 57 that can be adjusted by being fastened to the pressing member 43 left and right and back and forth around the center pivot 41 from the lower surface of the pressing member 43. That is, by tightening the screw 56 inserted in the hole formed in the pressing member provided on the left and right and front and rear with the center pivot 41 as the center, the projecting portion 43a of the pressing member 43 is lowered. The lower end of the screw 57 attached to the pressing member 43 with a protruding amount is brought into contact with the upper surface of the frame 45 bonded and fixed to the peripheral portion 352 of the region portion 351 in the probe wiring board 35. As a result, the region portion 351 in which a large number of contact terminals 47 are juxtaposed through the buffer layer 46 or the elastic resin 38 protrudes, and the sagging of the probe wiring board itself is eliminated. As described above, the flatness of the pointed tip of the contact terminal over the many contact terminals 47a can be ensured with high accuracy of about ± 2 μm or less. In addition, JP-A-2002-139554 describes some inspection connection systems in addition to these, and any of these systems may be used.
[0096]
An electrical property test for a semiconductor chip to be inspected using the connection device according to the present invention will be described with reference to FIG. FIG. 13 is a diagram showing the overall configuration of the inspection apparatus according to the present invention. The inspection apparatus is configured as a wafer connection apparatus in the manufacture of a semiconductor device. The inspection apparatus controls operations of a sample support system 160 that supports the semiconductor wafer 1, an inspection connection system 120 that makes contact with the electrode pads 3 of the object 1 to be inspected and transmits and receives electrical signals, and the sample support system 160. The drive control system 150 includes a temperature control system 140 that controls the temperature of the test object 1 and a tester 170 that tests the electrical characteristics of the semiconductor chip 2. A large number of semiconductor chips 2 are arranged on the semiconductor wafer 1, and a plurality of fine electrode pads 3 for connection to the outside are arranged at a narrow pitch on the surface of each semiconductor chip 2. The sample support system 160 includes a sample stage 162 provided almost horizontally for placing the semiconductor wafer 1, a lifting shaft 164 disposed vertically to support the sample stage 162, and the lifting shaft 164. It is comprised by the raising / lowering drive part 165 which raises / lowers, and the XY stage 167 which supports this raising / lowering drive part 165. The XY stage 167 is fixed on the housing 166. The raising / lowering drive part 165 is comprised from a stepping motor etc., for example. The sample table 162 is provided with a rotation mechanism, and the sample table 162 can be rotated in a horizontal plane. The positioning operation of the sample stage 162 is performed by combining the operations of the XY stage 167, the lift drive unit 165, and the rotation mechanism.
[0097]
An inspection connection system 120 is disposed above the sample stage 162. That is, the probe wiring board 35 and the support wiring board 50 shown in FIG. 12 are provided in a posture facing the sample stage 162 in parallel. In the present embodiment, the terminal 50c is a coaxial connector. The tester 170 is connected via a cable 171 connected to the terminal 50c.
[0098]
The drive control system 150 is connected to the tester 170 via the cable 172. The drive control system 150 sends a control signal to each drive unit of the sample support system 160 to control its operation. That is, the drive control system 150 includes a computer inside, and controls the operation of the sample support system 160 in accordance with the progress information of the test operation of the tester 170 transmitted via the cable 172. Further, the drive control system 150 includes an operation unit 151, and accepts input of various instructions related to drive control, for example, manual operation instructions.
[0099]
The sample stage 162 is provided with a temperature controller 141 for heating in order to perform a burn-in test on the semiconductor chip 2. The temperature control system 140 controls the temperature of the semiconductor wafer 1 mounted on the sample table 162 by controlling the temperature controller 141 of the sample table 162. Further, the temperature control system 140 includes an operation unit 151 and receives a manual operation instruction related to temperature control.
[0100]
Hereinafter, the operation of the inspection apparatus will be described. The semiconductor wafer 1 to be inspected is positioned and placed on the sample table 162. Optical images of a plurality of reference marks formed separately on the semiconductor wafer 1 are picked up by an image sensor or an imaging device such as a TV camera, and the positions of the plurality of reference marks are detected from the obtained image signals. From the detected reference mark position information, the arrangement information of the semiconductor chip 2 and the arrangement information of the electrode pads 3 on the semiconductor chip 2 are recognized according to the type of the semiconductor wafer 1, and the two-dimensional as a whole electrode pad group is recognized. Calculate location information.
[0101]
Further, among a large number of contact terminals 47a formed on the probe wiring board 35, an optical image of a specific contact terminal, or probe Optical images of a plurality of reference marks formed separately on the wiring board 35 are picked up by an imaging device such as an image sensor or a TV camera, and the positions of specific contact terminals or the plurality of reference marks are detected. Based on these pieces of information, two-dimensional position information as the entire contact terminal group is calculated.
[0102]
The drive control system 150 calculates a deviation amount of the two-dimensional position information as the whole electrode pad group with respect to the two-dimensional position information as the whole contact terminal group, and based on the deviation amount, the XY stage 167 and the rotation. A group of electrode pads 3 formed on a plurality of semiconductor chips arranged on the semiconductor wafer 1 is controlled by driving the moving mechanism. Probe wiring board 35 is positioned immediately below a group of a large number of contact terminals 47 arranged in parallel. Thereafter, the drive control system 150, for example, based on the distance between the surface of the region portion 351 on the probe wiring board 35 and the semiconductor wafer 1 measured by the gap sensor installed on the sample stage 162, the elevation drive unit 165. The sample stage 162 is raised until the entire surface 3a of the large number of electrode pads 3 comes into a state of being pushed up by about several μm from the point in time when it contacts the tip of the contact terminal. FIG. 14 shows an external appearance of an inspection performed on a semiconductor chip on which electrode pads are arranged in parallel by a semiconductor inspection apparatus.
[0103]
As a result, the entirety of the large number of contact terminals 47a is made parallel to follow the entire surface 3a of the large number of electrode pads 3, and the variation in height of the individual contact terminals is absorbed by the buffer layer 46 or the elastic resin 38. In addition, contact by biting based on a low load (about 3 to 50 mN per pin) is performed, and each contact terminal 47a and each electrode pad 3 are connected with low resistance (0.01Ω to 0.1Ω). Become.
[0104]
When the burn-in test is performed on the semiconductor chip 2 in this state, the temperature control system 140 controls the temperature regulator 141 of the sample stage 162 to control the temperature of the semiconductor wafer 1 mounted on the sample stage 162. Is done. Therefore, the wiring board for probes is flexible and preferably formed mainly from a heat-resistant resin. In this example, polyimide resin was used.
[0105]
Through the cable 171, the supporting wiring board 50, the probe wiring board 35, and the contact terminal portion 47, the operation power and the operation test signal are exchanged between the semiconductor chip formed on the semiconductor wafer 1 and the tester 170. To determine whether or not the electrical characteristics of the semiconductor chip are acceptable. The above series of operations is performed for each of the plurality of semiconductor chips formed on the semiconductor wafer 1 to determine whether or not the electrical characteristics are acceptable.
[0106]
【The invention's effect】
According to the present invention, an indentation or debris can be obtained by simply pressing a group of contact terminals with a small contact pressure (about 3 to 50 mN per pin) on a narrow pitch and high density electrode pad accompanying high integration of a semiconductor chip. There is an effect that it is possible to realize a stable connection with a low resistance of about 0.05Ω to 0.1Ω without damaging or the like.
[0107]
In addition, according to the present invention, a large number of connection terminals can be easily arranged on the inspection wiring board, and one or many semiconductor chips among the many semiconductor chips arranged on the wafer are arranged. Thus, it is possible to reliably connect the electrode pads simultaneously and to evaluate the electrical characteristics of each semiconductor chip. Furthermore, there is an effect capable of enabling transmission of a high-frequency electric signal (100 MHz to several tens GHz high frequency). In addition, it is possible to evaluate the electrical characteristics of a semiconductor chip with a high density and a narrow pitch, such as being able to evaluate electrical characteristics at a high temperature such as a burn-in test.
[Brief description of the drawings]
FIG. 1 is a perspective view showing a wafer, which is an inspection object on which semiconductor chips are arranged, and a perspective view showing semiconductor chips.
FIG. 2 is an explanatory diagram showing a taper angle in a through hole.
3A is an explanatory view showing a state of spatter failure for a through hole having a taper angle exceeding 90 degrees, and FIG. 3B is an explanatory view showing a state of plating failure for a through hole having a taper angle exceeding 90 degrees. .
FIG. 4 is an explanatory view showing a manufacturing process of the first embodiment of the probe wiring board according to the present invention.
FIG. 5 is an explanatory view showing a manufacturing process of a second embodiment of the probe wiring board according to the present invention.
FIG. 6 is an explanatory view showing a manufacturing process of a third embodiment of the probe wiring board according to the present invention.
7A and 7B are explanatory views showing a fourth embodiment of the probe wiring board according to the present invention, wherein FIG. 7A is a sectional view and FIG. 7B is a top view.
FIG. 8 is an explanatory view showing the structure of a fifth embodiment of the probe wiring board according to the present invention.
FIG. 9 is an explanatory view showing the structure of a sixth embodiment of the probe wiring board according to the present invention.
FIG. 10A is a plan view showing a seventh embodiment showing an entire probe wiring board according to the present invention, and FIG. 10B is a perspective view thereof.
11A is a plan view showing an eighth embodiment showing the entire probe wiring board according to the present invention, and FIG. 11B is a perspective view thereof.
FIG. 12 is an explanatory view showing a main part of a form in which a probing apparatus including a probe wiring board according to the present invention is incorporated in an inspection connection system.
FIG. 13 is an explanatory diagram for conducting a characteristic inspection of a semiconductor element by a tester using a probing apparatus including a probe wiring board according to the present invention.
FIG. 14 is an explanatory view showing an appearance of an inspection for a semiconductor chip having electrode pads arranged in parallel by the semiconductor inspection apparatus according to the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Wafer, 2 ... Semiconductor chip (semiconductor element), 3 ... Electrode pad, 10 ... Excimer laser beam, 11 ... Laser optical axis, 12 ... Laser optical axis vertical surface, 13 ... Laser processing metal film mask, 14 ... Polyimide Membrane, 15 ... wiring layer, 16 ... taper angle, 19 ... copper plate (Metal sheet) , 20 ... Silicon wafer, 21 ... Silicon dioxide film, 22 ... Undercoat film, 23 ... Sputtered film, 24 ... Sputtered film non-formed part, 25 ... Plating film, 26 ... Unplated part, 27 ... Protective polyimide film, 28 ... low melting point adhesive sheet, 29 ... 42 alloy sheet (metal thin plate), 30 ... silicon dioxide film, 31 ... square pyramid shaped holes, 32, 32a, 32b ... polyimide film (insulating layer), 33 ... aluminum film (mask), 34, 34a, 34b ... through hole, 35, 35a-35f ... Probe wiring board 36 ... Glass substrate, 37 ... Solder, 38 ... Elastic resin, 39 ... Wiring (third layer wiring part), 40 ... Upper fixing plate, 41 ... Center pivot, 41a ... Lower spherical surface, 42 ... Spring probe, 43 ... Holding member, 43a ... projection, 43b ... lower surface, 43c ... tilt, 351 ... region, 352 ... peripheral part, 45 ... frame, 46 ... buffer layer, 47 ... contact terminal, 47a ... contact terminal, 48 ... wiring ( First wiring layer), 50 ... support wiring board, 50a ... electrode, 50b ... internal wiring, 50c ... connection terminal, 50d ... via, 51 ... electrode, 52 ... anisotropic conductive sheet, 53 ... pressing member, 54 ... Screw, 56 ... Screw, 57 ... Screw, 101 ... Semiconductor chip side-by-side region on wafer, 102 ... Contact terminal forming mold, 103 ... Slit, 120 ... Inspection connection system, 140 ... Temperature control system, 141 ... Temperature 150, drive control system, 151, operation unit, 160, sample support system, 162, sample stage, 164, elevating shaft, 165, elevating drive unit, 166, housing, 167, XY stage, 170 ... Tester, 171 ... cable, 172 ... cable.

Claims (9)

A probe wiring board for inputting / outputting an electric signal to / from the inspection object by bringing a contact terminal group arranged in a probing side region corresponding to the electrode group into contact with the electrode group arranged on the inspection object There,
A first wiring layer having a plurality of first wiring portions electrically connected to each contact terminal portion of the contact terminal group, and a first wiring layer formed by sandwiching the first wiring layer and the second insulating layer 2nd wiring layer which has two wiring parts, and 2nd through | through which is provided in the said 2nd insulating layer and electrically connects each said 1st wiring part and each said 2nd wiring part A hole conductor, and a metal thin plate embedded in the second insulating layer between the first wiring layer and the second wiring layer and having at least an opening in the vicinity of the second through-hole conductor. ,
A probe wiring board, wherein the second or first wiring portion is formed so as to be drawn to a peripheral portion by a lead wiring. A probe wiring board for inputting / outputting an electric signal to / from the inspection object by bringing a contact terminal group arranged in a probing side region corresponding to the electrode group into contact with the electrode group arranged on the inspection object There,
A first wiring layer having a plurality of first wiring portions electrically connected to each contact terminal portion of the contact terminal group, and a first wiring layer formed by sandwiching the first wiring layer and the second insulating layer 2nd wiring layer which has two wiring parts, and 2nd through | through which is provided in the said 2nd insulating layer and electrically connects each said 1st wiring part and each said 2nd wiring part A ground layer formed by embedding a metal thin plate having at least the vicinity of the through-hole conductor portion in the hole conductor portion and the second insulating layer between the first wiring layer and the second wiring layer. And
A probe wiring board, wherein the second or first wiring portion is formed so as to be drawn to a peripheral portion by a lead wiring.   A first insulating layer is sandwiched between the connection terminal group and the first wiring layer, and the first insulating layer is provided between the contact terminal portions and the first wiring portion. The probe wiring board according to claim 1, wherein the probe wiring board is configured to be electrically connected by one through-hole conductor portion.   The contact terminal group and the first wiring layer are formed in substantially the same layer, and each contact terminal portion and the first wiring portion are electrically connected to each other. The wiring board for probes according to 2. 4. The probe wiring board according to claim 3, wherein each of the contact terminal portions is fixed to the bottom surface of the first through-hole conductor portion by solder bonding.   An opening is formed immediately above the contact terminal group in the thin metal plate, an elastic resin is provided on the insulating layer near the contact terminal group, and the elastic resin is pressed by a pressing member to form the insulating layer. The probe wiring board according to claim 1, wherein a pressing force is applied to the contact terminal portion through an opening of the thin metal plate embedded in the probe.   An opening is formed immediately above the contact terminal group in the thin metal plate, and an elastic resin is provided in a hole reaching the upper surface of the contact terminal group through the opening of the thin metal plate in the insulating layer, and holds the elastic resin. The probe wiring board according to claim 1, wherein the probe wiring board is configured to be pressed by a member to apply a pressing force to the contact terminal portion. A probe wiring board for inputting / outputting an electric signal to / from the inspection object by bringing a contact terminal group arranged in a probing side region corresponding to the electrode group into contact with the electrode group arranged on the inspection object There,
A first wiring layer provided by sandwiching a first insulating layer on the contact terminal group; and a plurality of first wiring portions formed on the first insulating layer and constituting the first wiring layer. A first through-hole conductor portion that electrically connects each contact terminal portion of the contact terminal group, a protective insulating layer that covers the first wiring layer, and an adhesive on the protective insulating layer An elastic resin is provided in the opening on the ground layer formed of a thin metal plate having an opening immediately above the contact terminal group and the protective insulating layer, and the elastic resin is pressed by a pressing member. A probe wiring board characterized in that a pressing force is applied to the contact terminal portion through the protective insulating layer and the first insulating layer. The probe wiring board according to any one of claims 1 to 8 is attached to a support wiring board, and is in contact with a pressing member attached to the region on the side opposite to the probing side of the probe wiring board. with pro Bingu devices for applying a contact pressure by pressure applying means, and an electrode group of the semiconductor element of said object and said contact terminal group connected to the tester via the lead-out wiring, relatively positioning The electrical contact is made at a desired contact pressure and the electrical connection is made. An electrical signal is exchanged between the connected tester and the electrode group to inspect the electrical characteristics of the semiconductor device and A method of manufacturing a semiconductor device, characterized by manufacturing.

Images