JP3658029B2 - Connection apparatus and manufacturing method thereof - Google Patents

Description

【００５４】
接触端子の先端を尖った形状とするのは、次の理由からである。
【００５５】
測定対象の電極がアルミニウムの場合、表面に酸化膜が形成されていて、接触時の抵抗が不安定となる。このような電極に対して、接触時の抵抗値の変動が０．５Ω以下の安定した抵抗値を得るためには、接触端子の先端部が、電極表面の酸化膜をつき破って、良好な接触を確保する必要がある。そのためには、例えば、接触端子の先端が半円形の場合、１ピン当たり３００ｍＮ以上の接触圧で、各接触端子を電極に擦りつける必要がある。一方、接触端子の先端部が、直径１０μｍ−３０μｍの範囲の平坦部を有する形状の場合には、１ピン当たり１００ｍＮ以上の接触圧で、各接触端子を電極に擦りつける必要がある。
【００５６】
一方、上記した数値で示される形状を持つ本実施例の接続装置の接触端子の場合には、１ピン当たり５ｍＮ以上の接触圧があれば、電極に擦り突けることなく、単に押圧するだけで、安定した接触抵抗で、通電を行うことができる。その結果、低針圧で電極に接触すればよいため、電極、または、その直下にある素子に損傷を与えることが防止できる。また、全接触端子にピン圧をかけるために必要な力を小さくすることができる。その結果、この接続装置を用いる試験装置におけるプローバ駆動装置の耐荷重を軽減し、製造コストを低減することができる。
【００５７】
なお、１ピン当たり１００ｍＮ以上の荷重をかけることができる場合には、例えば、底面の一辺が４０μｍの四角錐台の突起であれば、先端部は、一辺を３０μｍより小さくするならば、点のように尖っていなくともよい。ただし、上述した理由から、可能な限り、先端部の面積は小さくすることが好ましい。
【００５８】
次に、図１４に示す接続装置を形成するための製造プロセスについて、図１を参照して説明する。
【００５９】
図１は、図１４に示す接続装置を形成するための製造プロセスのうち、特に、型材であるシリコンウエハに異方性エッチングで形成した四角錐の穴を用いて、四角錐の接触端子先端部を薄膜で形成するための製造プロセスを工程順に示したものである。
【００６０】
図１（ａ）は、厚さ０．２〜０．４ｍｍのシリコンウエハ２６の（１００）面の両面に熱酸化により二酸化シリコン膜２７を形成する工程を示す。シリコンウエハ２６の酸化は、例えば、ウェット酸素中で酸化温度１０００℃で１００分の熱酸化により行なう。これにより、二酸化シリコン膜２７を０．５μｍ程度形成する。
【００６１】
図１（ｂ）は、上記二酸化シリコン膜２７の表面にホトレジストマスク２８を形成し、二酸化シリコン膜２７をエッチングする工程を示す。ホトレジストマスク２８の形成およびパターニングは、次のように行う。まず、二酸化シリコン膜２７の表面に、ＯＦＰＲ８００（東京応化工業製）を塗布する。ついで、接触端子を形成する位置に、一辺が数十μｍの正方形の開口部２９のパターンを露光し、ＮＭＤ３（東京応化工業製）により現像する。次に、開口部２９により露出した二酸化シリコン膜２７を、フッ化水素酸とフッ化アンモニウム液の１：７混液に浸漬してエッチングする。
【００６２】
図１（ｃ）は、上記ホトレジストマスク２８を除去し、二酸化シリコン膜２７をマスクとして、シリコンウエハ２６を異方性エッチングして、（１１１）面に囲まれた四角錐のエッチング穴２６ａを形成する工程を示す。ホトレジストマスク２８は、剥離剤としてＳ５０２ａ（東京応化工業製）を用いて除去する。シリコンウエハ２６のエッチングは、例えば、水酸化カリウムと水の混液に浸漬することにより行う。なお、この液に代えて、水酸化カリウムとイソプロパノールと水の混液を用いてもよい。
【００６３】
図１（ｄ）は、異方性エッチングしたシリコンウエハ２６の（１１１）面に、ウェット酸素中での熱酸化により、二酸化シリコン膜３０を、０．５μｍ程度形成する工程を示す。
【００６４】
図１（ｅ）は、異方性エッチングしたシリコンウエハ２６の表面の二酸化シリコン膜３０の表面に、下地膜３１ａおよび導電性被覆３１を形成する工程を示す。導電性被覆３１形成工程、ここでは、金膜の形成は、薄膜形成プロセス、例えば、スパッタリング法あるいは蒸着法で形成される。具体的には、スパッタリングにより、下地膜３１ａとなる金属として、二酸化シリコンと密着性のよいクロムを０．０２μｍ被着した後、スパッタリングにより、導電性被覆３１となる金を０．５μｍ被着して、形成される。
【００６５】
なお、導電性被覆３１は、スパッタリング法あるいは蒸着法で、下地膜３１ａとして、二酸化シリコンと密着性のよいチタンを０．０２μｍ被着した後、導電性被覆３１となる金を０．５μｍ被着して、形成することもできる。また、導電性被覆３１は、金、ロジウムなどの貴金属を０．１〜０．２μｍ程度、蒸着法あるいはスパッタリング法で被着した膜に、ニッケルを１〜２μｍ程度スパッタリング法あるいは蒸着法により被着して形成してもよい。
【００６６】
図１（ｆ）は、上記導電性被覆３１の表面に、絶縁フィルムとなるポリイミド膜３２を膜状に形成し、ついで、接触端子を形成すべき位置３３にあるポリイミド膜３２を、上記導電性被覆３１の表面に至るまで除去する工程を示す。ポリイミド膜３２は、例えば、感光性ポリイミドを１０〜３０μｍ程度塗布し、露光、現像することにより形成される。この際、ポリイミド膜３２の、接触端子を形成すべき位置３３に、開口部３４が、予め定めたマスクパターンを用いて、露光、現像することにより形成される。
【００６７】
なお、開口部３４の形成は、他の方法で行ってもよい。例えば、次のように行う。上記導電性被覆３１の表面に、ポリイミドを１０〜３０μｍ程度塗布してベークし、露光、現像して、ポリイミド膜を形成する。または、熱硬化したポリイミドの下面に、熱硬化前のポリイミドを塗布した二層のポリイミド膜を、上記導電性被覆３１の表面に真空中で接着して、加熱硬化してポリイミド膜３２を形成する。そのポリイミド膜３２の表面に、接触端子を形成すべき位置３３に開口部を設けたアルミニウムのマスクを形成する。そして、ドライエッチングにより、ポリイミド膜３２を、酸素プラズマ異方性ドライエッチングあるいはエキシマレーザアブレーションにより、導電性被覆３１の表面に至るまで除去し、上記アルミニウムのマスクを除去して、開口部３４を形成する。
【００６８】
図１（ｇ）は、接触端子を形成すべき位置３３に形成したポリイミド膜３２の開口部３４に露出した導電性被覆３１に、導電性被覆３１を電極として、ニッケルのような硬度の高い材料を電気めっきして、接触端子とするバンプ３５を形成する工程を示す。
【００６９】
ここで、めっき材料としては、例えば、周期表第VIII属あるいはＩＢ属の金属およびそれらの合金が挙げられる。これらの金属または合金を電気めっきするか、ニッケルボロン、ニッケルリン等を無電解めっきすればよい。合金めっきとしては、例えば、Ｎｉ−Ｐｄ、Ａｇ−Ｐｄ、Ａｕ−Ｃｕ、Ａｕ−Ａｇ、Ａｕ−Ｎｉを用いる。
【００７０】
図１（ｈ）は、上記ポリイミド膜３２およびバンプ３５の表面に、銅を、スパッタリング法あるいは蒸着法により成膜することにより、厚さ１μｍ程度の導電膜３６を形成して、その表面に配線形成用のホトレジストマスク３７を形成する工程を示す。ホトレジストマスク３７は、銅の導電膜３６の表面に、感光性ポリイミドを塗布し、配線パターンを露光、現像することにより、形成する。
【００７１】
図１（ｉ）は、上記ホトレジストマスク３７を用いて導電膜３６（図１（ｈ）参照）をエッチングすることにより、配線３８を形成し、ホトレジストマスク３７を除去して、配線３８に厚さ数十μｍの銅のめっき膜３９を形成する工程を示す。
【００７２】
図１（ｊ）は、めっき膜３９による配線を形成した上記ポリイミド膜３２の表面とシリコン基板４０との間にシリコーンゴム４１を挟みこんで、一体化する工程を示す。
【００７３】
なお、めっき膜３９による配線を形成した上記ポリイミド膜３２の表面に、配線の保護膜として、ポリイミドを一層形成して、そのポリイミド層の表面とシリコン基板４０との間に、シリコーンゴム４１を挟みこんで一体化しても良い。また、必要に応じて、シリコーンゴム４１を省略することもできる。本実施例では、例えば、厚さが０．５〜３ｍｍで、硬さ（ＪＩＳＡ）が１５〜７０程度のシリコーンゴムを、エラストマとして用いている。しかし、エラストマは、これに限定されない。なお、ポリイミド膜３２とシリコン基板４０との接着は、シリコーンゴム４１自体に接着能力があるので、格別に接着剤を用いることがない。なお、接着剤を用いて接着するようにしてもよい。
【００７４】
図１（ｋ）は、二酸化シリコン膜３０およびシリコンウエハ２６を導電性被覆３１の表面に至るまで、それぞれエッチングして除去した後、さらに、下地膜３１ａをエッチングして除去して、導電性被覆３１を露出させ、この導電性被覆３１の表面の接触端子先端部となる部分を覆うようにホトレジストマスク４２を形成する工程を示す。例えば、下地膜３１ａとして、クロムを用いた場合には、クロムの除去には、フェリシアン化カリウムと水酸化ナトリウムの混液を用いる。
【００７５】
また、導電性被覆３１として、金、ロジウム等の貴金属膜を用いて、該導電性被覆３１を、下地膜３１ａを形成せずに、二酸化シリコン膜３０の表面に形成した場合は、二酸化シリコン膜３０とその表面に形成した貴金属膜との界面を剥離して、貴金属膜の表面の接触端子先端部となる部分を覆うようにホトレジストマスク４２を形成してもよい。この方法によれば、二酸化シリコン膜３０およびシリコンウエハ２６をエッチングする工程およびクロムあるいはチタンをエッチングする工程を除くことができるので、製造時間を短縮することができる。
【００７６】
図２は、上記導電性被覆３１をポリイミド膜３２の表面に至るまでエッチングして、個々の四角錐形状を有する導電性被覆３１を必要に応じて電気的に分離し、ホトレジストマスク４２を除去する工程を示す。
【００７７】
この後に、接触端子先端部の四角錐形状を有する導電性被覆３１の表面に、金あるいはロジウムからなるめっき膜３１ｂを形成する。これにより、図２に示す構造の接触端子が形成される。金あるいはロジウムをめっきすることにより、電気的な接触特性を安定にし、かつ、向上させることができる。なお、金またはロジウムのめっきを省略してもよい。
【００７８】
なお、導電性被覆３１より硬度が大きいめっき膜を設けると、接触端子を接触させる電極の酸化膜等を突き破ることに好都合である。例えば、導電性被覆３１が金である場合、それより硬度が大きいロジウムを用いてめっき膜を形成する。
【００７９】
本実施例によれば、電極パッド部のピッチとして、１０μｍ程度の接触端子まで容易に形成できる。また、接触端子の高さの精度として、±２μｍ以内の精度を達成できる。
【００８０】
次に、図１４に示す接続装置を形成するための他の製造プロセスについて、図３を参照して説明する。なお、図１に示すプロセスと同じ工程については、説明を省略する。
【００８１】
図３（ａ）は、前記の図１（ｃ）の異方性エッチングしたシリコンウエハ２６の表面に、下地膜３１ａ形成し、その上に導電性被覆３１を形成する工程を示す。この工程では、下地膜３１ａとして、シリコンと密着性のよい材料、例えば、クロムを用いている。また、導電性被覆３１として、例えば、金を用いている。クロムおよび金を、順次、スパッタリング法あるいは蒸着法で被着する。なお、下地膜３１ａとして、クロムに代えて、チタンを用いていもよい。
【００８２】
なお、導電性被覆３１として、金、ロジウムなどの貴金属を、０．１〜０．２μｍ程度、蒸着法あるいはスパッタ法で被着した膜に、ニッケルを１〜２μｍ程度、スパッタリング法あるいは蒸着法で被覆した膜を用いてもよい。
【００８３】
次に、図１（ｆ）から図１（ｊ）と同様な製造工程を実施し、図３（ｂ）に示すように、銅のめっき膜３９による配線を形成した上記ポリイミド膜３２の表面とシリコン基板４０の間にシリコーンゴム４１を挟みこんで一体化する。
【００８４】
その後、図３（ｃ）に示すように、二酸化シリコン膜２７およびシリコンウエハ２６を導電性被覆３１の表面に至るまで、それぞれエッチングして除去する。さらに、導電性被膜３１の表面にある下地膜３１ａをエッチングして除去して、導電性皮膜３１の、接触端子先端部となる部分を覆うように、ホトレジストマスク４２を形成する。その後、導電性被膜３１をポリイミド膜３２の表面に至るまでエッチングする。これにより、個々の四角錐形状を有した導電性被覆３１を必要に応じて電気的に分離する。
【００８５】
次に、ホトレジストマスク４２を除去して、図３（ｄ）に示す接続装置を形成する。
【００８６】
なお、この後に、接触端子先端部の四角錐形状を有する導電性被覆３１の表面に、金やロジウムをめっきしてもよい。これにより、電気的な接触特性を安定にし、かつ、向上させることができる。
【００８７】
次に、図１５に示す接続装置を形成するための製造プロセスについて、図４を参照して説明する。
【００８８】
図４は、図１５に示す接続装置を形成するための製造プロセスのうち、特に、型材であるシリコンウエハに異方性エッチングで形成した四角錐の穴を用いて、四角錐の接触端子先端部を薄膜で形成するための製造プロセスを工程順に示したものである。なお、図１に示す工程と同じ工程については、説明を省略する。
【００８９】
図４（ａ）は、前記の図１（ｅ）の異方性エッチングしたシリコンウエハ２６の表面の二酸化シリコン膜３０の表面に、下地膜３１ａおよび導電性被覆３１を形成する工程を示す。下地膜３１ａは、例えば、スパッタリング法あるいは蒸着法で、クロムを０．０２μｍ被着して形成する。導電性被覆３１は、例えば、スパッタリング法あるいは蒸着法で、下地膜３１ａ上に、金を０．２μｍ被着して形成される。また、下地膜３１ａは、クロムに代えて、チタンを、スパッタリング法あるいは蒸着法で、０．０２μｍ被着してもよい。さらに、導電性被覆３１は、金膜上に、ニッケルを１〜２μｍ程度、スパッタリング法あるいは蒸着法で成膜し、その表面に、ニッケル、銅または両者を、２〜４０μｍ程度電気めっきするようにしてもよい。
【００９０】
なお、導電性被覆３１として、金、ロジウムなどの貴金属を、０．１〜０．０２μｍ程度、スパッタ法あるいは蒸着法で被着した膜に、ニッケルを１〜２μｍ程度、スパッタ法あるいは蒸着法で被着した膜を用いてもよい。
【００９１】
次に、図４（ｂ）に示すように、上記の導電性被覆３１の表面に、絶縁フィルム１１３（図１５参照）を構成するポリイミド膜４３を形成し、そのポリイミド膜４３の表面とシリコン基板４０の間にシリコーンゴム４５を挟みこんで一体化する。ポリイミド膜４３としては、例えば、ポリイミドを１０〜３０μｍ程度塗布して、加熱硬化して形成したものを用いることができる。また、熱硬化したポリイミドの下面に熱硬化前のポリイミドを塗布した二層のポリイミド膜を、上記導電性被覆３１の表面に真空中で接着して、加熱硬化して形成したものを用いることができる。
【００９２】
図４（ｃ）は、二酸化シリコン膜３０およびシリコンウエハ２６をそれぞれエッチングして除去した後、下地膜３１ａをエッチングして除去し、さらに、導電性被膜３１表面の接触端子先端部となる部分および配線部分を覆うように、ホトレジストマスク４６を形成する工程を示す。
【００９３】
なお、導電性被覆３１として、金、ロジウム等の貴金属膜を用いた場合は、二酸化シリコン膜３０とその表面に形成した貴金属膜との界面を剥離して、貴金属膜の表面の接触端子先端部となる部分および配線部分を覆うように、ホトレジストマスク４６を形成してもよい。この場合には、上述したように、エッチング工程を省略できて、製造時間を短縮することができる。
【００９４】
図４（ｄ）は、上記導電性被覆３１をポリイミド膜４３の表面に至るまでエッチングして、個々の四角錐形状を有する導電性被覆３１を、必要に応じて電気的に分離して配線を形成し、ホトレジストマスク４６を除去する工程を示す。
【００９５】
なお、この後に、接触端子先端部の四角錐形状を有した導電性膜３１の表面に、金やロジウムをめっきしてもよい。それにより、電気的な接触特性を安定にし、かつ、向上させることができる。
【００９６】
次に、図１５に示す接続装置を形成するための他の製造プロセスについて、図５を参照して説明する。なお、図４に示すプロセスと同じ工程については、説明を省略する。
【００９７】
図５（ａ）は、前記の図１（ｃ）の異方性エッチングしたシリコンウエハ２６の表面に、下地膜３１ａおよび導電性被覆３１を形成する工程を示す。下地膜３１ａは、例えば、シリコンと密着性のよい、クロムまたはチタンを、スパッタリング法あるいは蒸着法で被着して形成される。導電性被覆３１としては、例えば、金を、下地膜上３１ａに、スパッタリング法あるいは蒸着法で被着して形成される。
【００９８】
次に、図５（ｂ）に示すように、上記導電性被覆の表面に、ポリイミド膜４３を形成し、この上に、緩衝層であるシリコーンゴム４５をはさんで、シリコン基板４０を一体的に固定する。この工程は、図４（ｂ）に示す工程と同様である。
【００９９】
この後、図５（ｃ）に示すように、二酸化シリコン膜２７およびシリコンウエハ２６を、それぞれエッチングして除去する。さらに、導電性被覆３１の接触端子先端部となる部分および配線となる部分を覆うように、ホトレジストマスク４６を形成する。
【０１００】
その後、図４（ｄ）に示すプロセスと同様にして、図５（ｄ）に示す接続装置を形成する。
【０１０１】
なお、この後に、接触端子先端部の四角錐形状を有する導電性被覆３１の表面に、金やロジウムをめっきしてもよいことは、前述したとおりである。
【０１０２】
次に、図１６に示す接続装置を形成するための製造プロセスについて、図６を参照して説明する。
【０１０３】
図６は、図１６に示す接続装置を形成するための製造プロセスのうち、特に、型材であるシリコンウエハに異方性エッチングで形成した四角錐の穴を用いて、四角錐の接触端子先端部を薄膜で形成するための製造プロセスを工程順に示したものである。なお、図１または図４に示す工程と同じ工程については、説明を省略する。
【０１０４】
図６（ａ）は、前記の図１（ｃ）の異方性エッチングした後、二酸化シリコン膜３０を形成した図１（ｄ）に示す状態にあるシリコンウェハ２６の、二酸化シリコン膜３０の表面に、下地膜３１ａおよび導電性被覆３１を形成する工程を示す。下地膜３１ａは、上記した各実施例と同様に、例えば、スパッタリング法または蒸着法で、二酸化シリコン膜３０の密着性のよい、クロムまたはチタンを０．０２μｍ被着して形成することができる。導電性被覆３１は、上記した各実施例と同様に、例えば、スパッタリング法または蒸着法で、下地膜３１ａ上に、金を０．２μｍ被着して形成することができる。また、導電性被覆３１は、その上に、ニッケルを１〜２μｍ程度、スパッタリング法または蒸着法により被着し、その表面に、ニッケル、銅または両者を、２〜４０μｍ程度めっきするようにしてもよい。それにより、電気的な接触特性を安定にし、かつ、向上させることができる。
【０１０５】
なお、導電性被覆３１として、金、ロジウムなどの貴金属を０．１〜０．２μｍ程度、蒸着法またはスパッタリング法で被着した膜に、ニッケルを１〜２μｍ程度スパッタリング法または蒸着法で被着し、さらに、ニッケル、銅または両者を２〜４０μｍ程度めっきして形成される膜を用いることもできる。
【０１０６】
次に、図６（ｂ）に示すように、上記の導電性被覆３１の表面に、絶縁フィルム１１７（図１６参照）を構成するためのポリイミド膜３２を膜状に形成する。このポリイミド膜３２に、図１（ｆ）および（ｇ）に示すように、導電性被覆３１を電極として、ニッケルのような硬度の高い材料を電気めっきして、バンプ３５を形成する。
【０１０７】
そのポリイミド膜３２の表面とシリコン基板４０の間にシリコーンゴム４１を挟みこんで一体化する。ポリイミド膜３２としては、例えば、ポリイミドを１０〜３０μｍ程度塗布して加熱硬化したもの、または、熱硬化したポリイミドの下面に熱硬化前のポリイミドを塗布した二層のポリイミド膜を上記導電性被覆３１の表面に真空中で接着して加熱硬化したものを用いることができる。
【０１０８】
図６（ｃ）は、二酸化シリコン膜３０およびシリコンウエハ２６をそれぞれエッチングして除去した後、下地膜３１ａをエッチングして除去して、導電性被覆３１の接触端子先端部となる部分および配線となる部分を覆うようにホトレジストマスク４６を形成する工程を示す。
【０１０９】
図６（ｄ）は、上記ホトレジストマスク４６で覆われていない導電性被覆３１を、ポリイミド膜３２の表面に至るまでエッチングして、個々の四角錐形状を有した導電性被覆３１を電気的に分離して、配線を形成し、ホトレジストマスク４６を除去し、導電性被覆３１の表面に金属めっきする工程を示す。すなわち、ここでは、導電性被覆３１の上に、ロジウムからなるめっき膜３１ｂが形成される。これにより、これにより、電気的な接触特性を安定にし、かつ、向上させることができる。
【０１１０】
なお、図６（ｄ）には、各部の寸法の一例と、導電性被覆３１の膜構造とを示している。導電性被覆３１は、絶縁フィルム側から、金、ロジウムの順に積層されている。
【０１１１】
次に、図１６に示す接続装置を形成するための他の製造プロセスについて、図７を参照して説明する。なお、図６に示すプロセスと同じ工程については、説明を省略する。
【０１１２】
図７（ａ）は、前記の図１（ｃ）の異方性エッチング後、上記図６に示す導電性被覆３１と同じようにして、導電性被覆３１をシリコンウェハ２６に被着する。
【０１１３】
次に、図７（ｂ）に示すように、上記の導電性被覆３１の表面に、絶縁フィルム１１７（図１６参照）を構成するためのポリイミド膜３２を膜状に形成する。このポリイミド膜３２の接触端子を形成すべき位置３３に、図１（ｆ）および（ｇ）に示すように、導電性被覆３１を電極として、ニッケルのような硬度の高い材料を電気めっきして、バンプ３５を形成する。
【０１１４】
これに引き続いて、バンプ３５を形成したポリイミド膜３２の表面と、シリコン基板４０の間にエラストマ４１を挟みこんで一体化する工程を示す。
【０１１５】
なお、バンプ３５を形成した上記ポリイミド膜３２の表面に、保護膜として、ポリイミドを一層形成して、その表面とシリコン基板４０の間にシリコーンゴム４１を挟みこんで一体化しても良い。また、必要に応じて、シリコーンゴム４１を省略することもできる。
【０１１６】
図７（ｃ）は、二酸化シリコン膜２７およびシリコンウエハ２６を、それぞれエッチングして除去した後、下地膜３１ａをエッチングして除去し、露出した導電性被覆３１の表面の接触端子先端部となる部分および配線となる部分を覆うようにホトレジストマスク４６を形成する工程を示す。
【０１１７】
図７（ｄ）は、上記導電性被覆３１をポリイミド膜３２の表面に至るまでエッチングして、個々の四角錐形状を有した導電性被覆３１を必要に応じて電気的に分離して配線を形成し、ホトレジストマスク４６を除去する工程を示す。
【０１１８】
なお、この後に、接触端子先端部の四角錐形状を有した導電性被覆３１の表面に金やロジウムをめっきしてもよい。これにより、電気的な接触特性を安定にし、かつ、向上させることができる。
【０１１９】
上記の図１ないし図７に示した実施例では、前記の図１（ｅ）の異方性エッチングしたシリコンウエハ２６の表面の二酸化シリコン膜３０の表面に形成する導電性被覆３１の形成工程として、スパッタリング法あるいは蒸着法で導電材料を被着して形成する工程を示したが、異方性エッチングしたシリコンウエハ２６の表面の二酸化シリコン膜３０の表面に、下地膜３１ａを形成せずに、導電性被覆３１として、有機導電性膜を形成してもよい。例えば、有機系導電性ポリマーとして、ポリピロールを塗布した後、希硫酸溶液に浸漬して導電性膜を形成すればよい。また、前記導電性被覆３１として、カーボン膜、パラジウム膜等を用いてもよい。すなわち、カーボンブラック懸濁液に異方性エッチングした前記シリコンウエハを浸漬することにより、カーボン膜を導電性被覆３１として形成するか、あるいは、塩化パラジウムと塩化錫の塩酸水溶液に異方性エッチングした前記シリコンウエハを浸漬した後、硫酸水溶液に浸漬してパラジウムを導電性被覆３１として形成すればよい。また、金属の無電解めっき膜を設けてもよい。
【０１２０】
また、図１（ｈ）および図１（ｉ）に示した実施例では、ホトレジストマスク３７を用いて導電膜３６をエッチングすることにより、配線３８を形成し、ホトレジストマスク３７を除去して、配線３８に銅のめっき膜３９を形成したが、
配線３８を形成する他の方法として、前記の図１（ｇ）のポリイミド膜３２の開口部３４に接触端子とするバンプ３５を形成した後、図２４（ｈ）に示すように、ポリイミド膜３２およびバンプ３５の表面に導電膜３６を形成し、その表面に配線形成用のホトレジストマスク４７を形成し、図２４（ｉ）に示すように、上記ホトレジストマスク４７に被覆されていない導電膜３６の表面に、銅のめっき膜３９を形成し、ホトレジストマスク４７を除去した後、銅のめっき膜３９で被覆されていない導電膜３６を選択エッチングにより除去して、配線３８を形成してもよい。ここで、ホトレジストマスク４７としては、例えば、導電膜３６の表面にポジ型ホトレジストＬＰ−１０（ヘキストジャパン製）を塗布し、配線パターンを露光、現像することにより形成する。
【０１２１】
その後は、図１（ｊ）、図１（ｋ）および図２と同様な製造工程を実施して、図２４（ｊ）に示す接続装置を形成すればよい。
【０１２２】
なお、上記導電膜３６を形成する工程として、ポリイミド膜３２およびバンプ３５の表面に導電膜３６をウェット処理により形成してもよい。すなわち、導電膜３６はポリピロールを塗布した後、希硫酸溶液に浸漬して導電性膜を形成する。
【０１２３】
なお、図１ないし図７あるいは図２４に示した実施例は、図８（ａ）に示すような二酸化シリコン膜５０の正方形のマスク５１を用いて、シリコンウエハ５２の（１００）面を異方性エッチングして、四角錐の接触先端部を有する接触端子を形成する例である。しかし、本発明は、これに限られない。例えば、図８（ｂ）に示すような二酸化シリコン膜５０の正方形のマスク５１を用いて、シリコンウエハ５２の（１００）面を異方性エッチングして、先端部に（１００）面の平坦部を有し、四角錐状の（１１１）面で囲まれた接触先端部を有する接触端子を形成することができる。図８（ｃ）に示すような二酸化シリコン膜５３の長方形のマスク５４を用いて、シリコンウエハ５５の（１００）面を異方性エッチングして、接触端子の接触先端形状を形成することができる。図８（ｄ）に示すような二酸化シリコン膜５３の長方形のマスク５４を用いて、シリコンウエハ５５の（１００）面を異方性エッチングして、先端部に（１００）面の平坦部を有し、四角錐状の（１１１）面で囲まれた接触端子の接触先端形状を形成することができる。また、図８（ｅ）に示すような二酸化シリコン膜５６の正方形のマスク５７を用いて、シリコンウエハ５８の（１１０）面を異方性エッチングして、接触端子の接触先端形状を形成することができる。さらに、図８（ｆ）に示すような二酸化シリコン膜５９の長方形のマスク６０を用いて、シリコンウエハ６１の（１１０）面を異方性エッチングして、接触端子の接触先端形状を形成してもよい。
【０１２４】
なお、これまで述べた例では、接触端子を形成するための型材として、シリコンウエハを用いている。しかし、本発明は、これに限定されない。異方性エッチングによって、先端が尖った形状の穴が形成できる結晶であれば、他の結晶を用いてもよい。
【０１２５】
また、上記各例では、接触端子として設けられたものは、全て配線が接続され、有効に使用できるものである。しかし、配線が接続されない、単なる突起としてのみ機能するダミー接触端子を設けることができる。すなわち、接触端子の高さと同じか、または、適宜に設定した高さで、ダミーの接触端子を、必要に応じて適度に配置することができる。これにより、接触端子の高さばらつき、または、被接触対象への押し付け圧力の調整が容易になり、接触特性および信頼性を向上することができる。
【０１２６】
図９は、本発明の接続装置を用いた一実施例である検査装置の要部を示す説明図である。
【０１２７】
本実施例において、検査装置は、半導体素子の製造におけるウエハプローバとして構成されている。この検査装置は、被検査物を支持する試料支持系１６０と、被検査物に接触して電気信号の授受を行なうプローブ系１００と、試料支持系１６０の動作を制御する駆動制御系１５０と、測定を行なうテスタ１７０とで構成される。なお、被検査物としては、半導体ウエハ１を対象としている。この半導体ウエハ１の表面には、外部接続電極としての複数の電極１ａが形成されている。
【０１２８】
試料支持系１６０は、半導体ウエハ１が着脱自在に載置される、ほぼ水平に設けられた試料台１６２と、この試料台１６２を支持する、垂直に配置される昇降軸１６４と、この昇降軸１６４を昇降駆動する昇降駆動部１６５と、この昇降駆動部１６５を支持するＸ−Ｙステージ１６７とで構成される。Ｘ−Ｙステージ１６７、筐体１６６の上に固定される。昇降駆動部１６５は、例えば、ステッピングモータなどからなる。Ｘ−Ｙステージ１６７の水平面内における移動動作と、昇降駆動部１６５による上下動などを組み合わせることにより、試料台１６２の水平および垂直方向における位置決め動作が行われるものである。また、試料台１６２には、図示しない回動機構が設けられており、水平面内における試料台１６２の回動変位が可能にされている。
【０１２９】
試料台１６２の上方には、プローブ系１００が配置される。すなわち、当該試料台１６２に平行に対向する姿勢で接続装置１００ａおよび配線基板１０７が設けられる。この接続装置１００ａには、接触端子１０３を有する絶縁フィルム１０４と、緩衝層１０８および基板１０９が一体的に設けられている。各々の接触端子１０３は、該接続装置１００ａの絶縁フィルム１０４に設けられた引出し用配線１０５を介して、配線基板１０７の下部電極１１０ａおよびスルーホール１１０ｂと、内部配線１０７ａとを通して、該配線基板１０７に設けられた接続端子１０７ｂに接続されている。なお、本実施例では、接続端子１０７ｂは、同軸コネクタで構成される。この接続端子１０７ｂに接続されるケーブル１７１を介して、テスタ１７０と接続される。ここで用いられる接続装置は、図１４に示した構造のものであるが、これに限定されない。図１５あるいは図１６に示す構造のものを用いることもできる。
【０１３０】
駆動制御系１５０は、ケーブル１７２を介してテスタ１７０と接続されている。また、駆動制御系１５０は、試料支持系１６０の各駆動部のアクチュエータに制御信号を送って、その動作を制御する。すなわち、駆動制御系１５０は、内部にコンピュータを備え、ケーブル１７２を介して伝達されるテスタ１７０のテスト動作の進行情報に合わせて、試料支持系１６０の動作を制御する。また、駆動制御系１５０は、操作部１５１を備え、駆動制御に関する各種指示の入力の受付、例えば、手動操作の指示を受け付ける。
【０１３１】
以下、本実施例の検査装置の動作について説明する。試料台１６２の上に、半導体ウエハ１を固定し、Ｘ−Ｙステージ１６７および回動機構を用いて、該半導体ウエハ１に形成された電極１ａを、接続装置１００ａに形成された接触端子１０３の直下に位置決めするため、調整する。その後、駆動制御系１５０は、昇降駆動部１６５を作動させ、試料台１６２を所定の高さまで上昇させることによって、複数の接触端子１０３の各々の先端を目的の半導体素子における複数の電極１ａの各々に所定圧で接触させる。ここまでは、操作部１５１からの操作指示に従って、駆動制御系１５０により実行される。なお、これらの位置決め等の調整を自動的に行なうようにしてもよい。例えば、半導体ウェハ１に基準位置のマークを予め付しておき、これを読み取り装置で読み取って、座標の原点を設定するようにして、行なうことができる。この場合、電極の位置は、予め設計データを受け取ることにより、駆動制御部１５０において既知となる。
【０１３２】
この状態で、ケーブル１７１、配線基板１０７、絶縁フィルム１０４、および接触端子１０３を介して、半導体ウエハ１に形成された半導体素子とテスタ１７０との間で、動作電力や動作試験信号などの授受を行い、当該半導体素子の動作特性の可否などを判別する。上記の一連の試験動作が、半導体ウエハ１に形成された複数の半導体素子の各々について実施され、動作特性の可否などが判別される。
【０１３３】
次に、本発明の接続装置を用いた一実施例である半導体素子のバーンイン工程での検査装置の一例について説明する。
【０１３４】
図１０は、本発明の接続装置を用いた一実施例である半導体素子のバーンイン工程での検査装置の要部を示す斜視図、図１１は、バーンイン用の半導体素子検査装置の断面図である。
【０１３５】
本実施例は、ウエハ状態の半導体素子に電気および温度ストレスを高温状態で加え、半導体素子の特性検査を実施するウエハプローバとして構成されている。また、本実施例は、一度に複数枚のウエハ１を恒温槽（図示せず）に入れた状態で、特性検査が行なえるようになっている。
【０１３６】
すなわち、本実施例は、図１１に示すように、恒温槽（図示せず）に置かれる支持具１９０に垂直に取り付けられるマザーボード１８１と、これに垂直に、すなわち、前記支持具１９０に並行にマザーボード１８１に取り付けられる、複数の個別プローブ系１８０とで構成される。
【０１３７】
マザーボード１８１は、各個別プローブ系１８０ごとに設けられるコネクタ１８３と、マザーボード１８１を介して前記コネクタ１８３と通じているケーブル１８２とを有する。ケーブル１８２は、本実施例では図示していないが、前記図９に示すテスタ１７０と同様なテスタに接続される。
【０１３８】
個別プローブ系１８０は、被検査物ごとに設けられる。この個別プローブ系１８０は、上記した接続装置１００ａと、この接続装置が固定される配線基板１０７と、被検査物である半導体ウェハ１を支持するウェハ支持基板１８５と、このウェハ支持基板１８５が載置され、個別プローブ系自体をマーザーボード１８１に取り付けるための支持ボード１８４と、前記接続装置１００ａを半導体ウェハ１に当接させるための押さえ基板１８６とを有する。
【０１３９】
ウェハ支持基板１８５より上方にある各部は、図１０に示す構造となっている。すなわち、ウェハ支持基板１８５は、例えば、金属板で形成され、半導体ウェハ１を着脱自在に収容するための凹部１８５ａと、位置決めのためのノックピン１８７を有する。
【０１４０】
接続装置１００ａは、上述したように、絶縁フィルム１０４、およびこれに設けられている接触端子１０３群と、緩衝層１０８および基板１０９とで構成される。この接続装置１００ａは、配線基板１０７に搭載され、各接触端子１０３から引出される配線が、配線１０７ｄを介して、コネクタ端子１０７ｃに接続される。このコネクタ端子１０７ｃは、前記コネクタ１８３と嵌合するようになっている。なお、この例は、接続装置１００ａとして、図１４に示すものを用いているが、これに限定されない。例えば、図１５および図１６に示すものを用いることができる。
【０１４１】
この接続装置１００ａの上方には、押さえ基板１８６が装着される。この押さえ基板１８６は、チャネル状に形成され、そのチャネル１８６ａ内に、配線基板１０７が収容される。また、この押さえ基板１８６の周縁部には、前記ノックピン１８７と嵌合する穴１８８が設けられている。
【０１４２】
次に、本実施例の測定動作について、説明する。
【０１４３】
ウエハ支持基板１８５の凹部１８５ａに、半導体ウエハ１を固定し、ノックピン１８７を用いて、該半導体ウエハ１に形成された各電極を、接続装置１００ａに形成された各接触端子１０３の直下に位置決めして、複数の接触端子１０３の各々の先端を、半導体素子における複数の電極のうち目的の電極の各々に、所定圧で接触させる。この状態で、ケーブル１８２、マザーボード１８１、コネクタ１８３、配線基板１０７、絶縁フィルム１０４に設けられた図１０には示していない引出し用配線１０５（図１４参照）、および、接触端子１０３を介して、半導体ウエハ１に形成された半導体素子とテスタとの間で、動作電力や動作試験信号などの授受を行い、当該半導体素子の動作特性の可否などを判別する。上記の一連の操作が、恒温槽（図示せず）内に設置された支持具１９０に固定されたマザーボード１８１に固定されたウエハ支持基板１８５に搭載された半導体ウエハ１の各々について実施され、動作特性の可否などが判別される。
【０１４４】
なお、接続装置の接触端子を電極に接触させる場合、上記実施例では、接触端子と電極とを一対一対応に接続させているが、これに限られない。すなわち、１の電極について、複数個の接触端子を接触させるようにしてもよい。これにより、より確実な接触を確保できる。
【０１４５】
上記の例では、マザーボード１８１を用いているが、これを用いないで、個別プローブ系１８０にケーブルを介してテスタに接続することにより検査を行なうようにしてもよい。この場合、個別プローブ系１８０は、マザーボード１８１に取り付けられるものと異なる構造であってもよい。例えば、マザーボード１８１に取り付けるための部材等を省略することができる。
【０１４６】
また、上記接続装置の接触端子の先端位置を、製造時の温度と実使用時での温度との差を考慮して、製造時に材料間の線膨張率の差による先端位置の変位をあらかじめ設計値に入れて設計したホトレジストマスクを用いて接触端子を形成することにより、高温でも接触端子の先端位置精度が極めて良好な接続装置が実現できる。その一例を次に述べる。
【０１４７】
ポリイミドの線膨張率が４×１０^-5／℃で、検査対象の電極を形成したシリコンウェハの線膨張率が２．９×１０^-6／℃であり、マスク形成時の温度が２０℃で、実使用時の温度が１５０℃であった場合について、膨張率および温度差を考慮したポリイミドパターン設計する場合の計算は、次式で行なう。例えば、８インチウェハ表面の中心から１００ｍｍの電極位置用ホトレジストマスクは、次式により、ホトレジストマスクの中心から９９．５２０１９５ｍｍの位置として設計すればよい。言い換えれば、２０℃でのシリコンウェハの電極位置の設計値に対して、その設計値の０．９９５２０１９５倍の尺度でホトレジストマスクの電極位置を設計すればよい。
【０１４８】
【数１】

【０１４９】
上記各実施例では、引出し用配線１０５および１１４を通常の集中定数系での配線として扱ってきたが、本発明は、これに限定されない。接地層を設けることによって、各引出し用配線１０５および１１４を、マイクロストリップ線路とする構成としてもよい。
【０１５０】
これより、ＤＣ検査、高周波域、例えば、数ＧＨｚ帯までのＡＣ検査等の、半導体素子の特性検査が可能となる。
【０１５１】
上記の特性検査が可能な接続装置１００ａを用いることにより、例えば、図１０に示した前記個別プローブ系１８０、および、図１１に示した半導体素子検査装置を、前述のバーンイン検査に限ることなく、半導体素子の製造における特性検査用のウェハプローバとして用いることができる。この場合、半導体素子とテスタ１７０との間の動作電力や動作試験信号などの授受が、特性検査用とバーンイン用とで異なる場合でも、テスタからの信号の切り換え、または、マザーボードを交換することにより、前記の個別プローブ系１８０に一旦ウェハを装着すれば、一連の検査項目が終了するまで、個別プローブ系１８０に装着したままで検査することが可能となる。
【０１５２】
以上説明した実施例によれば、異方性エッチングにより、深さおよび形態のそろった穴を形成でき、その穴を型にして、接触端子のための突起を形成できる。従って、接触端子を、フォトリソグラフィ技術により、高密度かつ高精度に形成することができる。しかも、多数個の接触端子を、位置精度よく一括して形成できる。また、穴を形成する際、電極位置を定める設計情報を利用することにより、接触端子を、検査対象物の電極位置に正確に対応させることができる。
【０１５３】
以上に説明した各実施例は、シリコンウェハを用いているが、本発明は、これに限定されない。結晶性の他の材料を用いることもできる。
【０１５４】
また、上記図１４、１５および１６に示す各実施例では、基板１０９を介して配線基板に接続装置を搭載しているが、基板を介さずに、緩衝層を介して絶縁フィルムを配線基板に固定するようにしてもよい。
以上、上記で説明した本実施例によれば、接続装置の接触端子を、多点、かつ、高密度化できる。しかも、多端子化において、配線基板の電極パッド部に高密度かつ高精度に先端部が尖った接続端子を一括形成することができるので接続装置の組立性を大幅に向上させる効果がある。
また、接触端子を薄膜プロセスで微細形状に形成できるので、プローブの長さを短くできて、高周波数まで対応できる電気特性を持たせることができる。
さらに、接続端子の高さ方向ばらつきは、シリコンの（１００）面の異方性エッチングによる（１１１）面で囲まれた四角錐の形状を形成することにより、横方向ばらつきと同様に、ホトレジストマスクパターンの寸法精度に近いレベルにもっていくことができる。これにより、接続端子の先端部位置精度を大幅に向上させる効果がある。しかも、薄膜プロセスで形成するので、加工精度が高く、しかも、微細な組立て作業を要せずに製造できる。
また、上記で説明した本実施例の構成による緩衝層の弾性力によって接続端子を対向した電極に接触させる接続装置においては、接触端子と電極とのあいだの距離のばらつきを吸収して、小さな荷重で、各接触端子に均等の圧力が加わるようにすることができる。それにより、全ピンの接触を確実に行うことができる。また、検査対象物に過大な荷重をかけることを防ぐことができる。
【０１５５】
【発明の効果】
本発明によれば、被検査対象の電極と良好な接触特性の接触端子を有する接続装置およびその製造方法を提供することができる。
【図面の簡単な説明】
【図１】図１（ａ）−（ｋ）は、本発明に関わる接続装置を形成する製造プロセスの一実施例の工程の一部を示す断面図である。
【図２】図２は、本発明に関わる接続装置を形成する製造プロセスの一実施例の工程の残部を示す断面図である。
【図３】図３（ａ）−（ｄ）は、本発明に関わる接続装置を形成する製造プロセスの他の実施例の工程を示す断面図である。
【図４】図４（ａ）−（ｄ）は、本発明に関わる接続装置を形成する製造プロセスの他の実施例の工程を示す断面図である。
【図５】図５（ａ）−（ｄ）は、本発明に関わる接続装置を形成する製造プロセスの他の実施例を示す断面図である。
【図６】図６（ａ）−（ｄ）は、本発明に関わる接続装置を形成する製造プロセスの他の実施例を示す断面図である。
【図７】図（ａ）−（ｄ）は、本発明に関わる接続装置を形成する製造プロセスの他の実施例を示す断面図である。
【図８】図（ａ）−（ｆ）は、本発明に関わる接続装置の接触端子を形成するための各種形状の型を示す斜視図である。
【図９】半導体素子検査装置の駆動部の構成図である。
【図１０】バーンイン用の半導体素子検査装置の個別プローブの要部を示す斜視図である。
【図１１】バーンイン用の半導体素子検査装置の断面図である。
【図１２】図１２（ａ）は、本発明に関わる半導体素子検査装置の接触端子および引き出し用配線を形成したポリイミド膜の一実施例を示す平面図、図１２（ｂ）は、斜視図である。
【図１３】図１３（ａ）は、本発明に関わる半導体素子検査装置の接触端子および引き出し用配線を形成したポリイミド膜の一実施例を示す平面図、図１３（ｂ）は、斜視図である。
【図１４】本発明の接続装置の第１実施例の要部を示す断面図である。
【図１５】本発明の接続装置の第２実施例の要部を示す断面図である。
【図１６】本発明の接続装置の第３実施例の要部を示す断面図である。
【図１７】ウエハの斜視図および半導体素子の斜視図である。
【図１８】従来の検査用プローブの断面図である。
【図１９】従来の検査用プローブの平面図である。
【図２０】はんだボールを電極上に有する半導体素子を示す斜視図である。
【図２１】はんだ溶融接続をした半導体素子の実装状態を示す斜視図である。
【図２２】従来のめっきによるバンプを用いた半導体素子検査装置の要部断面図である。
【図２３】図２２のめっきによるバンプ部分を示す斜視図である。
【図２４】図２４（ｈ）、（ｉ）、（ｊ）は、本発明に関わる接続装置を形成する製造プロセスの他の実施例の工程の一部を示す断面図である。
【符号の説明】
１…ウエハ、２…半導体素子、３…電極、４…プローブカード、５…プローブ、６…はんだバンプ、７…配線基板、８…電極、２０…誘電体膜、２１…配線、２２…ビア、２３…バンプ、２４…配線基板、２５…板ばね、２６…シリコンウエハ、２７…二酸化シリコン膜、２８…ホトレジストマスク、２９…開口部、３０…二酸化シリコン膜、３１…導電性被覆、３２，４３…ポリイミド膜、３３…接触端子、３４…開口部、３５…バンプ、３６…導電膜、３７、４２、４６、４７…ホトレジストマスク、３８…配線、３９…めっき膜、４０…シリコン基板、４１、４５…シリコーンゴム、５０…二酸化シリコン膜、５１…正方形のマスク、５２…シリコンウエハ、５３…二酸化シリコン膜、５４…長方形のマスク、５５…シリコンウエハ、５６…二酸化シリコン膜、５７…正方形のマスク、５８…シリコンウエハ、５９…二酸化シリコン膜、６０…長方形のマスク、１００…プローブ系、１００ａ…接続装置、１０１…ＬＳＩ形成ウエハの領域、１０２…接触端子形成用ウエハ、１０３、１１２、１１６…接触端子、１０４、１１３、１１７…絶縁フィルム、１０４ａ…絶縁フィルムの周縁部、１０５、１１４…引き出し用配線、１０５ａ…絶縁フィルムの端子部、１０６…ポリイミド膜の切れ目、１０７…配線基板、１０７ａ…内部配線、１０７ｂ…接続端子、１０７ｃ…コネクタ端子、１０７ｄ…配線、１０８…緩衝層、１０９…基板、１１０ａ…電極、１１０ｂ…スルーホール、１１１…はんだ、１１５…ビア、１５０…駆動制御系、１５１…操作部、１６０…試料支持系、１６２…試料台、１６４…昇降軸、１６５…昇降駆動部、１６６…筐体、１６７…Ｘ−Ｙステージ、１７０…テスタ、１７１、１７２…ケーブル、１８０…個別プロ−ブ、１８１…マザ−ボ−ド、１８２…ケ−ブル、１８３…コネクタ、１８４…支持ボ−ド、１８５…ウエハ支持基板、１８５ａ…ウエハ支持基板の凹部、１８６…押え基板、１８６ａ…チャンネル、１８７…ノックピン、１８８…ノックピンと嵌合する穴。[0001]
[Industrial application fields]
The present invention relates to a connection device that transmits an electrical signal to an electrode through a contact terminal that is in contact with an electrode that contacts the electrode, a method for manufacturing the connection device, and a test apparatus using the connection device. It is related with the connection apparatus suitable for contacting with respect to.
[0002]
[Prior art]
A wafer 1 shown in FIG. 17A is provided with a large number of LSI semiconductor elements (chips) 2 on its surface, and is separated for use. FIG. 17B is an enlarged perspective view showing one of the semiconductor elements 2. A large number of electrodes 3 are arranged along the periphery of the surface of the semiconductor element 2.
[0003]
In order to industrially produce a large number of such semiconductor elements 2 and to inspect their electrical performance, a connecting device having a structure as shown in FIGS. 18 and 19 is used. This connecting device is composed of a probe card 4 and a probe 5 made of a tungsten needle obliquely projected from this. In the inspection by this connecting device, a method is used in which the electrode 3 is rubbed and brought into contact with the contact pressure using the deflection of the probe 5 to inspect its electrical characteristics.
[0004]
Further, as the density of semiconductor elements has increased, as shown in FIG. 20, a chip-like semiconductor element 2 having solder bumps 6 for solder connection on its electrodes has been developed. As an inspection for such a semiconductor element 2, there is a method in which the semiconductor element 2 is opposed to the electrode 8 on the surface of the wiring substrate 7 and connected via the solder bumps 6 as shown in FIG. 21. Since this method is suitable for high-density mounting and collective connection with a high yield, its application is expanding.
[0005]
As an inspection method and an inspection apparatus capable of inspecting characteristics of a semiconductor element when an operation test using a high-speed signal is required as the density and pitch of the semiconductor element are further increased as described above, Japanese Patent Application Laid-Open No. Sho 64 There is a technique described in Japanese Patent No. -71141. This technique uses a spring probe having a shape in which two movable pins urged by springs so as to protrude in opposite directions are fitted into a tube so as to be freely retractable. That is, the inspection is performed by bringing the movable pin on one end of the spring probe into contact with the electrode of the inspection object and bringing the movable pin on the other end into contact with a terminal provided on the substrate on the measurement circuit side. .
[0006]
As an example of an extra-fine probe other than the spring probe, there is a technique described on pages 601 to 607 of the 1988 ITC (International Test Conference) lecture paper collection. FIG. 22 is a schematic diagram of the structure, and FIG. 23 is an enlarged perspective view of the main part. In the probe for conductor inspection used here, a wiring 21 is formed on the upper surface of a flexible dielectric film 20 by a lithographic technique, and a through hole of the dielectric film 20 provided at a position corresponding to the electrode of a semiconductor to be inspected. What formed the semicircular bump 23 in 22 by plating is used as a contact terminal. In this technique, a bump 23 connected to an inspection circuit (not shown) through a wiring 21 and a wiring substrate 24 formed on the surface of a dielectric film 20 is pressed against an electrode of a semiconductor element to be inspected by a leaf spring 25. It is a method of checking by sending and receiving signals.
[0007]
Further, there is one described in Japanese Patent Application Laid-Open No. 5-21218. This is achieved by using a hollow tool that has a metal plate, for example, a stainless steel plate, partially covered with a non-conductive film such as Teflon, and a metal portion that is not covered with a protrusion with a sharp tip. By pressing the protrusion, a depression having a shape corresponding to the shape of the protrusion is formed, and a metal layer is formed by plating a metal thereon, and further, a dielectric substrate is laminated thereon. Then, the dielectric substrate including the metal layer is peeled off from the metal plate. That is, this is one in which a plurality of connector pads having sharp contact portions are arranged on a substrate. Then, this pointed contact portion is pressed against the integrated circuit pad for inspection.
[0008]
[Problems to be solved by the invention]
By the way, in recent years, with the increase in the density of semiconductor elements, the number of pins for inspection has increased and the number of pins has increased, and the development of a simple connection device for transmitting electrical signals between the electrodes of the semiconductor element and the inspection circuit has been developed. It is desired. In view of this, the above-described conventional technique will be examined.
[0009]
In the conventional probe card inspection method shown in FIGS. 17 and 18, the concentrated inductance is large due to the shape of the probe 5, and there is a limit to the inspection with a high-speed signal. That is, if the characteristic impedance of the signal line on the probe card is R, and the concentrated inductance of the probe is L, the time constant is L / R, and 1 ns in the case of R = 50 ohm and L = 50 nH. If you handle, the waveform will be distorted and accurate inspection will not be possible. Therefore, it is usually limited to direct current characteristic inspection. In the above probing method, there is a limit to the spatial arrangement of the probes, and it is impossible to cope with the increase in the density and the total number of electrodes of the semiconductor element.
[0010]
On the other hand, the method using a spring probe composed of two movable pins can inspect high-speed electrical characteristics because the length of the probe is relatively short. However, the self-inductance is approximately proportional to the bare probe length. Therefore, in the case of a probe having a diameter of 0.2 mm and a length of 10 mm, the inductance is about 9 nH. Crosstalk noise and ground level fluctuations (ground return current) that disturb high-speed electrical signals are a function of the self-inductance and are approximately proportional to the bare probe length. For this reason, when using a high-speed signal of several hundred MHz or more, a short probe of 10 mm or less is required. However, manufacturing such a spring probe is difficult and impractical.
[0011]
Further, the method using the bump formed by plating on a part of the copper wiring shown in FIGS. 22 and 23 as a probe has a flat or semi-circular tip, so that the surface of the material such as an aluminum electrode or a solder electrode is used. For the material to be contacted that generates an oxide, the contact resistance becomes unstable, and the load at the time of contact needs to be several hundred mN or more. However, there is a problem in making the load at the time of contact too large. That is, high integration of semiconductor elements has progressed, and high density multi-pin, narrow pitch electrodes are formed on the surface of the semiconductor element. For this reason, since a large number of active elements are formed directly under the electrodes, if the contact pressure of the probe on the electrodes during the semiconductor element inspection is too large, the electrodes and the active elements immediately below the electrodes may be damaged.
[0012]
In addition, the method disclosed in Japanese Patent Application Laid-Open No. 5-21218 has a problem that the drilling accuracy is poor because a hole is mechanically punched by pressing a hollow tool against a metal plate as a forming die. In other words, the positioning accuracy is limited because it is performed by a mechanical operation. In addition, there are variations in the way the holes are drilled. As a result, there is a problem that variations occur in the position, shape and size of the protrusions.
[0013]
Furthermore, the method disclosed in Japanese Patent Laid-Open No. 5-21218 does not take into consideration that the contact pressure of each protrusion is an appropriate value. In particular, in the method disclosed in Japanese Patent Application Laid-Open No. 5-21218, it is expected that variations in the shape of the protrusions and the like will occur. There is a problem in that pressure is required and, in part, the contact pressure becomes excessive.
[0014]
A first object of the present invention is to provide a connection device having contact terminals that can be contacted at multiple points and high density with respect to an object to be inspected, and a method for manufacturing the same.
[0015]
A second object of the present invention is to provide a connection device having electrical characteristics that can shorten the length of the probe and can cope with a high frequency, and a method for manufacturing the same.
[0016]
A third object of the present invention is to provide a connection device that can be manufactured with high processing accuracy and does not require fine assembly work, and a method for manufacturing the connection device.
[0017]
A fourth object of the present invention is to provide a connection device that realizes a contact terminal having a stable contact characteristic with a small contact pressure, and a method for manufacturing the same.
[0018]
A fifth object of the present invention is to provide an inspection device having a high density, multi-pin connection device having excellent electrical characteristics.
[0019]
[Means for Solving the Problems]
As means for achieving the above object, an example of the invention disclosed in the present application is as follows. A connection device having a contact terminal in contact with an electrode of a semiconductor element on a semiconductor wafer, the contact terminal filling a hole formed by anisotropic etching of a mold material with a conductive material, and removing the mold material It is the connection apparatus characterized by being formed.
[0027]
[Action]
According to said structure, a contact terminal can be comprised with the processus | protrusion formed using the anisotropic etching hole of a type | mold material as a type | mold. According to the anisotropic etching, for example, a hole having a sharp pyramidal tip is obtained. By using this hole as a mold, the cross-sectional area becomes smaller toward the distal end side, and a projection having a plurality of ridges from the proximal end side toward the distal end side is obtained. Further, by managing the etching conditions, a large number of fine and high-density contact terminals can be arranged with high accuracy. Therefore, it is possible to cope with the increase in the density of the measurement object.
[0028]
Further, by using the hole by anisotropic etching, the length of the contact terminal can be shortened (0.001 to 0.5 mm) to such an extent that the contact terminal can be formed by the silicon etching process. Thereby, the disturbance of the high-speed signal can be reduced.
[0029]
In addition, by making all pins contact the surface electrodes of a high-density, multi-pin, narrow-pitch semiconductor element, it is possible to realize an inspection in a stable operation state with little voltage fluctuation that can supply power over the entire surface of the semiconductor element. As a result, high-speed AC inspection becomes possible, high-speed operation of the semiconductor element can be confirmed and the output waveform can be observed in detail, and the characteristic margin of the semiconductor element can be grasped, so that the efficiency of designing the semiconductor element can be improved. Feedback is possible.
[0030]
Further, by providing the buffer layer, it is possible to absorb the variation in the distance between the electrode and the contact terminal. That is, by appropriately setting the material of the insulating film, the film thickness, and the elastic modulus of the buffer layer, the contact terminal is easily set to an appropriate value that does not damage the electrode and the active element immediately below it during probing. Is possible. Moreover, even if there is a slight level difference in the electrode to be contacted, the electrode can be contacted with a predetermined force by the deflection of the insulating film and the elasticity of the buffer layer.
[0031]
The change of the electrode pattern can be easily coped with only by changing the etching pattern.
[0032]
By using a material that can be used at a high temperature, such as polyimide, as the material of the insulating film, it becomes possible to perform an operation test at a high temperature. When the inspection target is a silicon-based semiconductor element, the insulating film on which the contact terminal is formed is used. By fixing to the silicon substrate, a connection device with little displacement due to the difference in linear expansion coefficient can be realized. For example, inspection can be easily performed at a high temperature even in a wafer state.
[0033]
In addition, the tip position of the connection terminal of the above connection device is designed in advance by considering the difference between the temperature at the time of manufacture and the temperature at the time of actual use, due to the difference in the coefficient of linear expansion between materials at the time of manufacture. By forming the connection terminal using a photoresist mask designed in consideration of the value, it is possible to realize a connection device with extremely good tip position accuracy even at high temperatures.
[0034]
Therefore, high-density, super-multi-pin operation tests using high-speed signals can be performed on electrodes of semiconductor elements, and the contact terminal tip accuracy is good even at high temperatures. The device can be manufactured.
[0035]
Note that the connection device of the present invention is not limited to a semiconductor element, and can be used as a contact device for opposing electrodes, and can be manufactured even with a narrow pitch and multiple pins.
[0036]
【Example】
Hereinafter, a connection device, a contact terminal, and an inspection device according to the present invention will be described based on examples.
[0037]
FIG. 14 shows the main part of the first embodiment of the connection device of the present invention. The connection device according to the present embodiment is provided on the substrate 109, the buffer layer 108 provided thereon, the insulating film 104, the contact terminal 103, and the insulating film 104, and used for drawing out from the contact terminal 103. Wiring 105. The substrate 109 is mounted on the wiring substrate 107, and the insulating film 104 is provided so that the peripheral edge extends outside the substrate 109. The extension portion 104a is smoothly bent outside the substrate 109, and the wiring substrate It is fixed on 107. At that time, the lead-out wiring 105 is electrically connected to the electrode 110 a provided on the wiring board 107. The connection is performed using, for example, solder 111. In FIG. 14, only one contact terminal 103 is shown for simplicity.
[0038]
The wiring board 107 is made of, for example, a resin material such as polyimide resin or glass epoxy resin, and includes an internal wiring 107a and a connection terminal 107b. The electrode 110a includes, for example, a through hole 110b connected to a part of the internal wiring 107a. The wiring substrate 107 and the substrate 109 are bonded using, for example, a silicon adhesive.
[0039]
The insulating film 104 is flexible and is preferably formed of a heat-resistant resin. In this embodiment, polyimide resin is used. The buffer layer 108 is made of an elastic material such as an elastomer. In particular,silicone rubberEtc. are used. The contact terminal lead 103 and the lead-out wiring 105 are made of a conductive material. Details of these will be described later. Further, in FIG. 14, only one contact terminal is shown as the contact terminal 103 and the lead-out wiring 105 for simplicity of explanation, but of course, a plurality of contact terminals are actually arranged as will be described later.
[0040]
FIG. 15 shows the main part of a second embodiment of the connection device of the present invention. The connecting device shown in FIG. 15 is configured in the same manner as the connecting device shown in FIG. 14 except that the structures of the contact terminal 112 and the lead-out wiring 114 are different. That is, in this embodiment, the contact terminal 112 is configured by providing a projection on the insulating film 113 and providing a conductor film thereon. In the present embodiment, the conductor film is integrally formed of the same material and the same process as the lead-out wiring 114. Further, unlike the example of FIG. 14 described above, the lead-out wiring 114 is provided on a surface that does not face the wiring substrate 107. Therefore, in order to connect with the electrode 110a of the wiring board 107, the insulating film 114 is provided with a via 115 filled with metal plating. In addition, you may make it connect by wire bonding instead of a via | veer.
[0041]
FIG. 16 shows a main part of a third embodiment of the connection device of the present invention. The connection device shown in FIG. 16 is configured in the same manner as the connection device shown in FIGS. 14 and 15 except that the structure of the contact terminal 116 and the lead-out wiring 114 is different. That is, in this embodiment, the contact terminal 116 is configured by providing the insulating film 117 with the same protrusion as in the embodiment shown in FIG. 14 and providing the conductor film thereon. The conductor film is provided together with the lead-out wiring 114 in the same manner as in the embodiment shown in FIG.
[0042]
In the first and third embodiments described above, the contact terminals 103 and 116 are made of a conductive material. Therefore, this part is harder than the other parts, so that the contact is better when the part is brought into contact with the electrode of the measurement object. In the second and third embodiments, the conductive coating of the contact terminals 112 and 116 and the wiring can be formed by the same process, so that the manufacturing is simplified.
[0043]
The arrangement of the contact terminals and the wiring pattern of the lead-out wiring in these connection devices are variously configured corresponding to the measurement object, for example, the electrode pattern of the semiconductor integrated circuit. Examples thereof are shown in FIGS.
[0044]
Fig.12 (a) is a top view which shows an example of arrangement | positioning of the contact terminal in the connection apparatus of this invention, and drawing-out wiring. FIG.12 (b) is a perspective view which shows the state which bent the insulating film in which the wiring is provided. FIG. 13A is a plan view showing another example of the arrangement of the contact terminals and the lead-out wiring in the connection device of the present invention. FIG.13 (b) is a perspective view which shows the state which bent the insulating film in which the wiring is provided. In these drawings, the number of contact terminals and lead-out wirings is reduced and the density is reduced for the sake of simplicity of illustration and description. In practice, it is needless to say that a large number of contact terminals can be provided and can be arranged at a high density.
[0045]
As shown in FIGS. 12A and 12B and FIGS. 13A and 13B, the connection device corresponds to the electrode to be measured on the insulating film 104 formed of, for example, a polyimide film. Contact terminals 103 arranged at positions where the contact terminals 103 are connected, and lead wires 105 that have one end connected to the contact terminals 103 and the other end routed to a terminal portion 105 a provided on the peripheral edge portion 104 a of the insulating film 104. It is done. The lead-out wiring 105 can be wired in various ways. For example, each wiring can be drawn out in one direction, or can be wired radially. Specifically, in the example of FIGS. 12A and 12B, the insulating film 104 is formed in a rectangular shape, and the terminal portions 105a are disposed at both ends. In the example of FIGS. 13A and 13B, the insulating film 104 is formed in an octagon shape, and the lead-out wiring 105 is provided to the terminal portions 105a provided on each side of the octagon.
[0046]
Next, an outline of manufacturing these connection devices will be described. In addition, the detail of manufacture of a contact terminal is mentioned later.
[0047]
For example, when the inspection target is an electrode on the surface of an LSI formed on a wafer, a wiring drawing method in the connection device for transmitting an electrical signal to the inspection device main body is performed as follows. First, as shown in FIG. 12 (a) or FIG. 13 (a), a contact terminal forming mold 102 that is slightly larger than the region 101 of the LSI forming wafer is used to form the same region 101 as the LSI forming wafer. A hole for forming the contact terminal 103 is formed by anisotropic etching to manufacture a mold. And the protrusion for comprising the contact terminal 103 is provided using this type | mold. Further, an insulating film 104 made of a polyimide film and a lead-out wiring 105 are formed on the surface of the contact terminal forming mold material 102. Further, as necessary, a cut 106 is made in the insulating film 104 as shown in FIG. Then, after removing the insulating film 104 from the mold, as shown in FIG. 12B or FIG. 13B, a region where the contact terminals 103 corresponding to the region 101 of the LSI forming wafer are formed is formed. Bend it so that it is enclosed by a square. Further, as shown in FIG. 14, an elastomer serving as a buffer layer 108 and a silicon wafer serving as a substrate 109 are sandwiched between the insulating film 104 and the wiring substrate 107, and an electrode 110 a of the wiring substrate 107 is disposed. In addition, the lead-out wiring 105 is connected with the solder 111.
[0048]
In this example, the insulating film 104 is removed from the mold and then bent and placed on the wiring board 107, but the present invention is not limited to this. As will be described later, the buffer layer 108 and the substrate 109 can be integrally attached before being removed from the mold and then placed on the wiring substrate.
[0049]
Next, the structure and manufacturing method of the contact terminal portion of the connection device of the first embodiment will be described.
[0050]
The connection device shown in FIG. 2 has a polyimide film 32 as an insulating film 104 and a contact terminal 103 is provided on the polyimide film 32. The contact terminal 103 includes a bump 35 for forming a protrusion, and a conductive coating 31 and a plating film 31b that are attached to the tip of the bump. Further, in this connection device, a wiring 38 and a plating film 39 constituting the lead-out wiring 105 are provided on one surface (substrate facing surface) of the polyimide film 32 so that one end thereof is in contact with the bump 35. Yes. Furthermore, on this, as an elastomer constituting the buffer layer 108silicone rubber41 and the silicon wafer 40 constituting the substrate 109 are arranged. In this embodiment, the conductive coating 31 is made of a gold film. The plating film 31b is composed of a rhodium film. The reason for using rhodium as the plating film 31b is that the hardness of the rhodium film is larger than that of the gold film.
[0051]
In FIG. 2, the typical dimension of each part of the connection apparatus of a present Example is shown. As is clear from the dimension example shown in FIG. 2, in this embodiment, a quadrangular pyramid-shaped contact terminal having a bottom side of 40 μm can be realized. In addition, since the square pyramid is patterned by photolithography on the mold material, the position and size are determined with high accuracy. Moreover, since it forms by anisotropic etching, a shape can be formed sharply. That is, the cross-sectional area becomes smaller toward the tip side, and the shape can have a ridge. In particular, the tip can be pointed as shown in the table below. These features are common to the other embodiments.
[0052]
Table 1 shows an example of the dimensions and processing accuracy of such contact terminals in the connection device of this example. In addition, a dimension and arrangement | positioning are examples, Comprising: This invention is not limited to this. Further, not only in the present embodiment but also in other embodiments, similar dimensions and processing accuracy can be realized.
[0053]
[Table 1]

[0054]
The reason why the contact terminal has a sharp tip is as follows.
[0055]
When the electrode to be measured is aluminum, an oxide film is formed on the surface, and the resistance at the time of contact becomes unstable. For such an electrode, in order to obtain a stable resistance value with a resistance variation of 0.5Ω or less at the time of contact, the tip of the contact terminal breaks through the oxide film on the electrode surface, It is necessary to ensure contact. For that purpose, for example, when the tip of the contact terminal is semicircular, it is necessary to rub each contact terminal against the electrode with a contact pressure of 300 mN or more per pin. On the other hand, when the tip of the contact terminal has a shape having a flat portion with a diameter of 10 μm-30 μm, it is necessary to rub each contact terminal against the electrode with a contact pressure of 100 mN or more per pin.
[0056]
On the other hand, in the case of the contact terminal of the connection device of the present embodiment having the shape indicated by the above numerical value, if there is a contact pressure of 5 mN or more per pin, it can be simply pressed without rubbing against the electrode. It can be energized with a stable contact resistance. As a result, since it is only necessary to contact the electrode with a low needle pressure, it is possible to prevent damage to the electrode or the element immediately below it. Also, the force required to apply pin pressure to all contact terminals can be reduced. As a result, it is possible to reduce the load resistance of the prober drive device in the test apparatus using this connection device, and to reduce the manufacturing cost.
[0057]
In addition, when a load of 100 mN or more per pin can be applied, for example, if the side of the bottom surface is a quadrangular pyramid projection having a side of 40 μm, the tip portion is It does not have to be sharp. However, for the reasons described above, it is preferable to reduce the area of the tip as much as possible.
[0058]
Next, a manufacturing process for forming the connection device shown in FIG. 14 will be described with reference to FIG.
[0059]
FIG. 1 shows a manufacturing process for forming the connection device shown in FIG. 14, in particular, a quadrangular pyramid contact terminal tip portion using a quadrangular pyramid hole formed by anisotropic etching on a silicon wafer as a mold material. The manufacturing process for forming a thin film in the order of steps is shown.
[0060]
FIG. 1A shows a process of forming a silicon dioxide film 27 by thermal oxidation on both sides of the (100) surface of a silicon wafer 26 having a thickness of 0.2 to 0.4 mm. The silicon wafer 26 is oxidized by, for example, thermal oxidation in wet oxygen at an oxidation temperature of 1000 ° C. for 100 minutes. Thereby, the silicon dioxide film 27 is formed to about 0.5 μm.
[0061]
FIG. 1B shows a process of forming a photoresist mask 28 on the surface of the silicon dioxide film 27 and etching the silicon dioxide film 27. Formation and patterning of the photoresist mask 28 are performed as follows. First, OFPR800 (manufactured by Tokyo Ohka Kogyo Co., Ltd.) is applied to the surface of the silicon dioxide film 27. Next, a pattern of a square opening 29 having a side of several tens of μm is exposed at a position where a contact terminal is to be formed, and developed by NMD3 (manufactured by Tokyo Ohka Kogyo Co., Ltd.). Next, the silicon dioxide film 27 exposed through the opening 29 is etched by being immersed in a 1: 7 mixed solution of hydrofluoric acid and ammonium fluoride.
[0062]
1C, the photoresist mask 28 is removed, and the silicon wafer 26 is anisotropically etched using the silicon dioxide film 27 as a mask to form a square pyramid etching hole 26a surrounded by the (111) plane. The process to perform is shown. The photoresist mask 28 is removed using S502a (manufactured by Tokyo Ohka Kogyo Co., Ltd.) as a release agent. Etching of the silicon wafer 26 is performed, for example, by immersing in a mixed solution of potassium hydroxide and water. Instead of this liquid, a mixed liquid of potassium hydroxide, isopropanol and water may be used.
[0063]
FIG. 1D shows a process of forming a silicon dioxide film 30 of about 0.5 μm on the (111) plane of the anisotropically etched silicon wafer 26 by thermal oxidation in wet oxygen.
[0064]
FIG. 1E shows a step of forming a base film 31 a and a conductive coating 31 on the surface of the silicon dioxide film 30 on the surface of the anisotropically etched silicon wafer 26. The conductive coating 31 forming step, here, the gold film is formed by a thin film forming process, for example, a sputtering method or a vapor deposition method. Specifically, 0.02 μm of chromium having good adhesion to silicon dioxide is deposited as a metal to be the base film 31a by sputtering, and then 0.5 μm of gold to be the conductive coating 31 is deposited by sputtering. Formed.
[0065]
The conductive coating 31 is formed by applying 0.02 μm of titanium having good adhesion to silicon dioxide as a base film 31a by sputtering or vapor deposition, and then depositing 0.5 μm of gold to be the conductive coating 31. And can be formed. Further, the conductive coating 31 is formed by depositing nickel by sputtering or vapor deposition on a film in which a noble metal such as gold or rhodium is deposited by 0.1 to 0.2 μm by vapor deposition or sputtering. May be formed.
[0066]
In FIG. 1F, a polyimide film 32 serving as an insulating film is formed on the surface of the conductive coating 31, and then the polyimide film 32 at a position 33 where a contact terminal is to be formed is applied to the conductive film 31. The process of removing until it reaches the surface of the coating 31 is shown. The polyimide film 32 is formed, for example, by applying photosensitive polyimide about 10 to 30 μm, exposing and developing. At this time, an opening 34 is formed in the polyimide film 32 at a position 33 where a contact terminal is to be formed by exposure and development using a predetermined mask pattern.
[0067]
The opening 34 may be formed by other methods. For example, this is performed as follows. On the surface of the conductive coating 31, about 10 to 30 μm of polyimide is applied and baked, exposed and developed to form a polyimide film. Alternatively, a polyimide film 32 is formed by bonding a two-layer polyimide film in which a polyimide before thermosetting is applied to the lower surface of the thermoset polyimide to the surface of the conductive coating 31 in a vacuum and curing by heating. . On the surface of the polyimide film 32, an aluminum mask having an opening at a position 33 where a contact terminal is to be formed is formed. Then, the polyimide film 32 is removed by dry etching to reach the surface of the conductive coating 31 by oxygen plasma anisotropic dry etching or excimer laser ablation, and the aluminum mask is removed to form the opening 34. To do.
[0068]
FIG. 1G shows a material having high hardness such as nickel with the conductive coating 31 exposed to the opening 34 of the polyimide film 32 formed at the position 33 where the contact terminal is to be formed, using the conductive coating 31 as an electrode. A step of forming a bump 35 to be a contact terminal by electroplating is shown.
[0069]
Here, examples of the plating material include metals of Group VIII or IB of the periodic table and alloys thereof. These metals or alloys may be electroplated, or nickel boron, nickel phosphorus or the like may be electrolessly plated. As the alloy plating, for example, Ni—Pd, Ag—Pd, Au—Cu, Au—Ag, or Au—Ni is used.
[0070]
In FIG. 1H, a conductive film 36 having a thickness of about 1 μm is formed on the surfaces of the polyimide film 32 and the bumps 35 by forming a copper film by sputtering or vapor deposition, and wiring is formed on the surfaces. A process of forming a formation photoresist mask 37 is shown. The photoresist mask 37 is formed by applying photosensitive polyimide on the surface of the copper conductive film 36 and exposing and developing the wiring pattern.
[0071]
In FIG. 1I, the conductive film 36 (see FIG. 1H) is etched using the photoresist mask 37 to form a wiring 38, the photoresist mask 37 is removed, and the wiring 38 has a thickness. The process of forming a copper plating film 39 of several tens of μm is shown.
[0072]
FIG. 1 (j) shows a gap between the surface of the polyimide film 32 on which the wiring by the plating film 39 is formed and the silicon substrate 40.silicone rubberThe process of integrating 41 and 41 is shown.
[0073]
In addition, on the surface of the polyimide film 32 on which the wiring by the plating film 39 is formed, a polyimide is formed as a protective film for the wiring, and between the surface of the polyimide layer and the silicon substrate 40,silicone rubber41 may be integrated. If necessary,silicone rubber41 may be omitted. In this embodiment, for example, the thickness is 0.5 to 3 mm, and the hardness (JISA) is about 15 to 70.silicone rubberIs used as an elastomer. However, the elastomer is not limited to this. The adhesion between the polyimide film 32 and the silicon substrate 40 is as follows.silicone rubberSince 41 itself has an adhesive ability, no adhesive is used. In addition, you may make it adhere | attach using an adhesive agent.
[0074]
In FIG. 1 (k), the silicon dioxide film 30 and the silicon wafer 26 are removed by etching until reaching the surface of the conductive coating 31, and then the base film 31a is further removed by etching. A step of forming a photoresist mask 42 so as to expose 31 and cover a portion to be a tip of a contact terminal on the surface of the conductive coating 31 is shown. For example, when chromium is used as the base film 31a, a mixed liquid of potassium ferricyanide and sodium hydroxide is used for removing chromium.
[0075]
Further, when the conductive coating 31 is formed on the surface of the silicon dioxide film 30 without forming the base film 31a by using a noble metal film such as gold or rhodium as the conductive coating 31, a silicon dioxide film The photoresist mask 42 may be formed so that the interface between the noble metal film 30 and the noble metal film formed on the surface of the noble metal film 30 is peeled off to cover the tip of the contact terminal on the surface of the noble metal film. According to this method, the step of etching the silicon dioxide film 30 and the silicon wafer 26 and the step of etching chromium or titanium can be eliminated, so that the manufacturing time can be shortened.
[0076]
In FIG. 2, the conductive coating 31 is etched down to the surface of the polyimide film 32, and the conductive coatings 31 each having a quadrangular pyramid shape are electrically separated as necessary, and the photoresist mask 42 is removed. A process is shown.
[0077]
Thereafter, a plating film 31b made of gold or rhodium is formed on the surface of the conductive coating 31 having a quadrangular pyramid shape at the tip of the contact terminal. Thereby, the contact terminal of the structure shown in FIG. 2 is formed. By plating gold or rhodium, the electrical contact characteristics can be stabilized and improved. Gold or rhodium plating may be omitted.
[0078]
It should be noted that providing a plating film having a hardness higher than that of the conductive coating 31 is convenient for breaking through an oxide film or the like of the electrode that contacts the contact terminal. For example, when the conductive coating 31 is gold, the plating film is formed using rhodium having a higher hardness.
[0079]
According to this embodiment, it is possible to easily form contact terminals of about 10 μm as the pitch of the electrode pad portions. Further, the accuracy of the contact terminal height can be achieved within ± 2 μm.
[0080]
Next, another manufacturing process for forming the connection device shown in FIG. 14 will be described with reference to FIG. Note that description of the same steps as those shown in FIG. 1 is omitted.
[0081]
FIG. 3A shows a process of forming a base film 31a on the surface of the anisotropically etched silicon wafer 26 of FIG. 1C and forming a conductive coating 31 thereon. In this step, a material having good adhesion with silicon, for example, chromium is used as the base film 31a. Further, as the conductive coating 31, for example, gold is used. Chromium and gold are sequentially deposited by sputtering or vapor deposition. Note that titanium may be used as the base film 31a instead of chromium.
[0082]
Note that the conductive coating 31 is made of a film obtained by depositing a noble metal such as gold or rhodium by about 0.1 to 0.2 μm by a vapor deposition method or a sputtering method, and nickel by a sputtering method or a vapor deposition method by about 1 to 2 μm. A coated film may be used.
[0083]
Next, a manufacturing process similar to that shown in FIGS. 1 (f) to 1 (j) is carried out. As shown in FIG. 3 (b), the surface of the polyimide film 32 on which the wiring is formed by the copper plating film 39 is formed. Between silicon substrates 40silicone rubber41 is inserted and integrated.
[0084]
Thereafter, as shown in FIG. 3C, the silicon dioxide film 27 and the silicon wafer 26 are etched and removed until reaching the surface of the conductive coating 31. Further, the base film 31a on the surface of the conductive coating 31 is removed by etching, and a photoresist mask 42 is formed so as to cover the portion of the conductive coating 31 that will be the tip of the contact terminal. Thereafter, the conductive coating 31 is etched until reaching the surface of the polyimide film 32. As a result, the conductive coatings 31 having individual quadrangular pyramid shapes are electrically separated as necessary.
[0085]
Next, the photoresist mask 42 is removed to form the connection device shown in FIG.
[0086]
After this, gold or rhodium may be plated on the surface of the conductive coating 31 having a quadrangular pyramid shape at the tip of the contact terminal. Thereby, an electrical contact characteristic can be stabilized and improved.
[0087]
Next, a manufacturing process for forming the connection device shown in FIG. 15 will be described with reference to FIG.
[0088]
FIG. 4 shows a manufacturing process for forming the connection device shown in FIG. 15, and in particular, using a quadrangular pyramid hole formed by anisotropic etching on a silicon wafer as a mold material, the tip of the quadrangular pyramid contact terminal The manufacturing process for forming a thin film in the order of steps is shown. Note that description of the same steps as those shown in FIG. 1 is omitted.
[0089]
FIG. 4A shows a process of forming a base film 31a and a conductive coating 31 on the surface of the silicon dioxide film 30 on the surface of the anisotropically etched silicon wafer 26 shown in FIG. The base film 31a is formed by depositing chromium in an amount of 0.02 μm, for example, by sputtering or vapor deposition. The conductive coating 31 is formed, for example, by depositing 0.2 μm of gold on the base film 31a by sputtering or vapor deposition. In addition, the base film 31a may be coated with 0.02 μm of titanium by sputtering or vapor deposition instead of chromium. Further, the conductive coating 31 is formed by depositing nickel on the gold film by about 1 to 2 μm by sputtering or vapor deposition, and electroplating nickel, copper or both on the surface by about 2 to 40 μm. May be.
[0090]
In addition, as the conductive coating 31, nickel is deposited by sputtering or vapor deposition on a film in which a noble metal such as gold or rhodium is deposited by sputtering or vapor deposition on the order of 0.1 to 0.02 μm. A deposited film may be used.
[0091]
Next, as shown in FIG. 4B, a polyimide film 43 constituting the insulating film 113 (see FIG. 15) is formed on the surface of the conductive coating 31, and the surface of the polyimide film 43 and the silicon substrate are formed. Between 40silicone rubber45 and put together. As the polyimide film 43, for example, a film formed by applying polyimide with a thickness of about 10 to 30 μm and heating and curing can be used. Further, it is possible to use a film formed by bonding a two-layer polyimide film in which a polyimide before thermosetting is applied to the lower surface of a thermoset polyimide to the surface of the conductive coating 31 in a vacuum and curing by heating. it can.
[0092]
In FIG. 4C, after the silicon dioxide film 30 and the silicon wafer 26 are removed by etching, the underlying film 31a is removed by etching, and further, a portion serving as a contact terminal tip on the surface of the conductive coating 31 and A step of forming a photoresist mask 46 so as to cover the wiring portion is shown.
[0093]
When a noble metal film such as gold or rhodium is used as the conductive coating 31, the interface between the silicon dioxide film 30 and the noble metal film formed on the surface thereof is peeled off, and the contact terminal tip on the surface of the noble metal film A photoresist mask 46 may be formed so as to cover the portion to be and the wiring portion. In this case, as described above, the etching process can be omitted, and the manufacturing time can be shortened.
[0094]
In FIG. 4 (d), the conductive coating 31 is etched to reach the surface of the polyimide film 43, and the conductive coatings 31 each having a quadrangular pyramid shape are electrically separated as necessary to form wiring. A step of forming and removing the photoresist mask 46 is shown.
[0095]
After this, gold or rhodium may be plated on the surface of the conductive film 31 having a quadrangular pyramid shape at the tip of the contact terminal. Thereby, electrical contact characteristics can be stabilized and improved.
[0096]
Next, another manufacturing process for forming the connection device shown in FIG. 15 will be described with reference to FIG. Note that description of the same steps as those shown in FIG. 4 is omitted.
[0097]
FIG. 5A shows a step of forming a base film 31a and a conductive coating 31 on the surface of the anisotropically etched silicon wafer 26 shown in FIG. The base film 31a is formed, for example, by depositing chromium or titanium having good adhesion with silicon by sputtering or vapor deposition. The conductive coating 31 is formed, for example, by depositing gold on the base film 31a by a sputtering method or a vapor deposition method.
[0098]
Next, as shown in FIG. 5B, a polyimide film 43 is formed on the surface of the conductive coating, and a buffer layer is formed thereon.silicone rubberThe silicon substrate 40 is fixed integrally with 45 therebetween. This step is the same as the step shown in FIG.
[0099]
Thereafter, as shown in FIG. 5C, the silicon dioxide film 27 and the silicon wafer 26 are removed by etching. Further, a photoresist mask 46 is formed so as to cover the portion of the conductive coating 31 that becomes the tip of the contact terminal and the portion that becomes the wiring.
[0100]
Thereafter, the connection device shown in FIG. 5D is formed in the same manner as the process shown in FIG.
[0101]
After this, as described above, gold or rhodium may be plated on the surface of the conductive coating 31 having a quadrangular pyramid shape at the tip of the contact terminal.
[0102]
Next, a manufacturing process for forming the connection device shown in FIG. 16 will be described with reference to FIG.
[0103]
FIG. 6 shows a manufacturing process for forming the connection device shown in FIG. 16, in particular, using a quadrangular pyramid hole formed by anisotropic etching on a silicon wafer as a mold material, and using a quadrangular pyramid contact terminal tip. The manufacturing process for forming a thin film in the order of steps is shown. Note that description of the same steps as those shown in FIG. 1 or 4 is omitted.
[0104]
6A shows the surface of the silicon dioxide film 30 of the silicon wafer 26 in the state shown in FIG. 1D in which the silicon dioxide film 30 is formed after the anisotropic etching shown in FIG. 1C. The process of forming the base film 31a and the conductive coating 31 is shown. The base film 31a can be formed by depositing 0.02 μm of chromium or titanium having good adhesion to the silicon dioxide film 30 by, for example, a sputtering method or a vapor deposition method, as in the above-described embodiments. The conductive coating 31 can be formed by depositing 0.2 μm of gold on the base film 31a by, for example, a sputtering method or a vapor deposition method, as in the above-described embodiments. Further, the conductive coating 31 may be coated with nickel by about 1 to 2 μm by sputtering or vapor deposition, and nickel, copper or both may be plated on the surface by about 2 to 40 μm. Good. Thereby, electrical contact characteristics can be stabilized and improved.
[0105]
As the conductive coating 31, nickel is deposited by sputtering or vapor deposition on a film in which a noble metal such as gold or rhodium is deposited by vapor deposition or sputtering on the order of 0.1 to 0.2 μm. Furthermore, a film formed by plating nickel, copper, or both about 2 to 40 μm can also be used.
[0106]
Next, as shown in FIG. 6B, a polyimide film 32 for forming the insulating film 117 (see FIG. 16) is formed in a film shape on the surface of the conductive coating 31. As shown in FIGS. 1 (f) and 1 (g), a bump 35 is formed on the polyimide film 32 by electroplating a material having high hardness such as nickel using the conductive coating 31 as an electrode.
[0107]
Between the surface of the polyimide film 32 and the silicon substrate 40silicone rubber41 is inserted and integrated. As the polyimide film 32, for example, the conductive coating 31 may be formed by applying polyimide to about 10 to 30 μm and heat-curing, or a two-layer polyimide film in which polyimide before heat-curing is applied to the lower surface of the heat-cured polyimide. It is possible to use a material that is bonded to the surface of the material in a vacuum and heat-cured.
[0108]
In FIG. 6C, after the silicon dioxide film 30 and the silicon wafer 26 are removed by etching, the base film 31a is removed by etching, and the portions and wirings that become the contact terminal tips of the conductive coating 31 are shown. A step of forming a photoresist mask 46 so as to cover the part to be formed will be shown.
[0109]
In FIG. 6D, the conductive coating 31 not covered with the photoresist mask 46 is etched to reach the surface of the polyimide film 32, and the conductive coating 31 having the individual quadrangular pyramid shape is electrically connected. A process of separating, forming wiring, removing the photoresist mask 46, and metal plating the surface of the conductive coating 31 is shown. That is, here, a plating film 31 b made of rhodium is formed on the conductive coating 31. Thereby, this makes it possible to stabilize and improve the electrical contact characteristics.
[0110]
FIG. 6D shows an example of the dimensions of each part and the film structure of the conductive coating 31. The conductive coating 31 is laminated in the order of gold and rhodium from the insulating film side.
[0111]
Next, another manufacturing process for forming the connection device shown in FIG. 16 will be described with reference to FIG. Note that description of the same steps as those shown in FIG. 6 is omitted.
[0112]
7A, after the anisotropic etching of FIG. 1C, the conductive coating 31 is applied to the silicon wafer 26 in the same manner as the conductive coating 31 shown in FIG.
[0113]
Next, as shown in FIG. 7B, a polyimide film 32 for forming the insulating film 117 (see FIG. 16) is formed in a film shape on the surface of the conductive coating 31. As shown in FIGS. 1 (f) and (g), a material having high hardness such as nickel is electroplated on the position 33 where the contact terminal of the polyimide film 32 is to be formed as shown in FIGS. Then, the bump 35 is formed.
[0114]
Subsequently, a process of integrating the elastomer 41 between the surface of the polyimide film 32 on which the bumps 35 are formed and the silicon substrate 40 is shown.
[0115]
In addition, a polyimide layer is formed as a protective film on the surface of the polyimide film 32 on which the bumps 35 are formed, and between the surface and the silicon substrate 40.silicone rubber41 may be integrated. If necessary,silicone rubber41 may be omitted.
[0116]
In FIG. 7C, the silicon dioxide film 27 and the silicon wafer 26 are removed by etching, respectively, and then the base film 31a is removed by etching to become the contact terminal tip on the surface of the exposed conductive coating 31. A step of forming a photoresist mask 46 so as to cover the portion and the portion to be a wiring is shown.
[0117]
In FIG. 7D, the conductive coating 31 is etched to reach the surface of the polyimide film 32, and the conductive coatings 31 having individual quadrangular pyramid shapes are electrically separated as necessary to form wiring. A step of forming and removing the photoresist mask 46 is shown.
[0118]
After this, gold or rhodium may be plated on the surface of the conductive coating 31 having a quadrangular pyramid shape at the tip of the contact terminal. Thereby, an electrical contact characteristic can be stabilized and improved.
[0119]
In the embodiment shown in FIGS. 1 to 7, the conductive coating 31 is formed on the surface of the silicon dioxide film 30 on the surface of the anisotropically etched silicon wafer 26 shown in FIG. Although the process of depositing and forming a conductive material by sputtering or vapor deposition has been shown, without forming the base film 31a on the surface of the silicon dioxide film 30 on the surface of the anisotropically etched silicon wafer 26, An organic conductive film may be formed as the conductive coating 31. For example, after applying polypyrrole as an organic conductive polymer, the conductive film may be formed by dipping in a dilute sulfuric acid solution. In addition, as the conductive coating 31, a carbon film, a palladium film, or the like may be used. That is, by immersing the anisotropically etched silicon wafer in a carbon black suspension, a carbon film is formed as a conductive coating 31, or anisotropically etched into an aqueous hydrochloric acid solution of palladium chloride and tin chloride. After the silicon wafer is immersed, palladium may be formed as the conductive coating 31 by immersing in a sulfuric acid aqueous solution. A metal electroless plating film may be provided.
[0120]
Further, in the embodiment shown in FIG. 1H and FIG. 1I, the conductive film 36 is etched using the photoresist mask 37 to form the wiring 38, the photoresist mask 37 is removed, and the wiring 38, a copper plating film 39 was formed.
As another method for forming the wiring 38, after forming bumps 35 as contact terminals in the openings 34 of the polyimide film 32 in FIG. 1G, the polyimide film 32 is formed as shown in FIG. A conductive film 36 is formed on the surface of the bump 35 and a photoresist mask 47 for wiring formation is formed on the surface. As shown in FIG. 24I, the conductive film 36 not covered with the photoresist mask 47 is formed. The wiring 38 may be formed by forming a copper plating film 39 on the surface and removing the photoresist mask 47 and then removing the conductive film 36 not covered with the copper plating film 39 by selective etching. Here, the photoresist mask 47 is formed, for example, by applying a positive photoresist LP-10 (manufactured by Hoechst Japan) to the surface of the conductive film 36 and exposing and developing the wiring pattern.
[0121]
Thereafter, a manufacturing process similar to that shown in FIGS. 1 (j), 1 (k), and 2 may be performed to form the connection device shown in FIG. 24 (j).
[0122]
As a step of forming the conductive film 36, the conductive film 36 may be formed on the surfaces of the polyimide film 32 and the bumps 35 by wet treatment. That is, the conductive film 36 is coated with polypyrrole and then immersed in a diluted sulfuric acid solution to form a conductive film.
[0123]
In the embodiment shown in FIG. 1 to FIG. 7 or FIG. 24, the (100) plane of the silicon wafer 52 is anisotropically formed using a square mask 51 of the silicon dioxide film 50 as shown in FIG. This is an example in which a contact terminal having a contact tip portion of a quadrangular pyramid is formed by reactive etching. However, the present invention is not limited to this. For example, the (100) plane of the silicon wafer 52 is anisotropically etched using a square mask 51 of the silicon dioxide film 50 as shown in FIG. And a contact terminal having a contact tip portion surrounded by a (111) plane having a quadrangular pyramid shape can be formed. Using the rectangular mask 54 of the silicon dioxide film 53 as shown in FIG. 8C, the (100) plane of the silicon wafer 55 can be anisotropically etched to form the contact tip shape of the contact terminal. . Using the rectangular mask 54 of the silicon dioxide film 53 as shown in FIG. 8D, the (100) plane of the silicon wafer 55 is anisotropically etched to have a flat (100) plane at the tip. In addition, the contact tip shape of the contact terminal surrounded by the (111) plane having a quadrangular pyramid shape can be formed. Further, using the square mask 57 of the silicon dioxide film 56 as shown in FIG. 8E, the (110) plane of the silicon wafer 58 is anisotropically etched to form the contact tip shape of the contact terminal. Can do. Further, using the rectangular mask 60 of the silicon dioxide film 59 as shown in FIG. 8F, the (110) plane of the silicon wafer 61 is anisotropically etched to form the contact tip shape of the contact terminal. Also good.
[0124]
In the examples described so far, a silicon wafer is used as a mold material for forming the contact terminals. However, the present invention is not limited to this. Other crystals may be used as long as they can form a hole with a sharp tip by anisotropic etching.
[0125]
Further, in each of the above examples, all the contacts provided are connected to the wiring and can be used effectively. However, it is possible to provide a dummy contact terminal that functions only as a protrusion, to which no wiring is connected. That is, the dummy contact terminals can be appropriately disposed as necessary at the same height as the contact terminals or at an appropriately set height. As a result, the height variation of the contact terminals or the adjustment of the pressing pressure against the contact target can be facilitated, and the contact characteristics and reliability can be improved.
[0126]
FIG. 9 is an explanatory view showing a main part of an inspection apparatus which is an embodiment using the connection apparatus of the present invention.
[0127]
In this embodiment, the inspection apparatus is configured as a wafer prober in the manufacture of semiconductor elements. This inspection apparatus includes a sample support system 160 that supports an object to be inspected, a probe system 100 that contacts the object to be inspected and receives an electrical signal, a drive control system 150 that controls the operation of the sample support system 160, It is comprised with the tester 170 which performs a measurement. Note that the semiconductor wafer 1 is the object to be inspected. A plurality of electrodes 1 a as external connection electrodes are formed on the surface of the semiconductor wafer 1.
[0128]
The sample support system 160 includes a substantially horizontal sample stage 162 on which the semiconductor wafer 1 is detachably mounted, a vertically arranged lifting shaft 164 that supports the sample stage 162, and the lifting shaft. The elevating drive unit 165 that elevates and drives the 164 and the XY stage 167 that supports the elevating drive unit 165 are configured. The XY stage 167 and the casing 166 are fixed. The raising / lowering drive part 165 consists of a stepping motor etc., for example. The positioning operation of the sample stage 162 in the horizontal and vertical directions is performed by combining the movement operation of the XY stage 167 in the horizontal plane and the vertical movement by the elevating drive unit 165. The sample table 162 is provided with a rotation mechanism (not shown) so that the sample table 162 can be rotated and displaced in the horizontal plane.
[0129]
A probe system 100 is disposed above the sample stage 162. That is, the connection device 100a and the wiring board 107 are provided in a posture facing the sample stage 162 in parallel. In this connection device 100a, an insulating film 104 having a contact terminal 103, a buffer layer 108, and a substrate 109 are integrally provided. Each contact terminal 103 passes through the lower electrode 110a and the through hole 110b of the wiring board 107 and the internal wiring 107a via the lead-out wiring 105 provided on the insulating film 104 of the connection device 100a. Is connected to a connection terminal 107b provided on the terminal. In the present embodiment, the connection terminal 107b is a coaxial connector. The tester 170 is connected through a cable 171 connected to the connection terminal 107b. The connection device used here has the structure shown in FIG. 14, but is not limited thereto. The thing of the structure shown in FIG. 15 or FIG. 16 can also be used.
[0130]
The drive control system 150 is connected to the tester 170 via a cable 172. Further, the drive control system 150 sends a control signal to the actuator of each drive unit of the sample support system 160 to control its operation. That is, the drive control system 150 includes a computer inside, and controls the operation of the sample support system 160 in accordance with the progress information of the test operation of the tester 170 transmitted via the cable 172. Further, the drive control system 150 includes an operation unit 151, and accepts input of various instructions related to drive control, for example, manual operation instructions.
[0131]
Hereinafter, the operation of the inspection apparatus of the present embodiment will be described. The semiconductor wafer 1 is fixed on the sample stage 162, and the electrode 1a formed on the semiconductor wafer 1 is connected to the contact terminal 103 formed on the connection device 100a by using an XY stage 167 and a rotation mechanism. Adjust to position directly below. Thereafter, the drive control system 150 operates the elevation drive unit 165 and raises the sample stage 162 to a predetermined height, so that the tips of the plurality of contact terminals 103 are respectively connected to the plurality of electrodes 1a in the target semiconductor element. At a predetermined pressure. Up to this point, the operation is executed by the drive control system 150 in accordance with an operation instruction from the operation unit 151. These adjustments such as positioning may be automatically performed. For example, the reference position mark can be added to the semiconductor wafer 1 in advance, and this can be read by a reading device to set the coordinate origin. In this case, the position of the electrode becomes known in the drive control unit 150 by receiving design data in advance.
[0132]
In this state, operating power, operation test signals, and the like are exchanged between the semiconductor element formed on the semiconductor wafer 1 and the tester 170 via the cable 171, the wiring board 107, the insulating film 104, and the contact terminal 103. To determine whether or not the operating characteristics of the semiconductor element are acceptable. The series of test operations described above is performed for each of a plurality of semiconductor elements formed on the semiconductor wafer 1 to determine whether or not the operation characteristics are acceptable.
[0133]
Next, an example of an inspection apparatus in a burn-in process of a semiconductor element which is an embodiment using the connection apparatus of the present invention will be described.
[0134]
FIG. 10 is a perspective view showing a main part of an inspection apparatus in a burn-in process of a semiconductor element which is an embodiment using the connection apparatus of the present invention, and FIG. 11 is a sectional view of the semiconductor element inspection apparatus for burn-in. .
[0135]
The present embodiment is configured as a wafer prober that applies electrical and temperature stress to a semiconductor element in a wafer state at a high temperature state and performs a characteristic inspection of the semiconductor element. Further, in this embodiment, the characteristic inspection can be performed in a state where a plurality of wafers 1 are put in a thermostat (not shown) at a time.
[0136]
That is, in this embodiment, as shown in FIG. 11, a mother board 181 that is vertically attached to a support 190 placed in a thermostatic bath (not shown), and a perpendicular to this, that is, parallel to the support 190. It is composed of a plurality of individual probe systems 180 attached to the mother board 181.
[0137]
The mother board 181 includes a connector 183 provided for each individual probe system 180 and a cable 182 communicating with the connector 183 through the mother board 181. Although not shown in the present embodiment, the cable 182 is connected to a tester similar to the tester 170 shown in FIG.
[0138]
The individual probe system 180 is provided for each inspection object. The individual probe system 180 includes the connection device 100a, the wiring substrate 107 to which the connection device is fixed, a wafer support substrate 185 that supports the semiconductor wafer 1 that is an object to be inspected, and the wafer support substrate 185. And a support board 184 for attaching the individual probe system itself to the mother board 181, and a pressing substrate 186 for bringing the connection device 100 a into contact with the semiconductor wafer 1.
[0139]
Each part above the wafer support substrate 185 has a structure shown in FIG. That is, the wafer support substrate 185 is formed of, for example, a metal plate, and includes a recess 185a for detachably storing the semiconductor wafer 1 and a knock pin 187 for positioning.
[0140]
As described above, the connection device 100a includes the insulating film 104, the contact terminals 103 provided on the insulating film 104, the buffer layer 108, and the substrate 109. The connection device 100a is mounted on the wiring board 107, and the wiring drawn out from each contact terminal 103 is connected to the connector terminal 107c via the wiring 107d. The connector terminal 107c is adapted to be fitted with the connector 183. In this example, the connection device 100a shown in FIG. 14 is used, but is not limited to this. For example, those shown in FIGS. 15 and 16 can be used.
[0141]
A holding substrate 186 is mounted above the connection device 100a. The holding substrate 186 is formed in a channel shape, and the wiring substrate 107 is accommodated in the channel 186a. In addition, a hole 188 that fits with the knock pin 187 is provided in the peripheral portion of the holding substrate 186.
[0142]
Next, the measurement operation of the present embodiment will be described.
[0143]
The semiconductor wafer 1 is fixed to the recess 185a of the wafer support substrate 185, and each electrode formed on the semiconductor wafer 1 is positioned directly below each contact terminal 103 formed on the connection device 100a by using the knock pin 187. Then, the tips of each of the plurality of contact terminals 103 are brought into contact with each target electrode among the plurality of electrodes in the semiconductor element with a predetermined pressure. In this state, the cable 182, the motherboard 181, the connector 183, the wiring substrate 107, the lead-out wiring 105 (see FIG. 14) provided on the insulating film 104, and the contact terminal 103 are provided. An operation power, an operation test signal, and the like are exchanged between the semiconductor element formed on the semiconductor wafer 1 and the tester to determine whether the operation characteristics of the semiconductor element are acceptable. The series of operations described above are performed for each of the semiconductor wafers 1 mounted on the wafer support substrate 185 fixed to the mother board 181 fixed to the support tool 190 installed in the thermostat (not shown). Whether or not the characteristic is acceptable is determined.
[0144]
In addition, when making the contact terminal of a connection device contact an electrode, in the said Example, although the contact terminal and the electrode were connected on a one-to-one correspondence, it is not restricted to this. That is, you may make it contact several contact terminals about one electrode. Thereby, a more reliable contact can be ensured.
[0145]
In the above example, the mother board 181 is used, but without using this, the individual probe system 180 may be inspected by connecting it to a tester via a cable. In this case, the individual probe system 180 may have a structure different from that attached to the mother board 181. For example, members for attaching to the mother board 181 can be omitted.
[0146]
In addition, the tip position of the contact terminal of the above connection device is designed in advance by considering the difference between the temperature at the time of manufacture and the temperature at the time of actual use, due to the difference in linear expansion coefficient between materials at the time of manufacture. By forming the contact terminal using a photoresist mask designed in consideration of the value, it is possible to realize a connection device with extremely good tip terminal position accuracy even at high temperatures. One example is described below.
[0147]
The linear expansion coefficient of polyimide is 4 × 10^-FiveThe linear expansion coefficient of the silicon wafer on which the electrode to be inspected is formed is 2.9 × 10^-6When the mask formation temperature is 20 ° C. and the actual use temperature is 150 ° C., the calculation for designing the polyimide pattern considering the expansion coefficient and temperature difference is performed by the following equation: . For example, an electrode position photoresist mask 100 mm from the center of the 8-inch wafer surface may be designed as a position 99.520195 mm from the center of the photoresist mask according to the following equation. In other words, the electrode position of the photoresist mask may be designed on the scale of 0.99520195 times the design value of the electrode position of the silicon wafer at 20 ° C.
[0148]
[Expression 1]

[0149]
In each of the embodiments described above, the lead-out wirings 105 and 114 have been treated as normal lumped constant wiring, but the present invention is not limited to this. By providing a ground layer, the lead-out wirings 105 and 114 may be configured as microstrip lines.
[0150]
As a result, it is possible to perform characteristic inspection of semiconductor elements such as DC inspection and AC inspection up to a high frequency range, for example, several GHz band.
[0151]
By using the connection apparatus 100a capable of the above characteristic inspection, for example, the individual probe system 180 shown in FIG. 10 and the semiconductor element inspection apparatus shown in FIG. 11 are not limited to the burn-in inspection described above. It can be used as a wafer prober for characteristic inspection in the manufacture of semiconductor elements. In this case, even when the operation power and the operation test signal between the semiconductor element and the tester 170 are different between the characteristic inspection and the burn-in, the signal from the tester is switched or the motherboard is replaced. Once the wafer is mounted on the individual probe system 180, it is possible to perform inspection while the wafer is mounted on the individual probe system 180 until a series of inspection items are completed.
[0152]
According to the embodiment described above, a hole having a uniform depth and shape can be formed by anisotropic etching, and the protrusion for the contact terminal can be formed using the hole as a mold. Therefore, the contact terminals can be formed with high density and high accuracy by photolithography. In addition, a large number of contact terminals can be collectively formed with high positional accuracy. Moreover, when forming a hole, the contact terminal can be made to correspond exactly to the electrode position of the object to be inspected by using design information for determining the electrode position.
[0153]
Each embodiment described above uses a silicon wafer, but the present invention is not limited to this. Other crystalline materials can also be used.
[0154]
  Further, in each of the embodiments shown in FIGS. 14, 15 and 16, the connection device is mounted on the wiring board via the substrate 109, but the insulating film is attached to the wiring board via the buffer layer without passing through the substrate. It may be fixed.
As described above, according to the present embodiment described above, the contact terminals of the connection device can be multi-pointed and densified. In addition, when the number of terminals is increased, it is possible to collectively form the connection terminals with sharp tips at high density and high precision on the electrode pad portions of the wiring board, which has the effect of greatly improving the assemblability of the connection device.
Further, since the contact terminal can be formed in a fine shape by a thin film process, the length of the probe can be shortened, and electrical characteristics that can cope with a high frequency can be provided.
Further, the variation in the height direction of the connection terminal is caused by forming a quadrangular pyramid shape surrounded by the (111) plane by anisotropic etching of the (100) plane of silicon, and the photoresist mask is similar to the variation in the horizontal direction. The level close to the dimensional accuracy of the pattern can be obtained. Thereby, there exists an effect which improves the front-end | tip part position accuracy of a connection terminal significantly. Moreover, since it is formed by a thin film process, it can be manufactured with high processing accuracy and without requiring fine assembly work.
Further, in the connection device in which the connection terminal is brought into contact with the opposed electrode by the elastic force of the buffer layer according to the configuration of the present embodiment described above, a small load is absorbed by absorbing the variation in the distance between the contact terminal and the electrode. Thus, an equal pressure can be applied to each contact terminal. Thereby, all the pins can be reliably contacted. Further, it is possible to prevent an excessive load from being applied to the inspection object.
[0155]
【The invention's effect】
ADVANTAGE OF THE INVENTION According to this invention, the connection apparatus which has a to-be-inspected electrode and the contact terminal of favorable contact characteristics, and its manufacturing method can be provided.
[Brief description of the drawings]
FIGS. 1A to 1K are cross-sectional views illustrating a part of steps of an embodiment of a manufacturing process for forming a connection device according to the present invention.
FIG. 2 is a cross-sectional view showing the remainder of the steps of an embodiment of the manufacturing process for forming the connection device according to the present invention.
FIGS. 3A to 3D are cross-sectional views showing the steps of another embodiment of the manufacturing process for forming the connection device according to the present invention. FIGS.
FIGS. 4A to 4D are cross-sectional views showing the steps of another embodiment of the manufacturing process for forming the connection device according to the present invention. FIGS.
FIGS. 5A to 5D are cross-sectional views showing another embodiment of the manufacturing process for forming the connection device according to the present invention.
6A to 6D are cross-sectional views showing another embodiment of the manufacturing process for forming the connection device according to the present invention.
FIGS. 7A to 7D are cross-sectional views showing another embodiment of the manufacturing process for forming the connection device according to the present invention.
FIGS. 8A to 8F are perspective views showing molds of various shapes for forming contact terminals of the connection device according to the present invention.
FIG. 9 is a configuration diagram of a drive unit of the semiconductor element inspection apparatus.
FIG. 10 is a perspective view showing a main part of an individual probe of a semiconductor element inspection apparatus for burn-in.
FIG. 11 is a sectional view of a semiconductor element inspection apparatus for burn-in.
12A is a plan view showing one embodiment of a polyimide film on which contact terminals and lead-out wirings of a semiconductor element inspection apparatus according to the present invention are formed, and FIG. 12B is a perspective view. is there.
13A is a plan view showing one embodiment of a polyimide film on which contact terminals and lead-out wirings of a semiconductor element inspection apparatus according to the present invention are formed, and FIG. 13B is a perspective view. is there.
FIG. 14 is a cross-sectional view showing the main part of a first embodiment of the connection device of the present invention.
FIG. 15 is a cross-sectional view showing a main part of a second embodiment of the connection device of the present invention.
FIG. 16 is a cross-sectional view showing a main part of a third embodiment of the connection device of the present invention.
FIG. 17 is a perspective view of a wafer and a perspective view of a semiconductor element.
FIG. 18 is a cross-sectional view of a conventional inspection probe.
FIG. 19 is a plan view of a conventional inspection probe.
FIG. 20 is a perspective view showing a semiconductor element having solder balls on electrodes.
FIG. 21 is a perspective view showing a mounted state of a semiconductor element that is solder-melt connected.
FIG. 22 is a cross-sectional view of a main part of a conventional semiconductor element inspection apparatus using bumps by plating.
23 is a perspective view showing a bump portion obtained by plating in FIG. 22. FIG.
24 (h), (i), and (j) are cross-sectional views showing a part of steps of another embodiment of the manufacturing process for forming the connection device according to the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Wafer, 2 ... Semiconductor element, 3 ... Electrode, 4 ... Probe card, 5 ... Probe, 6 ... Solder bump, 7 ... Wiring board, 8 ... Electrode, 20 ... Dielectric film, 21 ... Wiring, 22 ... Via, 23 ... Bump, 24 ... Wiring substrate, 25 ... Plate spring, 26 ... Silicon wafer, 27 ... Silicon dioxide film, 28 ... Photoresist mask, 29 ... Opening, 30 ... Silicon dioxide film, 31 ... Conductive coating, 32,43 ... polyimide film, 33 ... contact terminal, 34 ... opening, 35 ... bump, 36 ... conductive film, 37, 42, 46, 47 ... photoresist mask, 38 ... wiring, 39 ... plating film, 40 ... silicon substrate, 41, 45 ...silicone rubber50 ... Silicon dioxide film, 51 ... Square mask, 52 ... Silicon wafer, 53 ... Silicon dioxide film, 54 ... Rectangular mask, 55 ... Silicon wafer, 56 ... Silicon dioxide film, 57 ... Square mask, 58 ... Silicon Wafer 59 ... silicon dioxide film 60 ... rectangular mask 100 ... probe system 100a ... connecting device 101 ... LSI forming wafer region 102 ... contact terminal forming wafer 103,112,116 ... contact terminal 104 , 113, 117 ... insulating film, 104a ... peripheral edge of insulating film, 105, 114 ... lead-out wiring, 105a ... terminal part of insulating film, 106 ... cut of polyimide film, 107 ... wiring substrate, 107a ... internal wiring, 107b Connection terminal 107c Connector terminal 107d Wiring 108 Buffer layer DESCRIPTION OF SYMBOLS 09 ... Board | substrate, 110a ... Electrode, 110b ... Through-hole, 111 ... Solder, 115 ... Via, 150 ... Drive control system, 151 ... Operation part, 160 ... Sample support system, 162 ... Sample stand, 164 ... Elevating shaft, 165 ... Elevating drive unit, 166..., Casing, 167... XY stage, 170 .. tester, 171 and 172 .. cable, 180... Individual probe, 181 ... mother board, 182 ... cable, 183. 184: Support board, 185 ... Wafer support substrate, 185a ... Recess of wafer support substrate, 186 ... Press substrate, 186a ... Channel, 187 ... Knock pin, 188 ... Hole that fits into the knock pin.

Claims (39)

A connection device having a contact terminal in contact with an electrode of a semiconductor element on a semiconductor wafer,
The contact device is formed by selectively filling a hole formed by anisotropically etching a mold material with a conductive material and removing the mold material. A connection device having a contact terminal in contact with an electrode of a semiconductor element on a semiconductor wafer,
The contact device is formed by selectively filling a hole formed by anisotropically etching a mold material with a conductive material and peeling the mold material. A connection device having a contact terminal in contact with an electrode of a semiconductor element on a semiconductor wafer, and a wiring board electrically connected to the contact terminal,
The contact device is formed by selectively filling a hole formed by anisotropically etching a mold material with a conductive material and removing the mold material. A connection device having a contact terminal in contact with an electrode of a semiconductor element on a semiconductor wafer, and a wiring board electrically connected to the contact terminal,
The contact device is formed by selectively filling a hole formed by anisotropically etching a mold material with a conductive material and peeling the mold material. The connection device according to any one of claims 1 to 4 ,
The connection device, wherein the conductive material is selectively filled by plating. The connection device according to any one of claims 1 to 5 ,
The connection device according to claim 1, wherein the conductive material is nickel. The connection device according to claim 3 or 4 ,
The connection device, wherein the contact terminal is formed in a gap portion of an insulating film provided on one surface side of the wiring board. The connection device according to claim 7 ,
The wiring that electrically connects the contact terminal and the wiring board is:
A connection device formed between the insulating film and the wiring board. The connection device according to claim 7 ,
The wiring that electrically connects the contact terminal and the wiring board is:
The connecting device, wherein the insulating film is formed on the back surface side of the surface facing the wiring substrate. The connection device according to any one of claims 7 to 9 ,
The connection device, wherein the insulating film is a polyimide film. Claim 3 and 4, a connecting device according to any one of 7乃 Itaru 10,
Furthermore, the connection device has a contact terminal that is not electrically connected to the wiring board. The connection device according to any one of claims 1 to 11 ,
A connection device, wherein an insulating layer made of an elastic material is provided on a rear end side of the contact terminal. The connection device according to claim 12 ,
The connection device, wherein the insulating layer is made of silicone rubber. The connection device according to any one of claims 1 to 13 ,
The contact device has a pyramid shape. The connection device according to any one of claims 1 to 14 ,
The contact terminal has a square or rectangular bottom surface and a point or line shape at the tip. The connection device according to any one of claims 1 to 15 ,
The contact device has a quadrangular pyramid shape or a quadrangular frustum shape. The connection device according to claim 16 , wherein
The contact device is characterized in that the angle formed between the bottom surface and the side surface is equal to the angle formed between the (100) surface and the (111) surface of silicon. The connection device according to any one of claims 1 to 17 ,
The connecting device according to claim 1, wherein the mold material is silicon. A connection device having a contact terminal in contact with an electrode of a semiconductor element on a semiconductor wafer,
The contact terminal is formed by filling a hole formed by anisotropic etching of a mold material with a conductive material and removing the mold material, and has a flat portion at a tip. apparatus. A connection device having a contact terminal in contact with an electrode of a semiconductor element on a semiconductor wafer,
The contact terminal is formed by filling a hole formed by anisotropic etching of a mold material with a conductive material, peeling the mold material, and having a flat portion at a tip. apparatus. The connection device according to claim 19 or 20 , comprising:
The connection device according to claim 1, wherein the bottom surface of the hole has a flat portion. The connection device according to any one of claims 19 to 21 ,
The contact device has a quadrangular frustum shape. The connection device according to claim 22 , wherein
The contact device is characterized in that the angle formed between the bottom surface and the side surface is equal to the angle formed between the (100) surface and the (111) surface of silicon. The connection device according to any one of claims 19 to 23 ,
One side of the flat part is less than 30 μm. The connection device according to any one of claims 1 to 24 ,
A connection device comprising a conductive coating on a surface of the contact terminal. The connection device according to claim 25 , comprising:
The connection device, wherein the conductive coating is gold or rhodium. A method for manufacturing a connection device having a contact terminal in contact with an electrode of a semiconductor element on a semiconductor wafer,
Forming a hole by anisotropically etching the mold material;
Selectively filling the holes with a conductive material to form contact terminals ;
Removing the pre-Symbol type material,
Method of manufacturing a connection device according to claim that you have a. A method for manufacturing a connection device having a contact terminal in contact with an electrode of a semiconductor element on a semiconductor wafer,
Forming a hole by anisotropically etching the mold material;
Selectively filling the holes with a conductive material to form contact terminals ;
A step of peeling the front Symbol type material,
Method of manufacturing a connection device according to claim that you have a. A method for manufacturing a connection device according to claim 27 or 28 , wherein:
Furthermore, it has the process of providing the insulating layer formed with the elastic material on the insulating film, The manufacturing method of the connection apparatus characterized by the above-mentioned. A method for manufacturing a connection device according to any one of claims 27 to 29 , wherein:
The contact terminal has a square or rectangular bottom surface and a point or line shape at the tip. A method for manufacturing a connection device according to any one of claims 27 to 30 , comprising:
The method of manufacturing a connection device, wherein the contact terminal has a quadrangular pyramid shape or a quadrangular pyramid shape. A method of manufacturing a connection device according to claim 31 ,
The contact terminal has an angle formed between the bottom surface and the side surface equal to an angle formed between the (100) surface and the (111) surface of silicon. A method for manufacturing a connection device according to any one of claims 27 to 32 , wherein:
A method for manufacturing a connection device, wherein the mold material uses silicon. A method for manufacturing a connection device according to any one of claims 27 to 33, comprising:
A method for manufacturing a connection device, comprising a flat portion at a tip of the contact terminal. A method for manufacturing a connection device according to claim 34 , comprising:
One side of the said flat part is less than 30 micrometers, The manufacturing method of the connection apparatus characterized by the above-mentioned. A method for manufacturing a connection device according to any one of claims 27 to 35 , wherein:
Furthermore, the manufacturing method of the connection apparatus characterized by having the process of forming an electroconductive coating | cover on the surface of the said contact terminal. A method of manufacturing a connection device according to claim 36 ,
The method for manufacturing a connection device, wherein the conductive coating is gold or rhodium. A method for manufacturing a connection device according to any one of claims 27 to 37 ,
The method for manufacturing a connection device, wherein the conductive material is selectively filled by plating. A method for manufacturing a connection device according to any one of claims 27 to 38 , wherein:
The method for manufacturing a connection device, wherein the conductive material is nickel.

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